Ladder Logic 12

8/12/2019 Ladder Logic 12

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What is a Ladder ?

Ladder diagrams ( sometimes called "ladder logic ) are a type of

electrical notation and symbology frequently used to illustrate how

electromechanical switches and relays are interconnected.

A Ladder diagram basically consists of two things:

Rails

Rungs


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The two vertical lines in a ladder are called Rails" andare attach to opposite poles of a power supply.

Horizontal lines in a ladder diagram are called Rungs "each one representing a unique parallel circuit branchbetween the poles of the power supply. PLC scans therungs of ladder logic from left to right , starting from thetop rung to the bottom rung.

Components of Ladder

001

002

003


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In Ladder logic, programming is done using registers. There are fourkinds of registers:

Inputs and Outputs : are pointers to the actual terminal stripconnectors on the PLC. If you energize an input, let's say 5 th of group 1of rack 1, then I:011/5 will have an on status

Internal relays : are just about the same as Inputs and Outputsexcept that they don't point to any hardware. They just hold an ON /

OFF value inside of the PLC's memory.

Data registers : are used for data like integers and hexadecimalnumbers as their addresses.

Ladder Logic Basics


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Logical Continuity

Each rung of ladder logic generally consists of two components.

Conditional Instructions

Output Instructions

If there is a path of true conditional instructions, then the rung goes trueand outputs occur.

SW-1 SW-2 MOTOR-1

SW-4 SW-5 LIGHT-2


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Types of Instructions Bit Instructions ( Input , Output , One Shot )

Timer Instructions

Counter Instructions

Compare Instructions

Math Instructions

Program Flow Instructions

Block Transfer Instructions

PID Instruction


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Bit InstructionsInput Instructions:

XIC ( Examine If Close )

BIT STATUS INSTRUCTION

ON TRUE

OFF FALSE

I:011

15

I:011

15


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Bit InstructionsInput Instructions:

XIC ( Examine If Open )

BIT STATUS INSTRUCTION

ON TRUE

OFF FALSE

I:022

15

I:022

15


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Bit InstructionsOutput Instructions:

OTE ( Output Energize )

Bit O:033/15 is high till the input conditions are true

RUNG STATUS BIT STATUS

TRUE ON

FALSE OFFO:033

15

O:033

15


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OTL ( Output Latch )

Bit O:033/15 remains high even after rung is false. OTL canonly turn-on a bit.

O:033

15

O:033

15

L

L

L


TRUE ON

FALSE NO CHANGE


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OTU ( Output Unlatch )

Bit O:033/15 turns OFF when the rung is true. OTU can onlyturn-off a bit.

O:033

15

O:033

15

U

U

U


TRUE OFF

FALSE NO CHANGE


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Bit InstructionsOne Shot Instruction :

ONS ( One Shot )

One-shot is used when it is required to enable the outputonly for one program scan upon a false to true transition ofthe conditions preceding the ONS instruction.

A unique address must be dedicated to each ONS instruction.

ONS reference bit can be stored in a Binary or Integer file.

ONS


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Bit InstructionsOne Shot Instruction :

Scan 1

Scan 2

Scan 3

Scan - 4

ONS

ONS

ONS

ONS


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Logic Gates


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Timer instructions

Timer Instruction Structure :

T f : s

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

T4:0 EN TT DN Internal Use Only

Preset Value ( 16 Bit )

Accumulated Value ( 16 bit )

Structure No. ( 0-999 )

File No. ( 3-999 , Default = 4 )

File Type ( T )


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.PRE

Preset bit

Specifies the value which the timer should reach before the

processor sets/resets the .DN bit. Range : 0 32,767

.ACCAccumulator bit

Number of time increments the instruction has counted Counting starts from the value entered in this word.

( Typical value = 0 )

.TTTimer timing

This bit is set the timer is timing

Time base 1 Sec : Range = 32767 time base intervals ( 9.1 hours ) 0.01 Sec : Range = 32767 time base intervals ( 5.5 minutes )

Timer instructions

Timer Control Word :


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Timer instructions

Timer On Delay ( TON ) :

This instruction is used to delay turning ON an output.

TIMER ON DELAYTimer

Time basePresetAccum

TON

EN

DN


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Timer instructions

TON Status Bits :

Rung ACC EN TT DN Timer

False = 0 0 0 0 Reset

True


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Timer instructionsTON Example :

I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13

TIMER ON DELAYTimer T4:0Time base 1.0Preset 3Accum 0

TON

EN

DN


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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


TON

EN

DN

Sets o/p when timer is running


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I:011

12

T4:0

DN

T4:TT

TT

O:012

12

O:012

13


TON

EN

DN

Sets o/p when timer is running


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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


TON

EN

DN

Sets o/p when timer is done timing


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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


TON

EN

DN


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Timer instructions

Timer Off Delay ( TOF ) :

This instruction is used to delay turning OFF an output.

TIMER ON DELAYTimer


TOF

EN

DN


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Timer instructions

TOF Status Bits :


True = 0 1 0 1 Reset

False


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Timer instructionsTOF Example :

I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


TOF

EN

DN

Sets o/p when timer is not timing


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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


TOF

EN

DN

Sets o/p when ACC < PRE

Sets o/p when timer is timing


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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


TOF

EN

DN

Sets o/p when ACC < PRE



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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


TOF

EN

DN

Resets o/p when ACC = PRE

Resets o/p when timer is done timing


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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


TOF

EN

DN


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Timer instructions

Retentive Timer ( RTO ) :

A Retentive Timer lets the timer stop without resetting theaccumulated value.

TIMER ON DELAYTimer


RTO

EN

DN


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Timer instructions

RTO Status Bits :


False = 0 0 0 0 Reset

True


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Timer instructionsRTO Example :

I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


RTO

EN

DN


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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


RTO

EN

DN



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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


RTO

EN

DN



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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


RTO

EN

DN

Resets o/p when timer is not timing


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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


RTO

EN

DN



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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


RTO

EN

DNRung is false butACC is not reset


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I:011

12

T4:0

DN

T4:0

TT

O:012

12

O:012

13


RTO

EN

DN

Timer reset required to reset ACC

I:011

13

RES

T4:0


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Counter Instruction Structure :

T f : s

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

C5:0 CU CD DN OV UN

Preset Value ( 16 Bit )

Accumulated Value ( 16 bit )

Structure No. ( 0-999 )

File No. ( 3-999 , Default = 5 )

File Type ( C )


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.PREPreset bit

Specifies the value which the counter should reach before theprocessor sets/resets the .DN bit. Range : 32,767 to + 32,767

.ACCAccumulator bit

Number of false-true transitions instruction has counted

.CUCount-up enable

Bit SET when rung containing count-up instruction is true

.CDCount-down enable

Bit SET when rung containing count-down instruction is true

.DNDone bit

Bit SET when PRE = ACC

.OVOverflow bit

Bit SET when counter has counted above upper limit +32,767

.UN

Underflow bit

Bit SET when counter has counted below lower limit - 32,767

Counter InstructionsCounter Control Word :


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Counter InstructionsCounter Value Range :

0-1 1

-32,767 +32,767UV Set OV Set


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Count-up ( CTU ) :

Each time rung goes from false true ACC value increases by 1

Count DownCounterPreset

Accum

CTD

EN

DN


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CTU Status - Bits :

Rung ACC CD DNTrue =PRE 0 1


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Counter InstructionsCounter Instructions

Count-down ( CTD ) :

Each time rung goes from false true ACC value decreases by 1

Count DownCounterPreset

Accum

CTD

EN

DN


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CTD Status - Bits :

Rung ACC CD DNTrue =PRE 0 1


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Equal To ( EQU ) :

EQU is used to test whether two value are equal. If source A isequal to Source B than output is energized.

EQUALSource A N7:9

Source B N7:10

EQUO:012

12


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Greater Than Or Equal To ( GEQ ) :

GEQ is used to test whether Source A is greater than Source B.Source A or Source B can be value or addresses that contain

values.

Greater Than Or EqualSource A N7:9

Source B N7:10

GEQO:012

12


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Greater Than ( GRT ) :

GRT is used to test whether Source A is greater than Source B.Source A or Source B can be value or addresses that contain

values.

Greater ThanSource A N7:9

Source B N7:10

GRTO:012

12


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Less Than Or Equal To ( LEQ ) :

LEQ is used to test whether Source A is less than or equal toSource B. Source A or Source B can be value or addresses that

contain values.

Less Than Or EqualSource A N7:9

Source B N7:10

LEQO:012

12


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Less Than ( LES ) :

LES is used to test whether Source A is less than Source B. SourceA or Source B can be value or addresses that contain values.

Less ThanSource A N7:9

Source B N7:10

LESO:012

12


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Limit Test ( LIM ) :

LIM is an input instruction that is used to test for value inside ofoutside of a specified limit. When the value being monitored is

within limit the output goes true. Low / High Limit can be a valueor addresses that contains values

Limit Test ( CIRC)

Low Limit N7:10Test N7:11High Limit N7:12

LIM O:012

12


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Compute Instructions

Compute instructions evaluate arithmetic operations using anexpression or a specific arithmetic instruction. Following arecommonly used math instructions:

CPT : Evaluate an expression

ADD : Add two values

SUB : Subtract two values

DIV : Divide one value by other

MUL : Multiply two values


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Compute InstructionsCompute Instruction ( CPT ):

Compute instruction is an output instruction. Its operation isdefined by the expression given in the instruction. Thisinstruction can perform various operations other thancomputing like:

Copy data from one address to another

Clear data of the destination address

Convert data type at source todata type specified at destination

COMPUTE

Destination

Expression

CPT


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Compute InstructionsValid CPT Operators:

Enhanced PLC processors support more operators ( Sine, Cosine,Tangent, AND, OR, XOR etc. )

Type Operator Description Example

Copy None Copy from A to B Enter Source in Expressionand Desti. in destination

Clear None Set a value tozero

Enter 0 for expression

Arithmetic + Add 2 + 3

- Subtract 11 4* Multiply 12 * 3

I ( vertical bar ) Divide 24 I 2

- Negate - N7:0

SQR SQUARE ROOT SQR N7:2


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Compute InstructionsCPT - Example:

COMPUTE

Destination N7:21

Expression(N7:5 I 5 ) I ( N7:6 )

CPTI:012

12

If input I:012/12 is SET divide value in N7:5 by 5 and divide the result byvalue in N7:6. Move the final result to destination address N7:21.


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Compute InstructionsAddition ( ADD ):

When input condition is true adds Source A and Source B andstores the result in destination address. Status flags are set in statusfile as defined earlier.

ADD

Source A N7:2Source B N7:3

Destination N7:21

ADDI:012

12

If input I:012/12 is SET add values in N7:2 & N7:3 and store the result in N7:21


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Compute InstructionsSubtract ( SUB ):

When input condition is true subtract Source B from Source A andstores the result in destination address. Status flags are set in statusfile as defined earlier.

SUBTRACT


Destination N7:21

SUBI:012

12

If input I:012/12 is SET subtract value in N7:3from value in N7:2 and store the result in N7:21


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Compute InstructionsDivide ( DIV ):

When input condition is true divide Source A from Source B andstores the result in destination address. Status flags are set in statusfile as defined earlier.

DIVIDE


Destination N7:21

DIVI:012

12

If input I:012/12 is SET divide value in N7:2by value in N7:3 and store the result in N7:21


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Compute InstructionsMultiply ( MUL ):

When input condition is true divide Source A from Source B andstores the result in destination address. Status flags are set in statusfile as defined earlier.

MULTIPLY


Destination N7:21

MULI:012

12

If input I:012/12 is SET multiply value in N7:2and value in N7:3 and store the result in N7:21


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Compute InstructionsClear ( CLR ):

When input condition is true CLR sets all the bits of the destinationword to zero.

CLEAR

Destination N7:21

CLRI:012

12

If input I:012/12 is SET , set all bits of word N7:21 to zero


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Move InstructionsMove ( MOV ):

MOV instruction is a output instruction that copies the sourceaddress to the destination address. The instruction moves dataeach scan till the rung is true.

The source and destination data should be same as thisinstruction does not perform a conversion.

MOVE

Source N7:0

Destination N7:21

MOVI:012

12

If input I:012/12 is SET value in N7:0 is moved to N7:21


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Move InstructionsMVM Example:

MASKED MOVESource N7:0Mask 1111000011110000Destination N7:21

MVM

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0

0 1 0 1 1 1 1 1 0 1 0 1 1 1 1 1

N7:21 Before move

N7:0 Source

Mask F0F0

N7:21 After move

P g Fl


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Program FlowInstructions

JMP

LBL

Jump (JMP) : When Jump instruction is true it lets processor skip rungs.

Label (LBL ) : Label instruction is the target of the Jump instruction thathas same label number. LBL should be the first instructionon the rung.

Program flow instructions change the flow of ladder program execution.Following are commonly used program flow instructions

P g Fl


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Always False (AFI) :

The AFI instruction is a input instruction that is used to make a rung falsewhen inserted in the condition side of the rung.

Program FlowInstructions

AFI

Block Tr nsfer


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Block TransferInstructions

Block-transfer instructions are used to transfer upto 64 words of datato/from a block transfer module in a local/remote I/O chassis.

Block-transfer Write (BTW) : is used when you want to transfer data to theblock-transfer module. When the rung goes true the instruction tells theprocessor to write data in the the data file specified to the specifiedrack/group/module address

Block-transfer Read (BTR) : is used when you want to receive data from theblock-transfer module. When the rung goes true the instruction tells theprocessor to read data from the rack/group/module address and store itin the data file

Block Transfer


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Block TransferInstructions

BTW and BTR Structure:

BLOCK TRANFR WRITERackGroupModuleControl Block

Data fileLengthContinuous

BTW

EN

DN


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Ladder Logic 12