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8/13/2019 Lab1a Report(DSP)
http://slidepdf.com/reader/full/lab1a-reportdsp 1/26
Introduction
The TMS320C6000 digital signal processor (DSP) platform is part of the TMS320 DSP family.The TMS320C62 DSP generation and the TMS320C6! DSP generation comprise fied"pointde#ices in the C6000 DSP platform$ and the TMS320C6% DSP generation comprises floatingpoint de#ices in the C6000 DSP platform. The C62 and C6! DSPs are code"compati&le. The
C62 and C6% DSPs are code"compati&le. 'll three DSPs se the elociT* architectre$ ahigh"performance$ ad#anced #ery long instrction +ord (,*-) architectre$ maing theseDSPs ecellent choices for mltichannel and mltifnction applications.
TMS320C62x DSP ArchitectureFigure 1--1 is the block diagram for the C62x DSP. The C6000 devices come with program memory, hich,on some devices, can be used as a program cache. The devices also have varying sizes of datamemory.Peripherals such as a direct memory access (DMA) controller, power-down logic, and external memoryinterface (EMIF) usually come with the CPU, while peripherals such as serial ports and host ports are ononly certain devices. Check your data manual for your device to determine the specific peripheralconfigurations.
Figure 1--1. TMS320C62x DSP Block Diagram
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Central Processing Unit (CPU)The C62x CPU, in Figure 1--1, contains:- Program fetch unit- Instruction dispatch unit- Instruction decode unit- Two data paths, each with four functional units-
32 32-bit registers- Control registers- Control logic- Test, emulation, and interrupt logicThe program fetch, instruction dispatch, and instruction decode units candeliver up to eight 32-bit instructions to the functional units every CPU clockcycle. The processing of instructions occurs in each of the two data paths (Aand B), each of which contains four functional units (.L, .S, .M, and .D) and16 32-bit general-purpose registers. The data paths are described in moredetail in Chapter 2. A control register file provides the means to configure andcontrol various processor operations. To understand how instructions arefetched, dispatched, decoded, and executed in the data path, see Chapter 4.
Internal Meor!The C62x DSP has a 32-bit, byte-addressable address space. Internal(on-chip) memory is organized in separate data and program spaces. Whenoff-chip memory is used, these spaces are unified on most devices to a singlememory space via the external memory interface (EMIF).The C62x DSP has two 32-bit internal ports to access internal data memory.The C62x DSP has a single internal port to access internal program memory,with an instruction-fetch width of 256 bits.
Meor! and Peri"heral #"tionsA variety of memory and peripheral options are available for the C6000platform:- Large on-chip RAM, up to 7M bits- Program cache- 2-level caches- 32-bit external memory interface supports SDRAM, SBSRAM, SRAM,
and other asynchronous memories for a broad range of external memoryrequirements and maximum system performance.TMS320C62x DSP Architecture
1-8 Introduction SPRU731A
- The direct memory access (DMA) controller transfers data betweenaddress ranges in the memory map without intervention by the CPU. TheDMA controller has four programmable channels and a fifth auxiliarychannel.- The enhanced direct memory access (EDMA) controller (C6211 DSPonly) performs the same functions as the DMA controller. The EDMA has16 programmable channels, as well as a RAM space to hold multipleconfigurations for future transfers.- The host port interface (HPI) is a parallel port through which a host processor
can directly access theCPUmemory space. The host device functionsas amaster to the interface, which increases ease of access. The host andCPU can exchange information via internal or external memory. The hostalso has direct access tomemory-mappedperipherals. Connectivity to theCPU memory space is provided through the DMA/EDMA controller.- The expansion bus is a replacement for the HPI, as well as an expansionof the EMIF. The expansion provides two distinct areas of functionality(host port and I/O port) that can co-exist in a system. The host port of theexpansion bus can operate in either asynchronous slavemode, similar tothe HPI, or in synchronous master/slave mode. This allows the device to
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interface to a variety of host bus protocols. Synchronous FIFOs andasynchronous peripheral I/O devices may interface to the expansion bus.- The peripheral component interconnect (PCI) port supports connection ofthe C62x DSP to a PCI host via the integrated PCI master/slave businterface.- The multichannel buffered serial port (McBSP) is based on the standard
serial port interface found on the TMS320C2000
and TMS320C5000
devices. In addition, the port can buffer serial samples in memory automaticallywith the aid of theDMA/EDMAcontroller. It also has multichannelcapability compatible with the T1, E1, SCSA, and MVIP networkingstandards.
$a%&a re"ort
Lab 1 – TMS320C6713 DSK and Code Composer Studio1.1. IntroductionThe hardware experiments in the DSP lab are carried out on the Texas Instruments TMS320C673 DSPStarter !it "DS!#$ based on the TMS320C673 %loatin& point DSP runnin& at 22' M()* The basic cloc+ c,cle
instruction time is /(22' M())=
-.-- nanoseconds* Durin& each cloc+ c,cle$ up to ei&ht instructionscan be carried out in parallel$ achie.in& up to /×22' = /00 million instructions per second "MIPS#*The C673 processor has 2'6! o% internal memor,$ and can potentiall, address -1 o% externalmemor,* The DS! board includes a 6M SDM memor, and a '2! 4lash 5M* It has an onboard6bit audio stereo codec "the Texas Instruments IC23# that ser.es both as an D and a D con.erter*There are %our 3*' mm audio 8ac+s %or microphone and stereo line input$ and spea+er and headphoneoutputs* The IC23 codec can be pro&rammed to sample audio inputs at the %ollowin& samplin& rates9
f s = /, 6, 2-, 32, --., -/, :6 +()The DC part o% the codec is implemented as a multibit thirdorder noiseshapin& deltasi&ma con.erter"see Ch* 2 ; 2 o% <= %or the theor, o% such con.erters# that allows a .ariet, o% o.ersamplin&
ratios that can reali)e the abo.e choices o% f s* The correspondin& o.ersamplin& decimation %ilters act
as antialiasin& pre%ilters that limit the spectrum o% the input analo& si&nals e%%ecti.el, to the >,?uist
inter.al [−f s/2, f s/2]* The DC part is similarl, implemented as a multibit secondorder noiseshapin&
deltasi&ma con.erter whose o.ersamplin& interpolation %ilters act as almost ideal reconstruction %ilterswith the >,?uist inter.al as their passband*
The DS! also has %our userpro&rammable DIP switches and %our @ADs that can be used to controland monitor pro&rams runnin& on the DSP*ll %eatures o% the DS! are mana&ed b, the CCS$ which is a complete inte&rated de.elopment en.ironment"IDA# that includes an optimi)in& CCBB compiler$ assembler$ lin+er$ debu&&er$ and pro&ramloader* The CCS communicates with the DS! .ia a S connection to a PC* In addition to %acilitatin& allpro&rammin& aspects o% the C673 DSP$ the CCS can also read si&nals stored on the DSPs memor,$ orthe SDM$ and plot them in the time or %re?uenc, domains*The %ollowin& bloc+ dia&ram depicts the o.erall operations in.ol.ed in all o% the hardware experiments
in the DSP lab* Processin& is interruptdri.en at the samplin& rate f s$ as explained below*
The IC23 codec is con%i&ured "throu&h CCS# to operate at one o% the abo.e samplin& rates f s* Aachcollected sample is con.erted to a 6bit twos complement inte&er "a sort data t,pe in C#* The codecactuall, samples the audio input in stereo$ that is$ it collects two samples %or the le%t and ri&ht channels*t each samplin& instant$ the codec combines the two 6bit le%tri&ht samples into a sin&le 32bitunsi&ned inte&er word "an unsi!ned int$ or "int32 data t,pe in C#$ and ships it o.er to a 32bit recei.ere&istero% the multichannel bu%%ered serial port "McSP# o% the C673 processor$ and then issues aninterrupt to the processor*pon recei.in& the interrupt$ the processor executes an interrupt ser.ice routine "IS# that implementsa desired sample processin& al&orithm pro&rammed with the CCS "e*&*$ %ilterin&$ audio e%%ects$ etc*#*
Durin& the IS$ the %ollowin& actions ta+e place9 the 32bit input sample "denoted b, x in the dia&ram# isread %rom the McSP$ and sent into the sample processin& al&orithm that computes the correspondin& TMS320C673 DS! >D C5DA C5MP5SA STDI5 /
32bit output word "denoted b, y#$ which is then written bac+ into a 32bit transmitre&ister o% theMcSP$ %rom where it is trans%erred to the codec and reconstructed into analo& %ormat$ and %inall, theIS returns %rom interrupt$ and the processor be&ins waitin& %or the next interrupt$ which will come atthe next samplin& instant*
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Clearl,$ all processin& operations durin& the execution o% the IS must be completed in the time
inter.al between samples$ that is$ T = /f s* 4or example$ i% f s = --. +()$ then$ T = /f s = 22.6/ μsec*
Eith an instruction c,cle time o% Tc = -.-- nsec$ this allows T/Tc = '0/ c,cles to be executed durin&
each samplin& instant$ or$ up to /×'0/ = -0/6- instructions$ or hal% o% that per channel*
/a1
'rite a c "rogra that "ro"ts a user to enter a sall no and then calculate its actorial
Print the *alue and its actorial in a nicel! oratted ashion Deonstrate ho+ !ou can
single ste" through this "rogra +hile +atching the actorial *alue gro+ Include listing
in !our re"ort as listing &
incldestdio.h4
incldemath.h4
int fact5 initiali7ed #aria&le factint n$i5 initiali7ed #aria&le n and i
main()
8
fact95
printf(:enter a1:)5
scanf(:;d:$<n)5 tae inpt from ser
for(i95i9n5i==) for loop +ith test condition
8
fact9fact>i5
?
printf(:'ns+er of factorial is9 ;d:$fact)5 print final ans+er of factorial
?
Demonstrating single step1
De&g option can &e sed for #arios prposes. To eamine single stepping +e need to se
@04 ey. *t demonstrates the program in single stepping. @A4 ey can &e sed to step into
fnction.
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,a& report part 2a/2a1 Modify the interrpt ser#ice rotine to play the left channel only.
> interrpt dri#en sampling program for BM6%0>
inclde stdio.h4
inclde stdli&.h4
inclde string.h4
inclde Mc&spdr#.h4 > mc&sp dri#er>
inclde Common.h4
inclde *ntr.h4
inclde oard.h4 > BM li&rary >
inclde Codec.h4 > codec li&rary >
inclde Mc&sp.h4
inclde mathf.h4
#oid hooint(#oid)5interrpt #oid McSPc#*S(#oid)5
>int delayE!000F5
int inde 905
int delayGlineGotpt5
>
int main()
8
Mc&spGde# de#5
Mc&spGconfig mc&spConfig5
int sampleate$'ctalGSamplingGate5
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
> *nitiali7e BM >
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
printf(:*nitiali7ing BM &oardHn:)5
e#mGinit()5
printf(:Done initiali7ing BMHn:)5
printf (:Hn;d:$cpGfreI())5
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
> Jpen MCSP >
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>mc&spGdr#Ginit()5 >initiali7e McSP dri#er$ allocates memory
for the de#ice handles >
de#9 mc&spGopen(0)5
if (de# 99 KL,,)
8
printf(:Brror opening MCSP 0 Hn :)5
retrn(BJ)5
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?
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
> configre McSP >
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
memset(<mc&spConfig$0$si7eof(mc&spConfig))5
mc&spConfig.loop&ac 9 @',SB5 mc&spConfig.t.pdate 9 TLB5
mc&spConfig.t.clocGpolarity 9 C,NGPJ,G*S*KO5
mc&spConfig.t.clocGmode 9 C,GMJDBGBNT5
mc&spConfig.t.frameGlength 9 05
mc&spConfig.t.+ordGlength 9 -JDG,BKOTG325
mc&spConfig.r.pdate 9 TLB5
mc&spConfig.r.clocGmode 9 C,GMJDBGBNT5
mc&spConfig.r.frameGlength 9 05
mc&spConfig.r.+ordGlength 9 -JDG,BKOTG325
mc&spGconfig(de#$<mc&spConfig)5 >configre>
MCSPGBK',B(0$MCSPGJT)5
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
> configre CJDBC >
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
codecGinit()5
> 'D 0.0 d gain$ trn on 20d mic gain$ sel (,)M*C as inpts >
codecGadcGcontrol(,B@T$0.0$TLB$M*CGSB,)5
codecGadcGcontrol(*OT$0.0$TLB$M*CGSB,)5
codecGlineGinGcontrol(,B@T$M*KG'LNG,*KBGO'*K$@',SB)5
codecGlineGinGcontrol(*OT$M*KG'LNG,*KBGO'*K$@',SB)5
codecGdacGcontrol(,B@T$0.0$@',SB)5codecGdacGcontrol(*OT$0.0$@',SB)5
sampleate9!!0005
'ctalGSamplingGate9 codecGchangeGsampleGrate(sampleate$ TLB)5
printf(:The actal sampling rate is 9 ;dHn:$ 'ctalGSamplingGate)5
>for (inde905inde!0005inde==) clears delay &ffer
delayEindeF905 >
codecGinterrptGena&le()5
hooint()5
>Main loop>
+hile ()
8
?
?
#oid hooint()
8
intrGinit()5
intrGmap(CPLG*KTQ$*SKG*KT0)5
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intrGhoo(McSPc#*S$CPLG*KTQ)5
*KTGBK',B(Q)5
*KTGO,J',GBK',B()5
retrn5
?
interrpt #oid McSPc#*S(#oid)8
int temp5
temp9MCSPGB'D(0)5
temp9temp4465
if (temp < 0A000)
temp 9 temp R0ffff00005
temp9(temp < 0ffff0000)5
delayGlineGotpt 9 temp = delayEindeF>0.%Q5
delayGlineGotpt 9 delayGlineGotpt65
MCSPG-*TB(0$temp)5
>delayEindeF 9 temp5
inde==5
if (inde49!000)
inde 9 05
>
?
,o+ odi! the interru"t ser*ice routine to "la! the right channel onl!
interrpt #oid McSPc#*S(#oid)
8
int temp5
temp9MCSPGB'D(0)5
temp9temp4465
if (temp < 0A000)
temp 9 temp R00000ffff5
temp9(temp < 00000ffff)5
delayGlineGotpt 9 temp = delayEindeF>0.%Q5
delayGlineGotpt 9 delayGlineGotpt65
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MCSPG-*TB(0$temp)5
>delayEindeF 9 temp5
inde==5
if (inde49!000)inde 9 05
>
?
,o+ odi! the interru"t ser*ice routine to "la! %oth channels
*nt 5
interrpt #oid McSPc#*S(#oid)
8
int temp5
temp9MCSPGB'D(0)5
temp9temp4465
if (990)
8
else if (temp < 0A000)
temp 9 temp R0ffff00005
temp9(temp < 0ffffffff)5
95
?
else if
8
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if (temp < 0A000)
temp 9 temp R00000ffff5
temp9(temp < 0ffffffff)5
905
?
delayGlineGotpt 9 temp = delayEindeF>0.%Q5
delayGlineGotpt 9 delayGlineGotpt65
MCSPG-*TB(0$temp)5
>delayEindeF 9 temp5
inde==
if (inde49!000)
inde 9 05
>
?
Bplaination1
@or left channel in the interrpt ser#ice rotine $ +e made the lo+er !"&its as high5 and for the
right channel +e made the higher !"&its high.
/2&1
Ta&le ,.2&-uant .it 'ord & 'ord 2 'ord 3 'ord / 'ord 1
6 ello ight Center @or+ard ac+ard 0
A ello ight Center @or+ard ac+ard A0
6 ello ight Center @or+ard ac+ard 60
! ello ight Center @or+ard ac+ard !Q
2 ello ight Center @or+ard ac+ard 30
ello ight Center @or+ard ac+ard 20
Include the odiied IS listing that "ro*ides /%it 4uanti5ation as listing $&2%
interru"t *oid Mc.SPc*IS(*oid)
8
int temp5
temp9MCSPGB'D(0)5
temp9temp4465
if (temp < 0A000)
temp 9 temp R00000005
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temp9(temp < 0ffff0000)5
delayGlineGotpt 9 temp = delayEindeF>0.%Q5
delayGlineGotpt 9 delayGlineGotpt65
MCSPG-*TB(0$temp)5
>delayEindeF 9 temp5
inde==5if (inde49!000)
inde 9 05
>
?
,a& report 3a
/1 generate sine +a#e sing DSP chip
template.c " to &e sed as starting point for interrpt"&ased programs
DSP la& 62$ Department of 'pplied Physics$ Lni#ersity of arachi.
""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""
inclde stdio.h4
inclde stdli&.h4
inclde string.h4
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inclde Mc&spdr#.h4 > mc&sp dri#er>
inclde Common.h4
inclde *ntr.h4
inclde oard.h4 > BM li&rary >
inclde Codec.h4 > codec li&rary >
inclde Mc&sp.h4inclde mathf.h4
inclde math.h4
define P*93.!Q26Q3QA%3
interrpt #oid McSPc#*S(#oid)5
#oid hooint(#oid)5
#oid initiali7e(#oid)5
#oid readGinpts(short >$ short >)5
#oid +riteGotpts(short$short)5
#oid adioGsorce(int)5
#oid samplingGrate(short)5
int I+rap(int$ int)5
float +a#gen(int$float >$ float$ float$ int >)5
nion 8
nsigned int 5
short cE2F5
? codec5
short ,$$y,$y5 left and right inpt and otpt samples fromto codec
float g95
define D !000
define K 2A
short fs9A5
float c$'9Q000$f90.25
float +EDF5
float &fferEKF5
int I90$905
here$ add more glo&al #aria&le declarations$ defines$ incldes$ etc
""""""""""""""""""""""""""""""""""""""""""""""""""""""""""
#oid main()
8
int n5
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float pi 9 !>atanf()5
for (n905 nD5 n==)
+EnF9sinf(2>pi>nD)5
c9D>ffs5
initiali7e()5 initiali7e the BM &oard and codec$ define interrpts
samplingGrate(fs)5 A$26$2!$..!Ah7
adioGsorce(,*KBGSB,)5 ,*KB or M*C for line or microphone inpt
+hile()5 eep +aiting for interrpt$ then Ump to isr()
?
#oid initiali7e()
8
Mc&spGde# de#5
Mc&spGconfig mc&spConfig5
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
> *nitiali7e BM >
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
printf(:*nitiali7ing BM &oardHn:)5
e#mGinit()5
printf(:Done initiali7ing BMHn:)5
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
> Jpen MCSP >
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
mc&spGdr#Ginit()5 >initiali7e McSP dri#er$ allocates memory
for the de#ice handles >
de#9 mc&spGopen(0)5
if (de# 99 KL,,)
8
printf(:Brror opening MCSP 0 Hn :)5
retrn(BJ)5
?
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
> configre McSP >
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
memset(<mc&spConfig$0$si7eof(mc&spConfig))5
mc&spConfig.loop&ac 9 @',SB5
mc&spConfig.t.pdate 9 TLB5
mc&spConfig.t.clocGpolarity 9 C,NGPJ,G*S*KO5
mc&spConfig.t.clocGmode 9 C,GMJDBGBNT5
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mc&spConfig.t.frameGlength 9 05
mc&spConfig.t.+ordGlength 9 -JDG,BKOTG325
mc&spConfig.r.pdate 9 TLB5
mc&spConfig.r.clocGmode 9 C,GMJDBGBNT5
mc&spConfig.r.frameGlength 9 05
mc&spConfig.r.+ordGlength 9 -JDG,BKOTG325 mc&spGconfig(de#$<mc&spConfig)5 >configre>
MCSPGBK',B(0$MCSPGJT)5
?
#oid samplingGrate(short sampleate)
8
int 'ctalGSamplingGate5
sampleate9 sampleate>0005
'ctalGSamplingGate9 codecGchangeGsampleGrate(sampleate$ TLB)5
printf(:The actal sampling rate is 9 ;dHn:$ 'ctalGSamplingGate)5
?
#oid adioGsorce(int SJLCB)
8
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
> configre CJDBC >
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
codecGinit()5
if (SJLCB 99 0)
> 'D 0.0 d gain$ trn on 20d mic gain$ sel (,)M*C as inpts >
8
codecGadcGcontrol(,B@T$M*KG'DCG*KPLTGO'*K$@',SB$,*KBGSB,)5 select line"in codecGadcGcontrol(*OT$M*KG'DCG*KPLTGO'*K$@',SB$,*KBGSB,)5
?
else if (SJLCB 99 2) selects Mic as inpt
8
codecGadcGcontrol(,B@T$0.0$TLB$M*CGSB,)5
codecGadcGcontrol(*OT$0.0$TLB$M*CGSB,)5
?
codecGlineGinGcontrol(,B@T$M*KG'LNG,*KBGO'*K$@',SB)5
codecGlineGinGcontrol(*OT$M*KG'LNG,*KBGO'*K$@',SB)5
codecGdacGcontrol(,B@T$0.0$@',SB)5
codecGdacGcontrol(*OT$0.0$@',SB)5
codecGinterrptGena&le()5
hooint()5
#oid hooint()
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8
intrGinit()5
intrGmap(CPLG*KTQ$*SKG*KT0)5
intrGhoo(McSPc#*S$CPLG*KTQ)5
*KTGBK',B(Q)5*KTGO,J',GBK',B()5
retrn5
?
interrpt #oid McSPc#*S(#oid)
8
readGinpts(<$<,)5
y,9 +a#gen(D$+$'$ffs$<I)5
&fferEF9(float) y,5
if (== 49K) 905
+riteGotpts(y,$y,)5
?
#oid readGinpts(short >$ short >,)
8
codec. 9 MCSPGB'D(0)5 read 32"&it nm&er
>9 codec.cEF5
>,9 codec.cE0F5
?
#oid +riteGotpts (short y$ short y,)
8
codec.cEF9 y5
codec.cE0F9 y,5
MCSPG-*TB(0$codec.)5
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?
float +a#gen(int D$ float >+$ float '$ float @$ int >I)
8float y$ c9D>@5
y9'>+E>IF5
>I 9 I+rap(D"$ (int) (>I=c))5
retrn y5
?
int I+rap(int D$ int I)
8
if (I 4 D)
I "9 D=5
if (I 0)
I =9 D=5
retrn I5
?
,a& report !
and stop filter
Matla& sorce code
clc
close all
clear all
Fs=8e3;
Ts=1/Fs;
Ns=512;
t=[0:Ts:Ts*(Ns-1)];
f1=500;
f2=1800;
f3=2000;f4=3200;
x1=s!(2*"*f1*t);
x2=s!(2*"*f2*t);
x3=s!(2*"*f3*t);
x4=s!(2*"*f4*t);
x=x1#x2#x3#x4;
$r% o!;
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N=1&;
'=[04 0&];
=F+1(N,',.-1);
=32&*
=1;
fre(,);
"ase;
f$re;
s6"lot(2,1,1);
N"ts=200;
"lot(t(1:N"ts),x(1:N"ts));
xla6el(t7e (s));
la6el(Fltere% 9$);
"ase;
=flter(,,x);
"lot(t(1:N"ts),(1:N"ts));f$re;
s6"lot(2,1,2);
xfft7a$=(a6s(fft(x,Ns)));
xfft7a$=xfft7a$(1:le!$t(xfft7a$)/2);
f=[1:1:le!$t(xfft7a$)]*Fs/Ns;
"lot(f,xfft7a$);
ttle(!"t a!% t"t 9"ectra);
xla6el(fre (<));
la6el(!"t s"ectr7);
s6"lot(2,1,2);
fft7a$=(a6s(fft(,Ns)));
fft7a$=fft7a$(1:le!$t(fft7a$)/2);
"lot(f,fft7a$);
xla6el(fre(<));
la6el(Flt 9$ 9"ectr7);
Coefficients
9
Colmns throgh %
"0.003A 0.0000 0.02A 0.0000 "0.0A2 0.0000 0.62Q
Colmns A throgh !
0.0000 0.A03 0.0000 0.62Q 0.0000 "0.0A2 0.0000
Colmns Q throgh %
8/13/2019 Lab1a Report(DSP)
http://slidepdf.com/reader/full/lab1a-reportdsp 17/26
0.02A 0.0000 "0.003A
figre
C sorce code
Ta&le ,!.
Bplanation
and pass filter
Matla& sorce codeclc
close all
clear all
Fs=8e3;
Ts=1/Fs;
Ns=512;
t=[0:Ts:Ts*(Ns-1)];
8/13/2019 Lab1a Report(DSP)
http://slidepdf.com/reader/full/lab1a-reportdsp 18/26
f1=500;
f2=1800;
f3=2000;
f4=3200;
x1=s!(2*"*f1*t);
x2=s!(2*"*f2*t);
x3=s!(2*"*f3*t);
x4=s!(2*"*f4*t);
x=x1#x2#x3#x4;
$r% o!;
N=1&;
'=[04 0&];
=F+1(N,',.-0);
=32&*
=1;
fre(,);
"ase;
f$re;
s6"lot(2,1,1);
N"ts=200;
"lot(t(1:N"ts),x(1:N"ts));
xla6el(t7e (s));
la6el(Fltere% 9$);
"ase;
=flter(,,x);
"lot(t(1:N"ts),(1:N"ts));
f$re;
s6"lot(2,1,2);
xfft7a$=(a6s(fft(x,Ns)));
xfft7a$=xfft7a$(1:le!$t(xfft7a$)/2);
f=[1:1:le!$t(xfft7a$)]*Fs/Ns;
"lot(f,xfft7a$);
ttle(!"t a!% t"t 9"ectra);
xla6el(fre (<));
la6el(!"t s"ectr7);
s6"lot(2,1,2);
fft7a$=(a6s(fft(,Ns)));
fft7a$=fft7a$(1:le!$t(fft7a$)/2);
"lot(f,fft7a$);
xla6el(fre(<));
la6el(Flt 9$ 9"ectr7);
Coefficient
9
8/13/2019 Lab1a Report(DSP)
http://slidepdf.com/reader/full/lab1a-reportdsp 19/26
Colmns throgh %
0.00Q "0.0000 "0.02! 0.0000 0.0% "0.0000 "0.23
Colmns A throgh !
"0.0000 0.2%0 "0.0000 "0.23 "0.0000 0.0% 0.0000
Colmns Q throgh %
"0.02! "0.0000 0.00Q
@igre
C sorce codeTa&le ,!.2
Bplanation
igh pass filter
Matla& sorce codeclc
8/13/2019 Lab1a Report(DSP)
http://slidepdf.com/reader/full/lab1a-reportdsp 20/26
close all
clear all
Fs=8e3;
Ts=1/Fs;
Ns=512;
t=[0:Ts:Ts*(Ns-1)];
f1=500;
f2=1800;
f3=2000;
f4=3200;
x1=s!(2*"*f1*t);
x2=s!(2*"*f2*t);
x3=s!(2*"*f3*t);
x4=s!(2*"*f4*t);
x=x1#x2#x3#x4;
$r% o!;
N=1&;
'=[025];
=F+1(N,',$);
=32&*
=1;
fre(,);
"ase;
f$re;
s6"lot(2,1,1);
N"ts=200;
"lot(t(1:N"ts),x(1:N"ts));
xla6el(t7e (s));
la6el(Fltere% 9$);
"ase;
=flter(,,x);
"lot(t(1:N"ts),(1:N"ts));
f$re;
s6"lot(2,1,2);
xfft7a$=(a6s(fft(x,Ns)));
xfft7a$=xfft7a$(1:le!$t(xfft7a$)/2);
f=[1:1:le!$t(xfft7a$)]*Fs/Ns;
"lot(f,xfft7a$);
ttle(!"t a!% t"t 9"ectra);
xla6el(fre (<));
la6el(!"t s"ectr7);
s6"lot(2,1,2);
fft7a$=(a6s(fft(,Ns)));
fft7a$=fft7a$(1:le!$t(fft7a$)/2);
"lot(f,fft7a$);
8/13/2019 Lab1a Report(DSP)
http://slidepdf.com/reader/full/lab1a-reportdsp 21/26
xla6el(fre(<));
la6el(Flt 9$ 9"ectr7);
coefficients
9
Colmns throgh %
0.00Q "0.00AA 0.00 "0.036 0.0QA6 "0.0A3 0.0Q3
Colmns A throgh !
"0.20A 0.26! "0.20A 0.0Q3 "0.0A3 0.0QA6 "0.036
Colmns Q throgh %
0.00 "0.00AA 0.00Q
@igre
C sorce code
8/13/2019 Lab1a Report(DSP)
http://slidepdf.com/reader/full/lab1a-reportdsp 22/26
Ta&le ,!.3
Bplanation
,o+ pass filter
Matla& sorce code
clcclose all
clear all
Fs=8e3;
Ts=1/Fs;
Ns=512;
t=[0:Ts:Ts*(Ns-1)];
f1=500;
f2=1800;
f3=2000;
f4=3200;
x1=s!(2*"*f1*t);x2=s!(2*"*f2*t);
x3=s!(2*"*f3*t);
x4=s!(2*"*f4*t);
x=x1#x2#x3#x4;
$r% o!;
N=1&;
'=[025];
=F+1(N,',lo>);
=32&*
=1;
fre(,);
"ase;
f$re;
s6"lot(2,1,1);
N"ts=200;
"lot(t(1:N"ts),x(1:N"ts));
xla6el(t7e (s));
la6el(Fltere% 9$);
"ase;
=flter(,,x);
"lot(t(1:N"ts),(1:N"ts));
f$re;
s6"lot(2,1,2);
xfft7a$=(a6s(fft(x,Ns)));
xfft7a$=xfft7a$(1:le!$t(xfft7a$)/2);
f=[1:1:le!$t(xfft7a$)]*Fs/Ns;
"lot(f,xfft7a$);
8/13/2019 Lab1a Report(DSP)
http://slidepdf.com/reader/full/lab1a-reportdsp 23/26
ttle(!"t a!% t"t 9"ectra);
xla6el(fre (<));
la6el(!"t s"ectr7);
s6"lot(2,1,2);
fft7a$=(a6s(fft(,Ns)));
fft7a$=fft7a$(1:le!$t(fft7a$)/2);
"lot(f,fft7a$);
xla6el(fre(<));
la6el(Flt 9$ 9"ectr7);
Coefficients
9
Colmns throgh %
"0.0030 0.00Q2 "0.03 0.02Q "0.03! 0.0!Q "0.062%
Colmns A throgh !
0.0% 0.2%6 0.0% "0.062% 0.0!Q "0.03! 0.02Q
Colmns Q throgh %
"0.03 0.00Q2 "0.0030
@igre
8/13/2019 Lab1a Report(DSP)
http://slidepdf.com/reader/full/lab1a-reportdsp 24/26
C sorce code
Ta&le ,!.!
Bplanation@ied point @* filterclc
close all
clear all
Fs=8e3;
Ts=1/Fs;
Ns=512;
t=[0:Ts:Ts*(Ns-1)];
f1=500;
f2=1800;
f3=2000;f4=3200;
x1=s!(2*"*f1*t);
x2=s!(2*"*f2*t);
x3=s!(2*"*f3*t);
x4=s!(2*"*f4*t);
x=x1#x2#x3#x4;
8/13/2019 Lab1a Report(DSP)
http://slidepdf.com/reader/full/lab1a-reportdsp 25/26
$r% o!;
N=1&;
'=[025];
=F+1(N,',$);
=32&*; for Fxe% "o!t F+ flter 7lt"l eac coeffce!t 6
0xfff ts >ll co!?ert tese or$!al float!$ "o!t coeffc!t
=1; !to s$! 1&-6t !te$er
fre(,);
"ase;
f$re;
s6"lot(2,1,1);
N"ts=200;
"lot(t(1:N"ts),x(1:N"ts));
xla6el(t7e (s));
la6el(Fltere% 9$);
"ase;
=flter(,,x);"lot(t(1:N"ts),(1:N"ts));
f$re;
s6"lot(2,1,2);
xfft7a$=(a6s(fft(x,Ns)));
xfft7a$=xfft7a$(1:le!$t(xfft7a$)/2);
f=[1:1:le!$t(xfft7a$)]*Fs/Ns;
"lot(f,xfft7a$);
ttle(!"t a!% t"t 9"ectra);
xla6el(fre (<));
la6el(!"t s"ectr7);
s6"lot(2,1,2);
fft7a$=(a6s(fft(,Ns)));
fft7a$=fft7a$(1:le!$t(fft7a$)/2);
"lot(f,fft7a$);
xla6el(fre(<));
la6el(Flt 9$ 9"ectr7);
Coefficients
9
.0e=003 >
Colmns throgh %
0.6% "0.2A% 0.622 ".A .Q "2.%2!3 3.!Q
Colmns A throgh !
"3.Q !.!0 "3.Q 3.!Q "2.%2!3 .Q ".A
8/13/2019 Lab1a Report(DSP)
http://slidepdf.com/reader/full/lab1a-reportdsp 26/26
Colmns Q throgh %
0.622 "0.2A% 0.6%
figre
C sorce code
Ta&le ,!.Q
Bplanation