Lab Manual Oracle

8/9/2019 Lab Manual Oracle

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Analysis and Design of PowerElectronic Circuits using Orcad

Professor Babak Fahimi, PhD

Director, Power Electronics and Controlled Motion aboratory

!ni"ersity of #e$as at Arlington


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%etting started with P&'ice#o start with a P&'ice 'ro(ect)

*+ %o to ca'ture C& ite Edition-+ %o to .File/ menu0 &elect .1ew Pro(ect/ o'tion0

2+ Choose .analog or mi$ed A3D/ o'tion and s'ecify the 'ro(ect name andits location and click Ok


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4+ Once the ste' 2+ is com'leted the following window a''ears0 Choose

.Create a blank 'ro(ect/ o'tion


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5+ Create the circuit by 'lacing all its 'arts using .Part/ o'tion from

.Part/ menu0 n this way a com'lete electrical circuit can be formed0


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Points to remember

6 7hen creating a new 'ro(ect , use Analog or Mi$ed A3D set8u' o'tion0

6 7atch the file location 3 directory structure0


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Design and simulation of 'ower electronic circuits

Power Electronic Circuits can be classified as)

6 DC8DC Con"erters

6 AC8DC Con"erters 9:ectifiers+

6 DC8AC Con"erters 9n"erters+

6 AC8AC Con"erters

1ow design and simulation of each of these circuits will be discussed0


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AC8DC Con"erters 9:ectifiers)

AC8DC con"erters 9 :ectifiers+ can be classified as)

6 ;alf wa"e rectifier

6 Full wa"e rectifier

#hese can further be classified de'ending u'on the rectifying element

being used 0 f using diode, are called uncontrolled rectifiers0 7hereas if

using thyristor, are called controlled rectifiers0


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;alf 7a"e !ncontrolled :ectifier

a+ For :esisti"e oad*+ Make the circuit in P&'ice using ste's mentioned earlier0

Com'onents used are)


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-+ Make the simulation 'rofile using .1ew &imulation Profile/ command

from .P&'ice/ menu0


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2+ %o to .Edit &imulation Profile/ in .P&'ice/ menu, simulation settings

window will o'en0 %o to .Analysis/ and set the simulation 'arameters

as shown below0


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4+ :un the simulation by using command .:!1/ from .P&'ice/ menu0


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5+ %et 'lots for :*9resistance current+, :M& "alue of :* and


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@+ Plot the resistance current and then use .Fourier/ command from

.#race/ menu to get the freuency res'onse of the resistance current0


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b) For : oad*+ Create another 'age under same schematic and make the circuit usingsame ste's0



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-+ 1ow simulate the circuit using same ste's and get 'lots for resistance

current and in'ut "oltage0


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c+ For :C oad

*+ Create another 'age under same schematic and make the circuit usingsame ste's0



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current and ca'acitor "oltage0


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d+ For : load with freewheeling diode

*+ Create another 'age under same schematic and make the circuit using

same ste's0



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current , :M& "alue of resistance current and in'ut "oltage0


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;alf 7a"e Controlled :ectifier

For ty'e 9*+ connections*+ Make the circuit using same ste's0


&%1A3CAP&?M


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-+ 1ow simulate the circuit and get 'lots for resistance current0


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For ty'e 9-+ connections 9a+ with ero time delay in gate 'ulse

*+ Make the circuit using same ste's0


&%1A3CAP&?M


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-+ 1ow simulate the circuit and get 'lots for resistance current and in'ut

"oltage0


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For ty'e 9-+ connections 9b+ with 40*@@ms time delay in gate 'ulse

*+ Make the circuit using same ste's0


&%1A3CAP&?M


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-+ 1ow simulate the circuit and get 'lots for resistance current and in'ut

"oltage0


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Full 7a"e !ncontrolled :ectifier

Full wa"e uncontrolled rectifier can be )

6 &ingle 'hase

6 #hree 'hase


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&ingle Phase Full 7a"e :ectifier

*+ Make the circuit as shown)


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-+ &imulate the circuit and get 'lots for all diode currents0


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#hree Phase Full 7a"e :ectifier

*+ Make the circuit as shown)


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-+ &imulate the circuit and get 'lots for all diode currents0


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Points to remember

6 n order to simulate the circuit signal reference must be named = 9 the

number ero+

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