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2ND Year Laboratories – Autumn
Lab Manual
Dr S. Worrall, Dr N. Wang
Autumn Semester 2010/11
Department of Electronic Engineering
Contents
1. GENERAL INSTRUCTIONS .................................................................................................................... 3
2. SAFETY IN 2ND
YEAR LABS ................................................................................................................... 6
3. ASSESSMENT ............................................................................................................................................. 8
4. SECOND YEAR LABORATORY PROJECT ....................................................................................... 10
5. LOCATION OF LABORATORIES ........................................................................................................ 13
6. EXPERIMENT A: PERL AND CGI PROGRAMMING ...................................................................... 14
7. EXPERIMENT B: ELECTRONIC MEASUREMENT OF AND E ................................................. 15
8. EXPERIMENT M: POWER ELECTRONICS SIMULATIONS USING SPICE............................... 20
10. EXPERIMENT D1: OPERATIONAL AMPLIFIER............................................................................. 34
11. EXPERIMENT S: PULSE AND WIDE BANDWIDTH MEASUREMENTS ..................................... 40
Department of Electronic Engineering
Second Year Laboratory classes
1. General Instructions
Students are required to provide a minimum of stationery and equipment in order to carry out
experiments satisfactorily. The minimum requirements are provision of a laboratory logbook
with alternate pages of graph and lined paper (available from the university bookshop), a
calculator, and a mini tool kit consisting of at least wire cutters and strippers and a small
screwdriver. Any electrical items must be submitted to the laboratory technicians for testing
prior to use in the laboratory. All items should be obtained in advance of the first
experimental session.
Marking will normally be carried out by the demonstrators towards the end of the
experimental session, although occasionally it may be necessary to collect Lab books in order
to mark them. Work carried out as preparation for experiments will be marked upon arrival in
the laboratory. It is very important that you do the preparation work before the day of the each
experiment in order to be fully prepared for the day ahead.
Lab Groups
In the lab lectures, held on Monday in week 1, you will be given:
A list saying which lab group each student is in.
A lab timetable, which can be used in conjunction with your lab groups to find out
the experiment that you are doing in each week.
Experiments such as e and pi, and Op Amps must be carried out by dividing yourselves into
teams of 2-3. You are free to select who you work with on each experiment, but you must
work with someone in your own lab group.
Under no circumstances may students change lab groups without express permission of the
laboratory organisers Dr Stewart Worrall and Dr Ning Wang. Doing so may result in a
reduction of the awarded mark for a given experiment or even a score of zero to be recorded.
Wanting to work with a friend is not a valid reason to change lab groups. Working with others
is a valuable part of your education as an engineer.
Furthermore, under no circumstances should students rearrange the dates of particular
experiments without the express permission of the laboratory organisers, Dr Worrall and Dr
Wang. Doing so may again result in a reduction of the awarded mark for a given experiment
or even a score of zero being recorded.
The project work
More than half of the scheduled laboratory periods in the first semester are used for work on
your second year project. There is a choice of one of two different projects. You are expected
to form a project group of three to five people. Every member of each project group must
attend all the project sessions scheduled for project work. A mark is given for attending the
labs, so make sure that your demonstrator has noted your presence. Otherwise you may lose
marks.
If you need to leave the labs for any reason (e.g. research in the library), you should ask the
academic in charge of that particular lab.
More Information
Please see the webpage:
http://info.ee.surrey.ac.uk/Teaching/Courses/ee2.laba/
The Experiments
Second year lab experiments have been divided into subject streams. In the autumn semester
all students take the project and a further four weeks' worth of experiments. Students on the
“software/computing” (ECE) degree title streams take a two day LabVIEW experiment, a
one-day experiment on Perl and CGI, plus an experiment on calculating e and pi. Students on
“EE” degree titles take a lab on linear systems instead of the Perl and CGI experiment. The
matrix shows each experiment and the various pathways/streams.
AUTUMN SEMESTER
pathway
Instru
ctions
EE
EC
E
Med
ia E
ng
PERL and CGI web X C X
e and web C C X
Op Amps C C C
Pulses and Bandwidth C X X
Project (6 weeks) C C C
SPICE C C X
Digital Audio Synth. (2 weeks) X X C
Microphone Response X X C
C = compulsory
X = not available
2. Safety in 2nd
Year Labs
READ THESE NOTES CAREFULLY
You should be aware that you are required to follow all university safety procedures, and
therefore it is your responsibility to know what they are. Prior to taking part in any laboratory
class, you are required to sign the “acknowledgement of hazards” form, associated with
second-year experiments. Any student failing to sign the form will not be permitted to begin
any laboratory class, and will score 0 for that experiment. The hazard form will be distributed
during the first week Lab lectures, and must be returned to Dr Worrall. It can be handed in to
the general office in BB Level 4, or without fail brought to the first lab session and handed in
right at the beginning of the class. A risk assessment has been made of each experiment and
the paperwork is held by the technicians in the second year laboratory. This is available for
students to read at any time, but must not be removed from the laboratory.
Types of hazard
There are certain known hazards associated with the experiments you will undertake. It is
important that you're aware of these hazards in order to minimise the risk of injury. The types
of hazards are categorised as follows:
Class A: use of terminals and stand-alone computers
Class B: low-voltage open wire experiments
Class C: open mains and high-voltage
Class D: three-phase electrical and rotating machines
Class E: hazardous materials and chemicals
Class F: chemical hazards and tools
Class G: radiation hazards such as microwaves, X-rays, or optical beams
All work must be supervised by an academic member of staff, but work involving hazards in
classes C, D, E and G are higher risk and must be closely supervised. In particular, all wiring
and instrumentation must be checked by an academic member of staff before power is turned
on.
Warning of specific hazards associated with particular experiments will be given in laboratory
lectures, and may also be included in laboratory manuals. Consequently, the laboratory
lectures are compulsory. Any student who has not attended the appropriate laboratory
lectures may be prevented from performing the experiment. In these circumstances the student
will score 0. There'll be no alternative opportunities to perform an experiment you have
missed.
There are some general safety rules that must be followed at all times:
No student may work in the laboratory without the supervision of an academic
member of staff. At the end of the timetabled classes all students must leave
promptly and may not stay behind.
If in doubt about any equipment or procedure, ask for help.
Any incident involving any person or piece of equipment, however trivial, must be
reported immediately to a supervisor or technician.
Never run in laboratories under any circumstances
Turn soldering irons off when not in use, and keep cables, books, papers, clothes
well away from them
Be aware of the location of safety information and equipment such as fire
extinguishers, emergency meeting places, eye baths, emergency notices, etc.
Never block aisles or doorways with bags or equipment. Also, do not leave bags
and clothing on work benches where the equipment and tools and soldering irons
may cause an unnecessary hazard.
Do not eat or drink during laboratory classes. If you need food because, for
example, you are breaking a fast or you are diabetic, please simply ask a
demonstrator for permission to leave the laboratory briefly.
Laboratory class attendance
In order to pass each laboratory module, students must complete and achieve a pass grade in
each module (possibly via compensation). Note that missing an experiment cannot be excused
and it is extremely unlikely that we will be able to rearrange one except in exceptional
circumstances such as serious illness documented by a doctor's certificate. If an experiment
has been missed and not been rearranged for a valid reason, a score of zero will be recorded
for that experiment. Rearrangement of your lab timetable can only be done with the express
permission of Dr Worrall or Dr Wang.
Working Hours are from 10.00 to 12.50 and 2.00 to 4.50.
Prompt arrival is required in case any announcements are made or hand-outs are distributed.
You are encouraged to leave promptly after 12.50 so that demonstrators can
have a lunch break; you cannot remain in the lab without supervision.
3. Assessment
Laboratory assessment will normally be performed during each laboratory session. You will
be given a letter grade for each component of the assessment. The three components are
Preparation
Lab performance
Your preparation will be marked at the start of the session. You are required to write in your
lab book BEFORE THE LAB a summary of relevant theory, sample calculations, expected
results and any design work asked for in the experiment. Note that marks are not awarded for
simply copying theory from text books. You need to demonstrate understanding of the
experiment, and may be asked questions to check that you have understood what you have
written.
Your lab performance will be marked on your ability and your understanding, the effort you
make and the progress made on the experiment. Some experiments are quite lengthy and it is
not necessary to complete all parts in order to pass. However, the award of A or S level grades
is reserved for work demonstrating full understanding of the experiment and some use of
initiative. The lab performance mark will also be based upon the quality of your log book.
Your log book will be marked in terms of tidiness, quality of results, conclusions drawn1, and
proper documentation of the experimental set-up. You may be asked questions to check your
understanding of what you have done.
Additional hints and tips on preparing for some experiments will be posted online.
For each component the gradings are:-
S* Outstanding
S Excellent
A Very Good
B Good
C Satisfactory
D Pass
E Very Poor
F Equivalent to a 20% mark
The preferred mode of communication for important enquiries (e.g. notification of absence
due to illness, certified by a Doctor) is by e-mail :-
OR
1 Conclusions are considered to be very important, and you will be awarded a low grade if you do not write any
conclusions or analysis of the results.
Laboratory Log Books
An accurate and detailed record of what happened so that the experiment
could be exactly repeated by another person at a later date.
Part 1: Preparation
Date*
Summary of relevant theory*
Summary of experiment methodology*
Prediction of results based on theory*
Calculations using expected values
Description of what would be seen during experiment
Sketches of expected graphs
Sketches of expected oscilloscope waveforms
Diagrams of any circuits required for the experiment
Part 2: Experimental Work
Date*
List of equipment*
Serial numbers of equipment*
Any other relevant environmental parameters
Labelled diagram of set-up, showing connections (very valuable)
Note of what was done (method)*
Note of what went wrong and was changed*
Comments on method*
Comments on measured and calculated values
Comments on possible errors and uncertainties on measured values
Graphs: titled with labelled axes
Tables: titled with SI units
Conclusions on results, method, value of experiment* (what engineers actually get paid for)
Items marked “*” will probably be essential in all experiments. If these are missing it would
be difficult to call log book satisfactory
Note: you should use outline numbering throughout your log book.
R. Seebold
21st March 2002
Updated: S. Worrall
July 2008
4. Second year laboratory project
4.1. Project Overview Each team must choose one of the following three projects, and you are expected to have
made a reasonable start in terms of project planning by the end of the first project day:-
1. Build a audio amplifier for a Walkman CD or cassette player to drive a pair of
small loudspeakers at an audible level from the headphone socket. The amplifier
should run on 3 AA batteries and use components available in the lab.
2. Build a battery-powered electronic doorbell which will play a tune at an audible
level. Use components available in the lab. Most often, a “PIC” Development
Board is programmed for this project.
A list of available components will be provided in the lab. You are not permitted to order
specialist components such as single chip FM radios and audio power amplifier modules. You
are only allowed to use two boxes, as supplied from the lab office. However, exceptions may
be made if you propose an interesting design. Contact Dr Worrall or Dr Wang with details of
your design to discuss whether an exception is possible.
Each team will produce a design, the documentation package and the finished prototype. It is
expected that each group will organise itself so that the workload is partitioned fairly. Each
member of the group will be required to keep a project logbook in the form of a lab notebook
containing all work related to the project. These will be checked at regular intervals during the
project. The specific items of coursework which will be assessed are:-
1. Project specification
2. Project plan
3. Preliminary design
a. schematic diagrams
b. circuit descriptions
c. mechanical sketches
d. Spice simulations2
4. Documentation package
a. final schematic diagrams
b. printed circuit layout ( if applicable)
c. mechanical drawings
d. assembly drawings
e. parts list
f. test at specification
g. operating manual
5. Finished prototype
6. Presentation (EDPS Semester 2)
Items 1-4 should be kept as four separate reports, and should be made available for inspection
at the time of marking. Item 5, the finished prototype, will be inspected at the same time. Item
6, the presentation, will be marked in a separate session on the same day.
2 This applies mainly to the audio amplifier project, and not the doorbell project.
There are six weeks of lab work dedicated to the project to, totalling 36 hours of lab time. A
7th week will be used for demonstrators to assess your project work and documentation.
4.2. Project Planning Remember that a team does not consist of one person doing the work and 4 watching, nor
does it consist of 5 people doing the same thing. Early in the project you should break the task
down into “workpackages” (e.g. electrical design; mechanical design; PCB layout;
specifications; testing; report writing) and ensure that each member of the team is busy
working at all times. A Gantt chart should be used to achieve this. An example is shown
below, in Figure 1. The example below was produced using Microsoft Visio which is freely
available to students via MSDNAA3.
ID
Task Name
(Person
Responsible)
Start Finish Duration
Sep 2008 Oct 2008 Nov 2008
7/9 14/9 21/9 28/9 5/10 12/10 19/10 26/10 2/11 9/11 16/11 23/11
1 2w19/09/200808/09/2008Plan Project (all)
2 4.8w16/10/200815/09/2008Task X (Bob)
3 2.4w06/10/200819/09/2008Task Y (Jack,
Anna)
4 4w20/10/200823/09/2008Task Z
(Muhammad)
5 3w04/11/200815/10/2008Task 5
6 2w24/10/200813/10/2008Task 6
7 1.8w31/10/200821/10/2008Task 7
8 2w13/11/200831/10/2008Task 8
9 3w25/11/200805/11/2008Testing
10 2w02/12/200819/11/2008Report Writing
Figure 1: Example Gantt chart for project planning.
The above is a SIMPLE example of the minimum level of planning you need. Real projects
need much more detailed plans, with milestones, critical reviews, deliverables, links between
work packages, etc.
4.3. Guidelines for Audio Amplifier Many different circuits can be found on the web and in books for audio amplifiers. However,
it is strongly recommended that you follow the guidelines set out here. They are intended to
help you design a circuit that you can understand and get working inside the six lab sessions
allocated to the project.
The first recommendation is that you consider the design, and construction of the circuit to be
made up of a number of stages. Examples of such stages are shown in Figure 2. Clearly, more
advanced circuits will give you better marks, but only if they work. By treating the amplifier
as a series of modules, it is possible to gradually upgrade the amplifier.
3 For details: http://info.eps.surrey.ac.uk/SCS/guides/msdnaa/
The second recommendation is that you pick circuits that you understand. You may need to
adapt the example circuits that you find, so it is important to be able to understand how they
will work with slightly different components. Electronic Devices, by Floyd (621.381)
contains some useful example circuits. There are also some web links on ULearn. The
following are hints and tips for designing and building your circuit:
o Read about impedance matching.
o Read about different amplifier types, e.g. class A, class B.
o Consider a circuit involving op-amps for the pre-amp stage.
o Look for circuits involving transistors for the output stage.
o Take care when designing the tone controls. Simple designs are recommended that use
low pass and high pass filters.
o It should be possible to get the circuit working with 4.5V (e.g. 3 AA batteries), but
will probably work better with 5-6V. Extra credit will be given for getting it working
with lower voltages (e.g. fewer batteries).
Finally, make sure that you really know how the circuit works, as you may be asked questions
during the marking session. The idea of the project is that you learn more about electronic
circuits, rather than how to copy circuits from the Internet.
Bridge Amplifier
Pre-AmpOutput
Stage
Tone
Control
Output
Stage
(Inverted)
Pre-AmpOutput
Stage
Tone
ControlPre-Amp
Output
Stage
Figure 2: Example block diagrams for audio amplifier.
Updated November 2009.
S. Worrall.
(a) Simple audio amplifier.
(b) Simple audio amplifier with tone control.
(c) Simple audio amplifier with tone control and bridge amplifier.
5. Location of Laboratories
All labs will be held in or near the main 2nd
year laboratory. If you cannot find your
experiment, then simply ask the academic in charge, or one of the lab technicians.
Figure 3: Location of main second year laboratories.
Main 2nd Year Lab
Tels lab
RF lab, power lab
Te
cn.
Stores
1st Year Lab
DJF
EW
S
SHOP
etc
BB building
Bridge to fourth floor (Elec Eng Reception)
6. EXPERIMENT A: Perl and CGI programming
Lab Location: Main UG Labs
6.1. Quick Introduction to Perl: Perl and CGI form a powerfully combination, which is widely used in many current web
applications. However, Perl is not just a web based technology. It can be used for a wide
variety of applications, and is particularly strong at manipulating text. It has powerful features
that allow certain tasks to be performed simply, which are very difficult to perform using
other languages, such as C. Applications of Perl include interfacing with databases, scientific
calculations, and network programming.
In recent years Perl has lost ground to PHP4, for web-based development, in terms of
popularity. This is largely due to PHP‟s simplicity. However, the simplicity of PHP brings
with it limitations that make it unsuitable for more complex applications. Thus, the power of
Perl and the wide variety of modules available on the web, make it an important language.
6.2. Aim: This experiment sets out to teach the fundamentals of the computer language PERL and to get
the student to write a simple application using PERL to manipulate data returned from an
HTML form on a web server. The very basics of CGI (Common Gateway Interface)
programming will, therefore, be covered.
6.3. Preparation: Material to assist your preparation is provided on the web on the 2
nd year labs webpage:
http://info.ee.surrey.ac.uk/Teaching/Courses/ee2.laba/
You should make notes on the PERL language and make sure you know how to edit, compile
and execute a PERL program. There is a simple program to demonstrate this. You should
make the modifications to this program as instructed to gain some experience in the use of the
system.
6.4. Experimental Work: The experimental work is described on the webpage for 2
nd year laboratories.
Updated by S. Worrall, July 2008.
4 Perl and PHP have many similarities, so you will find it easy to learn PHP in future if you know Perl.
7. Experiment B: Electronic measurement of and e Lab Location: Main UG Labs
Introduction This experiment aims to familiarise students with measurement techniques and the use of least
squares fitting for the treatment of experimental data. The values of and e are measured
experimentally using very simple circuits. Two methods for each are described. Items that
should be covered in the preparation are preceded by →.
Additional background material is provided on the Labs webpage.
7.1. Measurement of : first method
→ Show that the mean value, , of a half-wave rectified sine wave of amplitude Vo Volts
is
A straightforward method for measuring therefore, is to measure the peak and mean values
of a half-wave rectified sine wave and calculate the ratio , which should be close to .
Figure 4: (a) Calibration, (b) measurement of .
Experiment
You must use an analogue AVO meter for this part - why? (You need to explain this
rather carefully.)
Perform a simple calibration at d.c. as in Figure 4(a). Use a d.c. power supply to
generate 1V, say, as measured by the AVO (correctly zeroed and horizontal). Check
that the oscilloscope also reads 1V - if not, use the variable gain to adjust this.
Explain how this method of calibration will give the right value for , even if the
AVO reads wrongly by a constant factor.
What frequency are you going to set the signal generator to, and why?
Use the circuit of Figure 4(b) for several different values of (measured by the
oscilloscope) and (from the AVO).
Find the ratio and average the values obtained to estimate .
7.2. Measurement of : second method Consider the one stage filter shown in Figure 5.
Figure 5: One stage filter.
→ Show, stating any assumptions that you make, that
(1)
Where f is the (linear) frequency of the input. How is τ defined?
According to equation (1), a plot of against will be a straight line of
gradient . The y-intercept of this line should be 1.
→ For a set of N data points show that the gradient m that minimises S, where
(2)
subject to the constraint that the y-intercept c = 1, is given by:
(3)
assuming the errors in x are much smaller than those in y. All the sums in (3) go from 1
to N.
It is also possible to calculate the standard error on m. It is given by:
(4)
Experiment
If your signal generator offers a choice of output impedance, which impedance will
you use and why?
Choose values for R and C, measure them accurately and calculate τ; make sure you
include RS.
Using a DVM, measure vi and vo at 10-15 frequencies. Use a frequency counter to
measure f .
Plot against .
Use equations (2) and (3) to calculate S, the least squares gradient, and hence your
Use equation 4 to find the standard error on m.
Compare with the true value of and explain the sources of error.
7.3. Measurement of e: first method
Using the same circuit as before, but with square wave input, it is possible to plot an
exponential decay curve on the oscilloscope screen.
→ Show that if v(t) is a decaying exponential with time constant τ, then:
(5)
for all t.
Experiment
Set up the apparatus so that an exponential curve is displayed on the oscilloscope
screen. Choose the timebase, signal generator frequency and vertical positioning of
the trace appropriately.
The measurements are made much easier if τ is a whole number of divisions; decide
how you will achieve this. Can you rely on the output impedance of the signal
generator? If not, what can you do about it?
Measure and for at least 10 different values of t.
Calculate a value of e from equation (5) for each of these values of t. Find the mean,
the standard deviation σ, and the standard error on the mean, ( , where N is
the number of measurements), which is an estimate of the error on your
measurement of e. Tabulate your results.
Compare your results with the true value of e, 2.7182818.
7.4. Measurement of e: second method The exponential curve displayed on the oscilloscope in the previous experiment was of the
form:
(6)
where v(0) is the voltage at t = 0. From experimental measurements of v(t) at various times t,
it is possible to find the values of in the truncated series:
(7)
using the method of least squares. In this case, there are 5 unknowns and the
arithmetic would be very tedious to carry out by hand. Hence, an Xmaple programme is
provided for carrying out the calculation for you (see last section).
→ Show that if v(t) is given approximately by equation (7), then
(8)
Experiment
Again, set up the apparatus so that an exponential curve is displayed on the
oscilloscope screen.
Measure v(t) for 10-15 different times t.
Tabulate v(t) and . Plot a graph of against t. Estimate error bars for
each point.
Using the provided Xmaple programme, calculate .
Using equation (8) estimate and hence e.
7.5. Help with Xmaple Xmaple is a large programme designed to perform algebraic calculations by computer. That
is, it can do symbolic operations, e.g. rather than just numerical
calculations. We use it in this experiment to solve the 5 linear equations that arise when
performing the least squares fit to the experimental exponential decay curve.
In order to use xmaple, log in to a Unix/Linux system (Linux PCs are available in the lab, or
see section Error! Reference source not found. for help on how to log on to a Linux
achine from a Windows PC). When you have logged on, type: xmaple
After a short while an xmaple window will come up with a > prompt in it. You now have
three things to do:
1. Open a new document in “Worksheet” mode.
2. Load the xmaple programme I have written to do the calculations for you.
3. Type in your experimental data in the right form.
To load the program, type: read “/vol/examples/teaching/engmaths2/leastsqrs”;
in the xmaple window, followed by return. Xmaple will give you two warnings, which you
can ignore.
Your experimental data needs to be in the form of two lists called x and y. List x is the values
of t/τ at which you measured v. List y is the corresponding values of v(t)/v(0). Suppose you
had made the following measurements:
t/τ 0 0.205 0.409 0.512 0.645
v(t)/v(0) 1 0.813 0.663 0.594 0.400
In order to define list x, type:
x := [0, 0.205, 0.409, 0.512, 0.645];
(return) and similarly for list y:
y := [1, 0.813, 0.663, 0.594, 0.400];
To perform the least squares fit for equation (7) to your data, type
lsf();
Xmaple will do the calculations and reply with the coefficients in the power series:
a0 = 1.000000
a1 = -0.527579
a2 = -4.027930
a3 = 12.928134
a4 = -11.86223
7.6. Extra work
Devise a method to measure 2 electronically. There are several ways you could do this.
Credit will be given for ingenuity. Could you extend your method to find, say, 5 ?
7.7. References Second year Engineering Maths notes, chapter 9: The method of Least Squares.
J.H.B.DEANE, MAY 2001.
Updated S. Worrall, N. Wright, July 2006.
Updated S. Worrall, November 2009
8. EXPERIMENT M: POWER ELECTRONICS
SIMULATIONS USING SPICE Lab Location: Main Labs
8.1. Introduction
SPICE (Simulation Program with Integrated Circuit Emphasis) is software that can be used to
simulate electronic circuits on a PC. Any voltage or current waveform in your circuit can be
viewed and plotted. SPICE performs simulations to calculate the voltages and currents against
time (Transient Analysis) or against frequency (AC Analysis). Many SPICE implementations
also permit other types of analysis, such as DC, Sensitivity, Noise and Distortion.
SPICE was originally developed by researchers at the University of California, Berkeley
during the mid-70s. It was the arrival of the integrated circuit that created a need for a method
to test and tweak circuit designs before the expensive fabrication process.
SPICE is currently available from many vendors, who have added a variety of different
enhancements on to the original simulator, such as schematic drawing tools for the front end
and graphics post processors to plot the results. Over time, SPICE simulators and applications
have expanded to permit analysis of analogue and digital circuits, microwave devices, and
electromechanical systems.
SPICE is particularly useful in analogue and power electronics because it can numerically
solve the non-linear differential equations that govern this type of circuit. From the design
point of view, this means that analogue and power electronic circuits can be tested on a
computer before they are constructed. Thus minimising prototyping costs and providing a
useful insight into circuit operation. One of the most useful aspects of SPICE is the ability to
add imperfections to the circuit in order to provide an accurate representation of the practical
circuit being tested. Potential problems can then be identified and eliminated before the circuit
is built.
SPICE has proved to be very useful to 3rd
year project students, as it is more time and cost
efficient than prototyping. You may also find it helpful to simulate your lab project circuits to
identify any potential problems.
8.2. Aim
The aim of this experiment is to provide a basic understanding of SPICE. You will learn how
to interpret and create netlists to be used in SPICE simulations. You should also learn how to
analyse circuits. The experiment also reinforces knowledge about switched mode converters.
8.3. Preparation
It is important to carry out preparation in two areas: power electronics and SPICE. Note that
some of the answers to the preparation questions are contained in the experiment instructions.
Power Electronics Preparation
Switch-Mode Power Supplies (SMPS) deliver power while wasting very little. The switch
state is toggled, from ON to OFF, to deliver pulses of current to the output. Very little power
is dissipated in the switch. This is an important feature, as conserving power is essential in
battery/portable device design.
Make notes on switched mode converters, mainly on the Buck converter. (A good source for
this is Power Electronics converters, applications and design by Mohan, Underland and
Robbins)
Answer the following questions in brief:-
1. What is the main difference between continuous and discontinuous mode operation?
2. What are the main advantages of switched mode converters?
3. What are the main disadvantages of switched mode converters?
4. With a Buck converter what is the basic difference between the input and output
voltages?
5. Express Duty factor in terms of the switch on time TON and the period TS.
6. What is Equivalent Series Resistance (ESR)?
SPICE Preparation
See ULearn for links to SPICE resources. It is strongly recommended that you use the version
of SPICE (DuSpice) specified on ULearn, as the experiment has been tested on this version.
There may be some minor compatibility issues with other SPICE software.
8.4. Buck Converter Background Material
The Buck Converter provides an output voltage that is smaller than the input voltage. It
consists of just a handful of components (see Figure 6). The current pulses are transformed
via the switch, SW1, into a constant voltage at the load. This experiment will examine some
voltage/current waveforms, and changes component values, so that you get a feel for each
component‟s role, and how to optimize the performance of the Buck Converter.
VIN
VCTRL
RLC1
L1
D1
SW1
0
10
1 2 3 Vo
Figure 6: Circuit diagram for a Buck converter.
Buck Converter Basics
The Buck Converter operation can be understood by examining the two main states of
operation: SW1 ON and SW1 OFF.
SW1 ON: L1 delivers current to the load
With a voltage (VIN - Vo) across L1, the current rises linearly. The rise (in amps per second)
is given by:
VIN RLC1
L1SW1
0
1 2 3 Vo
I
+ VL -
Figure 7: Buck Converter when SW1 in ON.
L1‟s current changes are smoothed out by C1, to produce a stable voltage at Vo. C1 should be
big enough to ensure that Vo does not change significantly during one switching cycle. D1 is
reversed biased, meaning that it can be removed from the diagram for now.
SW1 OFF: L1 maintains current to the load
Current falls linearly in L1, as its magnetic field collapses. The fall in current (amps per
second) is again determined by the voltage across L1 and its inductance:
RLC1
L1
D1
0
2 3 Vo
I
- VL +
-
VD
+
Figure 8: Effective Buck Converter circuit diagram when SW1 is OFF.
Although L1‟s current direction is the same, its voltage is reversed. When the applied voltage
is removed, following the change in state of the switch, L1 maintains its current flow by
reversing its voltage. When the voltage of L1 becomes negative, diode D1 switches on, which
provides a path for L1‟s current to flow.
Switching Frequency Vs Output Voltage
Voltage in a Buck Converter is typically controlled by using a Pulse-Width-Modulation
(PWM) signal to drive SW1. This implies that a pulse train is needed, which has the
following features:
o A switching period of TS
o An adjustable Pulse Width of TON, which is the time that SW1 is ON
o A Duty Cycle, S
ONT
TD
The desired output voltage can be obtained by adjusting the duty cycle. The pulse train is
typically in the range of 10‟s to 100‟s of kHz. The reasons why such high frequencies are
used are:
1. As frequency increases, the parts usually get smaller, lighter and cheaper, which is a
huge advantage for portable, battery powered devices. Large amounts of power can be
obtained from a small volume of components. This means that there is a high power
density (W/cm3).
2. The switching time causes a delay from input to output. Clearly, if the switching time,
Ts, is smaller, then the delay should be shorter. The delay becomes a problem when a
Buck Converter is used in a control loop. It can lead to effects such as overshoot,
ringing, or oscillation.
The Simulation Challenge
Simulation and analysis of switch-mode supplies is challenging due to the different time
frames that need to be considered:
1. The short period of the pulse train turning SW1 ON and OFF (in μsec). This
simulation requires only a few switching cycles.
2. The longer response of LC components as they respond to input or load changes (in
msec). Thousands of cycles are needed to look at the overall response.
8.5. Experiment Part 1: Buck Converter Simulations
A netlist, buck_basic.cir, is provided, which represents the Buck Converter shown in
Figure 6. At this point, it is a good idea to cut out the netlist from page 33, and make
comments, briefly describing what each line does. This will help you learn some basic netlist
aspects.
Here are some of the less obvious points that may be useful when making your comments:
VCTRL generates a pulse train of period TS = 20μs and pulse-width TON = 5μs.
When VCTRL is 5V, SW1 drops to 0.01 Ω connecting 20V (VIN) to L1.
When VCTRL is 0V, SW1 changes to 1 MΩ, effectively disconnecting VIN from L1.
RL represents the load (analog/digital circuitry, motors, lights, etc.) powered by the
Buck Converter.
First Spice Run: Longer Overall Response
Run the simulation and take a look at Vo by plotting V(3). Use the graph to answer the
following questions:
1. How much overshoot occurs due to the LC components?
2. What voltage does the output settle to?
Vo could be expected to be related to VIN and D:
Add VCTRL to the plot by including trace V(10). Change its duty cycle by increasing or
decreasing TON from 5 μs to values like 2.5, 10 or 15 μs. To do this, change the 5US
parameter in the PULSE definition of VCTRL. Does the above equation predict Vo
accurately?
Finally, examine the current through L1. Can you explain what is happening in the plot?
Print the plots, and put them in your log book.
Cycle By Cycle
Now it is time to look at the shorter term response. We need to look at only a few cycles of
the Buck Converter‟s operation, but we want to see the simulation results after a few hundred
cycles, when the supply has settled to a steady state. The Transient Analysis command caters
for this kind of requirement, as it lets you discard simulation results up to a specific delay
time. For example, this statement:
.TRAN 0.1US 840US 800US 0.1US
simulates the circuit up until 840μs, but discards the data before 800μs. The 40μs saved
represents two switching cycles. This statement is already included in the given netlist, but is
commented out. Uncomment the command and comment out the other .TRAN statement.
Set TON to 5μs and run a simulation of BUCK_BASIC.CIR. Plot Vo at V(3), VCTRL at V(10)
and in a separate plot window, view the inductor current, I(L1). You should see I(L1) rising
and falling as SW1 turns ON (VCTRL = 5 V) and SW1 turns OFF (VCTRL = 0 V).
Inductor Current
The next check on the circuit we can carry out is to examine the two different paths the
inductor current takes as it rises and falls. Open a new plot window and add SW1‟s current.
SW1‟s current should be the same as L1‟s current, but only when SW1 is ON. Then it drops
to 0 A. D1‟s current should initially be 0, then should equal L1‟s current when D1 turns ON.
Find D1‟s current, and plot it. Note that it may not be possible to plot it directly using Spice.
Finally take a look at the SW1‟s voltage at V(2). VSW1 should be VIN = 20V, and then it drops
to -0.3V as D1 (Schottky diode) turns ON, providing a pathway for L1‟s falling current.
Does L1‟s current rise and fall as expected? Check by first calculating the expected rise rate,
TI . Then calculate the total rise, ∆I, while SW1 is ON for 5μs.
Now, compare the expected rise against your plots. You might see a small difference between
the expected and actual values. Why is this?
What do you notice about the rise and fall of L1‟s current? This current change is called the
inductor ripple current, ΔI.
Find the average inductor current, Iave. This can be found either from the graph, or from the
Excel plot (go to the “tabelle” tab to find the raw data). Iave is important because this is the
current that gets delivered to the load RL. It can be calculated using:
L
oo
R
VI
Does Iave match Io? Now, suppose the demand for Io increases. What happens to the ripple and
average inductor current? Double Io by changing RL. Rerun the simulation and examine ΔI
and Iave? What do you notice? Can you explain what is going on? Next, we‟ll discover how
the inductor ripple current plays a factor in the output ripple voltage.
Output Voltage Ripple
One of the most important aspects of the power supply, is the amount of voltage ripple, ΔVo,
that appears at the output. This voltage ripple is applied to anything driven by Vo, such as
transistors, speakers, motors, and IC‟s. Large values of ΔVo could cause unexpected
behaviour or poor performance from the components driven by the supply.
Set TON = 5μs and RL = 5Ω. Run a simulation from 800 to 840μs. Plot the output V(3) and
inductor current I(L1) in separate windows. How big is ΔVo? There should be about 160
mVp-p ripple at the output.
What if the design goal is less that 50 mVp-p of ripple? First, return the components to their
original values: L1 = 50 μH, C1 = 25 μF and RL = 5. Now change the component values to
achieve a ripple less than 50 mV p-p. You can use the following hints to help you adjust the
values. Find the best combination of values for optimum performance, and justify your
choices by explaining the trade-offs.
CAPACITOR - C1 For a given an inductor ripple current, C1 has the sole responsibility for absorbing ΔI to
minimize ΔVo. Try increasing C1 from 25 μF to a value like 50 or 100 μF. Has ΔVo reduced?
Note that you might have to extend the simulation delay from 800 to 1000 μs. Why do you
need to do this?
INDUCTOR - L1 ΔVo can also be reduced by decreasing ΔI. The equation:
tells us how ΔI can be made smaller. Try changing the inductor value to reduce the ripple.
Rerun the simulation. Did ΔVo shrink as expected?
What are the advantages and disadvantages of using very large inductors in the circuit?
SWITCHING TIME – TS The equation above shows us another ripple reducing parameter: ΔT. How can ΔT be reduced
without changing the output voltage, Vo? Rerun the simulation with the changed parameters.
Has ΔI shrunk as expected?
Why might faster switching times be a disadvantage?
Continuous Vs. Discontinuous Mode
We‟ve previously seen current flowing continuously through L1. But there is also a mode
were the current goes to zero during the last portion of the switching cycle, called
discontinuous mode.
Table 1: Comparison of current through L1 for continuous and discontinuous mode of the Buck
Converter.
Continuous Mode – L1 has
2 states
Discontinuous Mode – L1
has 3 states
SW1 ON L1 current rises L1 current rises
SW1 OFF L1 current falls L1 current falls
L1 current falls to 0 Amps
We can change the netlist to see when L1‟s current goes to zero. First, set TON = 5μs, TS =
20μs and RL = 5Ω. Now run a SPICE simulation and plot the output V(3) and inductor
current I(L1). You should see ΔI, with Iave = 1A. Now reduce the load by raising RL to 10Ω.
Rerun the circuit. Comment on what happens to the following:
o The current in L1. What is the reason?
o Vo. Is SON TTVINVo still true? Raise RL to 20Ω and vary TON to find out.
Now, plot SW1‟s voltage, V(2), and inductor current, I(L), for the following two
configurations:
1. TON = 5μs, TS = 20μs, RL = 5Ω
2. TON = 5μs, TS = 20μs, RL = 10Ω
Comment on the differences that you see. Why do you think they occur? HINT: look at the
“non-ideal” parameters specified in the diode model.
Design Notes
It is usually recommended that supplies are run in continuous mode. There are two main
reasons for this:
1. The gain is stable. In continuous, Vo, can be approximately set using only VIN and the
duty cycle. However, in discontinuous mode, Vo depends on VIN, the duty cycle, L1,
RL, and TS.
2. For continuous and discontinuous modes, the frequency responses are different. This
means that a circuit optimized for use in continuous mode might respond significantly
differently in discontinuous mode.
For a given load, how should you ensure your supply is in continuous mode?
Capacitor ESR
We have previously used C1 to reduce ΔVo, which has worked successfully because an ideal
capacitor has been assumed. However, real capacitors behave as if there is a small resistor in
series with its capacitance, which is known as the Equivalent Series Resistance (ESR).
Change the C1 statement to the following two statements:
C1 3 4 25UF
RC1 4 0 0.5
RC1 = 0.5Ω models the ESR of C1. Remember that with L1 = 50μH, C1 = 25μF and RL =
5Ω, we saw that ΔVo ≈ 160 mVp-p.
Run a simulation and plot the V(3) and I(L1). How big is ΔVo? The inductor ripple ΔI, is
normally absorbed by C1, but now flows through the ESR, adding to the voltage ripple. The
ripple can be predicted using the following equation:
Does this equation match what you see in the simulations?
What happens when you increase C1 to 50 or 100μF? Is the ripple reduced?
How can the voltage ripple be reduced? Carry out some simulations to demonstrate how you
can reduce the voltage ripple.
8.6. Experiment Part 2: Buck Converter Power Loss
VIN
VCTRL
RL
C1
L1
D1
SW1
0
10
1 2 3Vo
RL1
RC1
4
5
Figure 9: Buck Converter circuit with equivalent series resistors for L1 and C1 included.
One of the most important areas in Switch Mode Power Supply (SMPS) design is
minimization of the power lost. Ideally, all power should power should be delivered to the
load. However, non-ideal components introduce losses into the system. In this part of the
experiment, we will examine:
1. Where power is lost in the circuit.
2. How power loss can be minimized.
3. How to evaluate the supply‟s power efficiency by comparing the average power
output versus average power input.
Where Power is Lost
Most of the power in an SMPS goes to the load. However, the resistive and semiconductor
elements convert power into heat. Also, real world components have parasitic elements
modelled as resistance in series with their reactance. The table below summarises where these
losses occur, and how they can be plotted using SPICE.
Table 2: Summary of areas where power might be lost in a Buck Converter.
Power
Dissipating
Element
Comment Plotting Instantaneous
Power in SPICE
SW1 Power is lost while SW1 is ON
and current is flowing through L1.
Power is also lost while
transitioning between OFF and ON
states.
V(1,2)*I(SW1)5
RL1 Power is lost in the equivalent
series resistance of inductor L1.
V(3,4)*I(RL1)
RC1 Power is lost in the equivalent
series resistance (ESR) of
capacitor C1.
V(5)*I(RC1)
D1 Power is lost while SW1 is OFF
and D1 provides a path for L1‟s
current.
V(0,2)*I(D1)
Instantaneous power is variable, and it is therefore the average power that we are interested in.
Basic Buck Converter Set-up
1. Modify the Buck Converter netlist, so that it includes the ESR‟s for the capacitor and
the inductor.
2. Change the parameters, so that the switching supply runs at 50kHz (Ts = 20μs), Ton =
8.33μs for SW1, and the input VIN = 12V.
3. Change the simulation time parameters, so that you can look at just one cycle (20μs)
of operation after a 1000μs delay, allowing the supply to settle.
4. Run a SPICE simulation of your netlist, and plot the output at V(4). You should see
Vo ≈ 5 V, with a ripple ΔVo ≈ 300mVp-p.
SW1 Power Loss
To see how much power gets lost in SW1, plot SW1‟s instantaneous power:
V(1,2)*I(SW1). The plot shows units of Volts, but it is of course Watts. (Note that SW1 is
typically a MOSFET, but for simplicity, it is modelled here using a voltage controlled
switch.)
Note the power spikes in the instantaneous power plot. What causes these spikes?
5 Note that this is just an indication of how the power is calculated, rather than something that can be entered into
SPICE. For example, to plot V(1,2) in SPICE, type plot V(2)-V(1).
What switch parameters could be changed to reduce the average power loss? Run SPICE
again after these parameters have been adjusted to show the reduction in power loss.
The parameters that you should have adjusted simulate selecting a MOSFET with different
specifications. So during the design of a SMPS, you might find the maximum requirements of
these parameters, and select the MOSFET based on those requirements.
Inductor And Capacitor Power Loss
Why would power be lost in the inductors and capacitors? Plot the instantaneous power
through the series resistances.
What are typical values for ESR in inductors and capacitors? Simulate ESR‟s at the extreme
ends of the typical values that you identified (i.e. smallest vs. largest) to show the difference
in power loss that might typically be seen without careful selection of components.
It should be noted that there is some power lost in the inductors core in real components that
is not modelled here.
D1 Power Loss
Although the Schottky diode used in this example has a lower ON voltage, 0.3V, compared
with the silicon diode, 0.7V, the power loss in the Schottky is still significant. Plot
V(0,2)*I(D1).
Compare the power lost in the diode to that lost in the switch, the inductor, and the capacitor.
Which is the most significant source of power loss?
A better diode is not available, which means that it is necessary to find an alternative to the
diode to reduce power loss further.
SYNCHRONOUS CONVERTER
In the Buck Converter, D1 acts as an automatic switch, which provides a current path for L1
when SW1 switches OFF. But, as shown in Figure 10, D1 can be replaced by an actual
switch. Because switches are low on resistance, they can reduce power loss during this part of
the switching cycle.
Remove D1 by commenting it out. Add SW2 to the netlist, and a corresponding model.
Remember SW2 should be ON when SW1 is OFF, and vice versa. You should now have a
netlist for the synchronous converter.
Run a new simulation, and plot a trace for SW2‟s power V(2)*I(SW2). Note that it may be
necessary to look at SW2‟s power in two plots: one where SW2 is OFF, and another where it
is ON. Is the power lost, lower than with D1?
Adding a switch changes the supply from a Buck Converter to a synchronous converter.
Although it is more complex, some battery powered applications may require this type of
converter to minimize the amount of power lost.
VIN RL
C1
L1
SW1
0
1 2 3Vo
RL1
RC1
4
5SW2
Figure 10: Synchornous converter circuit diagram.
8.7. Final Conclusions
You should now have a feel for how a basic switch-mode power supply works, and how
SPICE can be used to experiment with different component values before building the actual
circuit. Make sure you write some conclusions, summarising what you have learnt in this
experiment. For example, what are the major issues that should be considered when designing
a SMPS.
July 2007.
S. Worrall.
N. Wright.
8.8. Netlists
Buck_basic.cir
BUCK_BASIC.CIR - BASIC BUCK CONVERTER
*
* SWITCH DRIVER
VCTRL 10 0 PULSE(0V 5V 1NS 0.01US 0.01US 5US 20US)
R10 10 0 1MEG
*
* INPUT VOLTAGE
VIN 1 0 DC 20
*
* CONVERTER
SW1 1 2 10 0 SWI
D1 0 2 DSCH
L1 2 3 50UH
C1 3 0 25UF
*
* LOAD
RL 3 0 5
*
*
.MODEL SWI SW(VT=4.5V VH=0V RON=0.01 ROFF=1MEG)
.MODEL DSCH D( IS=0.0002 RS=0.05 CJO=5e-10 )
*
* ANALYSIS
.TRAN 1US 800US
*.TRAN 0.1US 840US 800US 0.1US
*
* VIEW RESULTS
.PLOT TRAN V(2) V(3)
.PROBE
.END
10. Experiment D1: Operational Amplifier
10.1. Aim The aim of this experiment is to investigate some properties of real op-amps which are not
present in `ideal' op-amps, but which affect practical op-amp circuits significantly.
10.2. Preparation Note that an ideal op-amp has infinite gain, maintained over an infinitely large frequency
range including zero frequency („DC‟), infinitely high input impedances, zero output
impedance, zero input offset voltage and zero bias currents.
The non-ideal values of these properties are what you will be concerned with in this two week
experiment. You need to ensure that you read enough to understand these concepts:
1. input bias current
2. input offset current
3. input offset voltage
4. slew rate
5. common-mode rejection.
It is important to study the Clayton book, as it contains a lot of information relevant to this
experiment. Other points to remember for your preparation:
Consider and draw the circuits that you need to perform the experiments,
particularly for week 2;
Briefly describe the steps you need to take for each part of the experiment – some
information is left out deliberately to make you think;
Make predictions about the results that you expect to see for each part of the
experiment;
As part of your results, use the datasheet to get predicted values and sketch graphs.
Feedback
Op-amps are frequently used with a high degree of negative feedback. In the limit such an
amplifier may be used as a unity-gain voltage follower, i.e. be subject to 100% feedback (in
the sense of a direct connection from output to inverting input).
Stability
Any amplifier with negative feedback applied can become unstable (that is, oscillate on its
own, without any external provocation). It will do this if, at a frequency at which the gain is
greater than unity, the overall loop phase-shift is equal to 180° (equivalent to a sign change,
i.e. converting the negative feedback into positive feedback). Since an op-amp has several
„stages‟ of amplification, the possibility of such a large phase shift must always be present.
If we consider a single stage of amplification within an op-amp, then if the stage load
comprises a resistor, this will inevitably be shunted by stray capacitance (see Figure 10-1). At
high frequencies, the load will degenerate into the capacitance alone, since the impedance of
the capacitance will be much less than the impedance of the resistance.
Figure 10-1: Model of Amplifying Stage (at HF most of the current goes into the capacitance).
At LF, (constant)
At HF,
Consequently the output voltage will exhibit 90° of phase lag over a wide range of
frequencies, including a considerable range where the gain, even though falling at 6 dB per
octave, is still above unity. An op-amp incorporating several similar stages will therefore
oscillate when even a limited amount of negative feedback is applied.
Consider a specific example-an op-amp with four internal gain stages each with a stage load
resistor (R) of 10 kΩ, with a stray capacity load (C) of 10 pF in parallel. Then simple circuit
theory shows that the amplifier gain will have fallen to 0.7 of its low-frequency value (-3 dB)
when the frequency reaches f = 1/(2×π×R×C), viz 1.59 MHz. At this frequency the phase shift
is 45°, and hence four identical stages will have an overall phase shift of 180°. The overall
gain will have decreased only by a factor (0.7)4, i.e. 0.24 or -12 dB. For any operational
amplifier with a reasonable amount of low-frequency gain, instability is almost certain with
only the most modest degree of feedback.
Internal Compensation
To counteract this most practical op-amps are „internally compensated‟, that is, constructed
with one stage having a deliberately poor high-frequency response, i.e. one stage has a high
equivalent shunt capacitance; the others have the minimum capacitance possible. Then from a
very low frequency this stage provides 90° of phase shift with a rate of gain reduction of 6 dB
per octave (= 20 dB per decade). If the overall gain falls to unity (0 dB) before the phase shift
due to other causes can equal 90°, the amplifier will be unconditionally stable under all values
of feedback. This makes the amplifier easy to use. The disadvantage is that amplifier gain is
thrown away unnecessarily at HF if less feedback is used – audio amplifiers are an example.
Frequency Response
It is this internal compensation which accounts for the characteristic frequency response of
op-amps. The frequency at which the phase shift is 45° is of necessity that at which the gain is
reduced from the DC value by 3 dB. This is shown in Fig. 2 on a graph of gain (dB) versus
frequency, plotted on a logarithmic scale. This type of graph is known as a `Bode gain plot',
and on it the high-frequency section is asymptotic to a straight line falling at 20 dB per
decade; the phase shift is close to 90° over this range. The high-frequency asymptote meets
the flat low-frequency gain asymptote at the same frequency as the 3 dB point, i.e. where the
true gain is 3 dB below the DC gain.
Figure 10-2: Bode Gain Plot of typical op-amp.
Phase and Gain Margins
There are two stability criteria which can be applied to the overall amplifier. The first is to
measure the phase-shift at unity gain and determine the „phase stability margin‟, i.e. the
amount by which the phase shift is less than 180°. The second is to measure the gain at the
frequency at which the phase shift is 180°, and determine the „gain stability margin‟ as the
amount by which the gain is less than 0 dB.
Bibliography
(Although some of these titles are currently out of print, most are available through the
Library.)
[1] Operational Amplifiers, 4th Edition, George Clayton and G. Burbridge,
Butterworth-Heinemann, 2000, ISBN 0750646438. Library ref: 621.381535.
[2] Op-amps and Linear Integrated Circuits, 3rd Edition, R A Gayakwad, Prentice
Hall, 1993, ISBN 0136303285
[3] Operational Amplifiers and Linear Integrated Circuits, 5th Edition, Robert F
Coughlin, Prentice Hall, 1998, ISBN 0132285037
[4] Reference Data for Radio Engineers, 6th Edition, International Telephone and
Telegraph, 1975, ISBN 0672212188
[5] Analog Electronics, T E Price, Prentice Hall, 1997, ISBN 0132428431
[6] Operational amplifier characteristics and applications, 3rd Edition, Robert G.
Irvine, Prentice-Hall, 1994, ISBN 0136060889
[7] Intuitive operational amplifiers: from basics to useful applications, Rev. Edition,
Thomas M. Frederiksen, McGraw-Hill, 1988, ISBN 0070219664
[8] http://www.uoguelph.ca/~antoon/gadgets/741/741.html
10.3. Experiment D1 (741 op-amp) The circuit is first constructed on strip-board. The op-amp should be connected to a 15 V
power supply. The centre terminal then becomes the system 0V. Do not connect the offset
null potentiometer until the last part of the experiment (D2 part 5).
1. Measure the input offset voltage, input bias currents, and input offset current,
using the circuits shown in Figure 10-3 and the associated formulae. Note signs of
voltages and directions of currents.
Figure 10-3: Offset voltage and bias current.
If in (a), Rf= 50 kΩ, and R1 = 100Ω, can the terms in Ib- and Ib+ be ignored,
assuming the expected values from the 741 data sheet? If so, what is the value of
Vos?
If in (b), R1 = 100Ω, R3 = 100 kΩ, which terms in the formula can be ignored?
What is the value of Ib+?
If in (c), R4 = 100kΩ, which terms in the formula can be ignored? What is the
value of Ib-?
From the measured values find the input offset current and input
bias current . Compare these measured values with those from
the data sheet, and comment on any differences.
NB: If |Vo| > 12V, the gain is too high and Rf should be reduced.
2. Measure the gain and frequency response of the circuit shown in Figure 10-4 for
various values of feedback, in both inverting mode (as shown) and non-inverting
mode. Suitable values for Rf are 2k2, 22 k and 220 k.
Plot the gain in dB against log frequency, and comment on the curves found. If
the bandwidth is defined as the frequency at which the gain has fallen by 3 dB, is
there any significance in the product of low-frequency gain and bandwidth?
NB: check that the 3 dB frequency is the same as the frequency where the sloping
asymptote intersects the flat LF asymptote.
NB: Is there any advantage in using log-linear graph paper?
Figure 10-4: Inverting feedback amplifier.
By extrapolation, determine the frequency at which the gain is 0 dB.
Measure the phase shift between input and output voltages, in the asymptotic
sloping section. Check that the output (sign?) lags the input by close to 90°.
Updated 1.11.01
K.N. Bateson
Updated July 2008
S. Worrall
Second Year Laboratories Autumn Semester: 2010/11
40
11. EXPERIMENT S: PULSE AND WIDE BANDWIDTH
MEASUREMENTS
11.1. Objective
(i) Demonstrate loading and mis-match problems associated with oscilloscope leads
and probes.
(ii) Show the effect of parasitic resonances in decoupling circuits.
(iii) Observe the variation in “ground” potential at different points on a PCB.
11.2. Preparation
The circuit diagram of a “times ten” passive probe for use with an oscilloscope is shown
below.
The components R2 and C3 represent the input circuitry of a typical oscilloscope. R2 is
usually 1M ohm. C3 may vary from „scope to „scope but is usually between 20 to 30 pF. The
probe compensation adjustment, C2, is made variable to accommodate changes input
capacitance between 'scopes. C2 also includes a fixed component due to the capacitance of
the coaxial cable of the probe. Special high impedance cable is used on 'scope probes to keep
this capacitance small.
To make Vin/Vout = 10 for all frequencies it is necessary to make the impedance of the
parallel combination C1 and Rl equal to nine times that of the parallel combination C2, C3
and R2. This gives the relationship:
R1=9×R2
and 9×C1 = (C2+C3)
1 Calculate the value of capacitor C1 to give a flat frequency response for the circuit
above. What is the effective input resistance and capacitance of this probe?
2 What would the input resistance and capacitance of the measurement system be if you
used a 1.5 metre length of low impedance coax cable with the same 'scope? Assume the
cable has a capacitance of 100 pf per metre.
3 How is rise time usually defined?
Second Year Laboratories Autumn Semester: 2010/11
41
4 Calculate the rise time of a 60 MHz scope given the relationship:-
Rise Time x Bandwidth = 0.35
5 Calculate the inductance, L, of a circular loop of 2mm diameter wire one metre in
circumference given:-
where D= Diameter of loop
d = Diameter of wire
and D/d > 5
6 Write down the equation for the resonant frequency f of a series LC tuned circuit.
7 Sketch the response of the LCR circuit above to a voltage step for the three cases, under
damped, critically damped and over damped.
8 Consider a narrow pulse propagating down a transmission line towards a termination. If
this termination were equal to the characteristic impedance of the cable, Zo, then there
will be no reflection back down the line.
What is the effect of replacing the termination with:-
a. An open circuit?
b. A short circuit?
(see Pulse, Digital and Switching Waveforms, Millman and Taub, McGraw-Hill
(1965) 621.38 or Kraus, J.D. Electromagnetics)
11.3. Equipment
You will be making measurements on a Sample Logic Board containing a 74HC14 hex
schmitt trigger wired as a buffered oscillator with rise and fall times of < 3ns. Outputs
available: A=220 ohm, B=47 ohm, C=Low Impedance, D=50 ohm. The circuit of this is
shown below in Figure 11-1.
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The decoupling capacitors, C1, C2, and C3 should provide a low impedance path for high
frequency transient currents keeping the voltage across the integrated circuit constant. This
process is known as decoupling since the signal voltage coupled to other circuits on the same
supply line is reduced.
In practice there is always some inductance in series with capacitors due to their connections,
this degrades their performance at higher frequencies.
Good decoupling is essential for well behaved logic and radio frequency circuitry.
The decoupling capacitors on this sample board are selectable by links so that the effect of
various combinations can be investigated.
Figure 11-1
You will also need the following equipment:
Oscilloscope with bandwidth of 60 to 100 MHz.
lm Coax lead BNC to BNC
lm Coax lead BNC to croc clips
3m Coax lead BNC to croc clips
x10 oscilloscope probe
Probe adjusting tool
50 ohm feed through termination
0.5m single wire croc clip lead
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11.4. Experimental Work
Oscilloscope Leads and Probes
First check that all the links LI to L3 are in place.
Coax Lead with Croc Clips
Take care when using when using the croc clip leads that they are connected the correct way
round. If you are not sure which lead is the input to the „scope, connect the lead to the 'scope
only and touch each croc clip in turn with your finger. Watch the „scopes free running trace as
you do this, only the signal input should cause the trace to move. If you see no movement
increase the vertical sensitivity of the 'scope.
Capacitive Loading and “Ringing”
Connect the lm Coax lead with croc clips to the oscilloscope. Use this to measure the rise time
and sketch the wave shape from the outputs A, B and C with respect to the common ground
point E. The exponentially decaying sinusoidal components you observe on the waveform are
usually referred to as “ringing”.
Times Ten Probe Adjustment and Use
Connect the x10 probe to the oscilloscope and adjust its compensation as follows. Most
„scopes have a square wave calibrator which may be used for this purpose. Connect the x10
probe to this calibrator and adjust the „scope to view one or two cycles on the screen. Observe
the rising and falling edges for squareness as the probes compensation adjustment is varied.
Set the compensation adjustment for best square response. The probe is now ready for use.
Will the probe need readjusting if used on a different „scope?
Use this calibrated probe to measure the rise time and wave shape of the outputs as before.
Note and explain any differences.
Probe Ground Lead Inductance
Connect the probe to output C and observe the effect of increasing the length of the earth lead
to E with the 0.5m long croc clip lead.
Remove the probe clip and hold the ground ring against the BNC socket whilst probing output
C. This gives the minimum length ground lead. Can you detect any difference in the wave
shape? What is the highest “ringing” frequency you can detect? Would the probe be
accurately calibrated for making measurements on a sinusoidal signal at this frequency?
Reconnect the probe tip and earth lead and observe the effect of changing the compensation
adjustment of the probe. Why is the visible effect not the same as the „scope calibration
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waveform? When is it more important to check the compensation of a x10 probe; when
measuring sine wave sources of 1 kHz and below, or 1 MHz and above?
Wide-Band 50 ohm Cables
Use the 3m coax cable to connect the „scope to the low impedance output C. Given that the
propagation velocity down the cable will be approximately 2x108ms
-1, note and explain the
shape of the displayed waveform. Connect the 50 ohm feed through termination between the
end of the cable and the „scope input and note any change in wave shape.
Use the 3m coax cable to measure output B, with and without the 50 ohm feed through
termination. Comment on the observed amplitude and shape of the waveform.
Remove all other leads and connect the lm BNC to BNC lead from output D to the scope.
Note the waveform then add the 50 ohm feed through termination. Comment on your
observations.
Decoupling
Remove all the links LI to L3
Measuring “Parasitic” Circuit Inductance
Parasitic components exist as resistance and inductance of the circuit connections and stray
capacitance between circuit elements. Careful circuit layout can minimise their value and
effect, but they will always exist. They may result in unpredictable circuit performance.
Although parasitic circuit components can cause problems at any frequency they are generally
more troublesome at higher frequencies.
Note that placing a small value capacitor in parallel with a larger one can cause an unexpected
parallel resonant circuit. At the resonant frequency the reactance of the large capacitor is low
(approximately a short circuit) but its leads and the interconnections will have inductance
which will resonate with the small capacitor.
Using the BNC to BNC lead and the 50 ohm termination as above. Note the effect on the
shape of the waveform. Using the links, select various arrangements of decoupling capacitors
and note the effect on the pulse shape; particularly the rising edge and “flat” top. Measure the
frequency of any resonant “ring”. Estimate the value of the circuit inductance for each case.
Note that there may be more than one network resonant at the same time so expand or
contract the „scope timebase in order to view them all.
Identifying “Parasitic” Circuit Inductance
With your knowledge of the inductance of a one metre length of wire and assuming
inductance is approximately proportional to length, look carefully at the layout of the printed
circuit board and identify possible parasitic inductors. Sketch the equivalent circuit of the
power supply to the IC including as many parasitic elements as you think relevant (i.e.
Inductance of PCB tracks, supply leads and capacitor leads and stray capacitance). Can you
suggest an improved layout for the components?
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Ground Potential and Coupling
You should now realise that no length of track on this sample board that can truly be called
the common or ground.
Measuring the Variation in Ground Potential
Connect all the links L1 to L3 and use the earth point E as a reference, use the lm coax to croc
clip lead (suitably terminated) to measure the transient voltage developed at various points on
the ground track. Record your results including the peak to peak amplitude and frequency of
the transient. Do you get a zero value when you measure at point E?
Join the croc clips together and observe the voltage produced with and without them
connected to point E. Explain your results.
Note that a common earth connection to two circuits can cause coupling between them
although, by individual design, they may be independent.
Inductive Coupling
With the croc clips shorted and isolated from ground form a small (~2cm dia.) loop. Hold this
close to the PCB. Are there some areas which produce more signal than others? Try removing
L1 and L2. Is there any change, if so why?
What may be the effect of poor ground layout and inductive coupling on a Radio Frequency
amplifier?
MJB/MJU August 1998
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