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L1S Jitter with AIP Modulator. Franz-Josef Decker 25-Sep-2014. L1S Phase Jitter History. 0.04 deg 0.07-0.12 deg it is bad now TDLY: Modulator pulse cuts into RF pulse HV higher and then better jitter is new!. Sep. 2014. July 2014. TDLY: -5.7 -4.2 us. HV: 300 320 kV. - PowerPoint PPT Presentation
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L1S Jitter with AIP Modulator
Franz-Josef Decker 25-Sep-2014
L1S Phase Jitter History
• 0.04 deg 0.07-0.12 deg it is bad now• TDLY: Modulator pulse cuts into RF pulse• HV higher and then better jitter is new!
July 2014 Sep. 2014
HV: 300 320 kV
TDLY: -5.7 -4.2 us
L1S HV Scan
• AIP modulator “allows” it
300 kV 340 kV
Pha
se J
itter
[de
g]
AIP SCR Modulator Upgrade(before and after)
• L1X shows similar behavior to L1S• Looks like timing jitter July 2014 Sep 2014
L1S
• Lost
July
Sep.
Best for Sep
More L1S
• Reminder: 100 ppm 0.05 deg
Lowest timing jitter Maybe thyratron worse
Thyratron back swing jitter
• It shouldn’t have this two state
L1S is Main Source of DL2 E-Jitter
• L1S phase is nearly 75% of energy jitter power, (DE/E = 0.025 0.057 %)
• And phase is 86 % correlated to HV
Pha
se
d
eg
HV counts
86 %
Summary• New L1S modulator and Klystron setup is
2-3 times worse• It “seems” to point to SCR switched AIP
upgraded modulator• Many more variations happened: new thyratron,
30120 Hz, -50 -75 V thyratron bias change, filter in trigger bypassed, LC for DQ-ing, Ross devider, …
• To do: Secondary power supply, …