K91F-MLB 051-8620 820-2915 Rev: B820-2915 1 PCBF,MLB,K91 PCB CRITICAL 051-8620 1 SCHEM,MLB,K91 SCH CRITICAL 51 46 K18_MLB 1 1 MASTER LPC+SPI Debug Connector 04/27/2010 Table …

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3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT

3

B

7

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DRAWING NUMBER

REVISION

SIZE

D

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

DRAWING TITLE

THE POSESSOR AGREES TO THE FOLLOWING:

Apple Inc.

SHEET

R

DATE

D

A

C

THE INFORMATION CONTAINED HEREIN IS THE

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

C

3456

D

B

8 7 6 5 4 2 1

12

APPDCK

DESCRIPTION OF REVISION

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEMTABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM

DRAWING

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_HEAD

REV B RELEASE, 01/31/11SCHEM,FLYING_DUTCHMAN,MLB,K91F

Schematic / PCB #’s

ALIASES RESOLVED

1 OF 101

1 OF 132

2010-10-12

5045 07/12/2010K91_BENSMC Support

4944 07/12/2010K91_BENSMC

4843 04/27/2010K18_MLBFront Flex Support

4642 10/08/2010K91_ERICExternal USB Connectors

4541 11/08/2010K91_ERICSATA/IR/SIL Connectors

4340 06/10/2010T27_REFFireWire Connector

4239 06/10/2010T27_REFFireWire Port & PHY Power

4138 04/27/2010K18_MLBFireWire LLC/PHY (FW643)

4037 05/26/2010K91_TRINHNIEthernet Connector

3936 10/11/2010K91_ERICETHERNET PHY (CAESAR IV)

3835 10/12/2010T29_REFT29 Power Support

3734 10/12/2010T29_REFT29 Host (2 of 2)

3633 10/12/2010T29_REFT29 Host (1 of 2)

3532 10/08/2010K91_ERICSD READER CONNECTOR

3431 10/08/2010K91_MARYX19/ALS/CAMERA CONNECTOR

3330 04/27/2010K18_MLBFSB/DDR3/FRAMEBUF Vref Margining

3229 04/27/2010K18_MLBCPU Memory S3 Support

3128 06/23/2010K92_SUMADDR3 SO-DIMM Connector B

3027 05/10/2010K92_SUMADDR3 Byte/Bit Swaps

2926 06/23/2010K92_SUMADDR3 SO-DIMM Connector A

2825 07/06/2010K92_MLBChipset Support

2624 10/08/2010K91_ERICUSB HUBS

2523 10/17/2010K91_MLBCPU & PCH XDP

2422 07/06/2010K92_MLBPCH DECOUPLING

2321 04/30/2010K92_MLBPCH GROUNDS

2220 07/06/2010K92_MLBPCH POWER

2119 10/20/2010K91_MLBPCH MISC

2018 07/06/2010K92_MLBPCH PCI/FLASHCACHE/USB

1917 07/06/2010K92_MLBPCH DMI/FDI/GRAPHICS

1816 10/19/2010K91_MLBPCH SATA/PCIE/CLK/LPC/SPI

1715 08/19/2010K92_MLBCPU DECOUPLING-II

1614 08/19/2010K92_MLBCPU DECOUPLING-I

1413 06/15/2010K92_SUMACPU POWER AND GND

1312 08/03/2010K92_MLBCPU POWER

1211 06/15/2010K92_SUMACPU DDR3 INTERFACES

1110 08/03/2010K92_MLBCPU CLOCK/MISC/JTAG

109 06/21/2010K92_SUMACPU DMI/PEG/FDI/RSVD

98 04/27/2010K18_MLBSignal Aliases

87 04/27/2010K18_MLBPower Aliases

76 04/27/2010K18_MLBFunctional / ICT Test

55 05/28/2009K17_REFBOM Configuration

44 MASTERMASTERRevision History

33 06/30/2009K17_REFPower Block Diagram

22 06/30/2009K17_REFSystem Block Diagram

100K92_MLB90 08/09/2010

CPU Constraints

99K91_MARY89 08/03/2010

Power Sequencing EG/PCH S0

97K90I_KIRAN88 06/25/2010

LCD Backlight Driver

96K91_MARY87 08/03/2010

Graphics MUX (GMUX)

95K91_ERIC86 10/08/2010

1V0 GPU / 1V5 FB Power Supply

94T29_REF85 10/16/2010

DisplayPort/T29 A Connector

93T29_REF84 10/16/2010

DisplayPort/T29 A MUXing

92K92_MLB83 11/21/2010

Muxed Graphics Support

90K18_MLB82 04/27/2010

LVDS Display Connector

89K91_ERIC81 12/21/2010

GPU (Whistler) CORE SUPPLY

88K92_SUMA80 06/15/2010

Whistler DP PWR/GNDs

87K92_MLB79 11/23/2010

Whistler GPIOs & STRAPs

86K92_MLB78 12/01/2010

Whistler LVDS/DP/GPIO

85K92_MLB77 08/19/2010

GDDR5 Frame Buffer B

84K92_MLB76 08/19/2010

GDDR5 Frame Buffer A

82K92_MLB75 08/03/2010

Whistler FRAME BUFFER I/F

81K92_SUMA74 06/15/2010

Whistler CORE/FB POWER

80K92_SUMA73 06/15/2010

Whistler PCI-E

79K91_MARY72 07/22/2010

Power Control 1/ENABLE

78K91_MARY71 10/14/2010

Power FETs

77K91_ERIC70 11/01/2010

Misc Power Supplies

76K91_ERIC69 10/08/2010

CPU VCCIO (1.05V) Power Supply

75K91_ERIC68 09/22/2010

CPU IMVP7 & AXG VCore Output

74K91_ERIC67 10/08/2010

CPU IMVP7 & AXG VCore Regulator

73K91_ERIC66 10/08/2010

1.5V DDR3 Supply

72K91_ERIC65 10/08/2010

5V / 3.3V Power Supply

71K91_ERIC64 10/08/2010

System Agent Supply

70K91_CHANG63 07/20/2010

PBus Supply & Battery Charger

69K91_ERIC62 10/08/2010

DC-In & Battery Connectors

68K91_AUDIO61 09/21/2010

AUDIO: JACK TRANSLATORS

67K91_AUDIO60 09/30/2010

AUDIO: JACKS

66K91_AUDIO59 07/12/2010

AUDIO: SPEAKER AMP

65K91_AUDIO58 07/12/2010

AUDIO: HEADPHONE FILTER

63K91_AUDIO57 07/12/2010

AUDIO: LINE INPUT FILTER

62K91_AUDIO56 09/30/2010

AUDIO: CODEC/REGULATOR

61K91_BEN55 06/08/2010

SPI ROM

59K91_DINESH54 08/06/2010

Digital Accelerometer

58K91_ERIC53 07/14/2010

WELLSPRING 2

57K91_ERIC52 10/08/2010

WELLSPRING 1

56K18_MLB51 04/27/2010

Fan Connectors

55K91_DINESH50 09/22/2010

Thermal Sensors

54K91_DINESH49 10/29/2010

High Side and CPU/AXG Current Sensing

53K91_DINESH48 08/16/2010

Voltage & Load Side Current Sensing

52K18_MLB47 04/27/2010

SMBus Connections

Power Supplies BIST101 K91_DINESH08/18/2010132

DEBUG SENSORS AND ADC100 K91_DINESH08/06/2010130

PCB Rule Definitions99 K18_MLB04/27/2010109

Project Specific Constraints98 K18_MLB04/27/2010108

GPU (Whistler) CONSTRAINTS97 K92_MLB08/09/2010107

SMC Constraints96 K18_MLB04/27/2010106

T29 Constraints95 T29_REF10/16/2010105

Ethernet/FW Constraints94 K91_ERIC08/03/2010104

PCH Constraints 293 K92_MLB08/09/2010103

PCH Constraints 192 K92_MLB08/09/2010102

SCHEM,MLB,K91

(.csa) Date

Page SyncContents

CRITICALPCB1820-2915 PCBF,MLB,K91

SCHEM,MLB,K91 CRITICALSCH1051-8620

51K18_MLB46 04/27/2010

LPC+SPI Debug Connector11 MASTER

MASTERTable of Contents Memory Constraints91 K18_MLB04/27/2010101

TITLE=MLBABBREV=DRAWINGLAST_MODIFIED=Mon Jan 31 12:49:37 2011

ContentsPageDate(.csa)

Sync ContentsPage(.csa)

SyncDate

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:


36

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IV ALL RIGHTS RESERVED

SHEET

PAGE TITLE

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A

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2 1


Apple Inc.

PAGE


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C

345678

D

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8 7 5 4 2 1

POWER SUPPLYPG 63

DC/BATT

TEMP SENSOR

J6950

U4900

PG 23

SPIBoot ROM

U6100

XDP CONN

J2500,J2550

J2900

DIMM

PG 26,28

J3100

PG 16

DDR3-1067/1333MHZ

2 DIMMS

RTCDMIPG 17

PG 44

PG 51

PG 44

POWER SENSE

FAN CONN AND CONTROLJ5650,5660

Fan

CONNECTION

SMBUS

PG 47

PG 63

SPEATKER

TRACKPAD/KEYBOARD

U6610,6620,6630

SPEATKER

Ser ADC

PG 44

SMC

BSBB,0

J3402

U4900

Prt

PG 55

PG 46

U3600CAMERA

PG 33

PG 33

PG 41

PG 31

EXTERNAL B

EXTERNAL C

J4501

J4610

PG 34

PG 31

PG 53

BLUETOOTH

EXTERNAL A

J5713

J3401

J4600

USB

HUB 2

PG 33

HUB 1

USB

PG 34

U3700

LPC + SPI CONN

Port80,serial

J5100

PG 19

Misc

SPI

PG 16

LPC

PG 16

PWR

1011

13

12

98

65

47

32

10

CTRL

PG 17

(UP TO 14 DEVICES)

PG 18

USB

AUDIO

PG 56

DIMM

PG 26,28

U6201

AMP

PG 59

PG 60

FILTER

PG 58

AUDIO

CONN

PG 57

J6700,J6750

LINE TIN

FILTER

PG 16

PG 16

SMB

HDA

J3500

PG 37

CONN

(UP TO 16 LINES)

SDCARD READER

COUGAR-POINT

U1800

2.X GHZ

INTEL CPU

SANDY BRIDGE

INTEL

MOBILE

PG 9

PG 17

FDIPG 19

GPIO

GRAPHICS

AMD WHISTLER

U8000

PG 73

U2700 CLOCK

SATA3.0/6(GB/S)

SATA3.0/6(GB/S)

SATA2.0/3(GB/S)

SATA2.0/3(GB/S)

SATA2.0/3(GB/S)

SATA2.0/3(GB/S)

BUFFER

PG 16

CLK

45

SATA

23

PG 16

10

DP OUT

RGB OUT

HDMI OUT

LVDS OUT

DVI OUT

PG 18

TMDS OUT

PCI

PG 18

PG 24

PG 41

CK5G05

CONNSATA

J4501

ODD

PG 41

SATACONN

J4500

HDD

PG 83

DP MUXXP25-5G

PG 84

JTAG

PCI-E

PG 16

PEG

PG 16

PG 16

BCM57765

GB

PG 36

E-NET

CONNPG 37

E-NET

J4000

U3900

PG 38

PG 40

CONNFIREWIRE

FW643

PG 83

DDC MUX

PG 86

GMUX

U4100

J4310PG 31

AirPort

J3401

MINI DP PORT

LCD PANEL

U9600

U9320

U9370

J9400

IR

(RESERVATION)

CODEC

HEADPHONESYNC_DATE=06/30/2009SYNC_MASTER=K17_REF

System Block Diagram

2 OF 132

2 OF 101




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345678

D

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8 7 5 4 2 1

(PAGE 82)

PP3V3_S0_PWRCTL

P1V8S0_PGOOD

P5V3V3_PGOOD

ACADAPTER

CHGR_BGATE

VINU6200

PM_SLP_S4_L

PM_SLP_S5_L

PM_SLP_S3_L

SMC_ONOFF_L

RSMRST_PWRGD

(PAGE 45)

SLP_S4_L(P94)

SLP_S3_L(P93)

U4900

SLP_S5_L(P95)

H8S2117

PWRGD(P12)

RSMRST_IN(P13)

PWR_BUTTON(P90)

ALL_SYS_PWRGD

PP4V5_AUDIO_ANALOG

(PAGE 9~14)

SMC

CPUU1000

U2850

PM_PCH_PWRGDPS_PWRGD

U1800

(PAGE 70)

SMC_RESET_L

ISL958701.05V

PGOOD

VOUT

SMC AVREF SUPPLY

(PAGE 45)

REF3333VOUT

CPUVTTS0_PGOOD

R7640

A

PROCPWRGD

DRAMPWROK

SMC_TPAD_RST_L

SMC_ONOFF_L

PLTRST#

RES*

P17(BTN_OUT)

SYSRST(PA2)

IMVP_VR_ON(P16)

99ms DLY

PP3V3_S5_AVREF_SMC

(P64)

RESET*

VCCCPUPWRGD

SM_DRAMPWROK

PWRBTN#

SYS_RERST#

(PAGE 16~21)

RSMRST#

COUGAR_POINT

PPCPUVTT_S0

SMC_CPU_FSB_ISENSE

RSMRST_OUT(P15)

ACPRESENT

SMC_RESET_L

PM_RSMRST_L

CPUIMVP_VR_ON

PM_SYSRST_L

PM_PWRBTN_L

SMC_ADAPTER_EN

PLT_RERST_L

CPU_PWRGD

PM_MEM_PWRGD

PM_PWRBTN_L

EN

FW_PWR_EN

U4202TPS22924

(PAGE 39)

U5001

PP3V3_S5_SMC

PP1V0_FW_FWPHY

DELAY

DELAY

RC

RC

DELAY

RC

DELAY

RC

CPUVTTS0_EN

P1V5CPU_EN

P1V8S0_EN

P1V2S0_EN

R7978

U1800

(PAGE 16~21)

SLP_S3#(P12)

SLP_S4#(H7)

DELAY

DELAY

RC

RC

MOBILE

(PAGE 44)

P60

SMC

(PAGE 86)

U4900

PL32A

SMC_PM_G2_EN

COUGAR-POINT

SLP_S5#(E4)

RCDELAY

XP25-5 EG_RAIL4_ENPB18A

GMUX

U9600 PB17A

PB17B

PB16B

(9 TO 12.6V)

3S2P

J6950

EG_RAIL2_EN

EG_RAIL3_EN

EG_RAIL1_EN

PPVBATT_G3H_CONN

PM_SLP_S3_L

PM_SLP_S5_L

PM_SLP_S4_L

PM_ALL_GPU_PGOOD

P3V3S3_EN

DDRREG_EN

P5VS3_EN

PM_SLP_S3_L_R

PBUSVSENS_EN

P3V3S0_EN

P5VS0_EN

&&

SMC_ADAPTER_EN&&PM_SLP_S3_L

BKLT_PLT_RST_L

LCD_BKLT_NO

Q4260

BKLT_ENENA

(PAGE 87)

U9701

PFWBOOST

LP8550VIN

VOUT

P3V3S5_EN

P1V1GPU_EN

P3V3GPU_EN

GPUVCORE_EN

Q7055

P1V5FB_EN

PPVBAT_G3H_CHGR_R

P1V0GPU_EN

U9500

Q9806

EN2

ISL6236

EN1 VIN

P5VS3_EN

1.503V(R/H)

(PAGE 85)

P3V3S5_EN

1.003V(L/H)

POK2

EN2

EN1

VOUT2

POK1

VOUT1

AR5413

(PAGE 64)

IN

J6900

DCIN(16.5V)6A FUSEF6905

K91 POWER SYSTEM ARCHITECTURE

SMC_DCIN_ISENSE

SMC_RESET_L

A VIN

R7020

PP18V5_DCIN_CONN

BATTERY CHARGERPBUS SUPPLY/

U7000

ISL6259HRTZ

R6990

VOUT

SMC_BATT_ISENSE

PPVBAT_G3H

R7050 A

8A FUSE

F7040

SMC_GPU_1V8_ISENSE

PP1V5_GPU_REG

TPS51125

P1V5FB_PGOOD

P1V0GPU_PGOOD

P5V3V3_PGOOD

PPVOUT_S0_LCDBKLT

PP1V0_S0GPU_REG

(PAGE 65)PGOOD

PPBUS_G3H

D6990

P1V8_S0_EN

U7201

Q7830

Q7870

Q7810

P3V3GPU_EN

PP3V3_S3

PP3V3_S0_FET

P3V3S0_EN

EN

P3V3S3_EN

P1V2ENET_EN

PP3V3_S0GPU

EN U7760(PAGE 70)PGOOD

VOUTISL8014AVIN

VIN

ISL8014AU7720(PAGE 70)

VOUT

PGOOD

PP1V2_ENET

P1V2ENET_PGOOD

P1V8S0_PGOOD

PP1V8_S0

EN

(PAGE 39)

TPS22924U4201 PP3V3_FW_FWPHY

P1V8FB_EN

FW_PWR_EN

ON

Q7922

VIN

SLG5AP020U7880

G

VIN

5V

3.3V(R/H)

(L/H)

P1V5CPU_EN

VREG5VOUT1

VOUT2

ONSLG5AP020

DDRVTT_EN

DDRREG_EN

PP5V_S3

PP3V3_S5

VIN

U7801

G

PP1V5_S3

PP3V3_S5

S3

S5

SMC_CPU_HI_ISENSE

(PAGE 66)U7300

P1V5S0FET_GATE

Q7801

TPS51116

1.5V

0.75V

CPUIMVP7_VR_ON

R5388/U5388

A

VIN

PP5V_S3_DDRREG

PP1V5_S3RS0

PGOOD

VOUT1

VLDOIN

VOUT2

Q7860

DDRREG_PGOOD

PPVTT_S0_DDR_LDO

PPDDR_S3_REG

PP5V_S0

P5VS0_EN

A

VR_ON

VIN

CPU VCORE

(PAGE 67)

U7400ISL95831

PGOOD

VOUT

PP1V8_S0

PM_SLP_S3_L&&WOL_EN||SMC_ADAPTER_EN

P1V2S0_EN

PP1V2_S0

P1V8GPUIFPXFET_GATE

Q7850

PP3V3_ENET

CPUIMVP7_AXG_PGOOD

R7350SMC_DDR_ISENSE

ASMC_CPU_ISENSE

PP1V05_S0

PP1V5_S0

V4MON

V3MON

TRST = 200mS

(PAGE 72)

U7971

RST*

V2MONPP3V3_S0

PP1V8_GPUIFPX

PP3V3_S0

VCC

S0PGOOD_PWROK

ISL88042IRTJJZ

PP3V3_S0_PWRCTL

PM_SLP_S4_L

PM_SLP_S5_L

PM_SLP_S3_L

SMC_ONOFF_L

RSMRST_PWRGD

Q7880 ALL_SYS_PWRGD

PP3V3_S0EN

PP1V5_S3

4.5VMAX8840

PM_ALL_GPU_PGOOD

U7980

VOUT

V

U5440

V

SMC_CPU_DDR_VSENSE

PPVCORE_S0_CPU

SMC_CPU_VSENSE

PP4V5_AUDIO_ANALOG

U2850

PM_PCH_PWRGD

PPBUS_G3H

PP5V_S3_GFXIMVP6_VDD

GPUVCORE_EN

SMC_PBUS_VSENSE

VR_ON

VDD

V Q5315

GPU VCORE

ISL6263C

VIN

U8900

PGOOD

VOUT

U6990

3.425V G3HOT

ENABLE

PM6640

(PAGE 62)

SMC_GPU_ISENSEU5410

A

GPUVCORE_PGOOD

V

PP3V42_G3H

PPVCORE_GPU

SMC_GPU_VSENSE

CPUVTTS0_EN

U5000(PAGE 45)

PP5V_S0_CPUVTTS0

EN

VIN

NCP303LSNSMC PWRGD

U7600

(PAGE 70)

SMC_RESET_L

VIN

ISL958701.05V

PGOOD

VOUT

SMC AVREF SUPPLY

(PAGE 45)

REF3333VOUT

CPUVTTS0_PGOOD

SYNC_DATE=06/30/2009SYNC_MASTER=K17_REF

Power Block Diagram

3 OF 132

3 OF 101




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Revision HistorySYNC_MASTER=MASTER SYNC_DATE=MASTER

4 OF 132

4 OF 101

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM


TABLE_ALT_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM


TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

TABLE_ALT_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

BOM OPTIONSBOM GROUPTABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM




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BOM OPTIONSBOM NAMEBOM NUMBERTABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

K91 BOM GROUPS

Module Parts

Alternate Parts

EFI ROM

BOM Variants

(Primary)

Bar Code Labels / EEEE #’s-

|

(Alternate)

SMC

PSOCETHERNET ROM

Programmables - All Builds

PCBA,MLB,K91F,DG64639-1468 K91_COMMON,SODIMM:FOXCONN,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DG64

PCBA,MLB,K91F,DG65639-1469 K91_COMMON,SODIMM:FOXCONN,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DG65

PCBA,MLB,K91F,DL86639-1970 K91_COMMON,SODIMM:HYBRID,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL86

K91_COMMON,SODIMM:HYBRID,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL81639-1973 PCBA,MLB,K91F,DL81

K91_COMMON,SODIMM:MOLEX,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL7W639-1956 PCBA,MLB,K91F,DL7W

SYNC_DATE=05/28/2009

BOM ConfigurationSYNC_MASTER=K17_REF

ALL Diodes alt for Rohm376S0859376S0977

U6201 AUDIO CODEC OLD REV IS ALTERNATE FOR NEW REV353S3199 ALL353S2592

335S0550 add 4K byte as alternative to 2K335S0777 ALL

NXP alternate for pin diodesALL371S0652371S0679

138S0671 138S0673 ALL Taiyo Yuden alt for Murata 10 uF caps

ALL152S0796 Dale/Vishay/TDK alt for Cyntec152S0685

ALL Taiyo Yuden alt for Samsung138S0638138S0681

138S0648 Samsung / Murata alt for Taiyo Yuden138S0652 ALL

138S0691 Murata alt to Samsung capALL138S0676

ROHM alt to Toshiba N-FETALL376S0972 376S0612

IC,EEPROM,SERIAL,8KB,SOIC335S0777 CRITICALU3690 T29ROM:BLANK1

Sanyo alt to KemetALL128S0264 128S0257

ST Micro alt to LTALL353S3085 353S1658

ALL155S0457 MAG LAYERS ALT TO MURATA155S0329

ALL152S0896 MAG LAYERS ALT TO CYNTEC152S0518

Panasonic alt to SanyoALL128S0303 128S0282

Fairchild wafer optionALL353S2805 353S2603

ALL376S0855 376S0613 Diodes alt to Toshiba dual N-FET

IC,SMC,DEVELOPMENT-DVT,K91 CRITICAL1 U4900 SMC_PROG:DVT341S2864

1 CRITICALIC,SMC,DEVELOPMENT-PROTO2,K91 U4900 SMC_PROG:PROTO2341S2994

IC,SMC,DEVELOPMENT-PROTO1,K91 U4900341S2935 SMC_PROG:PROTO1CRITICAL1

IC,SMC,DEVELOPMENT-PVT,K91 CRITICALU49001 SMC_PROG:PVT341S2867

335S0740 64 MBIT SPI SERIAL DUAL I/O FLASH BOOTROM_BLANK1 CRITICALU6100

337S4033 U1000 CPU:2_3GHZCRITICAL1 IC,CPU,SNB,SR00U,PRQ,D2,2.3,45W,4+2,1.30,8M,BGA

1 U4900 SMC_BLANKCRITICALIC,SMC,HS8/2117,9MMX9MM,TLP338S0895

IC,GPU ROM,K91/F,K92,BLANK U8701 GPUROM:BLANK1 CRITICAL335S0724

IC,GPU ROM,K91/F,K92,PROG1 GPUROM:PROGCRITICALU8701341S2957

IC,MCU,32B,LPC1112A,16KB/2KB,HVQFN25 U9330 T29MCU:BLANKCRITICAL337S3997 1

IC,EFI,ROM,PROTO0, K90/K90I/K91/K91F/K921 U6100 CRITICAL341S2893 BOOTROM_PROG:PROTO0

341S2830 CRITICALU9600IC,CPLD,LATTICE,GMUX,K91/K91F1 GMUX_PROG

826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL80] EEEE:DL801 CRITICAL

826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL7Y] EEEE:DL7Y1 CRITICAL

[EEEE_DL7W] EEEE:DL7W1826-4393 CRITICALLBL,P/N LABEL,PCB,28MM X 6 MM

826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL7V] EEEE:DL7VCRITICAL1

LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL7R]1 EEEE:DL7RCRITICAL826-4393

[EEEE_DL7Q]826-4393 1 CRITICAL EEEE:DL7QLBL,P/N LABEL,PCB,28MM X 6 MM

639-1574 PCBA,MLB,K91,DHMW K91_COMMON,SODIMM:FOXCONN,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_SAMSUNG,EEEE:DHMW

639-1960 PCBA,MLB,K91,DL7Y K91_COMMON,SODIMM:MOLEX,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_SAMSUNG,EEEE:DL7Y

K91_COMMON,SODIMM:HYBRID,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_HYNIX,EEEE:DL7Q639-1945 PCBA,MLB,K91,DL7Q

K91_COMMON ALTERNATE,COMMON,K91_COMMON1,K91_COMMON2,K91_PROGPARTS,K91_PROGPARTS1,UVGLUE_K91_K91F,K91_PVT

CPUMEM_S0,SMC_DEBUG_YES,HUB1_2NONREM,HUB2_2NONREM,USBHUB_2513BK91_COMMON1

K91_COMMON2 GPUVID_1P11V,KB_BL,T29:YES,ENET_SD:B0,T29BST:Y,SDRV_PD,SDRVI2C:MCU,T29_DP_HPD:ALL_OR

K91_PVT BMON:PROD,VREFMRGN_NOT,XDP,XDP_CPU_BPM,BKLT:PROD,ISNS_ON:NO,LPCPLUS_R:YES

K91_PROGPARTS GMUX_PROG,IR_PROG,TPAD_PROG:PVT,ENETROM_PROG:PVT,T29ROM:PROG,T29MCU:PROG

SMC_PROG:PVT,BOOTROM_PROG:PVTK91_PROGPARTS1

K91_DEVEL:PVT SNB_CPT_XDP,LPCPLUS_CONN:YES,LPCPLUS_R:YES

SNB_CPT_XDP XDP,XDP_CONN,XDP_CPU_BPM,XDP_PCH 1 IC,T29 EEPROM,PVT,K9x T29ROM:PROGU3690 CRITICAL341S3129

K91_COMMON,SODIMM:HYBRID,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_SAMSUNG,EEEE:DL80639-1959 PCBA,MLB,K91,DL80

IC,EFI,ROM,PROTO1, K90/K90I/K91/K91F/K92341S2934 CRITICALU6100 BOOTROM_PROG:PROTO11

K91_DEVEL:ENG SNB_CPT_XDP,BMON:ENG,GMUX_JTAG_CONN,VREFMRGN,LPCPLUS_CONN:YES,LPCPLUS_R:YES,BKLT:ENG,S0PGOOD_ISL,CPURIPPLE_ENG,IMVPISNS_ENG,ISNS_ON:YES,DEBUG_ADC,DIGI_MIC

338S0945 U3600IC,ASSP,LIGHTRIDGE,S LHAJ,PRQ,FCBGA,15X15MM CRITICAL1 T29:YES

725-1479 UV_GLUE_K91_K91F UVGLUE_K91_K91F1 CRITICALMLB LOCTITE UV EB CPU,PCH,T29,GPU,K91

CRITICALJ2900516-0246 SODIMM:FOXCONN1 CONN,204P,SODIMM,SOCKET,DDR3,p=0.6M,FOXCONN

CONN,204P,SODIMM,SOCKET,DDR3,RAM,BGA,MOLEX516S0805 SODIMM:MOLEXJ31001 CRITICAL

1516-0245 SODIMM:MOLEXCONN,204P,SODIMM,SOCKET,DDR3,p=0.6M,MOLEX CRITICALJ2900

516S0805 J31001 SODIMM:HYBRIDCONN,204P,SODIMM,SOCKET,DDR3,RAM,BGA,MOLEX CRITICAL

J2900516-0246 1 CRITICALCONN,204P,SODIMM,SOCKET,DDR3,p=0.6M,FOXCONN SODIMM:HYBRID

IC,FLASH,SERIAL,SPI,1MBIT,2V7,8P,SOIC335S0663 1 ENETROM_BLANKCRITICALU3990

1 U3990341S3096 CRITICALIC,ENET ROM,1MBIT,DVT,PVT,K90i/K91x ENETROM_PROG:PVT

IC,ENET,1MBITFLASH,CIV REV01,K90i/K91/K921 CRITICAL ENETROM_PROG:EVT341S3026 U3990

341S2685 IC,ENET,1MBITFLASH,CIV REV01,K74/K75,K401 CRITICAL ENETROM_PROG:A0_SDU3990

SODIMM:FOXCONNJ3100516S0806 1 CRITICALCONN,204P,SODIMM,SOCKET,DDR3,RAM,BGA,FOXCONN

TPAD_PROG:PROTO2U5701 CRITICALIC,TP PSOC,K9x,PROTO21341S3001

1 CRITICAL TPAD_PROG:EVTIC,TP PSOC,K9x,EVT341S3024 U5701

341S2940 1 CRITICAL TPAD_PROG:PROTO1U5701IC,TP PSOC,K9x,PROTO1

IC,EFI,ROM,PVT, K90/K90I/K91/K91F/K92 CRITICAL BOOTROM_PROG:PVT1 U6100341S2896

341S2894 CRITICAL BOOTROM_PROG:EVT1 U6100IC,EFI,ROM,EVT, K90/K90I/K91/K91F/K92

1 CRITICALU5701341S2902 TPAD_PROG:PROTO0IC,TP PSOC,K9x,PROTO0

1341S3099 IC,TP PSOC,K9x,DVT,PVT CRITICAL TPAD_PROG:PVTU5701

IC,SMC,DEVELOPMENT-EVT,K91 U49001 SMC_PROG:EVTCRITICAL341S2861

U10001337S4031 CPU:2_0GHZCRITICALIC,CPU,SNB,SR030,PRQ,D2,2.0,45W,4+2,1.20,6M,BGA

IC,PCH,COUGARPOINT,SLH9D,PRQ,BD82HM65 U1800337S4029 CRITICAL1

337S3936 U8000IC,GPU,AMD,WHISTLER,962FCBGA,40NM,ES1 GPU:WHISTLERCRITICAL

1337S4032 U1000 CPU:2_2GHZCRITICALIC,CPU,SNB,SR00W,PRQ,D2,2.2,45W,4+2,1.30,6M,BGA

K91_COMMON,SODIMM:MOLEX,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_HYNIX,EEEE:DL7RPCBA,MLB,K91,DL7R639-1953

337S3979 CRITICALIC,GPU,AMD,SEYMOUR,M2 LP,ES1,962BGA1 GPU:SEYMOURU8000

K91_COMMON,SODIMM:MOLEX,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL88PCBA,MLB,K91F,DL88639-1976

PCBA,MLB,K91F,DG67639-1471 K91_COMMON,SODIMM:FOXCONN,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DG67

639-1974 PCBA,MLB,K91F,DL87 K91_COMMON,SODIMM:HYBRID,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL87

PCBA,MLB,K91F,DL83639-1972 K91_COMMON,SODIMM:HYBRID,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL83[EEEE_DG63] CRITICAL826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM EEEE:DG631

[EEEE_DG66] EEEE:DG66826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM1 CRITICAL

IC,PROGRMD,LPC1112A,T29 PORT MCU,PVT,HVQFN25341S3128 T29MCU:PROGCRITICALU93301

SMC_PROG:PROTO0U4900IC,SMC,DEVELOPMENT-PROTO0,K911 CRITICAL341S2854

LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL7T]1 EEEE:DL7TCRITICAL826-4393

341S2973 U39901 CRITICAL ENETROM_PROG:B0_SDIC,ENET,1MBITFLASH,CIV REV01,K60/K62

1 [EEEE_DL89] EEEE:DL89826-4393 CRITICALLBL,P/N LABEL,PCB,28MM X 6 MM

LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL88] CRITICAL1826-4393 EEEE:DL88


353S3055 IC,PI3VEDP212,X2 DISPLAYPORT 2:1 MUX,QFN CRITICAL1 U9390

IC,SGRAM,GDDR5,64MX32,3.6GBPS,M-DIE,HF U8400,U8450,U8500,U8550 FB_1G_HYNIXCRITICAL333S0572 4

LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL84]1 CRITICAL826-4393 EEEE:DL84


LBL,P/N LABEL,PCB,28MM X 6 MM826-4393 [EEEE_DHMV]1 CRITICAL EEEE:DHMV

[EEEE_DHMW]LBL,P/N LABEL,PCB,28MM X 6 MM826-4393 EEEE:DHMWCRITICAL1

BOOTROM_PROG:DVT1 CRITICALU6100341S2895 IC,EFI,ROM,DVT, K90/K90I/K91/K91F/K92

[EEEE_DL83] CRITICAL1 EEEE:DL83826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM

826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL86] CRITICAL1 EEEE:DL86


157S0055 ALL157S0058 Delta alt to TDK Magnetics

LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DG67]826-4393 CRITICAL1 EEEE:DG67

LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DG64] CRITICAL1 EEEE:DG64826-4393

[EEEE_DDKG]LBL,P/N LABEL,PCB,28MM X 6 MM826-4393 EEEE:DDKG1 CRITICAL

[EEEE_DG65] CRITICAL826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM1 EEEE:DG65

826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL87] CRITICAL1 EEEE:DL87

IC,SDRAM,GDDR5,32MX32,1.25GHz,A-DIE1.35V U8400,U8450,U8500,U8550 CRITICAL FB_512_HYNIX333S0564 4

333S0543 U8500,U8550 FB_256_SAMSUNGCRITICAL2 IC,SGRAM,GDDR5,32MX32.1.25GHz,E-DIE,HF

IC,SDRAM,GDDR5,32MX32,1.25GHz,A-DIE1.35V333S0564 CRITICAL FB_256_HYNIX2 U8500,U8550

IC,SGRAM,GDDR5,64MX32,3.6GBPS,C-DIE,HF CRITICAL FB_1G_SAMSUNG333S0571 4 U8400,U8450,U8500,U8550

IC,EFI,ROM,PROTO2, K90/K90I/K91/K91F/K92 U6100 CRITICAL1 BOOTROM_PROG:PROTO2341S2991

1 IR,ENCORE II,CY7C63833-LFXC IR_PROGU4800 CRITICAL341S2384

IC,PLD,LATTICE,LFXP2-5E-5,132 BALL CSBGA GMUX_BLANKU96001 CRITICAL336S0042

639-1470 PCBA,MLB,K91F,DG66 K91_COMMON,SODIMM:FOXCONN,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DG66

PCBA,MLB,K91F,DL82639-1971 K91_COMMON,SODIMM:MOLEX,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL82

1343S0534 IC,ASIC,GBIT ETHNET&SD CTRLR,686 QFN8X8,B0 CRITICALU3900 ENET_SD:B0

K91_COMMON,SODIMM:FOXCONN,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_HYNIX,EEEE:DHMV639-1573 PCBA,MLB,K91,DHMV

639-1954 PCBA,MLB,K91F,DL7T K91_COMMON,SODIMM:MOLEX,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL7T

IC,SGRAM,GDDR5,32MX32.1.25GHz,E-DIE,HF FB_512_SAMSUNG333S0543 U8400,U8450,U8500,U8550 CRITICAL4

IC,FW643-E,1394B PHY/OHCI LINK/PCI-E,121 CRITICAL338S0753 U4100

IC,ASIC,GBIT ETHNET&SD CTRLR,686 QFN8X8,A01 CRITICALU3900 ENET_SD:A0343S0494

085-1901 K91/K91F DEVELOPMENT BOM K91_DEVEL:ENG

5 OF 132

5 OF 101




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

NC NO_TESTs

NO_TEST

J6995 (BAT LED CONN)

J5800 (IPD FLEX CONN)

J6950 (BAT CONN)

NC NO_TESTs

NC NO_TESTs

J6950 (MAIN BATT CONN)

J6950 (BIL CABLE CONN)

Functional Test Points

J6900 (DC POWER CONN)

J6781 & J6782 (SPEAKERS CONN)

J5650 (LEFT FAN CONN)

POWER RAILS

NO_TEST=TRUE

FUNC_TEST

per Fan

2 TP needed

J3401 & J3402 (AIRPORT/BT/CAMERA CONN)

3 TPsper Fan

NO_TEST

FUNC_TEST

J9000 (LVDS CONN)

NC NO_TESTs

NO_TEST

CPU NO_TESTsNO_TEST

3 TPs

6 TPs

NO_TESTICT Test Points

FUNC_TEST

PCH ALIASES

5 TPs

FUNC_TEST

5 TPs

J4500 (SATA ODD CONN)

J4501 (SATA HDD CONN)

4 TPs

J5713 (KEY BOARD CONN)

2 TPs

J5815 (KBD BACKLIGHT CONN)

J5660 (RIGHT FAN CONN)

J6780 (MIC CONN)

USB PORTS

I1000

I1001

I1002

I1003

I1004

I1005

I1006

I1007

I1008

I1009

I1010

I1011

I1012

I1013

I1014

I1015

I1016

I1017

I1018

I1019

I1020

I1021

I1022

I1024

I1025

I1026

I1027

I1028

I1029

I1031

I1032

I1033

I1034

I1035

I1038

I1039

I1040

I1042

I1043

I1044

I1050

I1051

I1052

I1053

I1054

I1055

I1056

I1057

I1058

I1059

I1060

I1061

I1062

I1063

I1064

I1065

I1066

I1086

I1088

I1089

I1090

I1092

I1093

I1094

I1095

I1096

I1097

I1098

I1099

I1100

I1101

I1102

I1103

I1104

I1105

I1106

I1107

I1108

I1109

I1110

I1111

I1112

I1113

I1114

I1115

I1116

I1117

I1118

I1119

I1120

I1121

I1122

I1123

I1124

I1125

I1126

I1127

I1128

I1129

I1130

I1131

I1132

I1134

I1135

I1136

I1137

I1140

I1141

I1142

I1143

I1145

I1146

I1149

I1150

I1151

I1152

I1156

I1160

I1161

I1273

I1288

I1292

I1297

I1436

I1437

I1438

I1439

I1440

I1441

I1442

I1443

I1464

I1477

I1478

I1479

I1480

I1481

I1482

I1483

I1484

I1485

I1486

I1487

I1488

I1489

I1490

I1491

I1492

I1493

I1494

I1495

I1496

I1497

I1498

I1508

I1509

I1510

I1513

I1514

I1515

I1516

I1517

I1518

I1519

I1520

I1521

I1522

I1523

I1524

I1525

I1526

I1527

I1528

I1529

I1530

I1531

I1532

I1533

I1534

I1535

I1536

I1537

I1539

I1540

I1541

I1542

I1543

I1544

I1545

I1546

I1547

I1548

I1549

I1550

I1551

I1552

I1553

I1554

I1555

I1556

I1557

I1558 I1559

I1560 I1561

I1562

I1563

I1564

I1565

I1566

I1567

I1568

I1569

I1570

I1571

I1572

I1573

I1574

I1575

I1576

I1577

I1578

I1579

I1580

I1581

I1582

I1583

I1584

I1585

I1586

I1587

I1588

I1589

I1590

I1591

I1592

I1593

I1594

I1595

I1596

I1598

I1599

I1600

I1601

I1602

I1603

I1604

I1605

I1606

I1607

I1610

I1611

I1612

I1613

I1614

I1615

I1616

I1617

I1618

I1619

I1620

I1621

I1622

I1623

I1624

I1625

I1626

I1627

I1628

I1629

I1630

I1631

I1632

I1633

I1634

I1635

I1636

I1637

I1638

I1639

I1640

I1641

I1642

I1643

I1644

I1645

I557

I558

I559

I600

I602

I603

I604

I605

I606

I607

I610

I611

I612

I613

I614

I615

I616

I617

I618

I620

I621

I623

I624

I625

I626

I627

I636

I637

I638

I639

I640

I709

I714

I720

I722

I723

I724

I725

I726

I727

I728

I729

I730

I731

I732

I733

I734

I735

I737

I738

I739

I740

I741

I742

I743

I744

I751

I752

I756

I760

I761

I762

I763

I764

I765

I766

I767

I768

I769

I770

I771

I772

I774

I989

I990

I991

I992

I993

I994

I995

I996

I997

I998

SYNC_MASTER=K18_MLB

Functional / ICT TestSYNC_DATE=04/27/2010

TRUE PP3V3_S0

TRUE PP5V_S0

PP5V_S0TRUE

PP3V3_S0TRUE

TRUE PP5V_S0

PP1V8_S0TRUE

TRUE MEM_A_SA<1..0>

TRUE MEM_A_DQS_N<7..0>MEM_A_DQS_P<7..0>TRUE

FB_A0_DQ<31..0>TRUE

TRUE FB_A0_WCLK_P<1..0>

FB_B1_DBI_L<3..0>TRUE

TRUE FB_B1_WCLK_P<1..0>

FB_A0_A<8..0>TRUE

FB_A0_EDC<3..0>TRUE

FB_A0_DBI_L<3..0>TRUEFB_A1_DQ<31..0>TRUE

FB_A1_ABI_LTRUE

FB_A0_ABI_LTRUE

FB_B1_WCLK_N<1..0>TRUE

TRUE FB_B1_A<8..0>

TRUE FB_B0_DBI_L<3..0>

TRUE FB_B1_ABI_L

TRUE FB_A0_WCLK_N<1..0>

TRUEMAKE_BASE=TRUE

NC_SATA_E_R2D_CN

TRUE MEM_B_A<15..0>

MAKE_BASE=TRUETRUE NC_SMC_P41

PP3V3_S0GPUTRUE

Z2_CLKINTRUE

PP0V75_S0_DDRVTTTRUE

SMC_LID_RTRUE

TRUE SPI_ALT_CS_LTRUE SPI_ALT_MISO

NC_SATA_D_R2D_CN

MAKE_BASE=TRUENC_SATA_D_R2D_CPTRUE

TRUEMAKE_BASE=TRUE

NC_SATA_E_D2RP

TRUE FB_B0_ABI_L

TRUE FB_B0_DQ<31..0>

TRUE MEM_A_CS_L<1..0>MEM_A_CLK_P<1..0>TRUE

TRUE MEM_A_CKE<1..0>

NC_LVDS_EG_BKL_PWM

MEM_A_BA<2..0>TRUE

MEM_A_CLK_N<1..0>TRUE

MEM_A_ODT<1..0>TRUEMAKE_BASE=TRUETRUE NC_PCIE_CLK100M_PE4P

TP_LVDS_IG_BKL_PWM

NC_SMC_BS_ALRT_L

TRUE MEM_B_SA<1..0>

NC_LVDS_IG_CTRL_CLK

NC_CRT_IG_VSYNC

NC_CRT_IG_DDC_CLK

TRUE SMC_NMI

TRUE WS_KBD7

TP_LVDS_IG_B_CLKP

TRUE MEM_B_DQS_N<7..0>TRUE MEM_B_DQ<63..0>

TRUE MEM_B_ODT<1..0>

MAKE_BASE=TRUETRUE NC_PCIE_CLK100M_PE7P

MAKE_BASE=TRUENC_LVDS_IG_BKL_PWMTRUE

MEM_B_CKE<1..0>TRUE

NC_SMC_BS_ALRT_LTRUEMAKE_BASE=TRUE

MAKE_BASE=TRUENC_LVDS_IG_B_CLKNTRUE

MAKE_BASE=TRUETRUE NC_LVDS_EG_BKL_PWM

MEM_B_BA<2..0>TRUE

TRUE MEM_B_RAS_LTRUE MEM_B_CAS_L

TRUE MEM_B_WE_L

NC_PCIE_CLK100M_PE6NNC_PCIE_CLK100M_PE5PNC_PCIE_CLK100M_PE5N

MAKE_BASE=TRUENC_PCIE_CLK100M_PE6NTRUENC_PCIE_CLK100M_PE6PTRUE

MAKE_BASE=TRUE

TRUEMAKE_BASE=TRUE

NC_PSOC_P1_3TRUEMAKE_BASE=TRUE

NC_SATA_B_D2RNTRUEMAKE_BASE=TRUE

NC_SATA_B_D2RP

NC_GPU_MIOA_DEMAKE_BASE=TRUETRUE

NC_GPU_GSTATE<1>MAKE_BASE=TRUETRUE

NC_SDVO_INTP

LPC_FRAME_LTRUE

LPC_AD<0..3>TRUE

TP_ISSP_SCLK_P1_1TRUE

BKLT_ENTRUE

TRUE BI_MIC_P

BI_MIC_NTRUE

TRUE FAN_RT_PWMTRUE FAN_RT_TACH

FAN_LT_TACHTRUE

SMBUS_SMC_BSA_SCLTRUE

SMBUS_SMC_A_S3_SCLTRUE

TRUE PSOC_SCLK

PP18V5_S4TRUE

USB_LT2_NTRUE

TRUE PP3V3_S3

TRUE USB2_LT1_P

TRUE PP3V42_G3HTRUE WS_KBD1TRUE WS_KBD2TRUE WS_KBD3TRUE WS_KBD4

TRUE WS_KBD6

WS_KBD11TRUE

TRUE WS_KBD8

TRUE WS_KBD15_CAP

TRUE SATA_HDD_D2R_C_N

TRUE SPKRCONN_S_OUT_N

SMBUS_SMC_A_S3_SDATRUE

TRUE SATA_ODD_D2R_UF_PSATA_ODD_D2R_UF_NTRUE

TRUE PP5V_S0_HDD_FLT

SATA_ODD_R2D_NTRUE

SATA_ODD_D2R_C_NTRUE

TRUE SATA_ODD_R2D_P

SATA_ODD_D2R_C_PTRUE

TRUE SMC_ODD_DETECTPP5V_SW_ODDTRUE

SATA_HDD_R2D_NTRUE

TRUE SATA_HDD_D2R_C_P

TRUE SPKRCONN_R_OUT_N

TRUE USB_LT2_P

NC_LPC_DREQ0_LMAKE_BASE=TRUE

TP_GPU_GSTATE<0>

TP_GPU_MIOA_D<9..0>

TP_CPU_RSVD<2..1>

TRUEMAKE_BASE=TRUE

NC_SATA_E_R2D_CP

NC_LPC_DREQ0_L

NC_HDA_SDIN2TRUEMAKE_BASE=TRUE

TP_CPU_RSVD<65..62>

TP_CPU_RSVD<27..26>

TRUE SMC_TCKSMC_RX_LTRUE

SMC_TDOTRUESMC_TMSTRUESMC_TRST_LTRUE

NC_PCH_LVDS_VBGTRUEMAKE_BASE=TRUE

NC_CRT_IG_HSYNCTRUEMAKE_BASE=TRUE

NC_CRT_IG_HSYNC

NC_CRT_IG_RED

TP_ISSP_SDATA_P1_0TRUE

SMC_ONOFF_LTRUE

SMC_MD1TRUE

SPKRCONN_L_OUT_PTRUE

TRUE SPKRCONN_R_OUT_P

TRUE SPKRCONN_S_OUT_P

SPKRCONN_L_OUT_NTRUE

TRUE PP5V_S5

LVDS_CONN_A_DATA_N<2>TRUELVDS_CONN_A_CLK_F_PTRUELVDS_CONN_A_CLK_F_NTRUE

LVDS_CONN_B_DATA_P<1>TRUELVDS_CONN_B_DATA_N<1>TRUE

PP3V42_G3HTRUE

TRUE LVDS_CONN_A_DATA_N<0>

TRUE NC_SMC_FAN_3_TACHNC_SMC_FAN_3_CTLTRUE

NC_FW643_AVREG

MAKE_BASE=TRUETRUE NC_TP_CPU_RSVD<65..62>

NC_TP_CPU_RSVD<43..32>MAKE_BASE=TRUETRUE

TRUEMAKE_BASE=TRUE

NC_CRT_IG_GREEN

TRUEMAKE_BASE=TRUE

NC_CRT_IG_DDC_CLK

MAKE_BASE=TRUENC_SDVO_INTPTRUE

NC_SDVO_STALLNTRUEMAKE_BASE=TRUE

TP_DP_IG_D_MLP<3..0>NC_DP_IG_D_CTRL_DATA

MAKE_BASE=TRUENC_DP_IG_D_CTRL_DATATRUE

NC_DP_IG_C_MLP<3..0>MAKE_BASE=TRUETRUE

NC_DP_IG_C_CTRL_DATATRUEMAKE_BASE=TRUE

NC_FW643_AVREGMAKE_BASE=TRUETRUE

NC_ESTARLDO_ENTRUE

TRUE NC_FW2_TPANNC_FW2_TPAPTRUE

NC_FW2_TPBIASTRUE

NC_FW2_TPBPTRUE

TRUE NC_FW2_TPBN

TRUE NC_SMC_FAN_2_CTLTRUE NC_SMC_FAN_2_TACH

TRUE SMC_KDBLED_PRESENT_LKBDLED_ANODETRUE

TRUE PPVOUT_S0_LCDBKLT

TRUE NC_SMC_BS_ALRT_L

LPCPLUS_RESET_LTRUE

LPC_CLK33M_LPCPLUSTRUE

TRUE LPC_SERIRQ

PM_CLKRUN_LTRUE

PP3V3_SW_LCDTRUE

LVDS_CONN_B_DATA_N<2>TRUE

TP_CPU_RSVD<58..45>

TP_CPU_RSVD<43..32>

TP_CPU_RSVD<24..15>

LCD_BKLT_PWMTRUE

TRUE LED_RETURN_6

TRUE LED_RETURN_4

TRUE LVDS_CONN_B_CLK_F_NTRUE LVDS_CONN_B_CLK_F_P

LVDS_CONN_B_DATA_P<2>TRUE

LVDS_CONN_A_DATA_P<2>TRUE

LVDS_CONN_A_DATA_N<1>TRUE

LVDS_DDC_DATATRUE

LED_RETURN_5TRUE

LPCPLUS_GPIOTRUE

PP18V5_DCIN_FUSETRUE

TRUEMAKE_BASE=TRUE

NC_TP_CPU_RSVD<58..45>

LVDS_DDC_CLKTRUE

LED_RETURN_3TRUE

TRUE WS_KBD5

NC_CRT_IG_GREEN

NC_CRT_IG_DDC_DATA

TP_CPU_RSVD_NCTF<8..5>


TRUE SATA_HDD_R2D_P

PP3V3_S5_AVREF_SMCTRUE

USB2_LT1_NTRUE

TRUE WS_KBD13

SMC_RESET_LTRUE

TRUE WS_KBD16_NUM

TRUE LPC_PWRDWN_L

TRUE SMC_TDI


WS_KBD10TRUE

NC_CLINK_CLKTRUEMAKE_BASE=TRUE

MAKE_BASE=TRUETRUE NC_CLINK_DATA

NC_CLINK_RESET_LMAKE_BASE=TRUETRUE

NC_PCIE_CLK100M_PEBP

TP_DP_IG_C_MLP<3..0>


TRUEMAKE_BASE=TRUE

NC_TP_CPU_RSVD<27..26>

TRUEMAKE_BASE=TRUE

NC_CRT_IG_BLUE

MAKE_BASE=TRUETRUE NC_CRT_IG_RED

NC_SATA_F_D2RN

TRUE NC_CRT_IG_VSYNCMAKE_BASE=TRUE

NC_DP_IG_C_AUXPTRUEMAKE_BASE=TRUE

NC_DP_IG_C_CTRL_DATANC_DP_IG_C_CTRL_CLKNC_DP_IG_C_HPD

NC_FW643_TDI

TRUEMAKE_BASE=TRUE

NC_TP_CPU_RSVD_NCTF<8..5>

NC_SDVO_TVCLKINNNC_SDVO_TVCLKINP

NC_SDVO_STALLNNC_SDVO_STALLP

NC_CLINK_DATANC_CLINK_RESET_L

MAKE_BASE=TRUETRUE NC_PCIE_CLK100M_PEBN

NC_GPU_MIOA_DE

NC_SDVO_TVCLKINNTRUEMAKE_BASE=TRUE

NC_DP_IG_C_AUXNTRUEMAKE_BASE=TRUE

NC_DP_IG_C_MLN<3..0>TRUEMAKE_BASE=TRUE

NC_ALS_GAINTRUE

NC_FW0_TPAPTRUE

NC_FW0_TPBPTRUE

TRUE NC_FW0_TPBN

MAKE_BASE=TRUENC_FW643_TDITRUE

NC_DP_IG_C_HPDTRUEMAKE_BASE=TRUENC_DP_IG_C_CTRL_CLKMAKE_BASE=TRUETRUE

NC_DP_IG_D_CTRL_CLKTRUEMAKE_BASE=TRUE

NC_DP_IG_D_AUXN

NC_SATA_E_R2D_CN

TRUE WS_KBD9

WS_LEFT_OPTION_KBDTRUE

NC_PCH_LVDS_VBG

TRUE FAN_LT_PWM

PP5V_S3_ALSCAMERA_FTRUE

PP3V3_WLANTRUE

TRUE WS_KBD12

TRUE WS_KBD14

TRUE WS_KBD17

TRUE WS_KBD19

WS_KBD23TRUE

TRUE PP5V_S3_RTUSB_B_F

PCIE_AP_D2R_NTRUE

TRUE PP3V3_FW_FWPHY

SMBUS_SMC_A_S3_SCLTRUE

PSOC_MOSITRUE

WS_CONTROL_KBDTRUE


LVDS_CONN_B_DATA_P<0>TRUELVDS_CONN_B_DATA_N<0>TRUE

Z2_DEBUG3TRUELED_RETURN_1TRUELED_RETURN_2TRUE

PCIE_AP_R2D_NTRUE

TRUE PCIE_AP_R2D_P

WIFI_EVENT_LTRUE

AP_CLKREQ_Q_LTRUE

TRUE PCIE_CLK100M_AP_CONN_PPCIE_CLK100M_AP_CONN_NTRUE

PCIE_WAKE_LTRUE

SYS_DETECT_LTRUE

AP_RESET_CONN_LTRUE

SMBUS_SMC_A_S3_SDATRUE

PP5V_S3_IR_RTRUE

TRUE PP5V_S3_RTUSB_A_F

NC_DP_IG_D_AUXNMAKE_BASE=TRUETRUE

NC_DP_IG_D_AUXPTRUEMAKE_BASE=TRUE

NC_DP_IG_D_CTRL_CLK

MAKE_BASE=TRUETRUE NC_CRT_IG_DDC_DATA

NC_CRT_IG_BLUE

PM_SYSRST_LTRUE

MAKE_BASE=TRUENC_GPU_GSTATE<0>TRUE

NC_SDVO_INTN

NC_DP_IG_D_HPD

NC_DP_IG_C_AUXNNC_DP_IG_C_AUXPTP_DP_IG_C_MLN<3..0>

NC_DP_IG_D_HPDTRUEMAKE_BASE=TRUE

NC_DP_IG_D_MLN<3..0>MAKE_BASE=TRUETRUE

MAKE_BASE=TRUENC_SDVO_TVCLKINPTRUE

NC_SDVO_STALLPMAKE_BASE=TRUETRUE

NC_GPU_MIOA_D<9..0>MAKE_BASE=TRUETRUE

NC_GPU_BUFRST_LMAKE_BASE=TRUETRUE

TRUEMAKE_BASE=TRUE

NC_SDVO_INTN

TRUE NC_DP_IG_D_MLP<3..0>MAKE_BASE=TRUETP_DP_IG_D_MLN<3..0>

NC_DP_IG_D_AUXP

TRUE NC_HDA_SDIN3MAKE_BASE=TRUE

NC_LVDS_IG_B_CLKPMAKE_BASE=TRUETRUE

TP_LVDS_IG_B_CLKN

NC_GPU_BUFRST_L

TRUE NC_SATA_F_D2RNMAKE_BASE=TRUENC_SATA_F_D2RP

TRUE SYS_LED_ANODE_RTRUE SPI_ALT_MOSI

TRUE WS_KBD20TRUE WS_KBD21TRUE WS_KBD22

WS_LEFT_SHIFT_KBDTRUE

CONN_USB2_BT_NTRUE

USB_CAMERA_CONN_NTRUE

USB_CAMERA_CONN_PTRUE

PP1V0_FW_FWPHYTRUE

PP18V5_S3TRUE

SYS_LED_ANODETRUE

IR_RX_OUTTRUE

NC_HDA_SDIN1

PP1V05_S0TRUE

T29_D2R_P<1..0>TRUE

PM_SLP_S3_LTRUE

T29_D2R_N<1..0>TRUE

PP1V05_S0GPUTRUE

T29_D2R_C_N<1..0>TRUE

TRUE T29DPA_ML_P<3..0>

TRUE SPI_ALT_CLKWS_KBD_ONOFF_LTRUE

NC_PCIE_CLK100M_PE4PNC_PCIE_CLK100M_PE4N

PP1V05_S5TRUE

TRUE DP_T29SNK0_AUXCH_NDP_T29SNK0_ML_C_P<3..0>TRUE

DP_T29SNK0_ML_N<3..0>TRUE

TRUE BI_MIC_SHIELD

TRUE CONN_USB2_BT_P

SMBUS_SMC_0_S0_SCLTRUE

TRUE SMBUS_SMC_0_S0_SDA

Z2_BOOST_ENTRUE

PP1V8R1V55_S0GPU_ISNSTRUE

TRUE DP_T29SNK0_AUXCH_C_PTRUE T29DPA_ML_N<3..0>

DP_T29SNK1_ML_P<3..0>TRUE

NC_PCIE_CLK100M_PE7N NC_PCIE_CLK100M_PE7NTRUEMAKE_BASE=TRUE

TRUEMAKE_BASE=TRUE

NC_SATA_B_R2D_CN

MAKE_BASE=TRUETRUE NC_SATA_B_R2D_CP

TRUE FB_A1_A<8..0>

FB_A1_EDC<3..0>TRUEFB_A1_WCLK_N<1..0>TRUE

TRUE FB_B1_EDC<3..0>

TRUE FB_B1_DQ<31..0>

TRUE FB_B0_WCLK_P<1..0>TRUE FB_B0_WCLK_N<1..0>TRUE FB_B0_EDC<3..0>

TRUE FB_B0_A<8..0>

TRUE MEM_B_DQS_P<7..0>

TRUE MEM_B_CS_L<1..0>TRUE MEM_B_CLK_P<1..0>

MEM_B_CLK_N<1..0>TRUE

TRUE MEM_A_DQ<63..0>

TRUE MEM_A_A<15..0>TRUE MEM_A_CAS_LTRUE MEM_A_RAS_LTRUE MEM_A_WE_L

TRUE FB_A1_WCLK_P<1..0>FB_A1_DBI_L<3..0>TRUE

MAKE_BASE=TRUETRUE NC_SATA_F_D2RP

MAKE_BASE=TRUENC_SATA_F_R2D_CNTRUE

MAKE_BASE=TRUETRUE NC_SATA_F_R2D_CP

TRUE WS_KBD18

TRUE T29_R2D_C_P<1..0>

T29_R2D_P<1..0>TRUE

TRUE DP_T29SNK0_AUXCH_C_N

DP_T29SNK0_ML_C_N<3..0>TRUEDP_T29SNK0_ML_P<3..0>TRUE

PPVCORE_GPUTRUE

TRUE PPDCIN_G3H

TRUE DP_T29SNK1_ML_C_P<3..0>

PSOC_MISOTRUE

MAKE_BASE=TRUETRUE NC_SATA_D_D2RN

MAKE_BASE=TRUETRUE NC_SATA_D_D2RP

NC_PSOC_P1_3NC_SATA_B_D2RNNC_SATA_B_D2RPNC_SATA_B_R2D_CNNC_SATA_B_R2D_CP

DP_T29SNK1_AUXCH_PTRUE

DP_T29SNK1_AUXCH_C_NTRUE

TRUE DP_T29SNK1_AUXCH_C_P

DP_T29SNK1_AUXCH_NTRUE

DP_T29SNK1_ML_C_N<3..0>TRUE

PP3V3_S3TRUEPP3V3_S5TRUE

PP1V8R1V55_S0GPU_ISNS_RTRUE

DP_SDRVA_ML_C_P<2>TRUE

TRUE DP_SDRVA_ML_N<2>TRUE DP_SDRVA_ML_P<2>TRUE DP_SDRVA_ML_N<0>

TP_DP_T29SRC_AUXCH_CNTRUETP_DP_T29SRC_AUXCH_CPTRUE

TP_DP_T29SRC_ML_CN<3..0>TRUE

TP_DP_T29SRC_ML_CP<3..0>TRUE

DP_SDRVA_ML_C_N<0>TRUE

DP_SDRVA_ML_C_P<0>TRUE

PP3V42_G3HTRUE

TRUE PPBUS_G3H

TRUE DP_SDRVA_ML_P<0>

DP_SDRVA_ML_C_N<2>TRUE

PPVCORE_S0_GFXTRUE

TRUE TP_T29_PCIE_RESET0_L

TP_T29_PCIE_RESET1_LTRUE

SMC_TX_LTRUE

TRUE SPIROM_USE_MLB

T29_D2R_C_P<1..0>TRUE

T29_R2D_N<1..0>TRUE

PP1V8_GPUIFPXTRUE

TRUE PP3V3_ENET

Z2_KEY_ACT_LTRUE

TRUE PP5V_S3PICKB_LTRUE

PSOC_F_CS_LTRUE

Z2_RESETTRUE

Z2_MOSITRUE

PPVTTDDR_S3TRUE

TRUE TP_FW643_VAUX_ENABLE

PCIE_AP_D2R_PTRUE

T29_R2D_C_N<1..0>TRUE

NC_SATA_D_D2RN

NC_SATA_D_R2D_CP

NC_SATA_E_D2RP

PPVP_FWTRUE

TRUE PPVCORE_S0_CPU

Z2_SCLKTRUE

Z2_MISOTRUE

Z2_CS_LTRUE

Z2_HOST_INTNTRUE

PPVBAT_G3H_CONNTRUETP_FW643_VBUFTRUE

TP_SMC_P24TRUE

NC_CLINK_CLK

FDI_LSYNC<1..0>TRUE

TP_USB_HUB1_PRTPWR1TRUE

FDI_INTTRUE

TRUE FDI_FSYNC<1..0>

FDI_DATA_P<1>TRUE

TRUE TP_USB_HUB1_OCS1

TRUE TP_USB_HUB2_PRTPWR1

TRUE TP_FW643_TDO

TRUE TP_FW643_TMS

TRUEMAKE_BASE=TRUE

NC_SATA_E_D2RN

TRUEMAKE_BASE=TRUE

NC_SATA_D_R2D_CN

MAKE_BASE=TRUETRUE NC_PCI_PME_LNC_PCI_PME_L

MAKE_BASE=TRUENC_PCI_CLK33M_OUT3TRUENC_PCI_CLK33M_OUT3

NC_PCIE_CLK100M_PE5PMAKE_BASE=TRUETRUE

NC_PCIE_CLK100M_PE7P

DP_T29SNK1_ML_N<3..0>TRUE

PP1V5_S3RS0TRUE

PP1V5_S3TRUE

PP1V2_S0TRUE

PP1V2_ENETTRUE

ADAPTER_SENSETRUE

TRUE SMBUS_SMC_BSA_SDA

SMC_BIL_BUTTON_LTRUE

SMBUS_SMC_BSA_SCLTRUE

SMBUS_SMC_BSA_SDATRUE


NC_GPU_GSTATE<1>

TRUEMAKE_BASE=TRUE

NC_PCIE_CLK100M_PE4N

MAKE_BASE=TRUENC_PCIE_CLK100M_PE5NTRUE

TRUE T29DPA_D2R1_AUXCH_P

TP_USB_HUB2_OCS1TRUE

TRUE TP_SMC_PF5

TRUE TP_DC_TEST_A62

TRUE TP_DC_TEST_D65

TP_FW643_TCKTRUE

TRUE DC_TEST_BH3_BJ2

DC_TEST_BH1_BG2TRUE

NC_SATA_F_R2D_CP

TRUE TP_SMC_P10

TRUE TP_P7_7

TRUE TP_PSOC_SCL

TP_PSOC_SDATRUE

TRUE TP_FW643_SETRUE TP_FW643_SDA

TRUE TP_FW643_JASI_ENTRUE TP_FW643_FW620_LTRUE TP_FW643_CETRUE TP_FW643_SM

TRUE TP_FW643_OCR10_CTLTRUE TP_FW643_NAND_TREE

TRUE TP_FW643_SCIFMCTRUE TP_FW643_SCIFDOUTTRUE TP_FW643_SCIFDAINTRUE TP_FW643_SCIFCLK

TRUE DMI_S2N_N<1>

TRUE FDI_DATA_N<1>TRUE DMI_S2N_P<1>

NC_HDA_SDIN1TRUEMAKE_BASE=TRUE

MAKE_BASE=TRUETRUE NC_LVDS_IG_CTRL_CLK

NC_HDA_SDIN2

NC_LVDS_IG_CTRL_DATA NC_LVDS_IG_CTRL_DATATRUEMAKE_BASE=TRUE

NC_HDA_SDIN3

TP_AUD_GPIO_2TRUE

TRUE TP_AUD_GPIO_1

TP_AUD_LO1_L_NTRUE

TRUE TP_AUD_LO1_L_P

TRUE TP_SPI_DESCRIPTOR_OVERRIDE_L

TP_BKL_FAULTTRUE

TRUE CPUIMVP_BOOT1

TP_XDPPCH_HOOK2TRUE

TRUE TP_XDPPCH_HOOK3

TRUE TP_GMUX_PL6B

PM_RSMRST_LTRUE

TRUE CPUIMVP_BOOT2

DP_T29SNK0_AUXCH_PTRUE

TRUE CPUIMVP_UGATE2

TRUE TP_1V05_S0_PCH_VCCAPLLEXP

TRUE T29_D2R1_BIAS

TRUE T29DPA_D2R1_AUXCH_NTRUE TP_T29_PCIE_RESET3_LTRUE TP_T29_PCIE_RESET2_L

TRUE NC_PCIE_CLK100M_PEBPMAKE_BASE=TRUE

NC_PCIE_CLK100M_PEBN

TP_SMC_P41

NC_SATA_E_R2D_CP

NC_SATA_E_D2RN

NC_SATA_D_D2RP

NC_SATA_F_R2D_CN

TRUE GND

TRUE GND

TRUE GND

GNDTRUE

TRUE GND

TRUE GND

GNDTRUE

GNDTRUE

TRUE GND

TRUE GND

TRUE GND

TRUE GND

GNDTRUE

7 OF 132

6 OF 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83

84 87 88 89 98

6 7 8 22 41 46 51 53 64

67 68 69 71

72 86 88

101

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88

101

6 7 12 16 17 18 19

20 22 23

25 26 28

32 35 36

39 40 41

45 47 48

49 50 51

53 56 60

61 71 72

79 82 83

84 87 88

89 98

6 7 8 22 41 46 51

53 64 67

68 69 71

72 86 88

101

7 14 17 20 22 25 70

71 87

26

11 26

27

91 11 26

27

91

75 76 97

75 76

97

75 77 97

75 77

97

75 76 97

75 76 97

75 76 97

75 76 97

75 76 97

75 76 97

75 77 97

75 77 97

75 77 97

75 77 97

6 16

11 28 91

52 53

7 26 28 29

66

62

46

46

6 16

6 16

6 16

75 77 97

75 77 97

11 26 91

11 26

91

11 26 91

6

11 26 91

11 26 91

6

8 18

6

28

6 18

6 17

6 17

44 46

52

8 18

11 27 28 91

11 27 28 91

11 28 91

6 19

11 28 91

6

6

11 28 91

11 28 91

11 28 91

11 28 91

6 19

6 16

6 16

6 52

6

6

6

6

6 17

16 44 46 87 93

16 44 46 87 93

8 52

60 61

60 61

51

51

51

6 44 47 62 63 96

6 31 44 47 53 54 96

52 53

53

42 98

6 7 8 18 19 24 25 29 30

31 32 47 48

49 53 54 71

72 87

42 98

6 7 25 42 44 45 46 47 52 62 63 72 52

52

52

52

52

52

52

52

41 92

59 60 98

6 31 44 47 53 54 96

41 92

41 92

41

41 92

41

41 92

41

41 44

41

41 92

41 92

59 60 98

42 98

6 16

6 16

6 16

6 16

44 45 46

42 44 45 46

44 45 46

44 45 46

44 46

6 18

6 17 6 17

6 17

8 52

44 45 52

44 46

59 60 98

59 60 98

59 60 98

59 60 98

7 53 65 71

82 83 97

82 97

82 97

82 83 97

82 83 97

6 7 25 42 44 45 46 47 52 62 63 72

82 83 97

44 45

44 45

6 38

6 17

6 17

6 17

6 17

6 17 6 17

17

6 17

6 38

38 40

38 40

38 40

38 40

38 40

44 45

44 45

53

53

8 82 88 100

6

25 46 87 93

25 46 93

16 44 46

17 44 46

82

82 83 97

87 88

82 88

82 88

82 97

82 97

82 83 97

82 83 97

82 83 97

82 83

82 88

19 46

62

82 83

82 88

52

6 17

6 17

82 83 97

41 92

44 45

42 98

52

44 45 46 63

52

17 44 46

44 45 46

52

6 16

6 16

6 16

6 16

6 17

6 17

6 16

6 17

6 17

6 17

6 17

6 17

6 38

6 17

6 17

6 17

6 17

6 16

6 16

6 16

6

6 17

6 17

17

38 40 94

38 40 94

38 40 94

6 38

6 17

6 17

6 17

6 17

6 16

52

52

6 18

51

31

31 45

52

52

52

52

52

42

16 31 93

6 31 44 47 53 54 96

52 53

52

82 83 97

82 83 97

82 83 97

52 53

82 88

82 88

31 93

31 93

31 44 45

31

31 98

31 98

17 25 31 84

62

31

6 31 44 47 53 54 96

41

42

6 17

6 17

6 17

6 17

6 17

17 25 44

6 17

6 17

6 17

6 17

6 17

17

6 17

6 17

6

6 17

17

6 17

6 16

8 18

6

6 16

6 16

41

46

52

52

52

52

98

31 92

31 92

7 38 39

41 45

41 43

6 16

7 9 10 12 13 14 16

17 20 22

23 35 39

44 67 69

72 101

33 84 95

17 29 44 72

33 84 95

84 85 95

84 85 95

46 52

6

6

33 95

33 78 95

33 95

60 61

98

31 44 47 50 79 96

31 44 47 50 79 96

53

33 78 95

84 85 95

33 95

6 19

6

6

75 76 97

75 76 97

75 76

97 75 77 97

75 77 97

75 77

97

75 77 97 75 77

97

75 77 97

11 27 28 91

11 28 91

11 28 91

11 28 91

11 26 27 91

11 26 91

11 26 91

11 26 91

11 26 91

75 76 97

75 76 97

6 16

6 16

6 16

52

33 84 95

84 95

33 78 95

33 78 95

33 95

7 48 74 81

7 48 62 63

33 78 95

52 53

6 16

6 16

6 52

6

6

6

6

33 95

33 78 95

33 78 95

33 95

33 78 95

84 95

84 95

84 95

84 95

33

33

33

33

84 95

84 95

6 7

25 42 44 45

46 47

52 62 63 72

7 8 35 39 48 49 62

63 88

84 95

84 95

33

33

42 44 45 46

19 46 55

84 85 95

84 95

7 71 100

52 53

52 53

52 53

52 53

52 53

7 30 66

38

16 31 93

33 84 95

6 16

6 16

6 16

7 39 40

7 12 14 48 68 101

52 53

52 53

52 53

52 53

62 63

38

44 45

6 16

9 17

90

24

9 17 90

9 17 90

24

24

38

38

6 16

6 16

6 18 6 18

6 18

6 18

6 19

33 95

98

7 26 28 29 66 71

7 70 87

7 36 70

62

6 44 47 62 63 96

44 45 62

6 44 47 62 63 96

6 44 47 62 63 96

6 19

6

6

85 95

24

44 45

12

12

38

12

12

6 16

44 45

52

52

52

38

38

38

38

38

38

38

38

38

38

38

38

9 17

90

9 17

90

6 16

6 18

6 16

6 18 6 18

6 16

56

56

56

56

44

88

67 68

23

23

87

17 72

67 68

33 95

67 68

20

85 95

33

33

6 16

6 16

44 45

6 16

6 16

6 16

6 16




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

3.3V Rails

Chipset "VCore" Rails

5V Rails

FireWire Rails

"GPU" Rails

Backlight Rails

ENET Rails

1.8V/1.5V/1.2V/1.05V Rails

2A max supply

T29 Rails

For PCH RTC Power

G3H Rails

Power AliasesSYNC_DATE=04/27/2010SYNC_MASTER=K18_MLB

PP3V3_S0MIN_NECK_WIDTH=0.075 mm

VOLTAGE=3.3VMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.5 MM

PP3V3_S0PP3V3_S0

PP3V3_S0PP3V3_S0PP3V3_S0PP3V3_S0

PP3V3_S0

MIN_NECK_WIDTH=0.2 MMMAKE_BASE=TRUE

VOLTAGE=3.3VMIN_LINE_WIDTH=0.4 MMPP3V3_T29

PP1V05_T29

VOLTAGE=15VMAKE_BASE=TRUE

PP15V_T29MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MM

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMPP1V05_T29


PP3V3_T29PP3V3_T29PP3V3_T29

PP3V3_T29

PP15V_T29

PP5V_S0PP5V_S0

PP15V_T29

PP3V3_S0

PP3V3_S0PP3V3_S0

PP3V3_S0

PP3V3_S0

PP1V05_T29

PP3V3_T29

MAKE_BASE=TRUE

PP5V_S0VOLTAGE=5VMIN_LINE_WIDTH=0.4 MM

MIN_NECK_WIDTH=0.2 MM

PP3V3_S0

MAKE_BASE=TRUEVOLTAGE=3.3VMIN_LINE_WIDTH=0.50MM

PP3V3_S3MIN_NECK_WIDTH=0.20MM

PP3V3_S3

PP3V3_S3

PP3V3_S0

PP3V3_S0

PP3V3_S0PP3V3_S0PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0PP3V3_S0

PP3V3_S0PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0PP3V3_S0

PP3V3_S0

PP3V3_S4

PP3V3_S5



PPVTTDDR_S3MIN_NECK_WIDTH=0.2 MM

PP3V3_S5

PP5V_S0PP5V_S0

PP5V_S0

MAKE_BASE=TRUEVOLTAGE=3.3V

PP3V3_S4MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6 MM

PP3V3_S4

PP3V3_SUSPP3V3_SUS

PP3V3_SUSPP3V3_SUS

PP5V_S3

PP3V3_S0PP3V3_S0

PP1V05_SUSMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MM


PPVIN_S5_HS_OTHER_ISNS

PPVIN_S5_HS_COMPUTING_ISNS

PPBUS_G3H

PPBUS_G3H

PP3V3_S0

PP3V3_S0


PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0PP3V3_S0

PP3V3_S0PP3V3_S0


PPVIN_S5_HS_GPU_ISNS

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm VOLTAGE=12.8V

MAKE_BASE=TRUE


PPDCIN_G3H

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MM VOLTAGE=1.0V

MAKE_BASE=TRUE

PP1V0_FW_FWPHY

PP3V3_FW_FWPHY

PP1V0_FW_FWPHY

PP3V3_ENET


MIN_LINE_WIDTH=0.6 MMPPDCIN_G3H

MIN_NECK_WIDTH=0.25 MMMAKE_BASE=TRUEVOLTAGE=18.5V

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5PP3V3_S5

PP3V3_S5


PP3V3_S5PP3V3_S5

PP3V3_S5

PP3V3_S5

PP5V_S3

PP5V_S3

PP5V_S0

PP3V3_SUSPP3V3_SUSPP3V3_SUS

PP3V3_SUS

PP3V3_S4

PP1V05_S0

PP1V05_SUS

PPBUS_G3H

PPBUS_G3HPPBUS_G3H

PPBUS_G3HPPBUS_G3HPPBUS_G3H

PPVIN_S5_HS_COMPUTING_ISNSMIN_LINE_WIDTH=0.6 mm

MAKE_BASE=TRUEVOLTAGE=12.8VMIN_NECK_WIDTH=0.25 mm


PPDCIN_G3H

PPVIN_S5_HS_COMPUTING_ISNSPPVIN_S5_HS_COMPUTING_ISNS

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm








PPVRTC_G3H

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.3 MM


PP5V_S5MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.5 MM

PP5V_S0

PP1V05_S0PP1V05_S0

PP1V05_S0

PP1V2_S0MIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.2VMAKE_BASE=TRUE

PP5V_S0

PP5V_S0

PP1V05_S0PP5V_S0

PP5V_S0PP5V_S0

PP5V_S0

PP5V_S0

PP1V8_S0PP1V8_S0

PP1V8_S0PP1V8_S0

PP1V8_S0

PP1V8_S0

PP1V8_S0

PPVCCSA_S0_REG

PPVCCSA_S0_REG



PP1V8_S0MIN_NECK_WIDTH=0.2 MM

MAKE_BASE=TRUE

PPVCCSA_S0_REGMIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.2 MM

VOLTAGE=0.9V

MIN_NECK_WIDTH=0.2 MMVOLTAGE=3.3V

MIN_LINE_WIDTH=0.6 MMPP3V3_ENET

MAKE_BASE=TRUE

PP1V2_ENET

PP1V8_S0_CPU_VCCPLL_R

MAKE_BASE=TRUE


VOLTAGE=1.5V

PP1V5_S3RS0_CPUDDR

PP1V5_S0PP1V5_S0

VOLTAGE=1.5VMIN_NECK_WIDTH=0.2 MM

PP1V5_S0MIN_LINE_WIDTH=0.6 MM

MAKE_BASE=TRUE

PP1V5_S0

PP1V5_S3RS0_CPUDDRPP1V5_S3RS0_CPUDDR

PP1V5_S3PP1V5_S3

PP1V5_S3

PP1V8_S0_CPU_VCCPLL_RMAKE_BASE=TRUEVOLTAGE=1.8VMIN_LINE_WIDTH=0.5 MM


PP5V_S5

PP3V42_G3H

PP3V42_G3H

PP1V5_S3_CPU_VCCDQ

PP1V05_S0_CPU_VCCPQE

PP3V3_ENET


MIN_NECK_WIDTH=0.25 mm

PPBUS_SW_BKLMIN_LINE_WIDTH=0.6 mm

PPBUS_SW_BKL

PP1V0_S0GPU_ISNS

PP1V0_S0GPU

MAKE_BASE=TRUEVOLTAGE=1.0VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6 MM

PP1V5_S0GPU_ISNS

MAKE_BASE=TRUEVOLTAGE=1.5VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6 MM

PP1V5_GPU_REG

VOLTAGE=1.5VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6 MM

MAKE_BASE=TRUE

PP1V8_S0GPU_ISNS

VOLTAGE=1.8V


MAKE_BASE=TRUE


PP1V8_GPUIFPX


MIN_NECK_WIDTH=0.15 MMMIN_LINE_WIDTH=0.6 MMPP1V8_GPUIFPX

PP1V5_GPU_REG

PP1V5_S0GPU_ISNS

PP3V3_S0GPUPP3V3_S0GPU

PP1V8_S0GPU_ISNS

PP1V8_S0GPU_ISNSPP1V8_S0GPU_ISNSPP1V8_S0GPU_ISNSPP1V8_S0GPU_ISNSPP1V8_S0GPU_ISNS

PP1V8_S0GPU_ISNS

PP1V8_S0GPU_ISNSPP1V8_S0GPU_ISNS


PP1V0_S0GPU

PP1V8_S0GPU_ISNS

PP1V0_S0GPU

PP1V0_S0GPU_ISNSPP1V0_S0GPU_ISNSPP1V0_S0GPU_ISNSPP1V0_S0GPU_ISNSPP1V0_S0GPU_ISNSPP1V0_S0GPU_ISNSPP1V0_S0GPU_ISNS

PP1V0_S0GPU_ISNSMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6 MM VOLTAGE=1.0V

MAKE_BASE=TRUE

PPVCORE_GPU

PPVCORE_GPUMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6 MM VOLTAGE=1.0V

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25 MM VOLTAGE=1.25VMAKE_BASE=TRUEMIN_LINE_WIDTH=0.6 MM

PPVCORE_S0_CPU

MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05VMAKE_BASE=TRUEMIN_LINE_WIDTH=0.6 MM

PPVCORE_S0_AXG

PPVCORE_S0_CPU

PPVCORE_S0_AXG

PPVCORE_S0_AXG

PP1V5_S3_CPU_VCCDQMIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.2 MM VOLTAGE=1.5V

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.2 MM

PP1V05_S0_CPU_VCCPQEMAKE_BASE=TRUEVOLTAGE=1.05V

PP3V3_FW_FWPHY


MAKE_BASE=TRUE

PP1V2_ENET

PP3V3_ENETPP3V3_ENET

PP1V2_ENET

PP1V2_S0

PP1V5_S0GPU_ISNS

PP3V42_G3H

PPVRTC_G3H

PP3V42_G3H

PP3V42_G3H

PP3V42_G3H

PP3V42_G3H

PPDCIN_G3H

PPVRTC_G3H

PP5V_S5

PP5V_S5PP5V_S5

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0PP1V05_S0

PP1V05_S0

PP1V05_S0


PP1V8_S0GPU_ISNS

PP1V8_GPUIFPX

PP3V3_S0GPU PP3V3_S0GPU

MAKE_BASE=TRUEVOLTAGE=3.3VMIN_NECK_WIDTH=0.10MMMIN_LINE_WIDTH=0.3 MM



PP1V8_S0GPU_ISNS

PP1V5_GPU_REG

PP1V5_S0GPU_ISNS

PPVCORE_S0_CPU

PPVP_FWMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MM


PPVP_FWPPVP_FW

PP1V0_FW_FWPHY


MIN_LINE_WIDTH=0.4 MMPP3V3_FW_FWPHY


PPVP_FW

PP3V42_G3H

PP3V3_S5

PP1V05_S0

PP5V_SUS

PP5V_S3MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE

VOLTAGE=5V

PP3V42_G3H

PP0V75_S0_DDRVTTPP0V75_S0_DDRVTT

PPVCORE_GPU

PPVTTDDR_S3

PP1V05_SUS

PP0V75_S0_DDRVTT

PP0V75_S0_DDRVTT

PP1V8_S0GPU_ISNSPP1V5_S3


PP1V5_S3MIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.17 mm

PP1V5_S3RS0_CPUDDR

PP1V5_S0

PP1V05_S0

PP1V05_S0PP1V05_S0

PP1V2_S0

PP1V05_S0

PP1V05_S0


PP1V05_S0

PP1V05_S0PP1V05_S0

PP5V_S3

PP5V_SUS

PP1V5_S3

PP1V5_S3



MIN_LINE_WIDTH=2 mmPP0V75_S0_DDRVTT

PP3V42_G3H

PP3V42_G3H

PP3V42_G3H

PP5V_S3

PP5V_S3

PP1V8_S0

PP3V42_G3HMAKE_BASE=TRUEVOLTAGE=3.42VMIN_LINE_WIDTH=0.3 MM


PP5V_SUSMIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.2 MM


PP5V_S5

PP5V_S3

PP5V_S3

PP5V_S3PP5V_S3

MIN_NECK_WIDTH=0.25 mmVOLTAGE=12.8VMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mmPPBUS_G3H

PP3V3_S5PP3V3_S5

PP3V3_S5PP3V3_S5

PP3V3_S5

PP5V_S0


PP3V3_S3PP3V3_S3

PP3V3_S3PP3V3_S3

PP3V3_S3PP3V3_S3

PP3V3_S3PP3V3_S3

PP3V3_S3PP3V3_S3

PP3V3_S3

PP3V3_S5PP3V3_S5

PP3V3_S5PP3V3_S3

PP5V_S3

PP5V_S3PP5V_S3

MIN_NECK_WIDTH=0.2 MMVOLTAGE=3.3VMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 MMPP3V3_S5

MIN_LINE_WIDTH=0.6 MMVOLTAGE=3.3VMAKE_BASE=TRUE


PP3V3_SUS

PP1V05_S0

MAKE_BASE=TRUE



8 OF 132

7 OF 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25

26 28

32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48

49 50 51 53 56 60 61 71 72 79

82

83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50

51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7

12

16 17 18 19 20 22 23 25 26 28 32

35

36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49

50 51 53 56 60 61 71 72 79 82

83

84 87 88 89 98

7 16 19 25 33 34 35 87

7 34 35

7 8 35 85

7 34 35

7 16 19 25 33 34 35 87

7 16 19 25 33 34 35 87

7 16 19 25 33 34 35 87

7 16 19 25 33 34 35 87

7 8 35 85

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

7 8 35 85

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

7 34 35

7 16 19 25 33 34 35 87

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25

26 28

32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7

12

16

17

18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25

26 28

32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25

26 28

32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7

12

16

17

18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

7 45 52 53 71

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 30 66

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

7 45 52 53 71

7 45 52 53 71

7 16 17 18 19 20 22 45 70 71 72

7 16 17 18 19 20 22 45 70 71

72

7 16 17 18 19 20 22 45 70 71 72

7 16 17 18 19 20 22 45 70 71 72

6 7 29 31 41 42 43 45 65 66 71 81 100

7 23 70

7 49 65

7 49 64 66 67 68 69

6 7 8 35 39 48 49 62 63 88

6 7 8 35 39 48 49 62 63 88

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51

53 56 60 61 71 72 79

82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82

83 84 87 88

89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82

83 84 87 88 89 98

7 49 81 86

7 49 65

6 7 48 62 63

6 7 38 39

6 7 38 39 40

6 7 38 39

6 7 25 36 70 72

7 49 65

6 7 48 62 63

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

7 16 17 18 19 20 22 45 70 71 72

7 16 17 18 19 20 22 45 70 71

72

7 16 17 18 19 20 22 45 70 71 72

7 16 17 18 19 20 22 45 70 71 72

7 45 52 53 71

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

7 23 70

6 7 8 35 39 48

49 62 63

88

6 7 8 35 39 48 49 62 63 88

6 7 8 35 39 48 49 62 63 88

6 7 8 35 39 48 49 62 63 88

6 7 8 35 39 48 49 62 63 88

6 7 8 35 39 48 49 62 63 88

7 49 64 66 67 68 69 7 49 64 66 67 68

69

6 7

48

62

63

7 49 64 66 67 68 69

7 49 64 66 67 68 69

7 49 81 86

7 49 64 66 67 68 69

7 49 81 86

7 49 64 66 67 68 69

7 49 81 86

6 7 53 65 71

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 70 87

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 8 22 41 46 51 53 64 67 68

69 71 72 86

88 101

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 14 17 20 22 25 70 71 87

6 7 14 17 20 22 25 70 71 87

6 7 14 17 20 22 25 70 71 87

6 7 14 17 20 22 25 70 71 87

6 7 14 17 20 22 25 70 71 87

6 7 14 17 20 22 25 70 71 87

6 7 14 17 20 22 25 70 71 87

7 12 15 64

7 12 15 64

6 7 14 17 20 22 25 70 71 87

7 12 15 64

6 7 25 36 70 72

6 7 36 70

7 10 13 15 29 71 72

7 16 20 22 25 41 56 70

7 16 20 22 25 41 56 70

7 16 20 22 25 41 56 70

7 16 20 22 25 41 56 70

7 10 13 15 29 71 72

7 10 13 15 29 71 72

6 7 26 28 29 66 71

6 7 26 28 29 66 71

7 12 14

6 7 53 65 71

6 7 25 42 44 45 46 47 52 62 63 72

7 12 15

7 10 12 14

6 7 25 36 70 72

7 88 100 7 88 100

7 73 74 78 80 100

7 86 100

7 74 75 76 77 100

7 86 100

7 74 78 80 100

6 7 71 100 6 7 71 100

7 86 100

7 74 75 76 77 100

6 7 71 74 78 79 81 83

6 7 71 74 78 79 81 83

7 74 78 80 100

7 74 78 80 100

7 74 78 80 100

7 74 78 80 100

7 74 78 80 100

7 74 78 80 100

7 74 78 80 100

7 74 78 80 100

7 74 78 80 100

7 74 75 76 77 100

7 74 75 76 77 100

7 86 100

7 74 78 80 100

7 86 100

7 73 74 78 80 100

7 73 74 78 80 100

7 73 74 78 80 100

7 73 74 78 80 100

7 73 74 78 80 100

7 73 74 78 80 100

7 73 74 78 80 100

7 73 74 78 80 100

6 7 48 74 81

6 7 48 74 81

6 7 12 14 48 68 101

7 12 13 15 48 68

6 7 12 14 48 68 101

7 12 13 15 48 68

7 12 13 15 48 68

7 12 15

7 10 12 14

6 7 38 39 40

6 7 36 70

6 7 25 36 70 72

6 7 25 36 70 72

6 7 36 70

7 74 75 76 77 100

6 7 25 42 44 45 46 47 52 62 63 72

7 16 17 20 25

6 7 25 42 44 45 46 47 52 62 63 72

6 7 25 42 44 45 46 47 52 62 63 72

6 7 25 42 44 45 46 47 52 62 63 72

6 7 25 42 44 45 46 47 52 62 63 72

6 7 48 62 63

7 16 17 20 25

6 7 53 65 71

6 7 53 65 71

6 7 53 65 71

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35

39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35

39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69

72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

7 74 78 80 100

6 7 71 100

6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83

6 7 71 74 78 79 81 83

6 7 71 74 78 79 81 83

6 7 71 74 78 79 81 83

6 7 71 74 78 79 81 83

7 74 78 80 100

7 86 100

7 74 75 76 77 100

6 7 39 40

6 7 39 40

6 7 39 40

6 7 38 39

6 7 38 39 40

6 7 25 42 44 45 46 47 52 62 63 72

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71

72 82 85 89 98

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

7 22 71

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7

25

42

44

45

46

47

52

62

63

72

6 7 26 28 29 66

6 7 26 28 29 66

6 7 48 74 81

6 7 30 66

7 23 70

6 7 26 28 29 66

6 7 26 28 29 66

7 74 78 80 100

6 7 26 28 29 66 71

6 7 26 28 29 66 71

7 16 20 22 25 41 56 70

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22

23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 70 87

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23

35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72

101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 29 31 41 42 43 45 65 66 71 81 100

7 22 71

6 7 26 28 29 66 71

6 7 26 28 29 66 71

6 7 26 28 29 66

6 7 25 42 44 45 46 47 52 62 63 72

6 7 25 42 44 45 46 47 52 62 63 72

6 7 25 42 44 45 46 47 52 62 63 72

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 14 17 20 22 25 70 71 87

6 7 25 42 44 45 46 47 52 62 63 72

7 22 71

6 7 53 65 71

6 7 29 31 41 42 43 45

65 66 71 81

100

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 8 18 19 24 25 29 30 31 32 47 48

49 53

54 71 72 87 6

7

8

18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39

45 55 65 70 71 72 82 85 89 98

6 7 8 18 19 24 25 29 30 31 32 47 48 49

53 54 71 72 87

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

7 16 17 18 19

20 22 45 70 71 72

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Short (IO Row) EMI pogo pins

Tall EMI pogo pins

Keyboard / IPD Conn Protect

Thermal Module Holes

GPU signals

GMUX ALIASES

Heat spreader mounting boss for T29 router

Heat spreader mounting boss for PCH

Left Speaker Holes

Unused PEG signals

Frame Holes

CPU signals

T29 / GMUX JTAG Signals

T29 Signals Through PEG

Unused T29 Ports

Digital Ground

Fan Holes

SMXW09011 2

SMXW09021 2

SMXW09031 2

STDOFF-4.0OD1.85H-SMSH0920

1


1


1


1

MF-LF2

1R0916

1/16W

402

5%10K

5%1/16W

2

1

402MF-LF

R091510K

1/8WMF-LF805

R0950T29BST:N

0

5%

1 2

C090510%

2201

0.01UF10V

1

X5R

R0921

MF

51

1/20W

2

201

5%

1

0.01UFC090110%10VX5R

1

2201

X5R

C09020.01UF

2 10V

201

10%

1

R092251

5%1/20W

201

21

MF

210V

201

10%

1

X5R

0.01UFC0903

R0923

201

1/20W5%

21

MF

51

C09040.01UF

210V

201

10%

1

X5R

R0924

201

21

5%

MF1/20W

51

C09060.01UF

X5R201

2 10V10%

1

201

R092621

MF1/20W

51

5%

10%10V

0.01UF

2

1

201X5R

C0907201

R09271 2

5%

MF

51

1/20W

C09080.01UF

2 X5R

1

10%10V

201

STDOFF-4.5OD.98H-1.1-3.48-THZT0984

1

3R2P5ZT0990

1

3R2P5ZT0960

1

SL-3.1X2.7-6CIR-NSP

ZT0950TH

1

13R2P5

ZT0940

3R2P5ZT0915

1

STDOFF-4.5OD.98H-1.1-3.48-THZT0986

1

STDOFF-4.5OD.98H-1.1-3.48-TH1

ZT0981

ZT0985

1

STDOFF-4.5OD.98H-1.1-3.48-TH

SH0917SM

1

1.4DIA-SHORT-SILVER-K99

SM

SH0901

1


SM

SH0912

1


SM

SH0910

1

1.4DIA-SHORT-SILVER-K99SM

SH0911

1


SM

SH0913

1


POGO-2.0OD-3.5H-K86-K87

1

SH0903SM

POGO-2.0OD-3.5H-K86-K87

1

SM

SH0916

POGO-2.0OD-3.5H-K86-K87

1

SH0902SM

POGO-2.0OD-3.5H-K86-K87

1

SM

SH0900

POGO-2.0OD-3.5H-K86-K87SM

1

SH0904

SM

SH0914

1


STDOFF-4.5OD.98H-1.1-3.48-THZT0991

1

ZT0988STDOFF-4.5OD.98H-1.1-3.48-TH

1

STDOFF-4.5OD.98H-1.1-3.48-THZT0989

1

STDOFF-4.5OD.98H-1.1-3.48-THZT0987

1

STDOFF-4.5OD.98H-1.1-3.48-THZT0980

1

4.0OD1.85H-M1.6X0.35ZT0952

1

4.0OD1.85H-M1.6X0.35ZT0953

1

STDOFF-4.0OD3.0H-THZT0934

1

ZT0935

1

STDOFF-4.0OD3.0H-TH

STDOFF-4.5OD.98H-1.1-3.48-THZT0930

1

NOSTUFFR09031

402

10K5%

2MF-LF1/16W

2

1R0904NOSTUFF

10K5%1/16WMF-LF402

1/16W

R09014.7K

2402MF-LF

5%

1

NOSTUFF

MF-LF402

5%1/16W

10K1

2

R0913

1/16W

402

5%

MF-LF

1

2

10K

NOSTUFFR0914

SYNC_MASTER=K18_MLB SYNC_DATE=04/27/2010

Signal Aliases

T29_A_BIAS_R

DP_IG_DDC_DATAMAKE_BASE=TRUE

MAKE_BASE=TRUEDP_IG_HPD

MAKE_BASE=TRUEDP_IG_DDC_CLK

DP_IG_AUX_CH_N

TP_DP_IG_B_MLP<3..0>

DP_A_BIAS0

DP_A_BIAS2

DP_IG_DDC_DATA

NC_PCH_CLKOUT_DPNTRUEMAKE_BASE=TRUE

DP_IG_AUX_CH_P

TP_DP_IG_B_MLN<3..0>

DP_IG_DDC_CLK

GND

GND

TRUEMAKE_BASE=TRUE

NC_PCIE_CLK100M_EXCARD_N

TP_SMC_EXCARD_PWR_EN

PEG_R2D_C_P<7..0>MAKE_BASE=TRUE

MAKE_BASE=TRUEJTAG_ISP_TDO

PPBUS_G3H

NC_PCIE_EXCARD_D2R_P

T29_LSEO_LSOE2

DP_IG_HPD

NO_TEST=TRUENC_DPB_EG_AUX_CHPMAKE_BASE=TRUE

NO_TEST=TRUENC_DPB_EG_MLP<3..0>MAKE_BASE=TRUE

DPB_EG_ML_N<3..0>

NO_TEST=TRUENC_DPB_EG_AUX_CHNMAKE_BASE=TRUE

NC_DPB_EG_DDC_DATA

NC_PCIE_EXCARD_R2D_C_NTRUEMAKE_BASE=TRUE

NC_DP_IG_MLP<3..0>MAKE_BASE=TRUE NO_TEST=TRUE

NO_TEST=TRUENC_DPB_EG_MLN<3..0>MAKE_BASE=TRUE

NO_TEST=TRUENC_DPB_EG_DDC_CLKMAKE_BASE=TRUE

DP_EG_AUXCH_N

FW643_WAKE_L

NC_DPB_EG_DDC_DATANO_TEST=TRUEMAKE_BASE=TRUE

MAKE_BASE=TRUETRUE NC_PCH_GPIO65_CLKOUTFLEX1

NC_DP_IG_MLN<3..0>MAKE_BASE=TRUE NO_TEST=TRUE

LCD_BKLT_EN

DP_EG_AUXCH_P

NC_DPB_EG_DDC_CLK

NC_DPB_EG_AUX_CHN

JTAG_ISP_TCK

USB_T29A_P

TRUEMAKE_BASE=TRUE

NC_PCH_GPIO64_CLKOUTFLEX0

USB_T29A_N

MAKE_BASE=TRUEUSB_SDCARD_NMAKE_BASE=TRUEUSB_SDCARD_P

USB_EXTC_PUSB_EXTC_N

=PEG_R2D_C_P<7..0>

MAKE_BASE=TRUEJTAG_ISP_TCK


NC_RT_GAIN_TPNO_TEST=TRUEMAKE_BASE=TRUE

NC_PCIE_EXCARD_D2R_PMAKE_BASE=TRUETRUE

NC_USB_HUB2_OCS4MAKE_BASE=TRUE

USB_SDCARD_P

USB_SDCARD_N

PP3V3_S3

NC_FSB_CLK133M_PCHP

MAKE_BASE=TRUEGMUX_VSYNC

T29_LSEO_LSOE3

MAKE_BASE=TRUEPM_ALL_GPU_PGOOD

TP_LVDS_MUX_SEL_EGNO_TEST=TRUEMAKE_BASE=TRUE

=PEG_D2R_N<15..12>

=PEG_D2R_P<15..12>TP_LVDS_IG_B_CLKNMAKE_BASE=TRUE

MAKE_BASE=TRUETP_LVDS_IG_B_CLKP

T29_LSEO_LSOE2 MAKE_BASE=TRUE NO_TEST=TRUENC_PEG_R2D_C_N<15..12>

JTAG_ISP_TDO

NC_PEG_R2D_C_P<15..12>NO_TEST=TRUEMAKE_BASE=TRUE

NO_TEST=TRUENC_LVDS_IG_A_DATAN<3>MAKE_BASE=TRUE

MAKE_BASE=TRUENC_LVDS_IG_A_DATAP<3>

NO_TEST=TRUE

NC_PEG_D2R_N<15..12>NO_TEST=TRUEMAKE_BASE=TRUE

MAKE_BASE=TRUEPCIE_T29_R2D_C_N<3..0>

NO_TEST=TRUEMAKE_BASE=TRUENC_T29_D2RN<3..2>

NC_T29_R2D_CP<3..2>NO_TEST=TRUEMAKE_BASE=TRUE

GNDNC_USB_HUB1_OCS4MAKE_BASE=TRUE

MAKE_BASE=TRUENC_GPU_XTALOUT

NO_TEST=TRUE


T29_R2D_C_P<3..2>

T29_LSEO_LSOE3MAKE_BASE=TRUE NO_TEST=TRUE

JTAG_ISP_TDIMAKE_BASE=TRUE

MAKE_BASE=TRUEPEG_D2R_P<7..0>

=PEG_R2D_C_N<7..0>

NC_LVDS_IG_B_DATAN<3>NO_TEST=TRUEMAKE_BASE=TRUE

MAKE_BASE=TRUEFW643_WAKE_L

T29_D2R_P<3..2>

PEX_CLKREQ_L

GND

GND

MAKE_BASE=TRUEEG_RESET_L

LVDS_IG_BKL_ONMAKE_BASE=TRUE

MAKE_BASE=TRUEPEG_D2R_N<7..0>

=PEG_D2R_P<7..0>

NO_TEST=TRUENC_FSB_CLK133M_PCHNMAKE_BASE=TRUE

NO_TEST=TRUENC_FSB_CLK133M_PCHPMAKE_BASE=TRUE

T29_D2R_N<3..2>

NC_SW_GAIN_TPNO_TEST=TRUEMAKE_BASE=TRUE

JTAG_ISP_TDI

TP_LVDS_MUX_SEL_EG

NC_T29_R2D_CN<3..2>MAKE_BASE=TRUE NO_TEST=TRUE

TP_SMC_EXCARD_PWR_ENMAKE_BASE=TRUE

NC_PCIE_EXCARD_D2R_N

NC_PCIE_EXCARD_R2D_C_PNC_PCIE_EXCARD_R2D_C_N

=PEG_D2R_N<11..8>

TP_CPU_VTT_SELECT

GFXIMVP_VID<0..6>

CPUIMVP_VID<0..6>MAKE_BASE=TRUETP_CPU_VTT_SELECT

MAKE_BASE=TRUEPEG_CLKREQ_L

GND_CHASSIS_AUDIO_JACK

MAKE_BASE=TRUEPEX_CLKREQ_L

PPVOUT_S0_LCDBKLTMAKE_BASE=TRUE

MEMVTT_ENMAKE_BASE=TRUE

MAKE_BASE=TRUECPU_VID<0..6>

GFX_VID<0..6>MAKE_BASE=TRUE

=PEG_R2D_C_P<15..12>

=PEG_D2R_P<11..8>

=PEG_R2D_C_P<11..8>

LVDS_IG_BKL_ON

PEG_CLKREQ_L

GMUX_VSYNC

LVDS_IG_PANEL_PWR

=PEG_R2D_C_N<15..12>

MAKE_BASE=TRUENC_PEG_D2R_P<15..12>

NO_TEST=TRUE

NC_LVDS_IG_B_DATAP<3>NO_TEST=TRUEMAKE_BASE=TRUE

NC_LVDS_IG_B_DATAN<3>

MEMVTT_EN

NC_USB_HUB2_OCS4

TP_LVDS_IG_B_CLKP

NC_LVDS_IG_B_DATAP<3>

NC_LVDS_IG_A_DATAN<3>

NC_LVDS_IG_A_DATAP<3>

TP_LVDS_IG_BKL_PWM

TP_LVDS_IG_B_CLKN

MAKE_BASE=TRUEPEG_R2D_C_N<7..0>

MAKE_BASE=TRUE NO_TEST=TRUENC_T29_D2RP<3..2>

MAKE_BASE=TRUEPCIE_T29_D2R_N<3..0>

GND


PP5V_S0_AUDIO_AMP_R

PP5V_S0

GND

PM_ALL_GPU_PGOOD

JTAG_ISP_TCK

T29_LSEO_LSOE2NO_TEST=TRUEMAKE_BASE=TRUE

T29_LSEO_LSOE3

PP3V3_S3

NC_FSB_CLK133M_PCHN

PP5V_S0_AUDIO_AMP_L

FW_PLUG_DET_LMAKE_BASE=TRUE

LVDS_IG_PANEL_PWRMAKE_BASE=TRUE

NC_SW_GAIN_TP

MAKE_BASE=TRUETP_LVDS_IG_BKL_PWM

NC_GPU_XTALOUT

NC_USB_HUB1_OCS4

PP3V3_S3

EG_RESET_L

=PEG_D2R_N<7..0>

=PEG_R2D_C_N<11..8>MAKE_BASE=TRUEPCIE_T29_R2D_C_P<3..0>

PCIE_T29_D2R_P<3..0>MAKE_BASE=TRUE

T29_R2D_C_N<3..2>

TRUEMAKE_BASE=TRUE


DP_EG_AUXCH_PMAKE_BASE=TRUE

MAKE_BASE=TRUEDP_EG_AUXCH_N

FW_PLUG_DET_L

MAKE_BASE=TRUEPM_ENET_EN

MAKE_BASE=TRUEDP_IG_AUX_CH_N

NC_PEG_B_CLKRQ_L_GPIO56TRUEMAKE_BASE=TRUE

DP_IG_AUX_CH_PMAKE_BASE=TRUE

NC_PCH_GPIO66_CLKOUTFLEX2TRUEMAKE_BASE=TRUE

NC_PCH_GPIO67_CLKOUTFLEX3TRUEMAKE_BASE=TRUE

NC_RT_GAIN_TP

NC_LT_GAIN_TP


NC_PCIE_CLK100M_EXCARD_P

TP_ISSP_SDATA_P1_0

NC_PCIE_EXCARD_R2D_C_PTRUEMAKE_BASE=TRUE

NC_PCIE_CLK100M_EXCARD_PMAKE_BASE=TRUETRUE

PM_ENET_EN

PPVOUT_S0_LCDBKLT

MAKE_BASE=TRUETP_ISSP_SDATA_P1_0

T29_A_BIAS_R

T29_A_BIAS_R

T29_A_BIAS_R

NC_PCIECLKRQ4_L_GPIO26MAKE_BASE=TRUETRUENC_PCIECLKRQ4_L_GPIO26

T29_A_BIAS_R2D_N1

NC_PCH_CLKOUT_DPPTRUEMAKE_BASE=TRUE

T29_A_BIAS_D2R_P1

NC_PEG_B_CLKRQ_L_GPIO56

T29_A_BIAS_R

PP5V_S0_AUDIO

PP5V_S0_AUDIOMAKE_BASE=TRUE

NO_TEST=TRUENC_LT_GAIN_TPMAKE_BASE=TRUE


T29_A_BIAS_R2D_P0

T29_A_BIAS_R2D_N0

T29_A_BIAS_R2D_P1

GNDT29_A_BIAS_R T29_A_BIAS_D2R_N1

DPB_EG_ML_P<3..0>

NC_DPB_EG_AUX_CHP

TP_ISSP_SCLK_P1_1

GND

GND

TP_ISSP_SCLK_P1_1MAKE_BASE=TRUE

NC_PCH_CLKOUT_DPN

NC_PCH_CLKOUT_DPP

PP15V_T29

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.095 mmVOLTAGE=0V

GND

9 OF 132

8 OF 101

8 85

8 17 79 83

8 17 83

8 17 79 83

8 17 83 92

84

84

8 17 79 83

8 16

8 17 83 92

8 17 79 83

8 16 93

8

73 90

8 19 33 87

6 7 35 39 48 49 62 63 88

8 16

8 33

8 17 83

8

8

8

8 16

17

8

8 78 83 97

8 38 39

8

8 16

17

87 88

8 78 83 97

8

8

8 19 23 33 87

24 92

8 16

24 92

8 24

8 24

24 92

24 92

9

8 19 23 33 87

8 16

8

8 16

8 24

8 24

8 24

6 7 8 18 19 24 25 29 30 31 32

47 48 49 53 54

71 72 87

8

8 87 88

8 33

8 73 81 86 87 89

8 87

6 8 18

6 8 18

8 33 9

8 19 33 87

9

8 18 92

8 18 92

9 33 93

33

33

8 24

8

8 16 93

95

8 19 33 87

73 90

9

8 18

8 38 39

95

8 79 87

8 73 87

8 18 87

73 90

9

8

8

95

8

8 19 33 87

8 87

33

8

8 16

8 16

8 16

8 90 8 90

8 16 87

60

8 79 87

6 8 82 88 100

8 29 66

90

90

8 18 87

8 16 87

8 87 88

8 18 87

9

8 18

8 18

8 29 66

8 24

6 8 18

8 18

8 18 92

8 18 92

6 8 18

6 8 18

73 90

33

9 33 93

8 16

59

6 7 22 41 46 51 53 64 67 68 69 71 72 86 88 101

8 73 81 86 87 89

8 19 23 33 87

8 33

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

8

59

8 19 39

8 18 87

8

6 8 18

8

8 24

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

8 73 87

9

9 33 93

9 33 93

95

8 16 8 78 83 97

8 19 39

8

8 17 83 92

8

8 17 83 92

8 16

8 16

8

8

8 16

8 16 93

6 8 52

8 16

8 16 93

8

6 8 82 88 100

6 8 52

8 85

8 85

8 85

8 8

84

8 16

85

8

8 85

8 56

8 56

8

8 16

84

84

84

8 85 85

8

6 8 52 6 8 52

8 16

8 16

7 35 85

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

EDP_HPD

EDP_COMPIO

EDP_ICOMPO

EDP_AUX*

EDP_AUX

EDP_TX_3

EDP_TX_2

EDP_TX_1

EDP_TX_0

EDP_TX_3*

EDP_TX_2*

EDP_TX_1*

EDP_TX_0*

DMI_TX_3*

FDI1_LSYNC

FDI0_LSYNC

FDI_TX_3

FDI0_FSYNC

FDI1_FSYNC

FDI_INT

FDI_TX_1

FDI_TX_0

FDI_TX_2

FDI_TX_3*

FDI_TX_2*

FDI_TX_1*

DMI_TX_1*

DMI_TX_2*

DMI_TX_0

DMI_TX_2

DMI_TX_1

DMI_TX_3

FDI_TX_0*

DMI_RX_2*

DMI_RX_0

DMI_RX_1

DMI_RX_2

DMI_RX_3

DMI_TX_0*

DMI_RX_3*

DMI_RX_1*

DMI_RX_0* PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX_2*

PEG_RX_0*

PEG_RX_1*

PEG_RX_3*

PEG_RX_4*

PEG_RX_5*

PEG_RX_7*

PEG_RX_6*

PEG_RX_8*

PEG_RX_9*

PEG_RX_10*

PEG_RX_12*

PEG_RX_11*

PEG_RX_14*

PEG_RX_13*

PEG_RX_15*

PEG_RX_0

PEG_RX_1

PEG_RX_3

PEG_RX_2

PEG_RX_4

PEG_RX_6

PEG_RX_5

PEG_RX_7

PEG_RX_8

PEG_RX_10

PEG_RX_9

PEG_RX_11

PEG_RX_12

PEG_RX_13

PEG_RX_14

PEG_RX_15

PEG_TX_1*

PEG_TX_2*

PEG_TX_0*

PEG_TX_3*

PEG_TX_4*

PEG_TX_5*

PEG_TX_7*

PEG_TX_6*

PEG_TX_10*

PEG_TX_8*

PEG_TX_9*

PEG_TX_11*

PEG_TX_12*

PEG_TX_13*

PEG_TX_14*

PEG_TX_15*

PEG_TX_1

PEG_TX_0

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_6

PEG_TX_5

PEG_TX_7

PEG_TX_8

PEG_TX_9

PEG_TX_10

PEG_TX_11

PEG_TX_12

PEG_TX_14

PEG_TX_13

PEG_TX_15

FDI_TX_4*

FDI_TX_5*

FDI_TX_6*

FDI_TX_7*

FDI_TX_4

FDI_TX_5

FDI_TX_6

FDI_TX_7

(SYM 1 OF 11)

DMI

EMBEDDED DISPLAY PORT

PCI EXPRESS BASED INTERFACE SIGNALS

INTEL FLEXIBLE DISPLAY INTERFACE SIGNALS

RSVD_96

RSVD_95

RSVD_94

RSVD_93

RSVD_92

RSVD_91

RSVD_90

RSVD_97

RSVD_38

RSVD_39

RSVD_40

RSVD_36

RSVD_41

RSVD_42

RSVD_43

RSVD_45

RSVD_44

RSVD_48

RSVD_49

RSVD_50

RSVD_47

RSVD_46

RSVD_53

RSVD_52

RSVD_51

RSVD_55

RSVD_54

RSVD_57

RSVD_59

RSVD_60

RSVD_58

RSVD_56

RSVD_61

RSVD_63

RSVD_62

RSVD_65

RSVD_64

RSVD_66

RSVD_67

RSVD_69

RSVD_70

RSVD_68

RSVD_71

RSVD_72

RSVD_79

RSVD_80

RSVD_81

RSVD_78

RSVD_82

RSVD_83

RSVD_84

RSVD_86

RSVD_85

RSVD_89

RSVD_88

RSVD_87

CFG_4

CFG_3

CFG_2

CFG_1

CFG_0

CFG_9

CFG_8

CFG_7

CFG_6

CFG_5

CFG_14

CFG_13

CFG_12

CFG_11

CFG_10

CFG_15

CFG_16

CFG_17

RSVD_1

RSVD_5

RSVD_6

RSVD_4

RSVD_3

RSVD_2

RSVD_10

RSVD_11

RSVD_9

RSVD_8

RSVD_7

RSVD_15

RSVD_16

RSVD_14

RSVD_13

RSVD_12

RSVD_20

RSVD_19

RSVD_18

RSVD_17

RSVD_25

RSVD_26

RSVD_24

RSVD_22

RSVD_23

RSVD_31

RSVD_30

RSVD_29

RSVD_28

RSVD_27

RSVD_32

RSVD_33

RSVD_34

RSVD_35

(5 OF 11)RESERVED

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

BI

BI

NCNCNCNCNC

NC

NCNC

NCNC

NC

NCNC

NCNC

NC

NCNC

NCNC

NC

NCNCNCNC

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

NCNCNCNCNC

NCNCNCNC

NC

NCNCNCNC

NC

NCNCNCNC

NC

NCNCNCNC

NC

NCNCNCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NC

NC

NC

NC

NC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

CFG [7] :PEG DEFER TRAINING 1 = (DEFAULT) IMMEDIATELY AFTER xxRESETB 0 = WAIT FOR BIOS

(IPU)

10K PU disables eDP HPD

FOR SANDYBRIDGE PROCESSOR

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

Intel is investigating processor driven VREF_DQ generation.

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(DDR_VREF0)

(DDR_VREF1)

(THERMDA)

(THERMDC)

NOTE:

This connection is to support the same.

(IPU)

CFG [4] :eDP ENABLE/DISABLE 1 = DISABLED 0 = ENABLEDCFG [3] :PCIE x4 LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSEDCFG [2] :PCIE x16 LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED

CFG [6:5] :PCIE BIFURCATION 11 = 1 X16 (DEFAULT) 10 = 2 X8 01 = RSVD 00 = X8, X4, X4

CPU_CFG<4> should be pulled down to enable EDP

These can be Placed close to J2500 and Only for debug access

17 90

6 17 90

17 90

17 90

17 90

6 17 90

17 90

17 90

17 90

17 90

17 90

17 90

17 90

17 90

17 90

17 90

8

8

8

8

8

8 33 93

8 33 93

8 33 93

8 33 93

8

8

8

8

8

8

8

8

8

8

8

8

8 33 93

8 33 93

8 33 93

8

8

8

8 33 93

8

8

8

8

8

8

8

8

8

8 33 93

8 33 93

8 33 93

8

8

8

8

8

8

8

8 33 93

8

8

8

8

8

8

8

8 33 93

8

8

8

8

8 33 93

8 33 93

8 33 93

8

24.91/16W

402MF-LF

1%

R10101

2

OMIT

MOBILE-REV1SANDY-BRIDGE

BGA

U1000

N8

N10

T9

R10

R6

R8

U8

U10

N2

N4

R2

R4

P3

P1

T5

U6

AE4

AE2

AC2

AE8

AB1

AG4

AG2

AF3

AF1

AF7

AE6

AG8

AG6

AC8

AB7

AA2

AB3

AD9

W6

V7

W10

W8

Y9

AA8

AA10

AC10

U2

U4

W4

W2

V3

V1

AA6

Y5

G2

H1

F3

G22

F23

K23

H23

F11

H11

K11

J12

F9

E8

H9

G10

H7

J8

G6

F7

K21

H21

F19

H19

K19

J20

H17

G18

K15

K17

G14

F15

J16

H15

K13

H13

C22

A22

D23

B23

B13

D13

C10

A10

D11

B11

B9

D9

D7

B7

F13

E12

A18

C18

B21

D21

D19

B19

F21

E20

C14

A14

B17

D17

D15

B15

F17

E16

OMIT

MOBILE-REV1BGA

SANDY-BRIDGEU1000B57

D57

F55

K55

F57

E58

H57

H55

D53

K57

B55

A54

A58

D55

C56

E54

J54

G56

BB17

AW46

BG26

BB25

BG34

BH35

BJ34

BF35

BF41

BH43

BJ42

AY17

BF43

AW50

BB57

BF63

AD5

AH5

AJ6

BF3

BG4

BD29

BD19

AY45

AY41

BG62

BB43

D49

B53

G52

G64

BD33

AJ10

BE6

AA4

AC4

AC6

C52

D3

C4

C24

D25

BC30

B25

K47

H47

F5

K9

H5

L10

G4

K7

K5

BE32

M9

L6

J2

L2

P7

M5

J4

L4

N6

G48

AW42

K49

H49

J50

AY13

BB13

BA48

BB15

AY15

AW14

BD13

BA16

BE16

BD15

BC14

BF19

BH19

BC42

BF21

BH21

BF23

BH23

BF25

BH25

BJ22

BG22

1%

MF-LF402

1/16W

1KR10201

2

1%1/16WMF-LF402

1KR10221

2

NOSTUFF

MF-LF

5%

0

1/16W

402

R10211 2

NOSTUFF

402

1/16WMF-LF

5%

0R10231 2

17 90

6 17 90

17 90

17 90

17 90

17 90

17 90

17 90

17 90

6 17 90

17 90

17 90

17 90

17 90

17 90

17 90

6 17 90

6 17 90

6 17 90

6 17 90

6 17 90

PLACE_NEAR=U1000.AB1:12.7mm

MF-LF

24.9

402

1%1/16W

R10301

2

10K

1/16W1%

402MF-LF

R10311

2

50 98

50 98

1/16WMF-LF

5%

402

1K

NOSTUFFR1047

1

2

NOSTUFF

1K

1/16W5%

402MF-LF

R10461

2

1/16W5%

402MF-LF

1KR1045

1

2

EDP

402

1K

MF-LF1/16W

5%

R10441

2

NOSTUFF

5%1/16W

402MF-LF

1KR1042

1

2

1/16WMF-LF

5%

402

1K

NOSTUFFR1040

1

2

1/16WMF-LF

5%

402

1K

NOSTUFFR1041

1

2

1/16WMF-LF

5%

402

1K

NOSTUFFR1043

1

2

1/16WMF-LF

5%

402

1K

NOSTUFFR1049

1

2

CPU DMI/PEG/FDI/RSVD

CPU_EDP_COMP

TP_EDP_TX_N<2>

CPU_CFG<7>

CPU_CFG<16>

CPU_CFG<3>

CPU_CFG<1>

CPU_CFG<0>

CPU_CFG<6>

NC_PEG_R2D_C_P<14>

CPU_CFG<5>

TP_EDP_AUX_N

TP_EDP_TX_N<3>

TP_EDP_TX_N<1>

FDI_DATA_N<2>

FDI_DATA_N<6>

FDI_DATA_P<5>

CPU_CFG<2>

CPU_CFG<5>

CPU_CFG<6>

CPU_CFG<8>

CPU_CFG<7>

NC_PEG_D2R_P<12>

=PEG_D2R_P<3>

CPU_MEM_VREFDQ_B

PCIE_T29_D2R_P<2>

=PEG_D2R_P<4>

=PEG_D2R_P<1>

=PEG_D2R_P<2>

CPU_MEM_VREFDQ_A

=PEG_R2D_C_N<4>

FDI_DATA_P<3>

PCIE_T29_R2D_C_P<1>

=PEG_R2D_C_P<7>

NC_PEG_D2R_N<13>

FDI_DATA_P<4>

DMI_N2S_P<0>

PCIE_T29_R2D_C_N<0>

=PEG_R2D_C_N<6>

CPU_THERMD_N

CPU_THERMD_P

PCIE_T29_R2D_C_N<1>

=PEG_R2D_C_N<3>

NC_PEG_R2D_C_N<14>

=PEG_R2D_C_P<2>

=PEG_R2D_C_N<7>

FDI_DATA_P<7>

FDI_DATA_N<5>

FDI_DATA_N<0>

NC_PEG_R2D_C_N<15>

TP_EDP_AUX_P

NC_PEG_D2R_P<13>

PCIE_T29_R2D_C_N<3>

PCIE_T29_D2R_P<1>

PCIE_T29_D2R_P<3>

PCIE_T29_R2D_C_P<2>

NC_PEG_R2D_C_N<12>

=PEG_R2D_C_P<4>

NC_PEG_R2D_C_P<12>

NC_PEG_D2R_P<14>

=PEG_R2D_C_P<0>

=PEG_R2D_C_N<2>

PCIE_T29_R2D_C_N<2>

CPU_CFG<1>

CPU_CFG<10>

CPU_CFG<4>

=PEG_R2D_C_P<1>

FDI_DATA_N<1>

DMI_S2N_P<1>

=PEG_D2R_P<6>

PP0V75_S3_MEM_VREFDQ_B

DMI_S2N_P<3>

DMI_N2S_N<1>

NC_PEG_R2D_C_P<15>

PP0V75_S3_MEM_VREFDQ_A

DMI_N2S_N<0>

DMI_N2S_P<1>

DMI_N2S_P<2>

DMI_N2S_P<3>

FDI_DATA_N<3>

FDI_DATA_N<7>

FDI_DATA_P<6>

FDI_DATA_P<2>

FDI_DATA_P<1>

FDI_DATA_P<0>

DMI_N2S_N<3>

DMI_S2N_P<0>

DMI_S2N_N<0>

CPU_CFG<12>

CPU_CFG<16>

CPU_CFG<9>

CPU_CFG<0>

CPU_CFG<17>

PCIE_T29_R2D_C_P<0>

=PEG_R2D_C_N<5>

CPU_CFG<15>

CPU_CFG<14>

CPU_CFG<13>

CPU_CFG<11>

=PEG_R2D_C_P<3>

=PEG_R2D_C_P<5>

=PEG_R2D_C_P<6>

PCIE_T29_R2D_C_P<3>

NC_PEG_R2D_C_P<13>

CPU_CFG<2>

CPU_CFG<4>

FDI_DATA_N<4>

DMI_N2S_N<2>

DMI_S2N_N<3>

DMI_S2N_N<1>

DMI_S2N_P<2>

NC_PEG_D2R_N<14>

=PEG_D2R_P<5>

=PEG_D2R_P<0>

NC_PEG_D2R_N<15>

PCIE_T29_D2R_N<0>

PCIE_T29_D2R_N<1>

PCIE_T29_D2R_N<2>

PCIE_T29_D2R_N<3>

=PEG_D2R_N<7>

NC_PEG_D2R_N<12>

DMI_S2N_N<2>

NC_PEG_R2D_C_N<13>

TP_EDP_TX_N<0>

CPU_CFG<3>

=PEG_D2R_N<4>

=PEG_D2R_N<0>

CPU_PEG_COMP

NC_PEG_D2R_P<15>

=PEG_R2D_C_N<0>

=PEG_R2D_C_N<1>

FDI_LSYNC<1>

PP1V05_S0

FDI_INT

FDI_FSYNC<1>

FDI_FSYNC<0>

PCIE_T29_D2R_P<0>

PP1V05_S0

=PEG_D2R_N<1>

=PEG_D2R_N<2>

=PEG_D2R_N<3>

=PEG_D2R_N<5>

=PEG_D2R_N<6>

FDI_LSYNC<0>

TP_EDP_TX_P<0>

TP_EDP_TX_P<1>

TP_EDP_TX_P<2>

TP_EDP_TX_P<3>

CPU_EDP_HPD

=PEG_D2R_P<7>

10 OF 132

9 OF 101

9 23 90

9 23 90

9 23 90

9 23 90

9 23 90

9 23 90

9 23 90

9 23 90

9 23 90

9 23 90

23 90

9 23 90

9 23 90

23 90

9 23 90

28 30

26 30

23

9 23 90

23 90

9 23 90

23 90

23

23

23

23 90

9 23 90

9 23 90

9 23 90

90

6 7 9 10 12

13 14 16 17

20 22

23 35 39 44

67 69

72

101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

BI

BI

BI

BI

BI

IN

IN

OUT

IN

IN

OUT

OUT

BI

DDR3 MISC

PWR MGMT

JTAG & BPM

CLOCKS

THERMAL

(2 OF 11)

PROC_SELECT*

PROC_DETECT*

SM_RCOMP_2

SM_RCOMP_1

SM_RCOMP_0

SM_VREF

SM_DRAMRST*

SM_DRAMPWROK

PM_SYNC

PREQ*

TMS

TRST*

TDI

TDO

DBR*

BPM_0*

BPM_1*

BPM_2*

BPM_3*

BPM_4*

BPM_5*

BPM_6*

BPM_7*

TCK

PRDY*

BCLK_ITP

BCLK_ITP*

UNCOREPWRGOOD

RESET*

THERMTRIP*

CATERR*

PECI

PROCHOT*

BCLK

BCLK*

DPLL_REF_CLK

DPLL_REF_CLK*

NC

OUTBI

IN

OUT

IN

IN

IN

OUT

IN

IN

IN

IN

IN

OUT

BI

BI

BI




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Unused eDP CLK

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPD)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

R1120 and R1121 are Intel recommended values

23 90

23 90

23 90

23 90

23 90

PLACE_NEAR=U1800.AY11:157mm

MF-LF402

1/16W5%10KR11111

2

17 29 90

19 23 90

29

16 90

16 90

17 90

19 90

19 44 90

1/16WMF-LF

1%

402

75R11261

2

SANDY-BRIDGE

OMIT

BGA

MOBILE-REV1

U1000

D5

C6

K63

K65

C62

D61

E62

F63

D59

F61

F59

G60

H53

H61

AJ4

AJ2

F53

K53

J62

H65

B59

AH9

H51

K51

AY25

BE24

BJ46

BG46

BF45

BJ44

J58

K61

K59

F51

H59

H63

C60

PLACE_NEAR=U1000.BF45:12.7mm1/16W

200

402MF-LF

1%

R11141

2

PLACE_NEAR=U1000.BG46:12.7mm

MF-LF1/16W

402

25.51%

R11131

2402

1/16WMF-LF

1401%

PLACE_NEAR=U1000.BJ46:12.7mm

R11121

2

90

1/16W

402

5%

MF-LF

68R11011

2

NOSTUFF

402MF-LF1/16W

1001%PLACE_NEAR=U1000.BJ44:2.54mm

R11301

2

NOSTUFF

MF-LF402

1/16W

1001%

PLACE_NEAR=U1000.BJ44:2.54mmR11311

2

NOSTUFF

X5R402


10%0.1UF

16V

C11301

2

MF-LF402

1K5%1/16W

R11411

2

1K5%1/16WMF-LF402

R11401

2

402

5%

56

1/16WMF-LF

R11031245 67 90

NOSTUFF

1K

201

1/20WMF

5%

R11001

2

23 90

23 90

23 90

23 90

23 90

23 90

23 90

PLACE_NEAR=R1121.2:1mm

1/16W1%

402MF-LF

200R11201

2

PLACE_NEAR=U1000.AY25:51.562mm402

1%

MF-LF1/16W

130R1121

12

16 90

16 90

17 90

5%1/16W

NOSTUFF

402MF-LF

51R11041

2

1%

402

43.2

MF-LF1/16W

R11251223 25

201

1/20WMF

NOSTUFF

1K5%

R11021

2

23 25 90

23 90

23 90

23 90

CPU CLOCK/MISC/JTAG

PP1V05_S0

CPU_CATERR_L

CPU_DDR_VREF

CPU_SM_RCOMP<0>

PM_MEM_PWRGD_R

CPU_PWRGD

PM_SYNC

PLT_RESET_LS1V1_L

CPU_PROCHOT_R_L

CPU_PECI

PP1V05_S0

CPU_SM_RCOMP<2>

PLT_RST_CPU_BUF_L

XDP_BPM_L<7>

XDP_BPM_L<6>

XDP_BPM_L<4>

XDP_BPM_L<3>

XDP_BPM_L<2>

PP1V5_S3RS0_CPUDDR

PM_THRMTRIP_L

CPU_PROC_SEL_L

XDP_BPM_L<0>

XDP_CPU_PRDY_L

PP1V5_S3RS0_CPUDDR

XDP_BPM_L<1>

XDP_DBRESET_L

XDP_CPU_TDO

XDP_CPU_TRST_L

XDP_CPU_PREQ_L

ITPCPU_CLK100M_N

XDP_CPU_TMS

XDP_CPU_TCK

XDP_CPU_TDI

XDP_BPM_L<5>

CPU_PROCHOT_L

PP1V05_S0

DMI_CLK100M_CPU_N

DMI_CLK100M_CPU_P


ITPCPU_CLK100M_P

DPLL_REF_CLK_L

DPLL_REF_CLK

CPU_MEM_RESET_L

PM_MEM_PWRGD

CPU_SM_RCOMP<1>

11 OF 132

10 OF 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

7 10 13 15 29 71 72

7 10 13 15 29 71 72

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

7 12 14

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

SA_CAS*

SA_RAS*

SA_WE*

SA_DQ_63

SA_DQ_62

SA_DQ_61

SA_DQ_60

SA_DQ_59

SA_DQ_58

SA_DQ_57

SA_BS_2

SA_BS_1

SA_BS_0

SA_DQ_47

SA_DQ_48

SA_DQ_49

SA_DQ_56

SA_DQ_55

SA_DQ_54

SA_DQ_53

SA_DQ_52

SA_DQ_51

SA_DQ_50

SA_DQ_37

SA_DQ_38

SA_DQ_39

SA_DQ_40

SA_DQ_41

SA_DQ_42

SA_DQ_43

SA_DQ_44

SA_DQ_45

SA_DQ_46

SA_DQ_36

SA_DQ_32

SA_DQ_33

SA_DQ_27

SA_DQ_28

SA_DQ_29

SA_DQ_30

SA_DQ_31

SA_DQ_34

SA_DQ_35

SA_DQ_26

SA_DQ_16

SA_DQ_17

SA_DQ_18

SA_DQ_19

SA_DQ_20

SA_DQ_21

SA_DQ_22

SA_DQ_23

SA_DQ_24

SA_DQ_25

SA_DQ_10

SA_DQ_11

SA_DQ_12

SA_DQ_13

SA_DQ_14

SA_DQ_15

SA_DQ_9

SA_DQ_8

SA_DQ_7

SA_DQ_6

SA_DQ_1

SA_DQ_2

SA_DQ_3

SA_DQ_4

SA_DQ_5

SA_DQ_0

SA_CK_1

SA_CK_0

SA_CKE_1

SA_CKE_0

SA_CK_1*

SA_CK_0*

SA_CS_1*

SA_CS_0*

SA_ODT_1

SA_ODT_0

SA_DQS_0*

SA_DQS_1*

SA_DQS_2*

SA_DQS_3*

SA_DQS_4*

SA_DQS_5*

SA_DQS_6*

SA_DQS_7*

SA_DQS_0

SA_DQS_1

SA_DQS_3

SA_DQS_2

SA_DQS_5

SA_DQS_4

SA_DQS_6

SA_DQS_7

SA_MA_0

SA_MA_1

SA_MA_3

SA_MA_2

SA_MA_5

SA_MA_4

SA_MA_6

SA_MA_7

SA_MA_8

SA_MA_9

SA_MA_11

SA_MA_10

SA_MA_12

SA_MA_14

SA_MA_13

SA_MA_15

MEMORY CHANNEL A

(SYM 3 OF 11)

SB_CK_1*

SB_DQ_33

SB_CAS*

SB_RAS*

SB_WE*

SB_BS_0

SB_BS_1

SB_BS_2

SB_CK_0

SB_CK_0*

SB_CK_1

SB_CKE_0

SB_CKE_1

SB_DQ_0

SB_DQ_1

SB_DQ_10

SB_DQ_11

SB_DQ_12

SB_DQ_13

SB_DQ_14

SB_DQ_15

SB_DQ_16

SB_DQ_17

SB_DQ_18

SB_DQ_19

SB_DQ_2

SB_DQ_20

SB_DQ_21

SB_DQ_22

SB_DQ_23

SB_DQ_24

SB_DQ_25

SB_DQ_26

SB_DQ_27

SB_DQ_28

SB_DQ_29

SB_DQ_3

SB_DQ_30

SB_DQ_31

SB_DQ_32

SB_DQ_34

SB_DQ_35

SB_DQ_36

SB_DQ_37

SB_DQ_38

SB_DQ_39

SB_DQ_4

SB_DQ_40

SB_DQ_41

SB_DQ_42

SB_DQ_43

SB_DQ_44

SB_DQ_45

SB_DQ_46

SB_DQ_47

SB_DQ_48

SB_DQ_49

SB_DQ_5

SB_DQ_50

SB_DQ_51

SB_DQ_52

SB_DQ_53

SB_DQ_54

SB_DQ_55

SB_DQ_56

SB_DQ_57

SB_DQ_58

SB_DQ_59

SB_DQ_6

SB_DQ_60

SB_DQ_61

SB_DQ_62

SB_DQ_63

SB_DQ_7

SB_DQ_8

SB_DQ_9

SB_CS_0*

SB_CS_1*

SB_ODT_1

SB_ODT_0

SB_DQS_0*

SB_DQS_1*

SB_DQS_2*

SB_DQS_3*

SB_DQS_4*

SB_DQS_5*

SB_DQS_6*

SB_DQS_7*

SB_DQS_0

SB_DQS_2

SB_DQS_1

SB_DQS_3

SB_DQS_4

SB_DQS_5

SB_DQS_7

SB_DQS_6

SB_MA_1

SB_MA_0

SB_MA_2

SB_MA_3

SB_MA_4

SB_MA_5

SB_MA_6

SB_MA_8

SB_MA_7

SB_MA_10

SB_MA_11

SB_MA_9

SB_MA_13

SB_MA_12

SB_MA_15

SB_MA_14

(SYM 4 OF 11)

MEMORY CHANNEL B

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 26 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 28 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

SANDY-BRIDGEMOBILE-REV1

BGA

OMIT

U1000

BA36

BC38

BB19

BE44

BB31

BA32

AW34

AY33

BC18

BD17

BD41

BD45

AL6

AL8

AV7

AY5

AT5

AR6

AW6

AT9

BA6

BA8

BG6

AY9

AP7

AW8

BB7

BC8

BE4

AW12

AV11

BB11

BA12

BE8

BA10

AM5

BD11

BE12

BB49

AY49

BE52

BD51

BD49

BE48

BA52

AY51

AK7

BC54

AY53

AW54

AY55

BD53

BB53

BE56

BA56

BD57

BF61

AL10

BA60

BB61

BE60

BD63

BB59

BC58

AW58

AY59

AL60

AP61

AN10

AW60

AY57

AN60

AR60

AM9

AR10

AR8

AN6

AN8

AU8

AU6

BD5

BC6

BC10

BD9

BB51

BC50

BD55

BB55

BD61

BD59

AV61

AU60

BD27

BA28

AW38

AW22

BA20

BB45

BE20

AW18

BB27

AW26

BB23

BA24

AY21

BD21

BC22

BB21

BB41

BC46

BE36

BA44

BGAMOBILE-REV1SANDY-BRIDGE

OMIT

U1000

BJ38

BD37

AY29

BH39

BF33

BH33

BF37

BH37

BD25

BJ26

BE40

BH41

AL4

AK3

BA4

BB1

AV1

AU2

BA2

BB3

BC2

BF7

BF11

BJ10

AP3

BC4

BH7

BH11

BG10

BJ14

BG14

BF17

BJ18

BF13

BH13

AR2

BH17

BG18

BH49

BF47

BH53

BG50

BF49

BH47

BF53

BJ50

AL2

BF55

BH55

BJ58

BH59

BJ54

BG54

BG58

BF59

BA64

BC62

AK1

AU62

AW64

BA62

BC64

AU64

AW62

AR64

AT65

AL64

AM65

AP1

AR62

AT63

AL62

AM63

AR4

AV3

AU4

AN2

AN4

AW4

AW2

BF9

BH9

BH15

BF15

BH51

BF51

BF57

BH57

AY65

AY63

AN64

AN62

BF31

BH31

AY37

BJ30

AW30

BA40

BB29

BE28

BB37

BC34

BF27

BB33

BH27

BG30

BH29

BF29

BG42

BH45

BG38

BF39

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 26 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 26 27 91

6 27 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 26 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 28 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 91

6 27 28 91

6 27 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91

6 28 91


CPU DDR3 INTERFACES

MEM_B_DQS_N<2>

MEM_B_A<15>

MEM_B_A<14>

MEM_B_A<13>

MEM_B_A<12>

MEM_B_A<11>

MEM_B_A<10>

MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<7>

MEM_B_A<6>

MEM_B_A<5>

MEM_B_A<4>

MEM_B_A<3>

MEM_B_A<2>

MEM_B_A<1>

MEM_B_A<0>

MEM_B_DQS_P<7>

MEM_B_DQS_P<6>

MEM_B_DQS_P<5>

MEM_B_DQS_P<4>

MEM_B_DQS_P<3>

MEM_B_DQS_P<2>

MEM_B_DQS_P<1>

MEM_B_DQS_P<0>

MEM_B_DQS_N<7>

MEM_B_DQS_N<6>

MEM_B_DQS_N<5>

MEM_B_DQS_N<4>

MEM_B_DQS_N<3>

MEM_B_DQS_N<1>

MEM_B_DQS_N<0>

MEM_B_ODT<1>

MEM_B_ODT<0>

MEM_B_CS_L<1>

MEM_B_CS_L<0>

MEM_B_DQ<1>

MEM_B_DQ<3>

MEM_B_DQ<2>

MEM_B_DQ<5>

MEM_B_DQ<7>

MEM_B_DQ<9>

MEM_B_CKE<1>

MEM_B_CLK_N<1>

MEM_B_CLK_P<1>

MEM_B_CKE<0>

MEM_B_CLK_N<0>

MEM_B_CLK_P<0>

MEM_B_WE_L

MEM_B_RAS_L

MEM_B_CAS_L

MEM_B_BA<2>

MEM_B_BA<1>

MEM_B_DQ<63>

MEM_B_DQ<62>

MEM_B_DQ<61>

MEM_B_DQ<60>

MEM_B_BA<0>

MEM_B_DQ<59>

MEM_B_DQ<58>

MEM_B_DQ<57>

MEM_B_DQ<56>

MEM_B_DQ<55>

MEM_B_DQ<54>

MEM_B_DQ<53>

MEM_B_DQ<52>

MEM_B_DQ<51>

MEM_B_DQ<50>

MEM_B_DQ<49>

MEM_B_DQ<48>

MEM_B_DQ<47>

MEM_B_DQ<46>

MEM_B_DQ<45>

MEM_B_DQ<44>

MEM_B_DQ<43>

MEM_B_DQ<42>

MEM_B_DQ<41>

MEM_B_DQ<40>

MEM_B_DQ<39>

MEM_B_DQ<38>

MEM_B_DQ<37>

MEM_B_DQ<36>

MEM_B_DQ<35>

MEM_B_DQ<34>

MEM_B_DQ<33>

MEM_B_DQ<32>

MEM_B_DQ<31>

MEM_B_DQ<30>

MEM_B_DQ<29>

MEM_B_DQ<28>

MEM_B_DQ<27>

MEM_B_DQ<26>

MEM_B_DQ<25>

MEM_B_DQ<24>

MEM_B_DQ<23>

MEM_B_DQ<22>

MEM_B_DQ<21>

MEM_B_DQ<20>

MEM_B_DQ<19>

MEM_B_DQ<18>

MEM_B_DQ<17>

MEM_B_DQ<16>

MEM_B_DQ<15>

MEM_B_DQ<14>

MEM_B_DQ<13>

MEM_B_DQ<12>

MEM_B_DQ<11>

MEM_B_DQ<10>

MEM_B_DQ<8>

MEM_B_DQ<6>

MEM_B_DQ<4>

MEM_B_DQ<0>

MEM_A_DQ<61>

MEM_A_DQ<60>

MEM_A_DQ<59>

MEM_A_DQ<56>

MEM_A_DQ<54>

MEM_A_DQ<53>

MEM_A_DQ<38>

MEM_A_DQ<24>

MEM_A_CLK_P<0>

MEM_A_CLK_N<0>

MEM_A_A<15>

MEM_A_A<13>

MEM_A_A<14>

MEM_A_A<10>

MEM_A_A<11>

MEM_A_A<12>

MEM_A_A<8>

MEM_A_A<9>

MEM_A_A<7>

MEM_A_A<5>

MEM_A_A<6>

MEM_A_A<4>

MEM_A_A<3>

MEM_A_A<2>

MEM_A_A<1>

MEM_A_A<0>

MEM_A_DQS_P<7>

MEM_A_DQS_P<6>

MEM_A_DQS_P<5>

MEM_A_DQS_P<4>

MEM_A_DQS_P<3>

MEM_A_DQS_P<2>

MEM_A_DQS_P<1>

MEM_A_DQS_P<0>

MEM_A_DQS_N<7>

MEM_A_DQS_N<6>

MEM_A_DQS_N<5>

MEM_A_DQS_N<4>

MEM_A_DQS_N<3>

MEM_A_DQS_N<2>

MEM_A_DQS_N<1>

MEM_A_DQS_N<0>

MEM_A_ODT<1>

MEM_A_ODT<0>

MEM_A_CS_L<1>

MEM_A_CS_L<0>

MEM_A_CKE<1>

MEM_A_CLK_N<1>

MEM_A_CLK_P<1>

MEM_A_CKE<0>

MEM_A_DQ<0>

MEM_A_DQ<5>

MEM_A_DQ<4>

MEM_A_DQ<3>

MEM_A_DQ<2>

MEM_A_DQ<1>

MEM_A_DQ<6>

MEM_A_DQ<7>

MEM_A_DQ<8>

MEM_A_DQ<9>

MEM_A_DQ<15>

MEM_A_DQ<14>

MEM_A_DQ<13>

MEM_A_DQ<12>

MEM_A_DQ<11>

MEM_A_DQ<10>

MEM_A_DQ<25>

MEM_A_DQ<23>

MEM_A_DQ<22>

MEM_A_DQ<21>

MEM_A_DQ<20>

MEM_A_DQ<19>

MEM_A_DQ<18>

MEM_A_DQ<17>

MEM_A_DQ<16>

MEM_A_DQ<26>

MEM_A_DQ<35>

MEM_A_DQ<34>

MEM_A_DQ<31>

MEM_A_DQ<30>

MEM_A_DQ<29>

MEM_A_DQ<28>

MEM_A_DQ<27>

MEM_A_DQ<33>

MEM_A_DQ<32>

MEM_A_DQ<36>

MEM_A_DQ<46>

MEM_A_DQ<45>

MEM_A_DQ<44>

MEM_A_DQ<43>

MEM_A_DQ<42>

MEM_A_DQ<41>

MEM_A_DQ<40>

MEM_A_DQ<39>

MEM_A_DQ<37>

MEM_A_DQ<50>

MEM_A_DQ<51>

MEM_A_DQ<52>

MEM_A_DQ<55>

MEM_A_DQ<49>

MEM_A_DQ<48>

MEM_A_DQ<47>

MEM_A_BA<0>

MEM_A_BA<1>

MEM_A_BA<2>

MEM_A_DQ<57>

MEM_A_DQ<58>

MEM_A_DQ<62>

MEM_A_DQ<63>

MEM_A_WE_L

MEM_A_RAS_L

MEM_A_CAS_L

12 OF 132

11 OF 101

(9 OF 11)

VIDALERT*

VCCSA_14

VCCSA_15

VCCSA_16

VCCSA_8

VCCIO_SEL

VCCPQE_3

VCCPQE_2

VCCPQE_1

VCCPQE_0

VCCPLL_2

VCCPLL_1

VCCPLL_0

VCCDQ_3

VCCDQ_2

VCCDQ_1

VCCDQ_0VCCSA_1

VCCSA_0

VCCSA_3

VCCSA_4

VCCSA_2

VCCSA_5

VCCSA_6

VCCSA_7

VCCSA_9

VCCSA_10

VCCSA_11

VCCSA_12

VCCSA_13

VCCSA_17

VIDSOUT

VIDSCLK

VCCSA_VID_0

VCC_SENSE

VCCSA_VID_1

VAXG_SENSE

VSS_SENSE

VSSAXG_SENSE

VCCIO_SENSE

VDDQ_SENSE

VSS_SENSE_VCCIO

VCCSA_SENSE

VSS_SENSE_VDDQ

VCC_VAL_SENSE

VCC_DIE_SENSE

VAXG_VAL_SENSE

VSS_VAL_SENSE

VSSAXG_VAL_SENSE

VSS_NCTF_0

VSS_NCTF_1

VSS_NCTF_2

VSS_NCTF_4

VSS_NCTF_3

VSS_NCTF_6

VSS_NCTF_5

VSS_NCTF_7

VSS_NCTF_9

VSS_NCTF_8

VSS_NCTF_11

VSS_NCTF_10

VSS_NCTF_12

VSS_NCTF_13

VSS_NCTF_14

VSS_NCTF_15

DC_TEST_D65

DC_TEST_D1

DC_TEST_C64

DC_TEST_C2

DC_TEST_BJ64

DC_TEST_BJ62

DC_TEST_BJ4

DC_TEST_BJ2

DC_TEST_BH65

DC_TEST_BH63

DC_TEST_BH3

DC_TEST_BH1

DC_TEST_BG64

DC_TEST_BG2

DC_TEST_BF65

DC_TEST_BF1

DC_TEST_B65

DC_TEST_B63

DC_TEST_B3

DC_TEST_A64

DC_TEST_A62

DC_TEST_A4

CORE POWER(6 OF 11)

VCC_54

VCC_55

VCC_56

VCC_57

VCC_58

VCC_63

VCC_62

VCC_61

VCC_59

VCC_60

VCC_64

VCC_65

VCC_66

VCC_67

VCC_68

VCC_73

VCC_72

VCC_71

VCC_69

VCC_70

VCC_74

VCC_75

VCC_76

VCC_77

VCC_78

VCC_79

VCC_83

VCC_82

VCC_81

VCC_80

VCC_84

VCC_85

VCC_86

VCC_87

VCC_88

VCC_89

VCC_93

VCC_92

VCC_90

VCC_91

VCC_94

VCC_95

VCC_96

VCC_97

VCC_98

VCC_99

VCC_104

VCC_103

VCC_102

VCC_101

VCC_100

VCC_105

VCC_106

VCC_107

VCC_4

VCC_3

VCC_2

VCC_1

VCC_0

VCC_9

VCC_8

VCC_7

VCC_6

VCC_5

VCC_14

VCC_13

VCC_12

VCC_11

VCC_10

VCC_16

VCC_15

VCC_17

VCC_18

VCC_19

VCC_20

VCC_21

VCC_22

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

VCC_40

VCC_41

VCC_42

VCC_43

VCC_44

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52

VCC_53

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

OUT

IN

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

HR_PPDG sections 6.2.1 and 6.3.1.

(IPU)

For Future Compatibility

PLACEMENT NOTE: Please place all sense line resistors on BOTTOM side.

NOTE: Intel validation sense lines per doc 439028 rev1.0

BGA

OMIT


U1000

A4

A62

A64

B3

B63

B65

BF1

BF65

BG2

BG64

BH1

BH3

BH63

BH65

BJ2

BJ4

BJ62

BJ64

C2

C64

D1

D65

F49

B49

F47

B47

D47

AV23

AT23

AP23

AL23

AJ8

AW10

AK65

AK63

AK61

AV21

AT21

AP21

AL21

W17

W15

N16

N14

M17

M15

M12

M11

L18

L14

W12

U17

U15

U12

T16

T14

T11

N18

K3

AE10

AG10

AY19

B51

D51

A50

BJ60

BJ6

E64

E2

B61

B5

A60

A6

BH61

BH5

BE64

BE2

BD65

BD1

F65

F1

A46

AU10

AW20

C48

E50

A48

OMIT


BGA

U1000R46

R42

N43

B29

A44

A40

A38

A34

A32

A28

A26

N39

N37

N33

N30

N26

N24

N20

M46

M42

R40

M40

M36

M34

M29

M27

M23

M21

L44

L40

L38

R36

L34

L32

L28

L26

L22

K45

K43

K41

K37

K35

R34

K31

K29

K25

J44

J40

J38

J34

J32

J28

J26

R29

H45

H43

H41

H37

H35

H31

H29

H25

G44

G40

R27 G38

G34

G32

G28

G26

F45

F43

F41

F37

F35

R23

F31

F29

F25

E44

E40

E38

E34

E32

E28

E26

R21

D45

D43

D41

D37

D35

D31

D29

C44

C40

C38

N45

C34

C32

C28

C26

B45

B43

B41

B37

B35

B31

67 90

67 90

67 90

67 90

69 90

69 90

64

MF-LF402

10K

1/16W5%

R1320 1

2

MF-LF5%01/16W402R13121 267 90

1%

402

1/16W

PLACE_NEAR=U1000.A50:2.54mm

MF-LF

130R13021

2

5%402 1/16W MF-LF0R13111 267 90

MF-LF5%

PLACE_NEAR=U1000.B51:38mm43

402 1/16W

R13101 267 90

75

MF-LF

1%

402

1/16W

PLACE_NEAR=R1310.1:2.54mm

R13001

2

1/16WMF-LF

10K

402

5%

R13131

2PLACE_SIDE=BOTTOMPLACE_NEAR=U1000.AU10:50.8mm

NOSTUFF100

1/16W

402MF-LF

1%

R13631

2

402

NOSTUFFPLACE_NEAR=U1000.AW10:50.8mmPLACE_SIDE=BOTTOM

MF-LF1/16W1%100R13621

2

NOSTUFF

PLACE_SIDE=BOTTOM

MF1/20W1%49.9

201

R13701

2

49.9PLACE_SIDE=BOTTOM

NOSTUFF1%

MF1/20W

201

R13711

2

PLACE_SIDE=BOTTOM

NOSTUFF 1%

MF1/20W

49.9

201

R13641

2

PLACE_SIDE=BOTTOM

NOSTUFF49.9

1%

MF1/20W

201

R13651

2

PLACE_SIDE=BOTTOMMF-LF402

NOSTUFF

100

1/16W1%

PLACE_NEAR=U1000.B47:50.8mm

R13601

2


NOSTUFF

PLACE_SIDE=BOTTOM

MF-LF

1%100

402

1/16W

R13611

2

MF-LF1/16W

10K

402

5%

R1314 1

2

PLACE_NEAR=U1000.F49:50.8mm

402

1/16WNOSTUFF1%

PLACE_SIDE=BOTTOM

100

MF-LF

R13661

2

NOSTUFF

PLACE_SIDE=BOTTOM

PLACE_NEAR=U1000.E50:50.8mm

100

402MF-LF

1%1/16W

R13671

2

100

1/16W1%

MF-LF402

R13681

2

64


CPU POWERSYNC_MASTER=K92_MLB

CPU_VCC_VALSENSE_N

CPU_AXG_VALSENSE_N

CPU_AXG_VALSENSE_P

CPU_VCC_VALSENSE_P

CPU_VCCSENSE_N

CPU_AXG_SENSE_N

CPU_VCCSASENSE

TP_CPU_DIE_SENSE

TP_CPU_VDDQSENSE_N

TP_CPU_VDDQSENSE_P

CPU_VCCIOSENSE_N

CPU_VCCIOSENSE_P

CPU_AXG_SENSE_P

CPU_VIDSCLK_R

CPU_VIDSOUT_R

CPU_VIDALERT_L_R

CPU_VCCSENSE_P

PPVCORE_S0_AXG

CPU_VCCSA_VID<1>

TP_DC_TEST_BF65

PPVCORE_S0_CPU

PP1V05_S0

PP1V05_S0

CPU_VCCIO_SEL

CPU_VCCSA_VID<0>

DC_TEST_BH1_BG2

PPVCORE_S0_CPU

PPVCORE_S0_CPU

PP3V3_S0

DC_TEST_BH3_BJ2

DC_TEST_B65_C64

PPVCCSA_S0_REG

TP_DC_TEST_A4

TP_DC_TEST_A62

TP_DC_TEST_BF1

TP_DC_TEST_BJ62

TP_DC_TEST_D1

TP_DC_TEST_D65

DC_TEST_BJ64_BH63

DC_TEST_BG64_BH65

DC_TEST_B63_A64

TP_DC_TEST_BJ4

DC_TEST_B3_C2

PP1V5_S3_CPU_VCCDQ

PP1V05_S0



PPVCCSA_S0_REG

CPU_VIDALERT_L

CPU_VIDSCLK

CPU_VIDSOUT

PPVCORE_S0_CPU

PPVCORE_S0_AXG

13 OF 132

12 OF 101

7 12 13 15 48 68

6 7 12 14 48 68 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6

6 7 12 14 48 68 101

6 7 12 14 48 68 101

6 7 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48

49 50 51 53 56 60 61 71 72 79

82 83 84 87 88 89 98

6

7 12 15 64

6

6

7 15

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

7 10 14

7 14

7 12 15 64

6 7 12 14 48 68 101

7 12 13 15 48 68

VDDQ_0

VDDQ_1

VDDQ_2

VDDQ_3

VDDQ_4

VDDQ_9

VDDQ_8

VDDQ_7

VDDQ_5

VDDQ_6

VDDQ_10

VDDQ_11

VDDQ_12

VDDQ_13

VDDQ_14

VDDQ_19

VDDQ_18

VDDQ_17

VDDQ_15

VDDQ_16

VDDQ_20

VDDQ_21

VDDQ_22

VDDQ_23

VDDQ_24

VDDQ_25

VDDQ_29

VDDQ_28

VDDQ_27

VDDQ_26

VDDQ_30

VDDQ_31

VDDQ_32

VDDQ_33

VDDQ_34

VDDQ_35

VDDQ_39

VDDQ_38

VDDQ_36

VDDQ_37

VDDQ_40

VDDQ_41

VDDQ_42

VDDQ_43

VDDQ_44

VDDQ_45

VDDQ_50

VDDQ_49

VDDQ_48

VDDQ_47

VDDQ_46

VDDQ_51

VDDQ_52

VDDQ_53

VDDQ_54

VDDQ_55

VDDQ_60

VDDQ_59

VDDQ_58

VDDQ_56

VDDQ_57

VDDQ_61

VDDQ_62

VDDQ_63

VDDQ_64

VDDQ_65

VDDQ_66

VDDQ_67

VDDQ_68

VAXG_4

VAXG_3

VAXG_2

VAXG_1

VAXG_0

VAXG_9

VAXG_8

VAXG_7

VAXG_6

VAXG_5

VAXG_14

VAXG_13

VAXG_12

VAXG_11

VAXG_10

VAXG_16

VAXG_15

VAXG_17

VAXG_18

VAXG_19

VAXG_20

VAXG_21

VAXG_22

VAXG_23

VAXG_24

VAXG_25

VAXG_26

VAXG_27

VAXG_28

VAXG_29

VAXG_30

VAXG_31

VAXG_32

VAXG_33

VAXG_34

VAXG_35

VAXG_36

VAXG_37

VAXG_38

VAXG_39

VAXG_40

VAXG_41

VAXG_42

VAXG_43

VAXG_44

VAXG_45

VAXG_46

VAXG_47

VAXG_48

VAXG_49

VAXG_50

VAXG_51

VAXG_52

VAXG_53

VAXG_54

VAXG_55

VAXG_56

VAXG_57

VAXG_58

VAXG_59

VAXG_60

VAXG_61

VAXG_62

VAXG_63

IO POWER DDR3

GRAPHIC CORE POWER

(8 OF 11)

(10 OF 11)

VSS_85

VSS_84

VSS_83

VSS_82

VSS_81

VSS_80

VSS_79

VSS_78

VSS_77

VSS_76

VSS_75

VSS_74

VSS_73

VSS_72

VSS_71

VSS_70

VSS_69

VSS_68

VSS_67

VSS_66

VSS_65

VSS_64

VSS_63

VSS_62

VSS_61

VSS_60

VSS_59

VSS_58

VSS_57

VSS_56

VSS_55

VSS_54

VSS_53

VSS_52

VSS_51

VSS_50

VSS_49

VSS_48

VSS_47

VSS_46

VSS_45

VSS_44

VSS_43

VSS_42

VSS_41

VSS_40

VSS_39

VSS_38

VSS_37

VSS_36

VSS_35

VSS_34

VSS_33

VSS_32

VSS_31

VSS_30

VSS_29

VSS_28

VSS_27

VSS_26

VSS_25

VSS_24

VSS_23

VSS_22

VSS_21

VSS_20

VSS_19

VSS_18

VSS_17

VSS_15

VSS_16

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_0

VSS_1

VSS_2

VSS_3

VSS_4

VSS_171

VSS_170

VSS_169

VSS_168

VSS_167

VSS_164

VSS_163

VSS_165

VSS_166

VSS_162

VSS_161

VSS_160

VSS_159

VSS_158

VSS_157

VSS_153

VSS_152

VSS_154

VSS_155

VSS_156

VSS_151

VSS_150

VSS_149

VSS_148

VSS_147

VSS_143

VSS_142

VSS_144

VSS_145

VSS_146

VSS_141

VSS_140

VSS_139

VSS_138

VSS_137

VSS_132

VSS_133

VSS_134

VSS_135

VSS_136

VSS_131

VSS_130

VSS_129

VSS_128

VSS_127

VSS_126

VSS_123

VSS_122

VSS_124

VSS_125

VSS_121

VSS_120

VSS_119

VSS_118

VSS_117

VSS_116

VSS_112

VSS_113

VSS_114

VSS_115

VSS_111

VSS_110

VSS_109

VSS_108

VSS_107

VSS_106

VSS_102

VSS_101

VSS_103

VSS_104

VSS_105

VSS_100

VSS_99

VSS_98

VSS_97

VSS_96

VSS_92

VSS_91

VSS_93

VSS_94

VSS_95

VSS_90

VSS_89

VSS_88

VSS_87

VSS_86

(11 Of 11)

VSS_257

VSS_256

VSS_255

VSS_254

VSS_253

VSS_252

VSS_251

VSS_250

VSS_249

VSS_248

VSS_247

VSS_246

VSS_245

VSS_244

VSS_243

VSS_242

VSS_241

VSS_240

VSS_239

VSS_238

VSS_237

VSS_236

VSS_235

VSS_234

VSS_233

VSS_232

VSS_231

VSS_230

VSS_229

VSS_228

VSS_227

VSS_226

VSS_225

VSS_224

VSS_223

VSS_222

VSS_221

VSS_220

VSS_219

VSS_218

VSS_217

VSS_216

VSS_215

VSS_214

VSS_213

VSS_212

VSS_211

VSS_210

VSS_209

VSS_208

VSS_207

VSS_206

VSS_205

VSS_204

VSS_203

VSS_202

VSS_201

VSS_200

VSS_199

VSS_198

VSS_197

VSS_196

VSS_195

VSS_194

VSS_193

VSS_192

VSS_191

VSS_190

VSS_189

VSS_187

VSS_188

VSS_182

VSS_183

VSS_184

VSS_185

VSS_186

VSS_177

VSS_178

VSS_179

VSS_180

VSS_181

VSS_172

VSS_173

VSS_174

VSS_175

VSS_176

VSS_342

VSS_341

VSS_340

VSS_339

VSS_336

VSS_335

VSS_337

VSS_338

VSS_334

VSS_333

VSS_332

VSS_331

VSS_330

VSS_329

VSS_325

VSS_324

VSS_326

VSS_327

VSS_328

VSS_323

VSS_322

VSS_321

VSS_320

VSS_319

VSS_315

VSS_314

VSS_316

VSS_317

VSS_318

VSS_313

VSS_312

VSS_311

VSS_310

VSS_309

VSS_304

VSS_305

VSS_306

VSS_307

VSS_308

VSS_303

VSS_302

VSS_301

VSS_300

VSS_299

VSS_298

VSS_295

VSS_294

VSS_296

VSS_297

VSS_293

VSS_292

VSS_291

VSS_290

VSS_289

VSS_288

VSS_284

VSS_285

VSS_286

VSS_287

VSS_283

VSS_282

VSS_281

VSS_280

VSS_279

VSS_278

VSS_274

VSS_273

VSS_275

VSS_276

VSS_277

VSS_272

VSS_271

VSS_270

VSS_269

VSS_268

VSS_264

VSS_263

VSS_265

VSS_266

VSS_267

VSS_262

VSS_261

VSS_260

VSS_259

VSS_258

VSS_343

IO POWER(7 OF 11)

VCCIO_33

VCCIO_34

VCCIO_35

VCCIO_36

VCCIO_37

VCCIO_42

VCCIO_41

VCCIO_40

VCCIO_38

VCCIO_39

VCCIO_43

VCCIO_44

VCCIO_45

VCCIO_46

VCCIO_47

VCCIO_52

VCCIO_51

VCCIO_50

VCCIO_48

VCCIO_49

VCCIO_53

VCCIO_54

VCCIO_55

VCCIO_56

VCCIO_57

VCCIO_58

VCCIO_62

VCCIO_61

VCCIO_60

VCCIO_59

VCCIO_63

VCCIO_64

VCCIO_65

VCCIO_4

VCCIO_3

VCCIO_2

VCCIO_1

VCCIO_0

VCCIO_9

VCCIO_8

VCCIO_7

VCCIO_6

VCCIO_5

VCCIO_16

VCCIO_15

VCCIO_14

VCCIO_13

VCCIO_12

VCCIO_11

VCCIO_10

VCCIO_17

VCCIO_18

VCCIO_19

VCCIO_20

VCCIO_21

VCCIO_22

VCCIO_23

VCCIO_24

VCCIO_25

VCCIO_26

VCCIO_27

VCCIO_28

VCCIO_29

VCCIO_30

VCCIO_31

VCCIO_32




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1


BGA

OMIT

U1000AH65

AH63

AE64

AE62

AE60

AD65

AD63

AD61

AD58

AD56

AB65

AB63

AH61

AB61

AB58

AB56

AA64

AA62

AA60

Y58

Y56

W64

W62

AH58

W60

V65

V63

V61

V58

V56

T65

T63

T61

T58

AH56

T56

R64

R62

R60

R55

R53

R48

N64

N62

N60

AG64

N58

N56

N52

N49

M65

M63

M61

M59

M55

M53

AG62

M48

L56

L52

L48

AG60

AF58

AF56

BJ36

BJ28

AY47

AY43

AY39

AY35

AY31

AY27

AY23

AV46

AV42

AV40

BG40

AV36

AV34

AV29

AV27

AU45

AU43

AU39

AU37

AU33

AU30

BG32

AU26

AU24

AT46

AT42

AT40

AT36

AT34

AT29

AT27

AR45

BD47

AR43

AR39

AR37

AR33

AR30

AR26

AR24

AP46

AP42

AP40

BD43

AP36

AP34

AP29

AP27

AN45

AN43

AN39

AN37

AN33

AN30

BD39

AN26

AN24

AL46

AL42

AL40

AL36

AL34

AL29

AL27

BD31

BD23

BB35

BGA

SANDY-BRIDGE

MOBILE-REV1

OMIT

U1000BJ56

BJ52

BG60

AU47

AU41

AU35

AU28

AU22

AU16

AU14

AT61

AT57

AT50

BG56

AT44

AT38

AT31

AT25

AT19

AT11

AT7

AT3

AT1

AR54

BG52

AR47

AR41

AR35

AR28

AR22

AP65

AP63

AP57

AP50

AP44

BG48

AP38

AP31

AP25

AP19

AP17

AP15

AP12

AP11

AP9

AP5

BG44

AN54

AN47

AN41

AN35

AN28

AN22

AM61

AM7

AM3

AM1

BG36

AL57

AL50

AL44

AL38

AL31

AL25

AL19

AK16

AK14

AK11

BG28

AK9

AK5

AJ64

AJ62

AJ60

AJ57

AH7

AH3

AH1

AG57

BG24

AG17

AG15

BG20

BG16

BJ48

BG12

BG8

BF5

BE62

BE58

BE54

BE50

BE46

BE42

BE38

BJ40

BE34

BE30

BE26

BE22

BE18

BE14

BE10

BD35

BD7

BD3

BJ32

BC60

BC56

BC52

BC48

BC44

BC40

BC36

BC32

BC28

BC26

BJ24

BC24

BC20

BC16

BC12

BB65

BB63

BB47

BB39

BB9

BB5

BJ20

BA58

BA54

BA50

BA46

BA42

BA38

BA34

BA30

BA26

BA22

BJ16

BA18

BA14

AY61

AY11

AY7

AY3

AY1

AW56

AW52

AW48

BJ12

AW44

AW40

AW36

AW32

AW28

AW24

AW16

AV65

AV63

AV59

BJ8

AV57

AV50

AV44

AV38

AV31

AV25

AV19

AV9

AV5

AU54

SANDY-BRIDGE

BGA

MOBILE-REV1

OMIT

U1000AG12

AF65

AF63

AF61

AF11

AF9

AF5

AE57

AD16

AD14

AD7

AD3

AD1

AC64

AC62

AC60

AC57

AB11

AB9

AB5

AA57

AA17

AA15

AA12

Y65

Y63

Y61

Y7

Y3

Y1

W57

V16

V14

V11

V9

V5

U64

U62

U60

U57

T7

T3

T1

R57

R50

R44

R38

R31

R25

R19

R17

R15

R12

P65

P63

P61

P11

P9

P5

N54

N47

N41

N35

N28

N22

M57

M50

M44

M38

M31

M25

M19

M7

M3

M1

L64

L62

L60

L58

L54

L50

L46

L42

L36

L30

L24

L20

L16

L12

L8

K39

K33

K27

K1

J64

J60

J56

J52

J48

J46

J42

J36

J30

J24

J22

J18

J14

J10

J6

H39

H33

H27

H3

G62

G58

G54

G50

G46

G42

G36

G30

G24

G20

G16

G12

G8

F39

F33

F27

E60

E56

E52

E48

E46

E42

E36

E30

E24

E22

E18

E14

E10

E6

E4

D63

D39

D33

D27

C58

C54

C50

C46

C42

C36

C30

C20

C16

C12

C8

B39

B33

B27

A56

A52

A42

A36

A30

A24

A20

A16

A12A8

BGA


OMIT

U1000AV55

AV53

AU20

AU18

AT55

AT53

AT48

AT17

AT15

AT12

AR58

AR56

AV48

AR52

AR49

AR20

AR18

AR16

AR14

AP55

AP53

AP48

AN58

AV17

AN56

AN52

AN49

AN20

AN18

AN16

AN14

AM11

AL55

AL53

AV15

AL48

AL17

AL15

AL12

AK58

AK56

AJ17

AJ15

AJ12

AH16

AV12

AH14

AH11

AF16

AF14

AE17

AE15

AE12

AD11

AC17

AC15

AU58

AC12

AB16

AB14

Y16

Y14

Y11

AU56

AU52

AU49

CPU POWER AND GND

PP1V05_S0PP1V05_S0

PP1V5_S3RS0_CPUDDRPPVCORE_S0_AXG

14 OF 132

13 OF 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44

67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69

72 101

7 10 15 29 71 72 7 12 15 48 68




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

PLACEMENT_NOTE (C1620-C1623):

PLACEMENT_NOTE (C1624-C16D5):


Intel recommendation: 2x 330uF, 10x 10uF 0603, 26x 1uF 0402

Intel recommendation: 1x 10mOhn resistor, 1x 1uF 0402

CPU VCCIO/VCCPQ DECOUPLING

PLACEMENT_NOTE (C1600-C16C7):



Apple Implementation: 2x 330uF, 10x 10uF 0603, 26x 1uF 0402

CPU VCCPLL Low pass filter

Intel recommendation: 4x 470uF 4mOhm, 2x 470uF 4mOhm (NOSTUFF), 16x 22uF 0805, 4x 10uF 0603, 20x 1uF 0402, 28x 1uF 0402 (NOSTUFF)Apple Implementation: 4x 470uF 4mOhm, 1x 470uF 4mOhm (NOSTUFF), 16x 22uF 0603, 4x 10uF 0402, 20x 1uF 0402, 28x 1uF 0201 (NOSTUFF), 4x 22uF 0603 (NOSTUFF)

CPU VCORE DECOUPLING

CPU VCCPLL DECOUPLING

2

1 C16121UF10%

X5R10V

4022

1 C1611

10V

1UF

402X5R

10%2

1 C161010%1UF

402

10VX5R

C16A4

0201

NOSTUFF

2

1

X5R

1UF6.3V20%

C16A3

2

1

1UF

X5R6.3V

0201

20%

NOSTUFF

2

1 C16091UF10%10VX5R402

2

1 C16A2

6.3V

1UF

X5R0201

NOSTUFF

20%

2

1 C16081UF

402X5R10V10%

2

1 C160710%

402

1UF10VX5R

02012

1 C16A1

X5R

NOSTUFF

6.3V20%1UF

NOSTUFF

2

1 C16A01UF

X5R

20%

0201

6.3V

0603X5R-CERM1

Place near inductors on bottom side.

CRITICAL

2

1 C1631

6.3V20%22UF

X5R2

1 C160610%10V

1UF

4022

1 C16191UF10%10VX5R402

2

1 C16051UF10%10V

402X5R 2

1 C16181UF

X5R10V10%

4024022

1 C16041UF10%

X5R10V 2

1 C16171UF10%10VX5R402

10V2

Place on bottom side of U1000

C16031UF

1

10%

X5R402

10V2

1 C1602


402X5R

10%1UF

2

1 C16161UF10%10VX5R402

2

1 C16151UF10%10VX5R402

X5R402

1UF1

2

C1601

10V

Place on bottom side of U100.

10%2

1 C16141UF

402X5R10V10%

2

1 C1600

402

10VX5R

10%


1UF

2

1 C16131UF10%10VX5R402

0603X5R-CERM1

CRITICAL

2

1 C163022UF20%


6.3V

0603X5R-CERM1

C1629CRITICAL

2

1

22UF


20%6.3V


CRITICAL

3 2

1 C1643

2.0V

D2T-SMPOLY-TANT

20%470UF-4MOHM

0603X5R-CERM1

C1627CRITICAL

2

1

22UF


20%6.3V

0603X5R-CERM12

CRITICAL

C16261

20%


22UF6.3V

3 2

1

470UF-4MOHM

POLY-TANTD2T-SM

20%2.0V


C1642CRITICALCRITICAL

C1641

3 2

1

470UF-4MOHM

POLY-TANT

20%2.0V


D2T-SM

CRITICAL

3 2

1 C1640

POLY-TANT

470UF-4MOHM2.0V20%

D2T-SM


2

1 C16A6

6.3V

NOSTUFF

1UF

X5R

20%

0201

6.3V2

1 C16A5NOSTUFF

X5R

1UF

0201

20%

Place near U1000 on bottom side

CRITICAL

CERM-X5R6.3V

10UFC1620

2

1

0402-1

20%

C162110UF

0402-1CERM-X5R6.3V20%

CRITICAL

2

1


20%10UF

CRITICAL

2

1 C1622

0402-1CERM-X5R


6.3V 2 6.3V

CRITICAL1 C1623

0402-1

10UF

CERM-X5R

20%


0603X5R-CERM1

20%6.3V


22UFC16251

2

CRITICAL

0603X5R-CERM1

CRITICAL

C1624

2

1

22UF20%


6.3V

0603X5R-CERM1

C1628CRITICAL

2

1

6.3V


20%22UF

0603X5R-CERM1

CRITICAL

2

1 C163222UF20%6.3V


0603X5R-CERM1

CRITICAL

2

1 C163322UF6.3V20%


0603X5R-CERM16.3V20%22UF


C16391

2

CRITICAL

0603X5R-CERM1


22UF6.3V20%

C16381

2

CRITICAL

0603X5R-CERM1


6.3V20%22UFC16371

2

CRITICAL

0603X5R-CERM1

22UFC1636CRITICAL

2

1

20%6.3V


0603X5R-CERM1


22UF

2 6.3V

CRITICAL1 C1635

20%

0603X5R-CERM12

1

22UF6.3V


20%

CRITICAL

C1634

C1644470UF-4MOHM

3 2

1NOSTUFF

D2T-SMPOLY-TANT


20%2.0V

2

1 C16861UF10%10VX5R

PLACE_NEAR=U1000.AK65:2.54 mm:NO_VIA

402

1

5%1/16WMF-LF402

2

R16000

2

1 C1685

PLACE_NEAR=U1000.AK63:2.54 mm:NO_VIA 402X5R10V

1UF10%

2

1 C16841UF

402X5R10V10%

10%2

1 C1658

10V

1UF

X5R402

2

1 C1657

402X5R10V10%1UF

2

1 C16561UF

402X5R

10%10V2

1 C16551UF10%10VX5R402

2

1 C165410%1UF

X5R10V

4022

1 C1653

402

10%10VX5R

1UF

2

1 C1652

10V10%1UF

X5R402402

2

1 C16511UF10%10VX5R

10V2

1 C16501UF

402X5R

10%1UF

2

1 C1649

402

10V


10%

X5R

C1648

2

1


1UF10%

X5R10V

402

C1647

2

1

1UF10V


402X5R

10%

C1646

2

1

402

10VX5R

10%


1UF

C1664

2

1

1UF10%10VX5R402

C1663

2

1

1UF

X5R10V10%

4022

1 C16621UF10VX5R402

10%2

1 C166110%10VX5R

1UF

4022

1 C16601UF10%10VX5R402

2

1 C16591UF

402X5R10V10%

10VX5R2

1 C16711UF

402

10%2

1 C1670

X5R10V10%

402

1UFC1669

2

1

1UF10%10VX5R402

C1668

2

1

1UF10%10VX5R402

10V

C1667

2

1

1UF10%

402X5R2

1 C16661UF

X5R10V10%

402

C1665

2

1

1UF10%10VX5R402

CRITICAL

2

1 C1675

603X5R

20%6.3V

10UF


CRITICAL

2

1 C1674

603X5R

20%10UF6.3V


CRITICAL

2

1 C1673

603X5R

10UF


20%6.3V

CRITICAL

2

1 C1672

603X5R

20%


10UF6.3V

603

CRITICAL

2

1 C1679

X5R


6.3V20%10UF

CRITICAL

2

1 C1678

603X5R


6.3V20%10UF

CRITICAL

2

1 C1677

603X5R


20%10UF6.3V

CRITICAL

2

1 C1676

603X5R

10UF


20%6.3V

CRITICALC168110UF

2

1

603X5R


6.3V20%

2

CRITICAL1 C1680

603X5R


10UF20%6.3V

CRITICAL

C1682330UF-0.006OHM

2

1

Place near inductors on bottom side

CASE-D2-SMPOLY2V20%

21

R16010.010

1%1/4WMF0603

NOSTUFF

2

1 C16A7

0201

6.3V20%

X5R

1UFC16A8

2

1

6.3V

0201

20%

X5R

1UF

NOSTUFF

2

1 C16A9

0201

6.3V20%

X5R

1UF

NOSTUFF

2

1 C16B0

0201

6.3V20%

X5R

1UF

NOSTUFF

2

1 C16B1

6.3V

0201

20%

X5R

1UF

NOSTUFF

2

1 C16B2

6.3V

0201

20%

X5R

1UF

NOSTUFF

2

1 C16B3

6.3V

0201

20%

X5R

1UF

NOSTUFF

2

1 C16B4

6.3V

0201

20%

X5R

1UF

NOSTUFF

2

1 C16B5

6.3V20%1UF

0201X5R

NOSTUFF

2

1 C16B6

6.3V

0201

20%

X5R

1UF

NOSTUFF

2

1 C16B7

6.3V

0201

20%

X5R

1UF

NOSTUFF

2

1 C16B8

6.3V

0201

20%

X5R

1UF

NOSTUFF

2

1 C16B9

6.3V

0201

20%

X5R

1UF

NOSTUFF

1 C16C01UF20%

X5R0201

NOSTUFF

2 6.3V20%1UF

02012

1 C16C7

X5R6.3V

NOSTUFF

6.3V

C16C6NOSTUFF

1UF

0201

1

20%2 X5R

0201

1NOSTUFF

1UF6.3V20%

X5R

C16C5

20201X5R2

1NOSTUFF

6.3V20%1UFC16C4

2

1

X5R6.3V

0201

20%1UFC16C3NOSTUFF

20%2

1 C16C1

6.3V

0201X5R

1UF

NOSTUFF NOSTUFF

2

1 C16C2

6.3V

0201

20%

X5R

1UF

0603X5R-CERM1


6.3V20%22UF

NOSTUFF

C16D31

20603X5R-CERM1

NOSTUFF

6.3V

22UF20%


C16D21

20603X5R-CERM16.3V

NOSTUFF

20%22UF


C16D11

20603X5R-CERM1

NOSTUFF

22UF6.3V20%


C16D01

2

2

CRITICAL1 C1683330UF-0.006OHM

2V20%

POLY


CASE-D2-SM

CRITICAL

2

1 C1687

CASE-D2-SMPLACE_NEAR=U1000.AK61:5 mm

POLY

20%2V

330UF-0.006OHM

0603X5R-CERM1


6.3V20%22UF

NOSTUFF

C16D41

20603X5R-CERM1

NOSTUFF

22UF20%6.3V


C16D51

2

CPU DECOUPLING-ISYNC_MASTER=K92_MLB SYNC_DATE=08/19/2010

PP1V05_S0



PP1V8_S0

PPVCORE_S0_CPU

16 OF 132

14 OF 101

6 7 9 10 12 13 16 17 20

22 23 35 39

44 67 69 72

101

7 12

7 10 12

6 7 17 20 22 25 70 71 87

6 7 12 48 68 101




36

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REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1



Apple Implementation: 1x 330uF, 8x 10uF 0603, 10x 1uF 0402

CPU VDDQ/VCCDQ DECOUPLING

Intel recommendation: 1x 10mOhn resistor, 1x 1uF 0402

Apple Implementation: 2x 470uF 4mOhm, 1x 470uF 4mOhm (NOSTUFF), 6x 22uF 0603, 2x 22uF 0603 (NOSTUFF), 6x 10uF 0402, 2x 10uF 0402 (NOSTUFF), 9x 1uF 0402, 9x 1uF 0402 (NOSTUFF)






VAXG DECOUPLINGIntel recommendation: 2x 470uF 4mOhm, 2x 470uF 4mOhm (NOSTUFF), 6x 22uF 0805, 2x 22uF 0805 (NOSTUFF), 6x 10uF 0603, 2x 10uF 0603 (NOSTUFF), 9x 1uF 0402, 9x 1uF 0402 (NOSTUFF)

CPU VCCSA DECOUPLINGApple Implementation: 1x 330uF, 5x 10uF 0603, 5x 1uF 0402


1UF10%

X5R402

10V

NOSTUFF

C17171

2

1UF

X5R10V10%

NOSTUFF

402

C17161

2

1UF

402X5R10V10%

NOSTUFF

C17151

2

1UF10%10VX5R402

NOSTUFF

C17141

2

1UF10%10VX5R402

NOSTUFF

C17131

2X5R

10%

402

NOSTUFF

1UF10V

C17121

2X5R

NOSTUFF

402

10V10%1UFC17111

210V

NOSTUFF

1UF

402X5R

10%

C17101

210V

402X5R

10%1UF

NOSTUFF

C17091

2X5R10V10%

402

1UFC17081

2

1UF10%10V

402X5R

C17071

2402

10V10%1UF

X5R

C17061

2

0402-1

20%

NOSTUFF

10UF6.3VCERM-X5R

C17251

2

Place close to U1000 on bottom side

0402-1

NOSTUFF

10UF20%6.3VCERM-X5R


C17241

2

0603X5R-CERM1


6.3V20%

NOSTUFF

22UFC17331

20603X5R-CERM1

NOSTUFF


6.3V20%22UFC17321

2

1UF

402

10%10VX5R

C17051

2

10UF6.3V20%


C17231

20402-1CERM-X5R

1UF

402

10%

X5R10V

C17041

2

0402-1

20%6.3VCERM-X5R

10UF


2

C17221

402

10V

1UF10%

X5R


C17031

2

0402-1CERM-X5R

20%10UF


6.3V

C17211

2

0603X5R-CERM1


20%6.3V

22UFC17311

20603X5R-CERM1

22UF20%6.3V


C17301

20603X5R-CERM16.3V


20%22UFC17291

2


470UF-4MOHM

NOSTUFF

POLY-TANTD2T-SM

20%2.0V

1

23

C1737

1UF

X5R402

10V10%


C17021

210V

402


X5R

10%1UFC17011

2

0402-1

10UF20%


6.3VCERM-X5R

C17201

20402-1

6.3V20%


CERM-X5R

10UFC17191

2

1UF

402

10V10%


X5R

C17001

2

20%

CERM-X5R0402-1

10UF6.3V


C17181

2

0603X5R-CERM16.3V

22UF20%


C17281

20603X5R-CERM1

22UF20%


6.3V

C17271

2

2.0V

470UF-4MOHM


20%

D2T-SMPOLY-TANT

C17351

23

0603X5R-CERM1

22UF


6.3V20%

C17261

2

470UF-4MOHM2.0VPOLY-TANT


20%

D2T-SM

C17341

23

402

10V

1UF10%

X5R

C17571

2

1UF10%

402

10VX5R

C17471

2X5R402

1UF10V10%

C17461

2

1UF10%10VX5R402

C17451

2402

10V10%1UF

X5R

C17441

2

1UF10%10V

402X5R

C17431

2

1UF10%

X5R10V

402

C17421

2


402

1UF10V10%

X5R

C17411

2

1UF10V10%


402X5R

C17401

2

1UF10V


X5R

10%

402

C17391

2

1UF

402X5R

10%


10V

C17381

2

603


X5R6.3V

10UF20%

C17551

2603X5R


6.3V20%10UFC17541

2603X5R6.3V


20%10UFC17531

2603X5R


20%6.3V

10UFC17521

2603X5R

10UF


20%6.3V

C17511

2603X5R


20%6.3V

10UFC17501

2603X5R6.3V20%


10UFC17491

2603X5R

10UF


20%6.3V

C17481

2

1UF

402

10%

X5R10V

C17621

2

1UF10V

402

10%

X5R


C17611

2

603X5R

20%10UF6.3V

C17671

2603X5R

10UF6.3V20%

C17661

2


402

10V10%1UF

X5R

C17601

2


1UF10V10%

X5R402

C17591

2

603X5R6.3V

10UF20%

C17651

2603X5R

10UF20%6.3V

C17641

2

402

10V10%1UF


X5R

C17581

2

X5R

10UF20%6.3V

603

C17631

2

0.010

1%1/4WMF

0603

R17001 2

270UF

CASE-B4-SM

2VTANT

20%

C17681

2


CASE-D2-SM

330UF-0.006OHM

2V20%

POLY

C17561

2


CPU DECOUPLING-II

SYNC_MASTER=K92_MLB

PPVCCSA_S0_REGPP1V5_S3RS0_CPUDDR

PP1V5_S3_CPU_VCCDQ

PPVCORE_S0_AXG

17 OF 132

15 OF 101

7 12 64 7 10 13 29 71 72

7 12

7 12 13 48 68

IN

IN

OUT

OUT

OUT

IN

BI

BI

BI

BI

OUT

BI

IN

IN

OUT

OUT

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

OUT

BI

OUT

BI

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

OUT

SATA1RXN

SATA0TXP

SATA0TXN

SATA2RXN

SATA2RXP

SATA5RXP

SATA0RXP

LDRQ0*

RTCRST*

SRTCRST*

INTRUDER*

INTVRMEN

HDA_BCLK

HDA_SYNC

HDA_RST*

SPKR

HDA_SDIN0

HDA_SDIN1

HDA_SDIN3

HDA_SDIN2

HDA_SDO

HDA_DOCK_EN*/GPIO33

HDA_DOCK_RST*/GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

SPI_CS0*

SPI_CLK

SPI_CS1*

SPI_MOSI

SPI_MISO

FWH0/LAD0RTCX1

RTCX2

SATA1TXP

SATA0RXN

SERIRQ

LDRQ1*/GPIO23

FWH1/LAD1

FWH2/LAD2

FWH3/LAD3

FWH4/LFRAME*

SATA1RXP

SATA1TXN

SATA2TXN

SATA2TXP

SATA3RXN

SATA3RXP

SATA3TXN

SATA3TXP

SATA4RXN

SATA4RXP

SATA4TXN

SATA4TXP

SATA5RXN

SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED*

SATA0GP/GPIO21

SATA1GP/GPIO19

SATA3COMPI

SATA3RCOMP0

SATA3RBIAS

JTAG

SPI

SATA

LPC

IHDA

RTC

(1 OF 10)

(2 OF 10)

PCI-E*

PEG

FROM CLK BUFFER

CLOCK

FLEX

SMBUS

PEG_B_CLKRQ*/GPIO56

PEG_A_CLKRQ*/GPIO47

PCIECLKRQ4*/GPIO26

PCIECLKRQ3*/GPIO25

PCIECLKRQ1*/GPIO18

PCIECLKRQ0*/GPIO73

PERN3

PETP2

PETN2

PERP1

CL_RST1*

CL_DATA1

CL_CLK1

CLKIN_GND1_P

CLKIN_GND1_N

CLKOUT_ITPXDP_P

CLKOUT_ITPXDP_N

CLKOUTFLEX3/GPIO67

CLKOUTFLEX2/GPIO66

CLKOUTFLEX1/GPIO65

CLKOUTFLEX0/GPIO64

XCLK_RCOMP

XTAL25_OUT

XTAL25_IN

CLKIN_PCILOOPBACK

REFCLK14IN

CLKIN_SATA_N

CLKIN_SATA_P

CLKIN_DOT_96P

CLKIN_DOT_96N

CLKIN_DMI_P

CLKIN_DMI_N

CLKOUT_DP_N

CLKOUT_DP_P

CLKOUT_DMI_P

CLKOUT_DMI_N

CLKOUT_PEG_A_P

CLKOUT_PEG_A_N

CLKOUT_PEG_B_N

CLKOUT_PEG_B_P

CLKOUT_PCIE5P

PCIECLKRQ5*/GPIO44

CLKOUT_PCIE4P

CLKOUT_PCIE5N

CLKOUT_PCIE3P

CLKOUT_PCIE4N

CLKOUT_PCIE3N

PCIECLKRQ2*/GPIO20

CLKOUT_PCIE2P

CLKOUT_PCIE2N

CLKOUT_PCIE1N

CLKOUT_PCIE1P

CLKOUT_PCIE0N

CLKOUT_PCIE0P

PETN1

PERN1

SMBCLK

SMBALERT*/GPIO11

PETP8

PERP8

PETN8

PETP7

PERN8

PETN7

PERP7

PERN7

PETN6

PETP6

PERP6

PERN6

PETP5

PETN5

PERP5

PETP4

PERN5

PETN4

PERP4

PETP3

PERN4

PETN3

PERP3

PERN2

PERP2

PETP1

SML1DATA/GPIO75

SML1CLK/GPIO58

SML1ALERT*/PCHHOT*/GPIO74

SML0DATA

SML0ALERT*/GPIO60

SML0CLK

SMBDATA

IN

IN

IN

IN

OUT

OUT

IN

IN

IN

IN

IN

OUT

OUT

OUT

NC

NC

OUT

OUT

IN

OUT

IN

OUT

IN

IN

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

(IPU)

UNUSED clock terminations for FCIM MODE

376S0859 VGS 0.35~1V

Q1850 376S0859

R1849 cannot be used w/ VCCSUSHDA on S0

(IPU)

DOES THIS NEED LENGTH MATCH???

1.8V -> 1.1V

25

56 93

46 93

46 93

46 93

46 93

6 44 46 87 93

6 44 46 87 93

6 44 46 87 93

6 44 46 87 93

6 44 46 87 93

6 44 46

41 92

41 92

41 92

41 92

36 93

36 93

6 31 93

6 31 93

38 93

38 93

36 93

36 93

31 93

31 93

38 93

38 93

36 93

31 93

31 93

38 93

38 93

16 23 39

10 90

10 90

73 93

73 93

8

8

16 93

16 93

16 93

16 93

16 93

16 93

16 93

25 93

47 93

47 93

23 26 28 30 41 47 61 88 93

23 26 28 30 41 47 61 88 93

8

8

8

8

2

1R1800

201MF

330K5%

1/20W

1M

MF201

1/20W5%

R18011

2

2

1R1802

1/20WMF

20K5%

2012

1R180320K5%

201

1/20WMF

2

1 C1803

10%1UF

X5R402

10V2

1

1UF10%

X5R10V

402

C1802

2

1R1830PLACE_NEAR=U1800.Y11:2.54mm

201

1/20WMF

37.41%

2

1R1820

201MF1/20W5%10K 2

1R1890

201

MF 1%90.9

1/20W

PLACE_NEAR=U1800.Y47:2.54mm

201

1/20W

33

MF

5%

PLACE_NEAR=U1800.N34:1.27mm

R18101 2

21

R1811

201

1/20W

33

5%

PLACE_NEAR=U1800.L34:1.27mm

MFPLACE_NEAR=U1800.K34:1.27mm

21

R1812

201MF

33

5%1/20W

21

R1813PLACE_NEAR=U1800.A36:1.27mm

201

1/20WMF

5%

33

56 93

56 93

56 93

56 93

47 93

47 93

16 33

21R1860 332011/20W MF5%

21R18611/20W MF

335% 201

21R1862201MF

331/20W5%

21201

33MF1/20W

R18635%

21R1864201MF

331/20W5%

2

1R1832

201

1/20W5%

750

MF

PLACE_NEAR=U1800.AH1:2.54mm

201MF

1/20W

49.91%

R18311

2PLACE_NEAR=U1800.AB12:2.54mm

2

1R1870

MF1/20W

5%10K

201 2

1R187110K

1/20W

201MF

5%

V5

N34

K36

E36

D36

C37

B37

A38

T10

V4

U3

T1

T3

P3

Y11

Y10

AB1

AB3

Y1

Y3

AD1

AD3

Y5

Y7

AF1

AF3

AB10

AB8

AH1

AB13

AH4

AH5

AD5

AD7

AP10

AP11

AM8

AM10

P1

AP5

AM1

AM3

V14

C20

A20

H7

H1

K5

J3

L34

A36

A34

C34

G34

E34

K34

N32

C36

C38

Y14

D20

AB12

C17

G22

U1800

AP7

OMIT

FCBGAMOBILE

COUGAR-POINT

K22

V49

V47

Y47

M16

E14

C13

G12

C8

A12

C9

H14

E12

K45

AY38

BB40

AV36

BB36

BB34

AU34

AY32

AU32

AW38

AY40

AU36

AY36

AY34

AV34

BB32

AV32

BC38

BJ40

BG38

BH37

BE36

BJ36

BF34

BJ34

BE38

BG40

BJ38

BG37

BF36

BG36

BE34

BG34

E6

M10

L14

L12

A8

V10

M1

J2K49

H47

F47

K43

AB40

AB42

AB38

AB37

V46

V45

Y45

Y43

Y36

Y37

AA47

AA48

AB47

AB49

Y39

Y40

AK13

AK14

AM13

AM12

AU22

AV22

AK5

AK7

H45

BG30

BJ30

E24

G24

BE18

BF18

P10

T11

M7

U1800

FCBGA

OMIT

MOBILECOUGAR-POINT

16 36

16 23 31

16

8 16 87

8 93

8 93

2

1R1877

5%1/20W

MF

4.7K

201

2

1R186610K

NOSTUFF

1/20W

201MF

5%

16 35

25

23

23

23

23

33 93

33 93

36 93

2

1R1878

201

5%1/20W

MF

4.7K

2

1R1855

5%

201MF

10K

1/20W

2

1R1854

5%10K

1/20WMF201 2

1R1853

5%

201MF1/20W

10K

2

1R1848

MF

10K5%

1/20W

201

1/20W

2

1

201

10K5%

MF

R18472

1R1833

5%10K

MF201

NOSTUFF

1/20W

10K

2

1R1834

5%

201MF

1/20W

2

1R1843

5%

201MF

1/20W

10K

2

1R1846

1/20WMF

5%10K

201 2012

1R1845

5%10K

MF1/20W

2

1R1844

MF

5%1/20W

10K

201

2

1R1842

5%

MF

10K

1/20W

201 2

1R1869

1/20W5%

MF

10K

201 2

1R187610K

5%

201

1/20WMF

MF

2

1R1849NOSTUFF

10K

201

1/20W5%2 1R1840

NOSTUFFMF5% 1/20W

0

201

2 1R1841NOSTUFF

MF1/20W5%

201

0

16 23 41

21

R1872

1%

MF-LF1/16W

604

402

2

1R1873

1/20W1%1K

201MF

25

1/20WMF

10K5%

201

R18971

210K5%

201

1/20WMF

R18961

2

10K1/20W5%

201MF

1

2

R189510K5%

201

1/20WMF

R18941

2

10K5%1/20WMF201

R18931

2

10K5%

MF201

1/20W

R18921

2

10K

201

5%

MF1/20W

R18911

2

16 23 84

2 1R1888201

0MF1/20W5%

NOSTUFF

19 44

19

41 92

41 92

41 92

41 92

PCH SATA/PCIE/CLK/LPC/SPISYNC_MASTER=K91_MLB SYNC_DATE=10/19/2010

PCH_SRTCRST_L

SATA_ODD_R2D_C_N

SATA_ODD_R2D_C_P

TP_SATA_C_D2RN

TP_SATA_C_R2D_CN

TP_SATA_C_D2RP

TP_SATA_C_R2D_CP

SATA_HDD_D2R_P

SATA_ODD_D2R_P

SATA_ODD_D2R_N

SATA_HDD_R2D_C_N

SATA_HDD_R2D_C_P

LPC_SERIRQ

SATA_HDD_D2R_N

NC_LPC_DREQ0_L

LPC_FRAME_R_L

PCIE_CLK100M_ENET_N

NC_PCIE_8_R2D_CP

PCH_GPIO11

PCIE_CLK100M_AP_N

PP3V3_S0

ITPXDP_CLK100M_P

NC_PCIE_8_R2D_CNNC_PCIE_8_D2RP

NC_PCIE_6_R2D_CP

NC_PCIE_8_D2RN

NC_PCIE_6_D2RPNC_PCIE_6_R2D_CN

NC_PCIE_7_D2RNNC_PCIE_7_D2RPNC_PCIE_7_R2D_CN

NC_PCIE_6_D2RN

NC_PCIE_5_D2RPNC_PCIE_5_D2RN

NC_PCIE_EXCARD_R2D_C_P

NC_PCIE_EXCARD_R2D_C_N

PCIE_ENET_R2D_C_P


PCIE_FW_R2D_C_P

PCIE_AP_R2D_C_N

PCIE_ENET_R2D_C_N

PCIE_AP_R2D_C_P

PCIE_AP_D2R_P


SYSCLK_CLK25M_SB_R

EXCARD_CLKREQ_L

PCIE_CLK100M_ENET_P

NC_PCH_CLKOUT_DPN

SML_PCH_0_DATA

SML_PCH_1_DATA

PCIE_AP_D2R_N

PCH_CLKIN_GNDN1

ITPXDP_CLK100M_P

NC_CLINK_DATA

NC_CLINK_RESET_L


ITPXDP_CLK100M_N

PCH_CLKIN_GNDP1

NC_CLINK_CLK

PCH_CLK100M_SATA_N


PP1V05_S0

DMI_CLK100M_CPU_P

LPC_AD<0>


PEG_CLKREQ_L

HDA_SDOUT_R


HDA_BIT_CLK_R

SPI_CLK_R

RTC_RESET_L

PCH_INTRUDER_L

PEG_B_CLKRQ_L_GPIO56

PCIECLKRQ5_L_GPIO44

PCIE_CLK100M_AP_P

PCIE_CLK100M_FW_P

PCH_CLK96M_DOT_P

PCH_CLK100M_SATA_P

HDA_BIT_CLK_R

PCIE_CLK100M_T29_N

NC_PCIE_CLK100M_EXCARD_P

NC_PCH_CLKOUT_DPP

XDP_PCH_TDI

HDA_BIT_CLK

LPC_AD<1>

LPC_AD<2>

LPC_FRAME_L

DP_AUXCH_ISOL

PCIE_ENET_D2R_N

PCIE_ENET_D2R_P

PP3V3_SUS

PCIE_FW_R2D_C_N

PCIE_FW_D2R_P

PCIE_FW_D2R_N

LPC_AD<3>

PP1V05_S0

PCIECLKRQ5_L_GPIO44

NC_PCIE_EXCARD_D2R_P

NC_SATA_D_R2D_CN

NC_SATA_F_R2D_CP

PCH_SATALED_L

NC_SATA_F_R2D_CN

NC_SATA_E_R2D_CP

NC_SATA_E_R2D_CN

NC_SATA_E_D2RP

HDA_SYNC_R

PCH_CLK33M_PCIIN

SYSCLK_CLK25M_SB_R

T29_CLKREQ_L

AP_CLKREQ_L


PCH_XCLK_RCOMP

SML_PCH_1_ALERT_L

SML_PCH_1_CLK

PCH_CLK14P3M_REFCLK

PCH_CLK96M_DOT_N

PCIE_CLK100M_PCH_P

PCIE_CLK100M_PCH_N

DMI_CLK100M_CPU_N

PEG_CLK100M_P

PEG_CLK100M_N

SML_PCH_0_CLK

SML_PCH_0_ALERT_L

SMBUS_PCH_DATA

SMBUS_PCH_CLK

PCH_GPIO11

PP3V3_SUS

SYSCLK_CLK25M_SB

ITPCPU_CLK100M_N

HDA_RST_L

HDA_SDOUT

HDA_RST_R_L

ITPXDP_CLK100M_N

ITPCPU_CLK100M_P

SML_PCH_1_ALERT_L

SMC_SCI_L

NC_SATA_D_D2RN

NC_SATA_D_D2RP

NC_PCIE_7_R2D_CP

NC_SATA_F_D2RP

HDA_SYNC

SATARDRVR_EN

NC_SATA_F_D2RN

NC_PCIE_5_R2D_CNNC_PCIE_5_R2D_CP

NC_PCIE_CLK100M_PEBP

NC_PCIE_CLK100M_PEBN

ENET_CLKREQ_L

SYSCLK_CLK32K_RTC

NC_HDA_SDIN3

NC_HDA_SDIN2

HDA_RST_R_L

XDP_PCH_TCK

XDP_PCH_TMS

XDP_PCH_TDO

SPI_MOSI_R

SPI_MISO

TP_SPI_CS1_L

PCH_CLK100M_SATA_P

PCH_CLK96M_DOT_N

PCH_CLK96M_DOT_P

PCH_SATA3COMP

PP1V05_S0

SATARDRVR_EN

JTAG_T29_TMS

PCH_SPKR

FW_CLKREQ_L

AP_CLKREQ_L

ENET_CLKREQ_L

PP3V3_SUS

PP3V3_S0

PP3V3_T29

PP1V5_S0

HDA_SDOUT_R

HDA_SYNC_R

PEG_B_CLKRQ_L_GPIO56

SML_PCH_0_ALERT_L

FW_CLKREQ_L

PCIE_CLK100M_FW_N

NC_SATA_E_D2RN

NC_SATA_D_R2D_CP

PCIE_CLK100M_PCH_N

PCH_CLK100M_SATA_N

PCIE_CLK100M_PCH_P

T29_CLKREQ_L

PEG_CLKREQ_L

PCH_CLK14P3M_REFCLK

PCH_SATALED_L

EXCARD_CLKREQ_L

DP_AUXCH_ISOL

PCH_SATA3RBIAS

SPI_CS0_R_L

ENET_MEDIA_SENSE_RDIV

HDA_SDIN0

PCH_SPKR

PP3V3_S0

JTAG_T29_TMS

HDA_SDOUT_R

NC_HDA_SDIN1

HDA_SYNC_R

PCH_INTVRMEN_L

PCH_INTRUDER_L

PCH_INTVRMEN_L

RTC_RESET_L

PPVRTC_G3H

PCH_SRTCRST_L

PCIE_CLK100M_T29_P


PCH_SATAICOMP

LPC_R_AD<3>

PP3V3_S0

LPC_R_AD<0>

LPC_R_AD<1>

LPC_R_AD<2>

T29_PWR_EN_PCH

18 OF 132

16 OF 101

16 6

16

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

16 23 90

6

16

16 23 90

6

6

8

16 23 90

6

8

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

8

16 93

8

16 93

16

16

16

16

16 93

16 23 84

7 16 17 18 19 20 22 45 70 71 72

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

16

6

6

16

6

6

6

6

16 93

16

6

16

16

16

7 16 17 18 19 20 22 45 70 71 72

10 90

16 93

16 23 90

10 90

16

6

6

6

16 23 41

6

6

6

6

6

16 93

16 93

16 93

16 93

92

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

16 33

16

16 23 39

16 23 31

16 36

7 16 17 18 19 20 22 45 70 71 72

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

7 20 22 25 41 56 70

16 93

16 93

16

16

6

6

16 93

16 93

16 93

16 35

8 16 87

16 93

16

16

16

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

16 93

6

16 93

16

16

16

16

7 17 20 25

16

92

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50

51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

IN

OUT

OUT

OUT

OUT

OUT

IN

BI

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

(3 OF 10)

MANAGEMENT

SYSTEM POWER

DMI

FDI

DMI1RXN

DMI2RBIAS

FDI_RXP6

DMI3RXN

DMI0RXN

FDI_RXN5

FDI_RXN4

FDI_RXN2

FDI_RXN3

FDI_RXN1

FDI_RXN0

RI*

BATLOW*/GPIO72

PWROK

SYS_PWROK

SYS_RESET*

DMI_ZCOMP

DMI3TXP

DMI2TXP

DMI1TXP

DMI3TXN

DMI0TXP

DMI1TXN

DMI2TXN

SUSACK*

SLP_SUS*

DSWVRMEN

DF_TVS

PMSYNCH

TP23

SLP_LAN*/GPIO29

SLP_A*

SLP_S4*

SLP_S5*/GPIO63

SUS_STAT*/GPIO61

SUSCLK/GPIO62

CLKRUN*/GPIO32

WAKE*

FDI_LSYNC1

FDI_FSYNC1

FDI_LSYNC0

FDI_FSYNC0

FDI_INT

FDI_RXP7

FDI_RXP4

FDI_RXP5

FDI_RXP2

FDI_RXP1

FDI_RXP3

FDI_RXP0

FDI_RXN7

FDI_RXN6

DRAMPWROK

DMI2RXN

DMI0TXN

DMI_IRCOMP

SLP_S3*

PWRBTN*

APWROK

RSMRST*

DMI0RXP

DMI1RXP

DMI2RXP

DMI3RXP

DPWROK

SUSWARN*/SUSPWRDNACK/GPIO30

ACPRESENT/GPIO31

(4 OF 10)

DIGITAL DISPLAY INTERFACE

CRT

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

DDPD_3P

DDPD_2P

DDPD_3N

DDPD_2N

DDPD_1P

DDPD_1N

DDPD_0P

DDPD_0N

DDPD_HPD

DDPD_AUXN

DDPD_AUXP

DDPD_CTRLDATA

DDPD_CTRLCLK

DDPC_3N

DDPC_3P

DDPC_2N

DDPC_2P

DDPC_1N

DDPC_0P

DDPC_1P

DDPC_0N

DDPC_HPD

DDPC_AUXP

DDPC_AUXN

DDPC_CTRLDATA

DDPC_CTRLCLK

DDPB_3P

DDPB_3N

DDPB_2N

DDPB_2P

DDPB_1P

DDPB_1N

DDPB_0P

DDPB_HPD

DDPB_0N

DDPB_AUXP

DDPB_AUXN

SDVO_CTRLCLK

SDVO_CTRLDATA

SDVO_INTN

SDVO_INTP

SDVO_STALLN

SDVO_STALLP

SDVO_TVCLKINN

SDVO_TVCLKINP

CRT_BLUE

CRT_GREEN

CRT_RED

CRT_DDC_CLK

CRT_DDC_DATA

CRT_HSYNC

CRT_VSYNC

CRT_IRTN

DAC_IREF

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

IN

OUT

IN

IN

OUT

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Set to Vss when LowDF_TVS:DMI & FDI Term Voltage

Set to Vcc when High

PD on SMC page

9 90

6 9 90

6 9 90

6 9 90

6 9 90

6 9 90

2

1R1900


MF

1%49.9

1/20W

201

6 17 25 31 84

6 17 44 46

45

17 44 72

17 29 42 44 65 72

6 17 29 44 72

10 29 90

6 72

17 23 44

45

17 19 89

44

23 89

6 25 44

9 90

9 90

9 90

9 90

9 90

9 90

9 90

9 90

9 90

9 90

9 90

9 90

9 90

6 9 90

6 9 90

10 90

6 44 46

2

1R1951

PLACE_NEAR=U1800.T43:2.54mm 5%1K

MF1/20W

201

2

1R1909

201

1/20WMF

5%100K

2

1R1920

201

PLACE_NEAR=U1800.BH21:2.54mm

1/20WMF

1%750

2

1R1981

5%

MF1/20W

201

2.2K

2 1R1980 MF5% 1/20W1K

201

P12

B9

AY16

K3

K16

N14

C12

G8

G16

D10

H4

K14

C21

A10

L22

E20

AP14

BH9

BJ10

BG12

BE12

BG13

BF14

BB14

BG14

BG9

BG10

BJ12

BC12

BH13

BE14

AY14

BJ14

BB10

AW16

BC10

AV12

A18

B13

E22

BJ24

BG25

AU18

AV18

BJ20

BG20

AY18

BB18

BJ18

BG18

BH21

AY20

AW20

BE20

AY24

AW24

BE24

BC24

AY1

N3

E10

L10

H20

U1800

MOBILEFCBGA

COUGAR-POINT

OMIT

BC20

AV14

G10

F4

AP45

AP43

AM40

AM42

AP40

AP39

M39

P38

BG4

BF6

BF3

BE8

BD4

BC8

BB7

BB5

BB3

BB1

BA3

BA2

AY7

AY5

AY3

AV7

AV5

AV3

AV10

AV1

AU3

AU2

AT8

AT5

AT4

AT3

AT12

AT10

AT1

BH41

M36

M43

AT43

AT45

BG42

BJ42

BE42

BF42

BE44

BF44

BB45

BB43

AT38

P42

P46

AP49

AP47

BB49

BB47

BA48

BA47

AY45

AY43

AY49

AY47

AT40

AT47

AT49

AV49

AV47

AU47AU48

AV46

AV45

AV40

AV42

T43

M49

T49

T42

P49

M40

T39

N48

U1800COUGAR-POINT

OMIT

MOBILEFCBGA

M47

2

1R1915390K

5%

MF1/20W

201

2

1R19918.2K

5%

201MF

1/20W

44 45 72

17

17 19 89

2

1R1985

1K

1/20W1%

201MF

R19251K

2

1

1%

MF201

1/20W

2

1R1982

1/20WMF

201

5%10K

2

1R1983

1/20WMF

201

5%10K

1/20W

R190510K

2012

1

MF

5%

2 1R1986 MF0

5%

201

1/20W

17

17 72

2

1R1921100K

201

1/20WMF

5%

2

1R1922100K

5%

MF1/20W

2012

1R1923100K

5%

MF1/20W

2012

1R1924

201

1/20WMF

5%100K

6 17 25 31 84

PCH DMI/FDI/GRAPHICS

PP3V3_SUS

PP3V3_S5

PCH_RI_L

PP3V3_SUS

SUSWARN_L

SMC_ADAPTER_EN

PM_DSW_PWRGD

DMI_N2S_P<3>

DMI_S2N_P<1>

DMI_S2N_P<2>

DMI_S2N_P<3>

DMI_N2S_N<3>

PP3V3_S0

PM_CLKRUN_L

PM_SLP_SUS_L

PCH_DSWVRMEN

TP_PM_SLP_A_L

PM_SLP_SUS_L

PM_SLP_S5_L

PM_SLP_S3_L

TP_PCH_TP23

PM_SYNC

PM_SLP_S4_L

PCH_DF_TVS

PP1V8_S0

GPIO29_SLP_LAN_L

SUSWARN_L

PCH_SUSACK_L

CPU_PROC_SEL_L

PCH_DAC_IREF

DMI_N2S_N<1>

FDI_DATA_P<1>

FDI_DATA_P<3>

GPIO29_SLP_LAN_L

PCH_SUSACK_L

SUSWARN_L

PM_PWRBTN_L

PCIE_WAKE_L

PM_BATLOW_L

FDI_DATA_N<4>

FDI_DATA_N<2>

PM_RSMRST_L

PCH_DMI2RBIAS

DMI_N2S_N<2>

PP1V05_S0

DMI_N2S_N<0>

DMI_N2S_P<2>

DMI_N2S_P<1>

NC_CRT_IG_DDC_CLK

NC_CRT_IG_VSYNC

FDI_DATA_P<0>

FDI_DATA_N<6>

FDI_DATA_P<6>

FDI_DATA_P<5>

NC_DP_IG_C_MLP<2>PPVRTC_G3H

NC_CRT_IG_BLUE

NC_CRT_IG_GREEN

NC_CRT_IG_DDC_DATA

NC_DP_IG_C_MLN<3>

NC_DP_IG_MLN<3>

NC_DP_IG_MLP<2>

NC_DP_IG_MLN<2>

NC_DP_IG_MLP<1>

NC_DP_IG_C_CTRL_CLK

NC_DP_IG_C_CTRL_DATA

NC_DP_IG_C_AUXP

NC_DP_IG_C_HPD

NC_DP_IG_C_MLN<0>

NC_DP_IG_C_MLP<0>

DP_IG_DDC_DATA

NC_DP_IG_MLN<0>

NC_DP_IG_MLN<1>

NC_DP_IG_MLP<0>

DP_IG_AUX_CH_N

DP_IG_DDC_CLK

NC_SDVO_INTP

NC_SDVO_INTN

NC_SDVO_STALLP

NC_SDVO_STALLN

FDI_DATA_N<5>

FDI_DATA_N<3>

FDI_DATA_N<1>

FDI_DATA_N<0>

FDI_DATA_N<7>

NC_DP_IG_D_MLP<0>

NC_DP_IG_D_MLN<1>

NC_DP_IG_C_AUXN

NC_DP_IG_D_AUXN

NC_DP_IG_D_MLP<2>

NC_DP_IG_C_MLN<2>

NC_SDVO_TVCLKINN

NC_SDVO_TVCLKINP

NC_DP_IG_D_MLP<3>

NC_DP_IG_D_MLP<1>

NC_DP_IG_D_MLN<0>

NC_DP_IG_D_HPD

NC_DP_IG_D_AUXP

NC_DP_IG_C_MLP<1>

NC_DP_IG_D_CTRL_DATA

NC_DP_IG_C_MLN<1>

NC_DP_IG_D_MLN<3>

NC_DP_IG_D_MLN<2>

DMI_S2N_N<3>

DP_IG_AUX_CH_P

DP_IG_HPD

NC_DP_IG_MLP<3>

DMI_S2N_P<0>

FDI_DATA_P<4>

NC_CRT_IG_HSYNC

PM_PCH_PWROK

PM_PCH_SYS_PWROK

NC_CRT_IG_RED

PM_SYSRST_L

PCH_DMI_COMP

PM_MEM_PWRGD

NC_DP_IG_C_MLP<3>

NC_DP_IG_D_CTRL_CLK

PM_PCH_PWROK

DMI_S2N_N<2>

DMI_S2N_N<1>

DMI_N2S_P<0>

DMI_S2N_N<0>

FDI_LSYNC<0>

FDI_FSYNC<1>

PM_CLKRUN_L

LPC_PWRDWN_L

PM_SLP_S5_L

PM_SLP_S3_L

PM_CLK32K_SUSCLK_R

PM_SLP_S4_L

FDI_LSYNC<1>

PM_PWRBTN_L

PCIE_WAKE_L

FDI_DATA_P<2>

FDI_FSYNC<0>

FDI_INT

FDI_DATA_P<7>

PP3V3_SUS

PCIE_WAKE_LMAKE_BASE=TRUE

PCIE_WAKE_L

19 OF 132

17 OF 101

7 16 17 18 19 20 22 45 70 71 72

6 7 19 20 22 23 24 25 29 39 45 55 65 70 71 72

82 85 89 98

7 16 17 18 19 20 22 45 70 71

72

17

6 7 12 16 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 17 44 46

17 72

17 44 72

6 17 29 44 72

17 29 42 44 65 72

6 7 14 20 22 25 70 71 87

17

17

17

10 90

6 9 90

9 90

17

17 23 44

6 17 25 31 84

9 90

9 90

6 7 9 10 12 13 14 16 20 22 23 35 39 44 67 69 72 101

6

6

9 90

9 90

9 90

9 90

6 7 16 20 25

6

6

6

6

8

8

8

8

6

6

6

6

6

6

8 79 83

8

8

8

8 83 92

8 79 83

6

6

6

6

9 90

9 90

6 9 90

9 90

9 90

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

8 83 92

8 83

8

9 90

6

6

6

6

9 90

9 90

7 16 17 18 19 20 22 45 70 71 72

6 17 25 31 84

OUT

USBP2N

USBP1N

USBP1P

USBP0N

USBP0P

OC7*/GPIO14

OC6*/GPIO10

OC5*/GPIO9

OC4*/GPIO43

OC3*/GPIO42

OC2*/GPIO41

OC1*/GPIO40

OC0*/GPIO59

USBRBIAS*

USBRBIAS

USBP13P

USBP13N

USBP12P

USBP12N

USBP11P

USBP11N

USBP10P

USBP10N

USBP9P

USBP9N

USBP8P

USBP8N

USBP7N

USBP7P

USBP6N

USBP6P

USBP5N

USBP5P

USBP4P

USBP4N

USBP3P

USBP3N

USBP2P

PIRQA*

PIRQB*

PIRQC*

PIRQD*

REQ1*/GPIO50

REQ3*/GPIO54

REQ2*/GPIO52

GNT2*/GPIO53

GNT1*/GPIO51

GNT3*/GPIO55

PIRQE*/GPIO2

PIRQF*/GPIO3

PIRQG*/GPIO4

PIRQH*/GPIO5

PME*

CLKOUT_PCI0

PLTRST*

CLKOUT_PCI2

CLKOUT_PCI1

CLKOUT_PCI3

CLKOUT_PCI4

LVDSA_DATA2*

LVDSA_DATA1*

LVDSA_DATA0*

LVDSA_DATA3*

LVDSA_DATA0

LVDSA_DATA2

LVDSA_DATA1

LVDSA_CLK*

LVDSA_DATA3

LVDSA_CLK

LVDSB_DATA0*

LVDSB_DATA1*

LVDSB_DATA2*

LVDSB_DATA3*

LVDSB_DATA1

LVDSB_DATA0

LVDSB_DATA2

LVDSB_DATA3

LVDSB_CLK*

LVDSB_CLK

L_BKLTEN

L_BKLTCTL

LVD_VREFL

LVD_VREFH

LVD_VBG

LVD_IBG

L_VDD_EN

L_CTRL_DATA

L_DDC_CLK

L_DDC_DATA

L_CTRL_CLK

(5 OF 10)

USB

PCI

LVDS

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

OUT

OUT

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

USB HUB 1

USB HUB 2

Camera

87 92

COUGAR-POINT

FCBGA

OMIT

MOBILE

U1800

H49

J48

K42

H40

E42

F46

P45

J47

T45

P39

T40

K47

M45

AF37

AE48

AE47

AK40

AK39

AN47

AN48

AM49

AM47

AK49

AK47

AJ47

AJ48

AF40

AH43

AH45

AH49

AH47

AF47

AF49

AF43

AF45

A14

K20

B17

C16

L16

A16

D14

C14

K40

K38

H38

G38

G42

G40

C42

D44

C6

K10

C46

C44

E40

C24

A24

C30

A30

L32

K32

G32

E32

C32

A32

C25

B25

C26

A26

K28

H28

E28

D28

C28

A28

C29

B29

N28

M28

L30

K30

G30

E30

B33

C33

H43

AF39

AF36

D47

87 92

87 92

8 92

87 92

87 92

87 92

8 92

87 92

87 92

87 92

87 92

87 92

87 92

8

87 92

6 8

6 8

87 92

8

2.37K1%

1/20WMF

201

PLACE_NEAR=U1800.AF37:2.54mm

R20501

2

5%

MF

NOSTUFF

201

10K

1/20W

R20541

2

6 8

8 18 87

8 18 87

83

83

MF1/20W 201

1 210K5%

R2011

2011

1/20W210K

MF5%R2012

201MF5% 1/20W

10K 21R2013

1/20W MF 201

2

5%

1R2016 10K

25% MF

10K 1R20171/20W 201

1 2

5% 201

10K1/20W MF

R2018

1/20W5% MF

R2030 2110K201R2014

MF1/20W1 2

5% 201

10K

NOSTUFF

1/20WMF

201

5%10K

R20531

2

5%

NOSTUFF

10K

1/20WMF

201

R20521

2201MF1/20W5%100KR20551

2

1/20W

10K

201MF

5%

R20611

2

10K

MF201

1/20W5%

R20621

2

MF1/20W

10K5%

201

R20641

2

MF201

5%10K

1/20W

R20651

25%1/20WMF201

10KR20671

2

10K

1/20W

201MF

5%

R20691

2

10K5%

201

1/20WMF

R20681

2

5%

MF-LF402

1/16W

100KR20151

2

R20315%

21

1/20W

10KMF 201

24 92

24 92

24 92

24 92

1%22.6

PLACE_NEAR=U1800.B33:2.54mmMF1/20W

201

R20701

2

5% MF1/20W1 2

201

10KR2010

25 29 39

25

25 93

25

201

1/20W5%

10K

MF

R20601

2


PCH PCI/FLASHCACHE/USBSYNC_MASTER=K92_MLB

PP3V3_S0

PCI_REQ3_L

PCH_MLB_REVB_PD

JTAG_GMUX_TMS

PCI_INTC_L

PCI_INTB_L

PCI_INTA_L

AUD_IP_PERIPHERAL_DET

PCI_INTE_L

PCI_INTD_L

LVDS_IG_A_DATA_N<1>

LVDS_IG_A_DATA_N<0>

LPC_CLK33M_GMUX_R

LPC_CLK33M_SMC_R

PCH_PCI_GNT1_L

NC_USB_10P

ENET_PWR_EN

TP_LVDS_IG_B_CLKN

NC_LVDS_IG_B_DATAP<3>

AUD_I2C_INT_L

PLT_RESET_L

PCH_GPIO14_OC7_L

PP3V3_SUS

PP3V3_S3

SDCONN_STATE_RST_L

PCH_GPIO10_OC6_L

AP_PWR_EN

PCH_PCI_GNT2_L

PCH_PCI_GNT3_L

LVDS_IG_A_DATA_N<2>

NC_LVDS_IG_A_DATAP<3>

LVDS_IG_A_DATA_P<0>

LVDS_IG_A_CLK_N

LVDS_IG_A_DATA_P<2>

LPC_CLK33M_LPCPLUS_R

NC_PCH_LVDS_VBG

LVDS_IG_B_DATA_N<1>

LVDS_IG_B_DATA_P<2>

NC_LVDS_IG_B_DATAN<3>

LVDS_IG_A_CLK_P

LVDS_IG_B_DATA_N<2>

PCH_PCI_GNT2_L

PCH_PCI_GNT3_L

NC_LVDS_IG_A_DATAN<3>

TP_LVDS_IG_B_CLKP

LVDS_IG_BKL_ON

LVDS_IG_DDC_DATA

LVDS_IG_B_DATA_P<0>

LVDS_IG_B_DATA_N<0>

LVDS_IG_B_DATA_P<1>

NC_LVDS_IG_CTRL_DATA

PCH_PCI_GNT1_L

LVDS_IG_PANEL_PWR

LVDS_IG_BKL_ON

PCH_LVDS_IBG

TP_LVDS_IG_BKL_PWM

LVDS_IG_PANEL_PWR

NC_LVDS_IG_CTRL_CLK

LVDS_IG_DDC_CLK

LVDS_IG_A_DATA_P<1>

USB_HUB1_UP_P

USB_HUB1_UP_N

NC_USB_1N

NC_USB_2N

NC_USB_3N

NC_USB_1P

NC_USB_2P

NC_USB_3P

NC_USB_4N

NC_USB_4P

NC_USB_5N

NC_USB_5P

NC_USB_6N

NC_USB_6P

NC_USB_7N

NC_USB_7P

USB_HUB2_UP_N

USB_HUB2_UP_P

USB_CAMERA_N

USB_CAMERA_P

NC_USB_10N

NC_USB_11N

NC_USB_13P

NC_USB_13N

NC_USB_12P

NC_USB_12N

NC_USB_11P

PCH_GPIO43_OC4_L

SDCONN_STATE_CHANGE

USB_HUB_SOFT_RESET_L

PCH_USB_RBIAS

NC_PCI_PME_L

PCH_CLK33M_PCIOUT

NC_PCI_CLK33M_OUT3

T29_MCU_INT_L

20 OF 132

18 OF 101

6 7 12 16 17 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

87

61

25

18

23

61

23

7 16 17 19 20 22 45 70 71 72

6 7 8 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

23

23

31 72

18

18

6

18

18

6

18

8 18 87

8 18 87

6

31

31

23

23 32

23 24

92

6

6

84

OUT

OUT

BI

IN

CPU

NCTF

MISC

(6 OF 10)

GPIO

RSVD

TP38

SATA3GP/GPIO37

TACH5/GPIO69

TP18

STP_PCI*/GPIO34

GPIO15

SATA4GP/GPIO16

CLKOUT_PCIE7P

A20GATE

TACH3/GPIO7

LAN_PHY_PWR_CTRL/GPIO12

GPIO8

TACH0/GPIO17

GPIO24/MEM_LED

SCLOCK/GPIO22

GPIO27

GPIO28

GPIO35

SATA2GP/GPIO36

SLOAD/GPIO38

SDATAOUT0/GPIO39

PCIECLKRQ6*/GPIO45

PCIECLKRQ7*/GPIO46

SATA5GP/GPIO49

SDATAOUT1/GPIO48

TACH4/GPIO68

GPIO57

TACH6/GPIO70

TACH7/GPIO71

CLKOUT_PCIE6N

CLKOUT_PCIE7N

CLKOUT_PCIE6P

BMBUSY*/GPIO0

TACH2/GPIO6

TACH1/GPIO1

PECI

RCIN*

THRMTRIP*

PROCPWRGD

TP1

TP2

TP3

TP4

TP6

TP5

TP7

TP8

TP9

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP19

TP20

TP21

TP22

TP24

TP25

TP26

TP27

TP29

TP28

TP30

TP31

TP32

TP33

TP34

TP35

TP36

NC_1

INIT3_3V*

TP40

TP39

TP37

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

TS_VSS1

TS_VSS2

TS_VSS3

VSSADAC

TS_VSS4

IN

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NCNCNCNC

IN

OUT

OUT

OUT

IN

BI

IN

IN

OUT

NC

OUT

OUT

OUT

IN

Y

A

B 08

Y

A

B 08

Y

A

B 08

Y

A

B 08

OUT

OUT

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

GPIO ISOLATION CIRCUIT

(PUs necessary?)

(PU necessary?)

(IPU)

(IPU)

This has internal pull up and should not pulled low.

THIS SIGNAL IS INTENDED FOR FIRMWARE HUB AND WE ARE NOT USING IT.

ALL RSVD TPs NC-ed per INTEL approval

PD on audio page

(NC-ed per Intel chklist)

10 23 90

23 29

6 46

1/20W

2015%

43

MF

R21701 2

NOSTUFF

5%

01/20W

201

MF

R21401 2

19 23

BG16

AH37

AH38

M20

BJ26

BD1

B47

AM5

L24

BJ44

AB45

BC30

C41

M3

N2

M5

FCBGAMOBILE

COUGAR-POINT

OMIT

U1800

P4

T7 V40

V42

V38

V37

G2

E8

E16

P8

K4

D6

C10

T14

C4

P37

T13

K12

AU16

AY11

V8

U2

V3

T5

V13

K1

D40

A42

H36

E38

C40

B41

AY10

BG26

C18

N30

AM4

Y13

K24

AB46

BE32

BC28

BH25

BE30

BF32

BG32

AV26

BB26

AU28

AY30

AU26

AY26

AV28

BJ16

AW30

AK43

AK45

AH8

AK11

AH10

AK10

BE1

BE49

BF1

BF49

BG2

BG48

BH3

BH47

BJ4

A45

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

A46

F1

F49

A5

B3

BD49

U47

BJ32

BG46

BE28

B21A6

A44

A4

A40

AH12

H3

P5

19 87

201

1/20WMF

NOSTUFF

1K5%

R21301

2

1/20W

201

10K

MF

5%

R21851

2

8 19 39

19 23

19 41

8 19 23 33 87

8 19 33 87

6 19 46 55

10 90

MF

390

1/20W5%

201

R21561 2

MF201

10KR21601

2

5%1/20W

MF201

1/20W5%

10KR21841

2MF

201

1/20W

10K5%

R21861

2

5%10K

1/20WMF

201

R21721

2MF

201

10K5%

1/20W

R21731

2

10K

MF201

5%1/20W

R21741

2

5%10K

201

1/20WMF

R21751

2

1/20W

10K5%

MF201

NOSTUFF

R21151

2MF

10K

201

5%1/20W

R21141

2

1R2192

201

5%10K

1/20WMF

2201MF

1/20W5%

100KR21931

2

MF1/20W

201

5%20K

1

2

R211110K

5%1/20W

201MF

R21121

2MF

1/20W

201

5%10K

R21131

2

R2190100K

5%

201MF

1

2

1/20W 2

1R219910K

MF1/20W

201

5%

2

1R2198

5%10K

201MF

1/20W

5%10K

1/20WMF

201

R21961

2 201MF

5%10K

1/20W

NOSTUFFR21971

2

5%10K

201

1/20WMF

R21551

2

10K

201

1/20WMF

5%

R21501

2

16 19 44

19 23

2

1R2116

NOSTUFF

MF201

10K5%

1/20W

10KR2194

1/20W5%

201MF

1

2

10K5%

1/20WMF

201

R21911

2

MF1/20W

NOSTUFF

201

5%10K

R21171

2

8 19 33 87

19 72

19

19 44

C2150

2

1

10V

0.1UF

CERM

20%

402

2

18

4

CRITICAL

U2150

74LVC2G08GTSOT833

7

SOT833

4

85

6

3U2150

74LVC2G08GT

1

10V

402

2 CERM

20%0.1UFC2152

74LVC2G08GTCRITICAL

4

81

2U2152 7

SOT833

6

58

4

3

SOT83374LVC2G08GT

U2152

32 36

39

61

35

R2180

2015%

1 2MF1/20W

0

PCH MISCSYNC_MASTER=K91_MLB SYNC_DATE=10/20/2010

ISOLATE_CPU_MEM_L

T29_SW_RESET_L_RT29_SW_RESET_L

NC_GPIO35

WOL_EN

JTAG_ISP_TDI

ENET_LOW_PWR_PCH

T29_PWR_EN

AUD_IPHS_SWITCH_EN

FW_PWR_EN

ENET_LOW_PWR

PP3V3_S0

SMC_RUNTIME_SCI_L

JTAG_ISP_TDO

FW_PLUG_DET_L

PCH_GPIO15

PP3V3_SUS

PCH_GPIO69_TACH5

WOL_EN

PP3V3_S0

PCH_GPIO71_TACH7

PCH_GPIO12


CPU_PWRGD

CPU_PECI



PCH_INIT3V3_L


PCH_GPIO46

PM_THRMTRIP_L

SMC_SCI_L

PP3V3_S5

PCH_GPIO68_TACH4

PCH_GPIO70_TACH6

PCH_GPIO70_TACH6

JTAG_ISP_TCK

PP3V3_S0

GMUX_INT

PCH_GPIO15

SMC_RUNTIME_SCI_L

PP3V3_SUS

PCH_GPIO68_TACH4

FW_PWR_EN_PCH

PCH_GPIO12

FW_PLUG_DET_L

PM_THRMTRIP_L_R

PCH_PROCPWRGD

PCH_RCIN_L

FW_PWR_EN_PCH

PCH_GPIO71_TACH7

PP3V3_T29

SPIROM_USE_MLB

PCH_GPIO0

ENET_LOW_PWR_PCH

SPIROM_USE_MLB

PCH_GPIO69_TACH5

PCH_GPIO24

PP3V3_S0

PCH_INIT3V3_L

PCH_GPIO46

JTAG_ISP_TDO

T29_SW_RESET_L

JTAG_ISP_TDI

PCH_GPIO36_SATA2GP

PP3V3_T29

PP3V3_S0PCH_GPIO0

PM_PCH_PWROK

ENET_LOW_PWR_PCH

PM_PCH_PWROK

FW_PWR_EN_PCH

AUD_IPHS_SWITCH_EN_PCH

PM_PCH_PWROK

T29_PWR_EN_PCH

PP3V3_S3

SMC_SCI_L

PCH_PECI

PCH_A20GATE

PCH_GPIO36_SATA2GP

PCH_GPIO24

ODD_PWR_EN_L

LPCPLUS_GPIO


JTAG_ISP_TCK

ODD_PWR_EN_L

GMUX_INT

PM_PCH_PWROK

PP3V3_S3

21 OF 132

19 OF 101

19 35

19 23

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

19 44

8 19 33 87

8 19 39

19

7 16 17 18 19 20 22 45 70 71 72

19

19 72

6 7 12 16 17 18 19 20 22

23 25 26 28 32

35 36 39

40 41 45 47 48

49 50 51

53 56 60 61 71

72 79 82

83 84 87 88 89

98

19

19

6

10 44 90

6

6

19

6

19 23

16 19 44

6 7 17 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

19

19

19

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40

41 45 47 48 49 50 51

53 56 60 61 71 72 79 82 83

84 87 88 89 98

19

7 16 17 18 19 20 22 45 70 71 72

19

19

45

19

19

7 16 19 25 33 34 35 87

6 19 46 55

19 23

19

19

6 7 12 16 17 18 19 20

22 23 25

26 28 32 35

36 39 40

41 45 47 48

49 50 51

53 56 60 61 71 72 79 82 83 84 87 88 89 98

19

19 23

19 35

8 19 33 87

19 23

7 16 19 25 33 34 35 87

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

17 19 89

19 23

17 19 89

19

19 23

17 19 89

16

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

19 23

19

8 19 23 33 87

19 41

19 87

17 19 89

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

VSSALVDS

VCCTX_LVDS

VCCTX_LVDS

VCCTX_LVDS

VCCTX_LVDS

VCCDFTERM

VCCDFTERM

VCCALVDS

VCCVRM_3_DMI

VCC3_3_7_HVCMOS

VCC3_3_5_PCI

VCCDFTERM

VCCSPI

VCCDFTERM

VCC3_3_6_HVCMOS

VCCIO_18_FDI

VCCIO_21_PCIE

VCCIO_20_PCIE

VCCIO_11_PLLPCIE

VCCIO_25_PCIE

VCCIO_24_PCIE

VCCCLKDMIVCCCORE

VCCIO_27_DP

VCCIO_26_PCIE

VCCIO_19_PCIE

VCCIO_22_PCIE

VCCIO_10_PLLFDI

VCCIO_23_PCIE

VCCIO_17_FDI

VCCIO_28_DP

VCCDMI_0_FDI

VCCAPLLEXP

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCDMI_1_DMI

VCCCORE

VCCCORE

VCCCORE

VCCAFDIPLL

VCCCORE

VCCVRM_2_FDI

VCCADAC

VCCCORE

FDI

CRT

DFT/SPI

DMI

HVCMOS

VCCIO

VCC CORE

LVDS

(7 OF 10)

VCCSUSHDA

VCCSUS3_3_3_USB

VCCSUS3_3_4_USB

VCCSUS3_3_2_USB

VCCSUS3_3_1_USB

VCCIO_4_USB

VCCIO_2_USB

VCCIO_3_USB

VCCIO_1_USB

VCCIO_0_USB

VCCASW_0_MISC

VCCASW_2_MISC

VCCASW_1_MISC

VCCIO_8_SATA

VCCIO_6_SATA

VCCIO_7_SATA

VCCAPLLSATA

VCCVRM_1_SATA

VCCIO_9_PLLSATA3

VCCIO_15_SATA3

VCCIO_16_SATA3

VCC3_3_0_SATA

VCCIO_5_PLLSATA

VCC3_3_2_GPIO

VCC3_3_3_GPIO

VCC3_3_1_GPIO

VCCSUS3_3_7_GPIO

VCCSUS3_3_8_GPIO

VCCSUS3_3_5_GPIO

VCCSUS3_3_6_GPIO

V5REF

VCCRTC

V_PROC_IO

DCPSUSBYP

VCCACLK

DCPRTC

VCCADPLLA

VCCADPLLB

DCPSST

DCPSUS_2_CLK

DCPSUS_1_CLK

VCCDIFFCLKN_2

VCCDIFFCLKN_1

VCCDIFFCLKN_0

VCCDSW3_3

VCCIO_13_CLK

VCC3_3_4_CLK

VCCASW_4_CLK

VCCASW_5_CLK

VCCASW_6_CLK

VCCASW_7_CLK

VCCASW_8_CLK

VCCAPLLDMI2

VCCASW_20_CLK

VCCASW_10_CLK

VCCASW_11_CLK

VCCASW_12_CLK

VCCASW_13_CLK

VCCASW_14_CLK

VCCASW_15_CLK

VCCASW_16_CLK

VCCASW_17_CLK

VCCASW_18_CLK

VCCASW_19_CLK

VCCASW_9_CLK

VCCVRM_0_CLK

VCCASW_22_CLK

VCCASW_21_CLK

VCCSSC

VCCSUS3_3_9_USB

VCCIO_14_PLLUSB

V5REF_SUS

VCCSUS3_3_0_SUS

DCPSUS_3_SUS

VCCASW_3_CLK

DCPSUS_0_CLK

VCCIO_12_PLLCLK

CPU

RTC HDA

USB

MISC

SATA

PCI/GPIO/

LPC

CLK/MISC

(8 OF 10)

NC

NC

NC

NC

NC

NCNC

NC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

VCCACLK pin left as NC per DG

AL24 left as NC per DG

VCCAFDIPLL pin left as NC per DG

VCCAPLLSATA pin left as NC per DG

NC-ed per DG

1.44 A Max, 474mA Idle

VCCAPLLDMI2 pin left as NC per DG

10 mA Max, 1mA Idle

PCH output, for decoupling only

NC-ed per DG

55mA Max, 5mA Idle

COUGAR-POINT

FCBGA

OMIT

MOBILE

U1800

BH29

V33

V34

U48

BG6

AK36

BJ22

AB36

AA23

AC23

AG27

AG29

AJ23

AJ26

AJ27

AJ29

AJ31

AD21

AD23

AF21

AF23

AG21

AG23

AG24

AG26

AG16

AG17

AJ16

AJ17

AU20

AT20

AP17

AN19

AN16

AN17

AN21

AN26

AN27

AP21

AP23

AP24

AP26

AT24

AN33

AN34

V1

AM37

AM38

AP36

AP37

AP16

AT16

AK37

FCBGA

COUGAR-POINT

OMIT

MOBILE

U1800

N16

V16

AL24

T17

V19

AN23

V12

P34

M26

BJ8

AJ2

T34

AA16

W16

T38

AD49

BD47

BF47

BH23

AK1

T19

AC26

AC27

AC29

AC31

AD29

AD31

W21

W23

W24

W26V21

W29

W31

W33

T21

AA19

AA21

AA24

AA26

AA27

AA29

AA31

AF33

AF34

AG34

T16

N26

AL29

AF17

T26

AH13

AH14

P26

P28

T27

T29

AF13

AC16

AC17

AD17

AF14

A22

AG33

AN24

T23

T24

V23

V24

N20

N22

P20

P22

P24

P32

Y49

AF11

0.1UF

CERM

20%10V

402


C22321

2CERM

10%1UF

6.3V

402PLACE_NEAR=U1800.A22:2.54mm

C22311

2

402

PLACE_NEAR=U1800.V16:2.54mm

CERM

0.1UF20%10V

C22221

2

0.1UF

CERM

20%

402

10V


C22101

2

402

20%10V

0.1UF

CERM


C22331

2

PCH POWER

VOLTAGE=3.3VMIN_LINE_WIDTH=0.2 mmPPVOUT_S0_PCH_DCPSSTMIN_NECK_WIDTH=0.2 mm

PP1V05_S0_PCH_VCCADPLLB_F

PP1V05_S0

PP1V05_S0_PCH_VCCADPLLA_F

PP1V05_S0

PP1V05_S0

PP1V05_S0

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.2 mm

PPVOUT_G3_PCH_DCPRTC

PP3V3_SUS

PP5V_S0_PCH_V5REF

PP1V8_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP5V_SUS_PCH_V5REFSUS

PP1V05_S0

PP3V3_SUS

PP3V3_S0

TP_1V05_S0_PCH_VCCAPLLEXP

PP1V05_S0_PCH_VCCCLKDMI_F

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP3V3_S0

PP1V05_S0

PP1V8_S0_PCH_VCCTX_LVDS_F

PP1V05_S0

PP1V8_S0

PP1V8_S0

PP1V8_S0

PP3V3_S0_PCH_VCCA_DAC_F

PP3V3_S5

PP3V3_S0

PP3V3_S0

TP_PPVOUT_PCH_DCPSUSBYP

PP1V05_S0

PP3V3_S0

PP1V05_S0

PPVRTC_G3H

PP3V3_S0_PCH_VCC3_3_CLK_F

PP3V3_S5

PP1V05_S0

PP3V3_SUS

PP1V5_S0

PP1V8_S0

22 OF 132

20 OF 101

22

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

22

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

7 16 17 18 19 20 22 45 70 71 72

22

6 7 14 17 20 22 25 70 71 87

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

22

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

7 16 17 18 19 20 22 45 70 71 72

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6

22

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

22

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 14 17 20 22 25 70 71 87

6 7 14 17 20 22 25 70 71 87

6 7 14 17 20 22 25 70 71 87

22

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

7 16 17 25

22

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

7 16 17 18 19 20 22 45 70 71 72

7 16 22 25 41 56 70

6 7 14 17 20 22 25 70 71 87

VSS

(9 OF 10)

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS(10 OF 10)

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

OMIT

FCBGA

MOBILECOUGAR-POINT

U1800AJ3

N24

AB14

AL48

AM11

AM14

AM36

AM39

AM43

AM45

AM46

AM7

AN2

AB39

AN29

AN3

AN31

AP12

AP13

AP19

AP28

AP30

AP32

AP38

AB4

AP4

AP42

AP46

AP8

AR2

AR48

AT11

AT13

AT18

AT22

AB43

AT26

AT28

AT30

AT32

AT34

AT39

AT42

AT46

AT7

AU24

AB5

AU30

AV11

AV16

AV20

AV24

AV30

AV38

AV4

AV43

AV8

AB7

AW14

AW18

AW2

AW22

AW26

AW28

AW32

AW34

AW36

AW40

AC19

AW48

AY12

AY22

AY28

AY4

AY42

AY46

AY8

B11

B15

AC2

B19

B23

B27

B31

AC21

AC24

BG29

AC33

AC34

AC48

AD10

AD11

AD12

AD13

AD14

AD16

AD19

H5

AD24

AD26

AD27

AD33

AD34

AD36

AD37

AD38

AD39

AD4

AA17

AD40

AD42

AD43

AD45

AD46

AD47

AD8

AE2

AE3

AF10

AA2

AF12

AF16

AF19

AF24

AF26

AF27

AF29

AF31

AF38

AF4

AA3

AF42

AF46

AF5

AF7

AF8

AG19

AG2

AG31

AG48

AH11

AA33

AH3

AH36

AH39

AH40

AH42

AH46

AH7

AJ19

AJ21

AJ24

AA34

AJ33

AJ34

AK12

AK3

AK38

AK4

AK42

AK46

AK8

AL16

AB11

AL17

AL19

AL2

AL21

AL23

AL26

AL27

AL31

AL33

AL34

OMIT

FCBGA

COUGAR-POINTMOBILE

U1800B35

B39

B43

B7

BB12

BB16

BB20

BB22

BB24

BB28

BB30

BB38

BB4

BB46

BC14

BC18

BC2

BC22

BC26

BC32

BC34

BC36

BC40

BC42

BC48

BD3

BD46

BD5

BE10

BE22

BE26

BE40

BF10

BF12

BF16

BF20

BF22

BF24

BF26

BF28

BF30

BF38

BF40

BF8

BG17

BG21

BG22

BG24

BG33

BG41

BG44

BG8

BH11

BH15

BH17

BH19

BH27

BH31

BH33

BH35

BH39

BH43

BH7

C22

D12

D16

D18

D22

D24

D26

D3

D30

D32

D34

D38

D42

D8

E18

E26

F3

F45

G14

G18

G20

G26

G28

G36

G48

H10

H12

H16

H18

H22

H24

H26

H30

H32

H34

H46

K18

K26

K39

K46

K7

L18

L2

L20

L26

L28

L36

L48

M12

M14

M18

M22

M24

M30

M32

M34

M38

M4

M42

M46

M8

N18

N47

P11

P16

P18

P30

P40

P43

P47

P7

R2

R48

T12

T31

T33

T36

T37

T4

T46

T47

T8

V11

V26

V27

V29

V31

V36

V39

V43

V7

W17

W19

W2

W27

W34

W48

Y12

Y38

Y4

Y42

Y46

Y8

V17

AP3

AP1

BE16

BC16

BG28

BJ28


PCH GROUNDS

23 OF 132

21 OF 101

NC

NC

NC

NC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

(PCH PCI 3.3V PWR)

(PCH DPLLB PWR)

(PCH DPLLA PWR)

68 mAPCH V5REF_SUS Filter & Follower

(PCH Reference for 5V Tolerance on PCI)

NEED PWR CONSTRAINT

PCH VCCSUS3_3 BYPASS

(PCH SUSPEND USB 3.3V PWR)

(PCH 1.05V CORE PWR)

NEED PWR CONSTRAINT

<1 MA S0-S5

69 mA

PCH VCCCORE BYPASS

(PCH USB 1.05V PWR)

PCH VCCIO BYPASS

<1 MA

PCH VCCIO BYPASS

PCH VCCSUSHDA BYPASS

1 mA

1 mA S0-S5

PCH V5REF Filter & Follower

(PCH Reference for 5V Tolerance on USB)

PCH VCCADPLLB Filter

PCH VCCADPLLA Filter

PCH VCC3_3 BYPASS

2

1C2439

PLACE_NEAR=U1800.P34:2.54mm

402

1UF

10V10%

X5R

1

2R24051005%

402

1/16WMF-LF

2

1C2438

PLACE_NEAR=U1800.M26:2.54mm

0.1UF

CERM402

10V20%

D24005

6

1

SOT-363BAT54DW-X-G

1

2R2404

MF-LF

105%

1/16W

402

2

3

4

D2400BAT54DW-X-GSOT-363

2

1 C2423

402X5R

0.1UF

16V10%

PLACE_NEAR=U1800.AJ2:2.54mm

2

1 C2440PLACE_NEAR=U1800.AJ16:2.54mm 0.1UF

20%

CERM402

10V

2

1 C2441

10V

0.1UF20%

CERM402


PLACE_NEAR=U1800.AT20:2.54mm

2

1 C2419

402CERM

10%1UF

6.3V

2

1 C2421

PLACE_NEAR=U1800.BH29:2.54mm

0.1UF

16VX5R402

10%

2

1 C2413

PLACE_NEAR=U1800.V24:2.54mm

0.1UF10%

402

16VX5R

2

1 C2417


10%

X5R16V

0.1UF

402

2

1C2416

PLACE_NEAR=U1800.BJ8:2.54mmX5R402

6.3V

4.7UF20%

2

1 C2484


X5R16V

402

0.1UF10%

2

1 C2485

PLACE_NEAR=U1800.AA16:2.54mm

0.1UF

402X5R

10%25V

2

1 C2463

CERM

10%1UF

402

6.3V

PLACE_NEAR=U1800.AN27:2.54mm

2

1 C2475

PLACE_NEAR=U1800.AG33:2.54mm

1UF

402CERM6.3V10%

PLACE_NEAR=U1800.AF34:2.54mm2

1 C2434

CERM

1UF10%

402

6.3V 2

1 C2469

10%1UF

402

6.3VCERM

PLACE_NEAR=U1800.AF17:2.54mm

2

1 C24141UF10%

402

6.3VCERM


2

1C240110UF

0805

10%16V

X5R-CERM


2

1 C24521UF

6.3VCERM

PLACE_NEAR=U1800.AC17:2.54mm

10%

402

PLACE_NEAR=U1800.T16:2.54mm

CERM 2

1C24990.1UF

402

20%10V

2

1 C2442

PLACE_NEAR=U1800.V1:2.54mmCERM

1UF

402

6.3V10%

2

1 C2486


25V

0.1UF10%

X5R402

2

1 C24441UF

CERM402

6.3V10%

PLACE_NEAR=U1800.AH13:2.54mm

2

1 C2446

6.3V

1UF10%

CERM402


2

1 C2424

PLACE_NEAR=U1800.V33:2.54mm402

16VX5R

10%0.1UF

2

1C2460

6.3V

805CERM

10UF20%


2

1 C2482

402

1UF10%

CERM6.3V


2

1 C2481

PLACE_NEAR=U1800.AD21:2.54mm

10%

CERM

1UF

6.3V

402

2

1 C2483

10%1UF

402CERM6.3V

PLACE_NEAR=U1800.AJ27:2.54mm

2

1 C2407

10%

402

1UF

CERM6.3V


2

1 C24291UF

CERM

10%

402

6.3V


2

1C2420

6.3V20%

CERM805

22UF


2

1 C2496


6.3V10%1UF

CERM402

2

1 C2456


CERM

1UF

402

6.3V10%

2

1 C2426


1UF

CERM6.3V10%

402

1210-HF

CRITICALL2406

21

10UH-0.45A21

R2415

402

1/16W5%

1

MF-LF

2

1 C2411

402X5R

1UF

16V10%

PLACE_NEAR=U1800.AB36:2.54mm

2

1 C2430

PLACE_NEAR=U1800.BJ8:2.54mm402

16V10%

X5R

0.1UF

2

1C2428


22UF20%

6.3V

805CERM

2

1C24060.01UF

16V

402CERM

10%

PLACE_NEAR=U1800.AM37:2.54mm

1

CERM805

20%6.3V


2

22UFC2400

CRITICALC2408

16V

0.01UF10%

2

1

CERM402


1

0.1UHL2407

2

0805

CRITICAL

021

R2450

5%1/20WMF201

PLACE_NEAR=U1800.U48:2.54mm

2

1

16V

0.01UF10%

402CERM

C24550.1UF


2

1

402

16VX5R

10%

C2451

2

1C245010UF


20%

805CERM6.3V

CRITICAL

1/16W

21

R2451

MF-LF402

1

5% CRITICALC2453

10UF


603

2

1

6.3V20%

X5R


C2454

2

1

X5R

10%10V

402

1UF

10UH-0.12A-0.36OHM

CRITICAL

21

L2451

0603

2

1 C2476


1UF

CERM402

6.3V10%

PLACE_NEAR=U1800.BD47:2.54MM

CRITICALC2491220UF

20%2.5V 2

CASE-B2-SM1

1

POLY-TANT

PLACE_NEAR=U1800.BD47:2.54MM

2

1 C2492NO STUFF

1UF6.3V

402CERM

10%

2

1 C2494

402

NO STUFF

CERM

1UF6.3V10%

PLACE_NEAR=U1800.BF47:2.54MM

CRITICAL

2

1C2493

CASE-B2-SM1

20%2.5V

POLY-TANT

220UF

PLACE_NEAR=U1800.BF47:2.54MM

L249010UH-0.12A-0.36OHM

CRITICAL

0603

21

CRITICALL2491

10UH-0.12A-0.36OHM21

0603

21

R2490

5%

0

1/16W

402MF-LF

21

R24910

5%

MF-LF1/16W

402

SYNC_MASTER=K92_MLB

PCH DECOUPLINGSYNC_DATE=07/06/2010

PP1V8_S0

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMMAKE_BASE=TRUE

VOLTAGE=3.3V

PP3V3_S0_PCH_VCCA_DAC_F

PP3V3_S5

PP3V3_S0

PP1V05_S0_PCH_VCCADPLLA_RMIN_LINE_WIDTH=0.4MM

VOLTAGE=1.05VMIN_NECK_WIDTH=0.2MM


PP3V3_S0_PCH_VCC3_3_CLK_F

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05V

PP1V05_S0_PCH_VCCADPLLB_FMIN_LINE_WIDTH=0.4 MM

PP1V05_S0


MAKE_BASE=TRUEVOLTAGE=5V

MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.25MM

PP1V8_S0_PCH_VCCTX_LVDS_FMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMVOLTAGE=1.8V

PP3V3_SUS

PP3V3_S0

PP5V_SUS

PP5V_S0_PCH_V5REF

MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=5V

PP5V_S0_PCH_V5REF

MAKE_BASE=TRUE

PP1V5_S0

PP1V05_S0_PCH_VCCADPLLB_R

MIN_NECK_WIDTH=0.2MMVOLTAGE=1.05V

MIN_LINE_WIDTH=0.4MM

PP3V3_S0

PP3V3_S5

PP5V_S0

PP3V3_S0

PP3V3_S0

PP1V05_S0

PP3V3_S0

PP1V8_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP3V3_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0


PP1V05_S0

PP3V3_SUS

PP3V3_SUS

PP1V05_S0



PP1V05_S0_PCH_VCCCLKDMI_R


MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.5MMPP1V05_S0_PCH_VCCCLKDMI_F

PP1V05_S0

MIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.075 MMVOLTAGE=3.3V

PP3V3_S0_PCH_VCC3_3_CLK_R

PP1V05_S0

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMPP1V05_S0_PCH_VCCADPLLA_F

VOLTAGE=1.05V

24 OF 132

22 OF 101

6 7 14 17 20 22 25 70 71

87

20

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53

56 60 61 71 72 79 82 83 84

87 88 89 98

20

20

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

20 22

20

7 16 17 18 19 20 22 45 70 71 72

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

7 71

20 22

20 22

7 16 20 25 41 56 70

6 7 12 16 17 18 19

20 22

23 25

26 28

32 35

36 39

40 41

45 47

48 49

50 51

53 56 60

61 71 72

79 82

83 84

87 88 89

98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

6 7 8 41 46 51 53 64 67 68 69 71 72 86

88 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40

41 45 47 48 49 50 51 53 56

60 61 71 72 79 82 83 84 87

88 89 98

6 7 9 10 12 13 14 16 17 20 22 23 35

39 44 67 69 72

101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 14 17 20 22 25 70 71 87

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

20 22

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

7 16 17 18 19 20 22 45 70 71 72

7 16 17 18 19 20 22 45 70 71 72

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

20

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

20

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

NC

IN

IN

IN

OUT

IN

IN

BI

IN

OUT

IN

OUT

OUT

OUT

IN

IN

IN

IN

OUT

ININ

IN

IN

IN

OUT

IN

IN

IN

OUT

OUT

IN

IN

NC

BI

IN

IN

IN

IN

IN

BI

IN

OUT

IN

IN

IN

IN

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

OBSDATA_C3

NOTE: XDP_DBRESET_L pulled-up to 3.3V on P. 28

PCH MINI XDP

OBSDATA_C0

PROCESSOR MINI XDP

517S0774

HOOK3

OBSFN_A1

OBSDATA_A1

TDI

TCK0

DBR#/HOOK7

OBSFN_B0 OBSFN_D0

ITPCLK#/HOOK5

TMS

XDP_PRESENT#

OBSFN_B1

SCL

RESET#/HOOK6

OBSDATA_A2

OBSDATA_B1

OBSDATA_B2

OBSDATA_B3

VCC_OBS_AB

OBSDATA_A0

OBSDATA_B2

OBSDATA_A1

OBSFN_A1

SCL

OBSDATA_B0

TDO

OBSFN_C1

VCC_OBS_CD

TCK1

TDO

PLACE TDO TERM NEAR

TERM NEAR PCH

HOOK2

OBSFN_D0

OBSDATA_C3

TDI

OBSDATA_B1

SDA

TRSTn

OBSFN_C0

OBSDATA_C2

OBSDATA_C1

OBSFN_C1

OBSDATA_C0

517S0774

TMS

OBSFN_A0

OBSDATA_D0

OBSFN_A0

OBSDATA_B3

DESIGN NOTE:

PLACEMENT NOTE:

SDA

HOOK1

OBSDATA_A3

OBSFN_D1

OBSFN_C0

SNB XDP CONN

TERM NEAR CPUPLACE TCK/TDI/TMS/TRST*

PLACE TDO TERM NEAR

PLACEMENT NOTE:

ODT AVAILABLE ON JTAG

PLACEMENT NOTE:

PLACE TCK/TDI/TMS/TRST*

TCK1

OBSFN_B1

OBSFN_B0

OBSDATA_A3

OBSDATA_A2

OBSDATA_A0

PCH XDP CONN

OBSDATA_D1

XDP_PRESENT#

DBR#/HOOK7

VCC_OBS_CD

RESET#/HOOK6

ITPCLK/HOOK4

NOTE: XDP_DBRESET_L pulled-up to 3.3V on P. 28

ITPCLK/HOOK4

OBSFN_D1

TRSTn

OBSDATA_C2

OBSDATA_C1

TCK0

OBSDATA_B0

HOOK3

PWRGD/HOOK0

HOOK2

ITPCLK#/HOOK5

OBSDATA_D3

OBSDATA_D2

VCC_OBS_AB

HOOK1

PWRGD/HOOK0

PLACEMENT NOTE:

OBSDATA_D3

OBSDATA_D2

OBSDATA_D0

OBSDATA_D1

1K series R on PCH Support P. 28

9 90

10 25

10 90

10 90

9

10 90

10 90

10 90

10 90

9

9

9

PLACE_NEAR=U1000.B57:2.54mm

MF

1K

201

5% 1/20W

XDPR25011 29 23 90

16 39

16 31

9 90

19

XDP

2011/20W

MF5%

0PLACE_NEAR=U1800.V10:2.54mmR2576

1 2

1/20W201MF

XDPPLACE_NEAR=U1800.M1:2.54mm

05%

R25771 2

19

16 41


2015%

0MF

1/20W

XDPR25791 2

8 19 33 87

19

9 90

25

16 23

16 23

16 23

9 90


1/20W5%MF 201

0

XDPR25801 2

18

18

16 23

9 90

18 24

CRITICAL

F-ST-SM-HF

XDP_CONN

DF40C-60DS-0.4VJ2550

1

10

11 12

13 14

15 16

17 18

19

2

20

21 22

23 24

25 26

27 28

29

3

30

31 32

33 34

35 36

37 38

39

4

40

41 42

43 44

45 46

47 48

49

5

50

51 52

53 54

55 56

57 58

59

6

60

7 8

9

PLACE_NEAR=U1800.J3:2.54mm

MF201

5%51

XDP

1/20W

R25561

2

16 23 26 28 30 41 47 61 88 93

16 23 26 28 30 41 47 61 88 93

10 23 25 90

0.1uF

16V

402X5R

10%

XDP

C2580 1

216V

XDP

402

10%

X5R

0.1uFC25811

2

19

5%

PLACE_NEAR=U4900.P17:2.54mm0

MF201

1/20W

XDPR25021 217 23 44

201

PLACE_NEAR=U4900.P17:2.54mm0

5%MF

XDP

1/20W

R25851 217 23 44

330

201

1/20W

XDP

5%

MF

R25041 217 89

18

1/20W

PLACE_NEAR=J2550.39:2.54mm

5%MF 201

1K

XDPR25841 244 72 87 89

5%0

MF1/20W201

XDPPLACE_NEAR=U1800.A16:2.54mm R2581

1 218 32

10 23 90

10 23 25 90

PLACE_NEAR=U1800.K12:2.54mm

1/20W0

5%

XDP

MF 201

R25821 219

XDP

2011/20W

MF


5%0

R25781 2 19 29

XDP

5%MF 201

01/20W

PLACE_NEAR=U1800.K20:2.54mm R25861 2

5%0

XDP

MF1/20W

PLACE_NEAR=U1800.C16:2.54mm

201

R25871 218

18

9 90

10 23 90

16 90

16 90

1/20W

201MF

5%0

PLACE_NEAR=R1841.1:2.54mmXDPR2515

1 2

PLACE_NEAR=R1840.1:2.54mmXDP

0

201

5% 1/20W

MF

R25161 2

PLACE_NEAR=U1000.G3:2.54mm

XDP

1K

201

1/20W

MF

5%

R25051 2

16 84

PLACE_NEAR=J2550.52:2.54mm 201

5%1/20W

MF

XDP

51R25501

2

10 23 90


201

515%

1/20WMF

XDPR25511

2 201MF

1/20W5%51

XDP

PLACE_NEAR=U1800.H7:2.54mmR25521

2

1/20WXDP_CPU_BPM

5%0

MF 201

R2560 1 2

5%0

1/20W201MF

XDP_CPU_BPMR2561 1 2XDP_CPU_BPM

1/20W5%MF 201

0R2562 1 2XDP_CPU_BPM

2015% 1/20W

0

MF

R2563 1 2

201

XDP_CPU_CFG01/20W

MF5%R2564 1 2

10 23 90

XDP_CPU_CFG01/20W

MF 2015%R2566 1 2

XDP_CPU_CFG2011/20W5%

MF

0R2567 1 2

XDP_CPU_CFG0

201MF1/20W5%R2565 1 2

402MF-LF1/16W

5%

NOSTUFF

1KR25401

2

9 23 90

0.1uF

16V

XDP

X5R402

10%

C25011

2

9 90

10%16VX5R

0.1uF

XDP

402

C2500 1

2

10 90

10 90

9 90

9 90

9 90

9 90

16 23 26 28 30 41 47 61

88 93

16 23 26 28 30 41 47 61 88 93

10 23 90

1K1/20W

201

5%

MF

XDPPLACE_NEAR=U1000.C60:2.54mm

R25001 2

9 90

10 19 90

9 90

J2500F-ST-SM-HF

CRITICAL

XDP_CONN

DF40C-60DS-0.4V

1

10

11 12

13 14

15 16

17 18

19

2

20

21 22

23 24

25 26

27 28

29

3

30

31 32

33 34

35 36

37 38

39

4

40

41 42

43 44

45 46

47 48

49

5

50

51 52

53 54

55 56

57 58

59

6

60

7 8

9

515%

201

1/20WMF


XDPR25101

2


5%51

MF1/20W

201

XDPR25111

2

515%

MF1/20W

201

PLACE_NEAR=U1000.H59:2.54mm

XDPR25121

2

PLACE_NEAR=U1000.H63:2.54mm515%

XDP

MF1/20W

201

R25131

2

PLACE_NEAR=U1000.J58:2.54mmXDP

5%51

MF1/20W

201

R25141

2

10 90

10 90


CPU & PCH XDPSYNC_MASTER=K91_MLB

XDP_CPU_CFG<0>

XDP_PCH_GPIO46

XDP_PCH_S5_PWRGD

XDP_OBSDATA_B<3>

XDP_CPU_PWRBTN_L

XDP_CPU_TCK

XDP_CPU_TMS

XDP_CPU_TDI

XDP_CPU_TDO

TP_XDP_PCH_OBSFN_D<0>

TP_XDP_PCH_OBSFN_D<1>


ENET_LOW_PWR_PCH

XDP_PCH_AUD_IPHS_SWITCH_EN

TP_XDP_PCH_TRST_L

JTAG_ISP_TCK

PCH_GPIO36_SATA2GP

PP3V3_S5

TP_XDP_PCH_HOOK4

TP_XDP_PCH_HOOK5

PP3V3_S0

XDP_CPU_PWRGD

XDP_OBSDATA_B<2>

XDP_OBSDATA_B<1>CPU_CFG<13>

CPU_CFG<14>

XDP_VR_READY

XDP_CPU_PREQ_L

XDP_CPU_PRDY_L

XDP_BPM_L<0>

CPU_CFG<10>

XDP_BPM_L<1>

XDP_PCH_TDI

XDP_PCH_TCK

XDP_CPU_TRST_L

TP_XDP_PCH_OBSFN_B<0>

PCH_GPIO10_OC6_L

TP_XDP_PCH_OBSFN_B<1>

XDP_PCH_ENET_PWR_EN

CPU_CFG<11>

XDP_BPM_L<3>

PP1V05_S0

CPU_CFG<8>

CPU_CFG<6>

CPU_CFG<7>

XDP_CPURST_L

XDP_OBSDATA_B<0>

TP_XDPPCH_HOOK2

XDP_CPU_TMSCPU_CFG<0>

PM_PCH_SYS_PWROK

TP_XDPPCH_HOOK3

XDP_BPM_L<4>

CPU_PWRGD

CPU_CFG<15>

TP_XDP_PCH_OBSFN_A<0>

PCH_GPIO43_OC4_L

XDP_PCH_SDCONN_DET_L

XDP_PCH_PWRBTN_L

PCH_GPIO14_OC7_L

SMBUS_PCH_CLK

SMBUS_PCH_DATA

XDP_BPM_L<2>

XDP_PCH_TDI

CPU_CFG<5>

CPU_CFG<2>

CPU_CFG<9>

XDP_CPU_CLK100M_N

CPU_CFG<4>

PLT_RST_CPU_BUF_L

XDP_CPU_CLK100M_P

XDP_PCH_TDO

PP1V05_SUS

XDP_BPM_L<5>

PP1V05_S0

CPU_CFG<17>

AP_CLKREQ_L

ITPXDP_CLK100M_N

XDP_PCH_USB_HUB_SOFT_RST_L

SDCONN_STATE_RST_L


SDCONN_STATE_CHANGE

XDP_DBRESET_L

PM_PWRBTN_L

ENET_PWR_EN

XDP_PCH_TMS

ITPXDP_CLK100M_P

CPU_CFG<0>

CPU_CFG<16>

CPU_CFG<1>

CPU_CFG<12>

ALL_SYS_PWRGD

XDP_BPM_L<6>

XDP_PCH_ISOLATE_CPU_MEM_L

SMBUS_PCH_DATA

TP_XDP_PCH_OBSFN_A<1>

XDP_PCH_SDCONN_STATE_RST_L

ISOLATE_CPU_MEM_L

FW_CLKREQ_L

XDP_DBRESET_L

XDPPCH_PLTRST_L

XDP_PCH_TCK

XDP_PCH_TDO

XDP_CPU_TDI

PCH_GPIO46

PM_PWRBTN_L

XDP_BPM_L<7>

SMBUS_PCH_CLK

XDP_CPU_TCK

XDP_CPU_TDO

XDP_CPU_TRST_L

XDP_PCH_TMS

XDP_AP_CLKREQ_L

DP_AUXCH_ISOL

SATARDRVR_EN

XDP_FW_CLKREQ_L

PCH_GPIO0

CPU_CFG<3>

25 OF 132

23 OF 101

10 23 90

10 23 90

10 23 90

10 23 90

6 7 17 19 20 22 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 12 16 17 18 19 20 22 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

90

16 23

16 23

10 23 90

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

90

6

6

90

90

16 23

7 70

6 7 9 10 12 13 14 16 17

20 22 23 35

39 44 67 69

72 101

16 23

G

D

SG

D

S

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

VDD33

PLLFILT

CRFILT

SUSP_IND/LOCAL_PWR/NON_REM0

SDA/SMBDATA/NON_REM1

SCL/SMBCLK/CFG_SEL0

HS_IND/CFG_SEL1

XTALIN/CLKIN

XTALOUT

TEST

RESET*

THRM_PAD

USBDP_UP

NC

OSC3*

OCS1*

OCS2*

USBDM_UP

RBIAS

VBUS_DET

NC

NC

NC

USBDP_DN3/PRT_DIS_P3

USBDM_DN3/PRT_DIS_M3





PRTPWR3/BC_EN3*

PRTPWR1/BC_EN1*

PRTPWR2/BC_EN2*

SYM VER 1

VDD33

PLLFILT

CRFILT

SUSP_IND/LOCAL_PWR/NON_REM0

SDA/SMBDATA/NON_REM1

SCL/SMBCLK/CFG_SEL0

HS_IND/CFG_SEL1

XTALIN/CLKIN

XTALOUT

TEST

RESET*

THRM_PAD

USBDP_UP

NC

OSC3*

OCS1*

OCS2*

USBDM_UP

RBIAS

VBUS_DET

NC

NC

NC







PRTPWR3/BC_EN3*

PRTPWR1/BC_EN1*

PRTPWR2/BC_EN2*

SYM VER 1

TABLE_BOMGROUP_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

CRITICAL BOM OPTIONTABLE_5_HEAD

PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM


TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

External C

T29 - no longer used, pulled up to 3V3 S0

1 1 Port 1, 2, and 3 are non removable

IPU

IPU

IR Receiver

NON_REM1 NON_REM0 DESCRIPTION

IPUIPU

IPUIPUIPU

0 1 Port 1 is non removable1 0 Port 1 and 2 are non removable

0 0 All ports are removable

BOM TABLE

IPU

Bluetooth

SD Card/Express Card

Trackpad/Keyboard

External A

External B

2

1R26415%

402MF-LF1/16W

10K

CRITICAL

4

5

3

Q2640SOT-3632N7002DW-X-G

21

R2640

402

5%

20K

1/16WMF-LF

1

2

6

SOT-3632N7002DW-X-GQ2640CRITICAL

2

1 C26415%50VCERM402

100PF

NOSTUFF

2

1 C264010%6.3V

402CERM-X5R

0.47UF

2

1C26195%50V

CERM402

18PF

CRITICAL

21

R26301M

402

5%

MF-LF1/16W

CRITICAL

2

1 C262018PF

402

5%50VCERM

CRITICAL

21

R2680

402

CRITICAL

5%

MF-LF1/16W

1M

R2600

2

1

402MF

12K1/16W1%

CRITICAL

8 92

8 92

42 92

18 92

18 92

42 92

43 92

8 92

43 92

8 92

0.1UF1

X7R-CERM2

C2615

16V10%

4022

10%1UFC26161

16V

402X5R

R2620

2

1

MF-LF1/16W5%

402

10K

210%0.1UFC26171

402X7R-CERM16V

C26181UF

2

1

16VX5R402

10%

BYPASS=U2600.36::2MM

2

1C2608

402

16V10%

0.1UF

X7R-CERM

BYPASS=U2600.5::5MM

2

1C260220%

6.3VX5R603

4.7UF

C2609

2

1

402

16V10%

0.1UF

X7R-CERM



2

1C261010%

402

16VX7R-CERM

0.1UF


16V 2

1C260310%

0.1UF

402X7R-CERM

18 23

2

1

5%1/16WMF-LF

402

100KR2642

8

42

21

R2605

5%

MF-LF1/16W

402

100

2 1SOD-523

BAT54XV2T1

D2600

2

1R2606

402MF-LF

10K1/16W5%

MF-LF2

1R2607

402

10K1/16W5%

2

1R260410K5%

MF-LF402

HUB1_NONREM0_0

1/16W

2

1R2603

402

1/16WMF-LF

5%10K

HUB1_NONREM0_1

2

1R2601

MF-LF1/16W

5%10K

402

HUB1_NONREM1_1

2

1R2602HUB1_NONREM1_0

MF-LF1/16W

5%

402

10K

C2668

X5R2

1

16V10%

402

1UF

2

1 C26670.1UF16V10%

402X7R-CERM

2

1 C2666

X5R402

10%16V

1UF

X7R-CERM

0.1UFC2665

2

1

10%16V

402

2

1C26600.1UF

10%16V

402X7R-CERM


2

1R2670

1/16W

10K

MF-LF402

5%

2

1

12K

402

1%

MF1/16W

R2650CRITICAL

18 92

18 92

2

1C265310%

402X7R-CERM

0.1UF16V


2

1C26590.1UF

16V10%

402X7R-CERM


2

1C265810%

402X7R-CERM

16V

0.1UF


21

R2655

5%1/16W

100

MF-LF402

2

1 C2670

402

18PF

CERM50V5%

CRITICAL

2

1C26695%50V

CERM

18PF

402

CRITICAL

2

1R2657

MF-LF1/16W

402

5%10K

2

1R2656

402

10K1/16W5%

MF-LF

2


5%

402

10K1/16WMF-LF

2


10K1/16WMF-LF

402

5%

2

1R26545%

402

10K1/16WMF-LF

HUB2_NONREM0_0

2

1R2652

MF-LF1/16W

10K

402

5%

HUB2_NONREM1_0

52 92

52 92

31 92

31 92

Y260024.000MHZ-16PF

31

42

CRITICAL

SM-2

31

42

Y2650CRITICAL

24.000MHZ-16PFSM-2

8

8

42 92

42 92

8

42

6

USB2513B

32

33

36

29

23

15

10

5

27

31

7

4

2

30

3

1

37

11

28

22

24

26

35

18

16

12

34

19

17

13

21

20

9

8

25

14

OMIT

U2600

QFN

402

C2611


2

1

16VX7R-CERM

10%0.1UF

BYPASS=U2600.5::2MM

2

1 C2612

402

16V10%0.1UF

X7R-CERM


4.7UF20%

2

1C2607

6.3V

603X5R

U2650

2

32

33

36

29

23

15

10

5

27

31

7

4

30

6

3

1

37

11

28

22

24

26

35

18

16

12

34

19

17

13

21

20

9

8

25

14

QFN

OMIT

USB2513B

2

1 C2661

402

16V10%

X7R-CERM

0.1UF


2

1 C26620.1UF

X7R-CERM16V10%

402

BYPASS=U2650.5::2MM

2

1C2652

6.3V20%

603

4.7UF

X5R

BYPASS=U2650.5::5MM

2

1C2657

6.3VX5R

20%4.7UF

603



USB HUBSSYNC_MASTER=K91_ERIC

HUB1_1NONREM HUB1_NONREM1_0,HUB1_NONREM0_1


HUB1_ALLREM HUB1_NONREM1_0,HUB1_NONREM0_0


HUB2_NONREM1_0,HUB2_NONREM0_0HUB2_ALLREM



338S0720 U2600,U2650 USBHUB_25142 CRITICALSMSC USB2514

U2600,U2650 USBHUB_2514B2 SMSC USB2514B CRITICAL338S0824

338S0721 2 USBHUB_2061U2600,U2650 CRITICALSMSC USX2061

338S0923 SMSC USX2513B USBHUB_2513B2 U2600,U2650 CRITICAL


USB_HUB2_VBUS_DET

NC_USB_HUB2_OCS4USB_EXTA_OC_L

USB_HUB_RESET_L

USB_HUB2_RBIAS

PP3V3_S3

USB_EXTB_N

PP3V3_S3

NC_USB_HUB1_OCS4

NC_USB_HUB1_OCS2

PPUSB_HUB1_VDD1V8MIN_NECK_WIDTH=0.2MMVOLTAGE=1.8V


NC_USB_HUB1_PRTPWR2TP_USB_HUB1_PRTPWR1

NC_USB_HUB1_PRTPWR3

USB_HUB1_XTAL2USB_HUB1_XTAL1

USB_HUB1_NONREM0

USB_HUB1_CFG_SEL1

USB_HUB1_NONREM1

USB_HUB2_NONREM1

USB_HUB1_UP_N

PP3V3_S3

USB_HUB_RESET

P3V3S3_EN_RC

PP3V3_S5


USB_HUB1_TEST

USB_HUB_RESET_L

USB_HUB1_UP_P

USB_IR_N

USB_HUB1_CFG_SEL0

USB_HUB2_NONREM0

USB_HUB2_CFG_SEL0

USB_HUB2_CFG_SEL1

USB_HUB2_TEST

USB_HUB_RESET_L

USB_HUB2_UP_P

NC_USB_HUB2_PRTPWR4

TP_USB_HUB2_OCS1NC_USB_HUB2_OCS2

USB_HUB2_UP_N

USB_SDCARD_NUSB_SDCARD_P

USB_EXTA_PUSB_EXTA_N

USB_TPAD_P

NC_USB_HUB2_PRTPWR3

TP_USB_HUB2_PRTPWR1NC_USB_HUB2_PRTPWR2

MIN_NECK_WIDTH=0.2MM

PPUSB_HUB2_VDD1V8PLL

VOLTAGE=1.8V


USB_HUB2_XTAL2USB_HUB2_XTAL1

PP3V3_S3

USB_EXTB_OC_L

USB_EXTC_P

NC_USB_HUB1_PRTPWR4

TP_USB_HUB1_OCS1

USB_BT_NUSB_BT_P

USB_TPAD_N

PP3V3_S3

PPUSB_HUB1_VDD1V8PLLMIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.2MMVOLTAGE=1.8V

USB_HUB1_VBUS_DET

USB_HUB1_RBIAS


PPUSB_HUB2_VDD1V8MIN_LINE_WIDTH=0.4MM

VOLTAGE=1.8V

USB_EXTC_N

USB_EXTB_P

USB_T29A_P

USB_IR_P

USB_T29A_N

26 OF 132

24 OF 101

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71

72 87

6

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 7 17 19 20 22 23 25 29 39 45 55 65 70 71 72 82 85 89 98

24

24

6

6

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54

71 72 87

IN

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

IN

OUT

OUT

OUTIN

IN

OUT

OUT

OUT

BI

OUT

D

GS

OUT IN

OUT

OUT

OUT

OUT

NC

NC

OUT

OUT

OUT

PAD

+3.42V

VDD_25M

+V3.3A

VDDIO_25M_C

VDDIO_25M_B

VDDIO_25M_A

25MHZ_C

25MHZ_B

25MHZ_A

X1

X2

VDD_RTC_OUT

THRMGND

32KHZ_A

OUT

D

SG

IN

D

SG

NCNC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

VDDIO_25M_B: Ethernet power rail for XTAL circuit.VDDIO_25M_C: T29 power rail for XTAL circuit.

NOTE: VDD_25M must be powered if any VDDIO_25M_x is powered.

GreenClk 25MHz Power

Ethernet XTAL PowerSB XTAL PowerT29 XTAL Power

NOTE: 30 PPM crystal required

PCH Reset Button

ENET_MEDIA_SENSE ISOLATION CIRCUIT

Ethernet WAKE# Isolation

Coin-Cell: VBAT (300-ohm & 10uF RC)No Coin-Cell: 3.42V G3Hot (no RC)

VBAT and +V3.3A are

create VDD_RTC_OUT.

+V3.3A should be firstavailable ~3.3V power

internally ORed to

System RTC Power Source & 32kHz / 25MHz Clock Generator

to reduce VBAT draw. ENET_RESET_L hooked up differently on both the projects.This page is different for K92.

Buffered CPU reset

Coin-Cell & G3Hot: 3.42V G3Hot

Series R on Pg38, R3803

Platform Reset ConnectionsUnbuffered

VTT voltage divider on CPU page

Coin-Cell & No G3Hot: 3.3V S5

For SB RTC Power

VDDIO_25M_A: SB power rail for XTAL circuit.

NOTE:

BufferedNote: Based on K91/K92 layout, ENET,AP and BKLT are moved to Buffered reset.

Series R is R4283

No Coin-Cell: 3.3V S5No bypass necessary

10 23 90

402MF-LF

XDP

1 2

1/16W5%

0R2896

33

402MF-LF1/16W5%

R28831 2

1/16W

33

MF-LF402

5%

R28811 2 6 25 46 87 93

44

31

PLACE_NEAR=U1800.P53 22

201MF

5%1/20W

R28561 2

5%

MF

PLACE_NEAR=U1800.N52 22

201

1/20W

R28551 218 93

30

1/16W

402MF-LF

5%

0R28711 2

6 46 93

44 93

18

87

22

MF

PLACE_NEAR=U1800.P46

5%1/20W

201

R28571 2

23

MF-LF

1K

402

5%1/16W

XDP

R28891 2

0.1UF

402

20%

CERM10V

C2880 1

2

SC70-HFMC74VHC1G08

U2880

3

2

1

4

5

CRITICAL

1/16W

402

5%

MF-LF

100KR28801

216 93

22

5%

MF201

PLACE_NEAR=U1800.P48

1/20W

R28591 218

18 25

25 87

0

402

5%1/16WMF-LF

R28871 2

05%

402

1/16WMF-LF

OMIT

SILK_PART=SYS RESET

R28971

2

6 25 46 87 93

88

4.7K

MF-LF1/16W

402

5%

R28951

2

6 17 44

18 25 29 39

SOD-VESM-HFSSM3K15FV

3

1

2

CRITICAL

Q2830

6 17 31 84 25 36

MF-LF

10K5%

402

1/16W

R28301

2

16

33

6.3VCERM

1UF10%

402

C28101

2

402-1

10%1UF10VX5R

C28021

2402

0.1UF20%10VCERM

C2820 1

220%10VCERM402

0.1UF1

2

C2822

1/16W

402

5%

MF-LF

NO STUFF

1MR28061

2

20%10V

402CERM

0.1UFC2824 1

2

5%

MF-LF1/16W

0R28051 2

402CERM

2 112PFC2805

5%

402

50V

402CERM

5%

12PFC2806

1 2

50V

10 23 25

MF-LF402

1/16W5%100KR28901

2

74LVC1G07SC70

U28902

31

5

4

CRITICAL

402CERM

20%10V

0.1UFC2890 1

2

R2888

5%

402MF-LF1/16W

01 2

0

402

5%1/16WMF-LF

R28931 2

25 32 35

25 32 35

MF

5%1/20W

201

0R28001 2 36

TQFN

12

7 10

16

17

1

3

4

9

8

15

11

6

14

25 13

U2800SLG3NB148V

CRITICAL

16

PLACE_NEAR=U1800.N32:5mm

R2819

2

1

201

10K5%

MF1/20W

R28101 2

402

12K

MF-LF 1/16W

5%

Q2810SOT563

3

54

SSM6N37FEAPECRITICAL

R28111

2201

1/20WMF

5%100K

36

Q2810

21

6SOT563

SSM6N37FEAPE

R2812 1

2402

01/16WMF-LF

5%

3

42

1

25.000MHZ-12PF-20PPMSM-3.2X2.5MM

Y2805CRITICAL SYNC_DATE=07/06/2010SYNC_MASTER=K92_MLB

Chipset Support

SYSCLK_CLK25M_X1

PP1V8_S0

PP3V3_ENET

PLT_RESET_L

GMUX_RESET_LMAKE_BASE=TRUE

PLT_RST_BUF_L

BKLT_PLT_RST_L

GMUX_RESET_L

MAKE_BASE=TRUEENET_WAKE_L

MAKE_BASE=TRUELPC_CLK33M_GMUX_R

MAKE_BASE=TRUEPLT_RST_CPU_BUF_L

LPCPLUS_RESET_LMAKE_BASE=TRUE

PLT_RST_CPU_BUF_L

PM_SYSRST_LPCIE_WAKE_L ENET_WAKE_L

PP3V3_ENETSMC_LRESET_L

PP3V3_S0

PCH_CLK33M_PCIIN

XDP_DBRESET_L

LPC_CLK33M_GMUX_R

XDPPCH_PLTRST_L

PCA9557D_RESET_L

LPC_CLK33M_LPCPLUS

LPCPLUS_RESET_L

PP3V3_S0LPC_CLK33M_SMC_R

LPC_CLK33M_LPCPLUS_R

PCH_CLK33M_PCIOUT

AP_RESET_L

MAKE_BASE=TRUEPLT_RST_BUF_L

PLT_RESET_LMAKE_BASE=TRUE

PP3V3_S0

LPC_CLK33M_SMC

SYSCLK_CLK25M_ENET

PLT_RST_BUF_L

SYSCLK_CLK32K_RTC

PPVRTC_G3HSYSCLK_CLK25M_X2_R

SYSCLK_CLK25M_SBSYSCLK_CLK25M_ENET_RSYSCLK_CLK25M_T29

PP3V3_ENET

PP3V3_T29

PP3V3_S5

PP3V42_G3H

ENET_MEDIA_SENSE_RDIV

ENET_MEDIA_SENSE_EN_L

PP3V3_S3

ENET_MEDIA_SENSE

ENET_MEDIA_SENSE_EN

PP1V5_S0LPC_CLK33M_GMUX

SYSCLK_CLK25M_X2

28 OF 132

25 OF 101

6 7 14 17 20 22 70 71 87

6 7 25 36 70 72

25 87

25 36

18 25

10 23 25

6 7 25 36 70 72 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41

45 47 48 49 50 51 53 56 60

61 71 72 79 82 83 84 87 88

89 98

25 32 35

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

7 16 17 20

6 7 25 36 70 72

7 16 19 33 34 35 87

6 7 17 19 20 22 23 24 29 39 45 55 65 70 71 72 82 85 89

98

6 7 42 44 45 46 47 52 62 63 72

6 7 8 18 19 24 29 30 31 32 47 48 49 53 54 71 72 87

7 16 20 22 41 56 70

A6

A7

A11

A5

DQ33

VDD

A10/AP

VDD

VSS

SA1

VTT

VSS

DQS4*

DQS4

VSS

DQ35

VSS

CK0*

SA0

VSS

DQ58

DQ59

DM7

VSS

DQ57

DQ56

DQ50

DQ51

VSS

DQS6*

DQS6

VSS

DQ49

DQ48

DQ43

VSS

DM5

VSS

DQ42

SDA

SCL

VTT

VSS

EVENT*

DQ62

VSS

DQ63

DQS7*

DQS7

DQ60

DQ61

VSS

VSS

DQ55

DQ54

DM6

VSS

DQ53

VSS

DQ52

DQ47

VSS

DQS5

VSS

DQ46

DQ41

VSS

DQ40

DQ34

VSS

DQ32

TEST

VDD

VDD

S1*

A13

CAS*

WE*

BA0

VDD

VDD

CK0

A1

A3

VDD

VDD

A8

A9

A12/BC*

VDD

BA2

NC

VDD

CKE0

VSS

DQS5*

VSS

DQ44

DQ45

DQ39

DQ38

VSS

VSS

DM4

VSS

DQ37

DQ36

VREFCA

VDD

ODT1

NC

S0*

ODT0

BA1

RAS*

VDD

CK1*

VDD

VDD

A0

CK1

A2

VDD

A4

VDD

VDD

A14

A15

CKE1

VDD

VSS

VDDSPD

KEY

(SYMBOL 2 OF 2)

BI

BIBI

BI

IN

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

DQ16

DM3

DQ26

DQ27

DQ4

DQ31

DQ30

DQS3

DQS3*

DQ29

DQ28

DQ23

DQ22

DM2

DQ21

DQ20

DQ15

DQ14

RESET*

DM1

DQ13

DQ12

DQ7

DQ6

DQS0

DQS0*

DQ5

DQ24

DQ25

DQ19

DQ18

DQS2

DQS2*

DQ17

DQ11

DQ10

DQS1

DQS1*

DQ8

DQ9

DM0

DQ0

DQ1

VREFDQ

DQ3

DQ2

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

KEY

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

(SYMBOL 1 OF 2)

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

NC

NC

NC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

SPD ADDR=0xA0(WR)/0xA1(RD)

516-0229

"Factory" (top) slot

Signal aliases required by this page:

Page NotesPower aliases required by this page:

- =PP1V5_S0_MEM_A

- =PP1V5_S3_MEM_A

- =PP0V75_S0_MEM_VTT_A

- =PPSPD_S0_MEM_A (2.5 - 3.3V)

- =I2C_SODIMMA_SCL

- =I2C_SODIMMA_SDA

BOM options provided by this page:

(NONE)

DDR3 DECOUPLING AND GND RETURN CAPS (SPACE EVENLY AT CONNECTOR)

See CSA05 BOM table

F-RT-THB

DDR3-SODIMM-DUAL-K6

J2900

9897

107

83

119

80

78

9695

91

9089

85

109

108

79

115

101

103

102

104

73 74

136

153

170

187

129

131

141

143

130

132

140

142

147

149

157

159

146

148

158

160

163

165

175

177

164

166

174

176

181

183

191

193

180

182

192

194

137

135

154

152

171

169

188

186

198

77

122

116

120

110

114

121

197

201 202

200

125

75 76

105 106

111 112

117 118

123 124

81 82

87 88

93 94

99 100

199

126

127 128

133 134

138

139

144

145

150

151

155 156

161 162

167 168

172

173

178

179

184

185

189 190

195 196

203 204

113

92

86

84

OMIT_TABLE

27

27

0.1UF

2

1 C2931

10V20%

402CERM

2.2UF

2

1 C2930

20%

402-LFCERM6.3V

27

27

6 11 91

27

27

27

27

27

27

27

28 29

27

27

27

27

27

27

27

27

27

27

27

OMIT_TABLE

2625

2019

1413

9

7271

6665

61

60

8

55

54

49

48

4443

3837

3231

3

21

30

62

64

45

47

27

29

10

12

23

21

18

16

6

4

70

68

17

58

56

69

67

59

57

52

50

42

40

15

53

51

41

39

36

34

24

22

35

33

7

5

63

46

28

11 J2900F-RT-THB

DDR3-SODIMM-DUAL-K6

CRITICAL

27

27

27

27

27

27

27

27

27

27

27

27

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

27

27

27

27

27

27

6 11 91

27

6 11 27 91

27

27

27

27

27

27

27

2

1 C29360.1UF

CERM402

20%10V

2

1 C2935

CERM

2.2UF

6.3V20%

402-LF

27

27

27

27

27

27

27

27

27

27

27

28 44

16 23 28 30 41 47 61 88 93

16 23 28 30 41 47 61 88 93

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

27

27

27

27

27

27

27

27

27

27

27

27

6 11 27 91

6 11 27 91

27

27

27

27

27

27

2

1R2941

5%1/16WMF-LF402

10K

2

1R2940

402

5%1/16WMF-LF

10K

2

1 C2940

6.3V

402-LFCERM

20%2.2UF

C2900


1

20%

603

6.3VX5R

10UF

2

1 C290110UF

X5R6.3V20%

603


2

1 C2910


0.1UF20%10V

402CERM 2

1 C2911

CERM10V20%

402

0.1UF


2

1 C2912

CERM


402

10V20%0.1UF

2

1 C29130.1UF20%10VCERM


4022

1 C29140.1UF20%

CERM402

10V


2

1 C2915

CERM402

10V20%0.1UF


2

1 C2916

CERM402

20%0.1UF10V


2

1 C2917

CERM402

20%0.1UF10V


2

1 C2918

CERM402

20%10V

0.1UF


2

1 C2919

CERM402

20%0.1UF10V


2

1 C29200.1UF

CERM402

20%10V


2

1 C2921

CERM402

20%0.1UF10V


2

1 C2922

CERM402

20%0.1UF10V


2

1 C2923


CERM402

20%0.1UF10V

2

1 C295010%10V

1UF

X5R402

2

1 C295110%10V

1UF

X5R402

2

1 C295210%10V

1UF

X5R402

2

1 C295310%10V

1UF

X5R402

SYNC_MASTER=K92_SUMA SYNC_DATE=06/23/2010

DDR3 SO-DIMM Connector A

PP1V5_S3

MEM_A_BA<1>

MEM_A_CLK_P<0>

MEM_A_CLK_N<0>

PP0V75_S3_MEM_VREFCA_A

MEM_A_A<3>

=MEM_A_DQ<0>

MEM_A_A<15>

MEM_A_CKE<1>

=MEM_A_DQ<25>

=MEM_A_DQ<8>

MEM_RESET_L

=MEM_A_DQ<27>

=MEM_A_DQ<19>

=MEM_A_DQS_N<2>

=MEM_A_DQ<17>

=MEM_A_DQ<10>

PP3V3_S0

=MEM_A_DQ<58>

=MEM_A_DQ<59>

=MEM_A_DQ<52>

=MEM_A_DQ<45>

=MEM_A_DQ<44>

MEM_A_DQ<32>

=MEM_A_DQ<42>

=MEM_A_DQ<43>

MEM_A_A<5>

MEM_A_BA<0>

=MEM_A_DQ<34>

=MEM_A_DQ<51>

=MEM_A_DQ<56>

=MEM_A_DQ<32>

=MEM_A_DQ<50>

=MEM_A_DQ<49>

=MEM_A_DQ<48>

MEM_A_A<11>

=MEM_A_DQ<11>

=MEM_A_DQ<29>

MEM_A_ODT<1>

MEM_A_CLK_P<1>

MEM_A_CLK_N<1>

MEM_A_RAS_L

MEM_A_A<2>

MEM_A_CS_L<0>

MEM_A_A<8>

MEM_A_A<1>

MEM_A_A<10>

MEM_A_WE_L

MEM_A_CAS_L

MEM_A_A<13>

MEM_A_CS_L<1>

MEM_A_CKE<0>

=MEM_A_DQS_P<4>

=MEM_A_DQ<33>

=MEM_A_DQS_N<4>

=MEM_A_DQ<35>

=MEM_A_DQ<57>

MEM_A_DQS_N<6>

MEM_A_DQS_P<6>

SMBUS_PCH_DATA

MEM_EVENT_L

=MEM_A_DQS_N<7>

=MEM_A_DQS_P<7>

=MEM_A_DQ<60>

=MEM_A_DQ<40>

MEM_A_BA<2>

=MEM_A_DQ<39>

=MEM_A_DQ<38>

MEM_A_ODT<0>

=MEM_A_DQ<16>

=MEM_A_DQ<26>

=MEM_A_DQ<4>

=MEM_A_DQ<31>

=MEM_A_DQ<30>

=MEM_A_DQS_P<3>

=MEM_A_DQS_N<3>

=MEM_A_DQ<28>

=MEM_A_DQ<15>

=MEM_A_DQ<14>

=MEM_A_DQ<13>

=MEM_A_DQ<12>

=MEM_A_DQ<7>

=MEM_A_DQ<6>

=MEM_A_DQS_P<0>

=MEM_A_DQS_N<0>

=MEM_A_DQ<5>

=MEM_A_DQ<24>

=MEM_A_DQS_P<1>

=MEM_A_DQS_N<1>

=MEM_A_DQ<1>

=MEM_A_DQ<3>

=MEM_A_DQ<2>

=MEM_A_DQ<23>

=MEM_A_DQ<22>

=MEM_A_DQ<21>

MEM_A_A<4>

MEM_A_A<6>

MEM_A_A<12>

MEM_A_A<9>

=MEM_A_DQ<9>


=MEM_A_DQ<53>

=MEM_A_DQ<41>

=MEM_A_DQ<20>

=MEM_A_DQ<46>

=MEM_A_DQ<55>

=MEM_A_DQS_P<2>

=MEM_A_DQ<18>

=MEM_A_DQ<47>

MEM_A_A<0>

MEM_A_A<7>

MEM_A_A<14>

=MEM_A_DQ<37>

=MEM_A_DQS_N<5>

=MEM_A_DQS_P<5>

=MEM_A_DQ<61>

=MEM_A_DQ<63>

MEM_A_SA<1>

PP0V75_S0_DDRVTT

MEM_A_SA<0>

SMBUS_PCH_CLK

=MEM_A_DQ<54>

=MEM_A_DQ<62>

29 OF 132

26 OF 101

6 7 28 29 66 71

30

6 7 12 16 17 18 19 20 22 23 25 28 32 35

36 39 40 41 45

47 48 49 50 51 53 56 60

61 71 72 79 82

83 84 87 88 89 98

9 30

6

6 7 28 29 66

6




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

CPU CHANNEL B DQS 0 -> DIMM B DQS 0



CPU CHANNEL A DQS 4 -> DIMM A DQS 4













DDR3 Byte/Bit Swaps


MEM_A_DQ<33>MAKE_BASE=TRUE


MEM_A_DQS_P<5>MAKE_BASE=TRUE



=MEM_A_DQ<51>

=MEM_A_DQ<58>

=MEM_A_DQ<56>

=MEM_A_DQ<60>MEM_A_DQ<56>MAKE_BASE=TRUE



=MEM_A_DQ<62>

=MEM_A_DQ<63>

=MEM_A_DQ<61>

=MEM_A_DQS_P<7>

=MEM_A_DQ<50>

=MEM_A_DQ<55>

=MEM_A_DQ<54>

MEM_A_DQS_N<6>

=MEM_A_DQ<49>

=MEM_A_DQ<48>

=MEM_A_DQ<59>




=MEM_A_DQ<52>

MAKE_BASE=TRUEMEM_B_DQ<54>

MEM_B_DQ<53>MAKE_BASE=TRUE

=MEM_A_DQ<53>




=MEM_A_DQ<28>

MEM_A_DQS_N<6>MAKE_BASE=TRUE



=MEM_A_DQ<57>

=MEM_A_DQS_N<7>

MAKE_BASE=TRUEMEM_A_DQ<63>

MAKE_BASE=TRUEMEM_A_DQS_P<7>

MAKE_BASE=TRUEMEM_A_DQS_N<7>







MAKE_BASE=TRUEMEM_A_DQS_P<6> MEM_A_DQS_P<6>

MEM_B_DQS_N<6>MAKE_BASE=TRUE

=MEM_B_DQ<62>







=MEM_A_DQ<40>

=MEM_A_DQ<46>

=MEM_A_DQ<44>

=MEM_A_DQ<41>

=MEM_A_DQ<43>

=MEM_A_DQ<47>





=MEM_A_DQ<42>

=MEM_A_DQ<45>

=MEM_A_DQS_P<5>

=MEM_A_DQS_N<5>

MEM_A_DQ<32>



=MEM_A_DQ<37>

=MEM_A_DQ<33>

=MEM_A_DQ<35>

=MEM_A_DQ<32>


=MEM_A_DQ<34>

=MEM_A_DQ<38>





=MEM_A_DQ<30>

=MEM_A_DQ<29>


=MEM_A_DQS_P<4>

=MEM_A_DQ<24>

=MEM_A_DQ<25>

=MEM_A_DQ<27>

=MEM_A_DQ<26>





=MEM_A_DQ<31>

=MEM_A_DQ<18>

=MEM_A_DQ<19>

=MEM_A_DQ<20>


=MEM_A_DQ<16>

=MEM_A_DQ<17>

=MEM_A_DQ<23>

=MEM_A_DQ<22>

=MEM_A_DQ<21>


=MEM_A_DQS_P<2>


=MEM_A_DQ<8>

=MEM_A_DQ<9>

=MEM_A_DQ<10>

=MEM_A_DQ<13>

=MEM_A_DQ<12>

=MEM_A_DQ<15>

=MEM_A_DQS_N<1>

=MEM_A_DQ<1>





=MEM_A_DQ<4>

=MEM_A_DQ<5>








=MEM_A_DQS_P<1>








=MEM_A_DQ<2>

=MEM_A_DQ<0>

=MEM_A_DQ<3>

=MEM_A_DQ<6>


MEM_A_DQS_N<0>


MAKE_BASE=TRUEMEM_B_DQS_P<2>

=MEM_B_DQ<21>

=MEM_B_DQ<19>

=MEM_B_DQ<18>

=MEM_B_DQ<16>


=MEM_B_DQ<29>

=MEM_B_DQ<28>


=MEM_B_DQ<26>

=MEM_B_DQS_N<4>

=MEM_B_DQS_P<4>

=MEM_A_DQ<14>

=MEM_A_DQ<11>

=MEM_A_DQS_N<3>MAKE_BASE=TRUE

MEM_A_DQS_N<3>



=MEM_B_DQ<46>

=MEM_B_DQ<40>

=MEM_B_DQ<45>

=MEM_B_DQ<44>

=MEM_B_DQ<43>

=MEM_B_DQ<42>MEM_B_DQ<42>MAKE_BASE=TRUE


=MEM_B_DQ<58>

=MEM_B_DQ<53>

=MEM_B_DQ<48>



=MEM_B_DQ<1>

=MEM_B_DQS_N<1>

=MEM_B_DQS_P<1>

=MEM_B_DQ<14>

=MEM_B_DQ<13>


=MEM_B_DQ<10>

=MEM_B_DQ<8>

=MEM_B_DQS_N<2>

=MEM_B_DQ<23>


=MEM_B_DQS_N<3>

=MEM_B_DQ<30>

=MEM_B_DQ<24>


=MEM_B_DQ<39>

=MEM_B_DQ<38>

=MEM_B_DQ<37>MAKE_BASE=TRUE

MEM_B_DQ<37>



MEM_B_DQ<36>

MEM_B_DQ<32>

=MEM_B_DQS_N<5>

=MEM_B_DQS_P<5>

=MEM_B_DQ<47>


MEM_B_DQ<41>

MEM_B_DQS_N<6>

MEM_B_DQS_P<6>MAKE_BASE=TRUE

MEM_B_DQS_P<6>

=MEM_B_DQ<55>

=MEM_B_DQ<54>

=MEM_B_DQ<52>

=MEM_B_DQ<51>

=MEM_B_DQ<50>



=MEM_B_DQS_P<7>MEM_B_DQS_P<7>MAKE_BASE=TRUE

=MEM_B_DQS_N<7>MEM_B_DQS_N<7>MAKE_BASE=TRUE






=MEM_B_DQ<57>



=MEM_B_DQ<9>

=MEM_B_DQ<27>

=MEM_B_DQS_N<0>

MAKE_BASE=TRUEMEM_B_DQS_P<1>


=MEM_B_DQS_P<2>

=MEM_B_DQ<22>



=MEM_B_DQ<15>

=MEM_B_DQ<12>

=MEM_B_DQ<20>

=MEM_B_DQS_P<3>

=MEM_B_DQ<31>



=MEM_B_DQ<35>

=MEM_B_DQ<34>

=MEM_B_DQ<33>

=MEM_B_DQ<25>



=MEM_A_DQS_P<3>














=MEM_A_DQS_P<0>




=MEM_A_DQS_N<4>
























=MEM_A_DQS_N<0>

=MEM_A_DQS_N<2>








=MEM_B_DQ<0>

=MEM_B_DQ<2>

=MEM_B_DQ<7>

=MEM_B_DQ<4>

=MEM_B_DQ<5>

=MEM_B_DQ<3>

=MEM_B_DQ<6>

=MEM_B_DQS_P<0>MEM_B_DQS_P<0>MAKE_BASE=TRUE

30 OF 132

27 OF 101

6 11 91

6 11 26 27 91

6 11 91

6 11 91

6 11 91

26

26

26

26 6 11 91

6 11 91

6 11 91 26

26

26

26

26

26

26

6 11 26 27 91

26

26

26

6 11 91

6 11 91

6 11 91

26

6 11 91

6 11 91

26

6 11 91

6 11 91

6 11 91

26

6 11 26 27 91

6 11 91

6 11 91

26

26

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 26 27 91 6 11 26 27 91

6 11 27 28 91

28

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

26

26

26

26

26

26

6 11 91

6 11 91

6 11 91

6 11 91

26

26

26

26

6 11 26 27 91

26 6 11 91

6 11 91

26

26

26

26

6 11 91 26

26

6 11 91

6 11 91

6 11 91

6 11 91

26

26

6 11 91

26

26

26

26

26

6 11 91

6 11 91

6 11 91

6 11 91

26

26

26

26

6 11 91

26

26

26

26

26

6 11 91

26

6 11 91

26

26

26

26

26

26

26

26

26 6 11 91

6 11 91

6 11 91

6 11 91

26

26

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

26

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

26

26

26

26

6 11 91

6 11 91

6 11 91

6 11 91

28

28

28

28

6 11 91

28

28

6 11 91

28

28

28

26

26

26 6 11 91

6 11 91

6 11 91

28

28

28

28

28

28 6 11 91

6 11 91

28

28

28

6 11 91

6 11 91

28

28

28

28

28

28 6 11 91

28

28

28

28

28 6 11 91

28

28

28

6 11 91

28

28

28 6 11 91

6 11 91

28 6 11 91

6 11 27 28 91

28

28

28

28 6 11 91

6 11 27 28 91

6 11 27 28 91 6 11 27 28 91

28

28

28

28

28

28 6 11 91

6 11 91

28 6 11 91

28 6 11 91

6 11 91

28 6 11 91

28 6 11 91

28 6 11 91

28 6 11 91

28

6 11 91

28 6 11 91

28

28

28

6 11 91

6 11 91

28

28

6 11 91

6 11 91

28

28

28

28

28

6 11 91

6 11 91

28

28

28

28

6 11 91

6 11 91

26

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

26

6 11 91

6 11 91

6 11 91

26

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 27 28 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

26

26

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

28

28

28

28

28

28

28

28 6 11 91

IN

BI

BI

BI

OUT

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

NC

NC

NC

IN

VDD

A1

A3

VDD

A5

A8

VDD

A9

VDD

A12/BC*

VSS

DQ42

DQ43

DQ48

DQ49

VSS

VSS

DQ41

DQS4*

DM5

VDD

CKE1

A15

A14

VDD

A11

A7

A6

VDD

A4

A2

CK1

A0

VDD

VDD

CK1*

VDD

RAS*

BA1

ODT0

S0*

NC

ODT1

VDD

VREFCA

VDD

DQ36

DQ37

VSS

DM4

VSS

VSS

DQ38

DQ39

DQ45

DQ44

VSS

DQS5*

VSS

CKE0

VDD

NC

BA2

CK0

VDD

BA0

WE*

A13

S1*

VDD

VDD

TEST

DQ33

DQ32

VSS

DQ34

DQ40

VSS

DQ46

VSS

DQS5

VSS

DQ47

DQ52

VSS

DQ53

VSS

DM6

DQ54

DQ55

VSS

VSS

DQ61

DQ60

DQS7

DQS7*

DQ63

VSS

DQ62

EVENT*

VSS

VTT

SCL

SDA

VSS

DQS6

DQS6*

VSS

DQ51

DQ50

A10/AP

VDD

CK0*

DQ35

VSS

DQS4

VSS

CAS*

VDD

DM7

VSS

DQ56

MTG PINMTG PIN

MTG PIN MTG PIN

MTG PIN MTG PIN

MTG PIN

VSS

DQ57

VTT

SA1

SA0

DQ58

VSS

DQ59

VSS

VDDSPD

MTG PINMTG PINS

KEY

(2 OF 2)

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

DQ2

DQ3

VREFDQ

DQ1

DQ0

DM0

DQ9

DQ8

DQS1*

DQS1

DQ10

DQ11

DQ17

DQS2*

DQS2

DQ18

DQ19

DQ25

DQ24

DQ5

DQS0*

DQS0

DQ6

DQ7

DQ12

DQ13

DM1

RESET*

DQ14

DQ15

DQ20

DQ21

DM2

DQ22

DQ23

DQ28

DQ29

DQS3*

DQS3

DQ30

DQ31

DQ4

DQ27

DQ26

DM3

DQ16

(1 OF 2)

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

KEY

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

- =PP1V5_S0_MEM_B

SPD ADDR=0xA4(WR)/0xA5(RD)

516S0806

516S0806

- =PPSPD_S0_MEM_B (2.5 - 3.3V)

- =PP1V5_S3_MEM_B

"Expansion" (bottom) slot

(NONE)

- =I2C_SODIMMB_SCL

Power aliases required by this page:

DDR3 DECOUPLING AND GND RETURN CAPS (SPACE EVENLY AT CONNECTOR)


Page Notes

- =PP0V75_S0_MEM_VTT_B


- =I2C_SODIMMB_SDA

6 11 91

27

27

27

26 44

16 23 26 30 41 47 61 88 93

16 23 26 30 41 47 61 88 93

CERM10V20%

402

0.1UFC31311

2

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 27 91

27

27

27

27

27

27

27

27

27

27

6 11 27 91

6 11 27 91

27

27

27

27

27

27

CERM402-LF

6.3V20%2.2UFC31301

2

5%

MF-LF402

10K

1/16W

R31411

2

MF-LF1/16W

402

5%10KR31401

2

2.2UF

6.3V

402-LFCERM

20%

C31401

2


6.3VX5R

20%10UFC31001

2


20%

603X5R

10UF6.3V

C31011

2

0.1UF20%10V

402CERM


C31101

220%10VCERM402

0.1UF


C31111

2


402

10V20%0.1UF

CERM

C31121

2


20%10V

0.1UF

402CERM

C31131

2

27


20%

CERM402

10V

0.1UFC31141

2


402

20%0.1UF

CERM10V

C31151

2


CERM402

20%0.1UF10V

C31161

2


CERM402

20%0.1UF10V

C31171

2


CERM402

20%0.1UF10V

C31181

2


CERM402

20%0.1UF10V

C31191

2


0.1UF

CERM402

20%10V

C31201

2


CERM402

20%0.1UF10V

C31211

2


CERM402

20%0.1UF10V

C31221

2


CERM402

20%0.1UF10V

C31231

2

27

10%10VX5R402

1UFC31531

210%10VX5R402

1UFC31521

2

6 11 91

10%10V

1UF

X5R402

C31511

210%10V

1UF

X5R402

C31501

2

F-RT-BGA6

DDR3-SODIMM

J3100

9897

107

8483

119

80

78

9695

9291

90

86

89

85

109

108

79

115

101

103

102

104

73 74

136

153

170

187

129

131

141

143

130

132

140

142

147

149

157

159

146

148

158

160

163

165

175

177

164

166

174

176

181

183

191

193

180

182

192

194

137

135

154

152

171

169

188

186

198

77

122

116

120

110

114

121

197

201 202

200

125

75 76

105 106

111 112

117 118

123 124

81 82

87 88

93 94

99 100

199

126

127 128

133 134

138

139

144

145

150

151

155 156

161 162

167 168

172

173

178

179

184

185

189 190

195 196

205 206

207 208

209 210

211 212

203 204

113

OMIT_TABLE

27

27

27

27

27

27

27

26 29

27

27

27

27

27

27

27

27

27

27

27

27

27

F-RT-BGA6

DDR3-SODIMM

CRITICAL

J310011

28

46

63

5

7

33

35

22

24

34

36

39

41

51

53

15

40

42

50

52

57

59

67

69

56

58

17

68

70

4

6

16

18

21

23

12

10

29

27

47

45

64

62

30

1 2

3

31 32

37 38

43 44

48

49

54

55

8

60

61

65 66

71 72

9

13 14

19 20

25 26

OMIT_TABLE

27

27

27

27

27

27

27

27

27

27

27

27

27

6 11 91

6 11 91

6 11 91

27

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

6 11 91

27

27

27

27

27

27

6 11 91

27

27

27

27

27

27

27

27

CERM402

10V

0.1UF20%

C31361

2

2.2UF

6.3VCERM

20%

402-LF

C31351

2

27

27

27

27

27

27

27

27

DDR3 SO-DIMM Connector BSYNC_DATE=06/23/2010SYNC_MASTER=K92_SUMA

MEM_B_WE_L

PP0V75_S0_DDRVTT

=MEM_B_DQS_P<0>

=MEM_B_DQ<60>

=MEM_B_DQ<61>

=MEM_B_DQS_N<7>

=MEM_B_DQS_P<7>

MEM_B_SA<0>

=MEM_B_DQ<43>

MEM_B_A<6>

PP1V5_S3

MEM_B_A<4>

PP3V3_S0

=MEM_B_DQS_P<4>

=MEM_B_DQ<34>

=MEM_B_DQ<62>

=MEM_B_DQ<50>

=MEM_B_DQ<16>

=MEM_B_DQ<26>

=MEM_B_DQ<27>

=MEM_B_DQ<4>

=MEM_B_DQ<31>

=MEM_B_DQ<30>

=MEM_B_DQS_P<3>

=MEM_B_DQS_N<3>

=MEM_B_DQ<29>

=MEM_B_DQ<28>

=MEM_B_DQ<23>

=MEM_B_DQ<22>

=MEM_B_DQ<21>

=MEM_B_DQ<20>

=MEM_B_DQ<15>

=MEM_B_DQ<14>

MEM_RESET_L

=MEM_B_DQ<12>

=MEM_B_DQ<7>

=MEM_B_DQ<6>

=MEM_B_DQS_N<0>

=MEM_B_DQ<5>

=MEM_B_DQ<24>

=MEM_B_DQ<25>

=MEM_B_DQ<19>

=MEM_B_DQ<18>

=MEM_B_DQS_P<2>

=MEM_B_DQS_N<2>

=MEM_B_DQ<17>

=MEM_B_DQ<11>

=MEM_B_DQ<10>

=MEM_B_DQS_P<1>

=MEM_B_DQS_N<1>

=MEM_B_DQ<8>

=MEM_B_DQ<9>

=MEM_B_DQ<0>

=MEM_B_DQ<1>

PP0V75_S3_MEM_VREFDQ_B

=MEM_B_DQ<3>

=MEM_B_DQ<2>

=MEM_B_DQ<58>

MEM_B_SA<1>

=MEM_B_DQ<57>

=MEM_B_DQ<56>

=MEM_B_DQ<35>

=MEM_B_DQ<51>

SMBUS_PCH_DATA

SMBUS_PCH_CLK

MEM_EVENT_L

=MEM_B_DQ<63>

=MEM_B_DQ<55>

=MEM_B_DQ<53>

=MEM_B_DQ<52>

=MEM_B_DQ<47>

=MEM_B_DQS_P<5>

=MEM_B_DQ<46>

=MEM_B_DQ<40>

MEM_B_DQ<32>

MEM_B_A<13>

MEM_B_BA<2>

MEM_B_CKE<0>

=MEM_B_DQS_N<5>

=MEM_B_DQ<44>

=MEM_B_DQ<45>

=MEM_B_DQ<39>

=MEM_B_DQ<38>

=MEM_B_DQ<37>

=MEM_B_DQ<36>

PP0V75_S3_MEM_VREFCA_B

MEM_B_CS_L<0>

MEM_B_BA<1>

MEM_B_CLK_N<1>

MEM_B_A<0>

MEM_B_A<2>

MEM_B_A<7>

MEM_B_A<11>

MEM_B_A<14>

MEM_B_A<15>

MEM_B_CKE<1>

=MEM_B_DQS_N<4>

=MEM_B_DQ<41>

MEM_B_A<12>

MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<5>

MEM_B_A<1>

=MEM_B_DQ<13>

=MEM_B_DQ<59>

MEM_B_ODT<0>

MEM_B_RAS_L

MEM_B_CLK_P<1>

MEM_B_ODT<1>

MEM_B_CS_L<1>

MEM_B_CAS_L

MEM_B_BA<0>

MEM_B_A<10>

MEM_B_CLK_N<0>

MEM_B_CLK_P<0>

MEM_B_A<3>

MEM_B_DQS_P<6>

MEM_B_DQS_N<6>

=MEM_B_DQ<49>

=MEM_B_DQ<48>

=MEM_B_DQ<42>

=MEM_B_DQ<33>

=MEM_B_DQ<54>

31 OF 132

28 OF 101

6 7 26 29 66

6

6 7 26 29 66 71

6 7 12 16 17 18 19 20 22 23 25 26 32 35 36 39

40 41 45 47 48 49

50 51 53 56 60 61 71 72 79

82 83 84 87 88 89

98

9 30

6

30

IN IN

IN

OUT

OUT

D

SG

D

S G

D

SG

D

S G

D

SG

D SG

DSG

D

SG

OUT

IN

IN

D

SG

D

SG

IN

G

D

S

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

The circuit below handles CPU and VTT power during S0->S3->S0 transitions, as well

ISOLATE_CPU_MEM_L GPIO state during S3<->S0 transitions determines behavior of signals.

WHEN LOW: CPU 1.5V follows S0 rails, VTT ensures clean CKE transition, MEM_RESET_L isolated.

MEMVTT_EN = (ISOLATE_CPU_MEM_L + PLT_RST_L) * PM_SLP_S3_L

WHEN HIGH: CPU 1.5V remains powered in S3, VTT follows S0 rails, MEM_RESET_L not isolated.

1V5 S0 "PGOOD" for CPU

as isolating the CPU’s SM_DRAMRST# output from the SO-DIMMs when necessary.

PM_MEM_PWRGD pull-up to CPU VTT rail is on CPU page

75mA max load @ 0.75V

MEM_RESET_L = !ISOLATE_CPU_MEM_L + CPU_MEM_RESET_L

7 1 1 1 1 1 CPU_MEM_RESET_L 1 1 6 0 1 1 1 1 1 1 1 5 0 1 1 1 0 (*) 1 1 1 4 0 0 1 1 X 1 0 1

3 0 0 0 1 X 1 0 0 2 0 0 1 1 1 1 0 1

0 1 1 1 1 1 CPU_MEM_RESET_L 1 1

Step ISOLATE_CPU_MEM_L PLT_RESET_L PM_SLP_S3_L PM_SLP_S4_L CPU_MEM_RESET_L MEM_RESET_L MEMVTT_EN P1V5CPU_EN

1 0 1 1 1 1 1 1 1

(*) CPU_MEM_RESET_L asserts due to loss of PM_MEM_PWRGD, must wait for software to clear before deasserting ISOLATE_CPU_MEM_L GPIO.

NOTE: In the event of a S3->S5 transition ISOLATE_CPU_MEM_L will still be asserted on next S5->S0

must deassert ISOLATE_CPU_MEM_L and then generate a valid reset cycle on CPU_MEM_RESET_L.

P1V5CPU_EN = (ISOLATE_CPU_MEM_L + PM_SLP_S3_L) * PM_SLP_S4_L

S0toS3toS0

60mW max power

Ensures CKE signals are held low in S3MEMVTT Clamp

transition. Rails will power-up as if from S3, but MEM_RESET_L will not properly assert. Software

19 23 6 17 44 72

18 25 39

1/16W5%

MF-LF

CPUMEM_S0

100K

402

R32021

2

8 29 66

10K1/16W5%

CPUMEM_S0R32101

MF-LF4022

CPUMEM_S0

100K

MF-LF402

5%1/16W

R32151

2

26 28

20K

402

5%1/16W

1

2

R3216CPUMEM_S0

MF-LF

SOT563SSM6N15FEAPE

CPUMEM_S0Q3200 3

54

CRITICAL

SOT563SSM6N15FEAPEQ32053

54

CRITICALCPUMEM_S0

SOT563

CPUMEM_S0

SSM6N15FEAPEQ3210 6

1

CRITICAL

2

Q32103

54

SOT563SSM6N15FEAPE

CPUMEM_S0CRITICAL

SOT563SSM6N15FEAPE

CPUMEM_S06

21

CRITICAL

Q3200

6

21

CRITICAL

CPUMEM_S0Q3215

SOT563

SSM6N15FEAPE

SSM6N15FEAPESOT563

3

54

CRITICALCPUMEM_S0Q3215

SSM6N15FEAPEQ3205 6

21

CRITICALCPUMEM_S0

SOT563

71

10K1/16W5%

402MF-LF

CPUMEM_S0

R32051

2

17 42 44 65 72

100K5%

MF-LF

CPUMEM_S0

1/16W

R32011

2402

8 29 66

SSM6N15FEAPESOT563

Q3250

5 4

CRITICAL

3CPUMEM_S0

402

CPUMEM_S0

2

1R3251100K

5%1/16WMF-LF

402

NO STUFF

50V

0.001UF20%

CERM

C3251 1

2

SOT563

CPUMEM_S06

2 1

CRITICAL

SSM6N15FEAPEQ3250

MF-LF

105%

603

1/10W

CPUMEM_S0R32501

2

MF-LF1/16W5%

402

0R32171 2

CPUMEM_S3

10 29

MF-LF

1%33.2K

402

1/16W

R32211

2

402

27.4K1%

1/16W

R32201

2MF-LF

SOT-563

5

3

4

CRITICALQ3220DMB53D0UV

5%10K

402

R32221

2MF-LF1/16W

SOT-563DMB53D0UVQ3220

6

2

1

CRITICAL

10 17 90

CERM

NO STUFF

402

50V20%

0.001UFC3220 1

2

402

1

210%0.1UF

X5R16V

C3216CPUMEM_S0


CPU Memory S3 Support

MEMRESET_ISOL_LS5V_L

CPU_MEM_RESET_LMAKE_BASE=TRUE

VTTCLAMP_EN

MEMVTT_EN

ISOLATE_CPU_MEM_L

PP5V_S3

PLT_RESET_L

PP3V3_S3

P1V5CPU_EN_L

CPU_MEM_RESET_L

MEMVTT_EN

PM_SLP_S3_L

P1V5CPU_EN

PP0V75_S0_DDRVTT

VTTCLAMP_L

PP5V_S3

MEMVTT_EN_L

PM_SLP_S4_L

PP1V5_S3RS0_CPUDDR

PP3V3_S5

PM_MEM_PWRGD_L

PM_MEM_PWRGD

P1V5_S0_DIV

PP1V5_S3

MEM_RESET_L

32 OF 132

29 OF 101

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 8 18 19 24 25 30 31 32 47 48 49 53 54 71 72 87

6 7 26 28 66

6 7 29 31 41 42 43 45 65 66 71 81 100

7 10 13 15 71 72

6 7 17 19 20 22 23 24 25 39 45 55 65 70 71 72 82 85 89 98

6 7 26 28 66 71

OUT

V-

V+

V-

V+

V-

V+

V-

V+

V-

V+

V-

V+

IN

RESET*

A0

A1

A2

SCL

SDA

P0

P1

P2

P5

P6

P7

P3

P4

THRM

VCC

GNDPAD

NC

NC

IN

BI

VDD

VOUTD

VOUTC

VOUTB

VOUTASCL

SDA

A0

A1

GND

IN

BI





36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

both at the same time!

Addr=0x98(WR)/0x99(RD)

8.59mV / step @ output

MEM B VREF CA

1.5V (DAC: 0x3A)

0.000V - 3.000V (0x00 - 0x74)

GPU Frame Buffer (1.8V, 70% VRef)

Page Notes

C

MEM A VREF CA

+61uA - -61uA (- = sourced)

MEM VREGMEM B VREF DQ

0.75V (DAC: 0x3A)

0.000V - 1.501V (0x00 - 0x74)+3.4mA - -3.4mA (- = sourced)

0.300V - 1.200V (+/- 450mV)

Addr=0x30(WR)/0x31(RD)

RST* on ’platform reset’ so that system

NOTE: Margining will be disabled across all soft-resets and sleep/wake cycles.


0.000V - 3.300V (0x00 - 0xFF)

6D

NOTE: Must not enable more than two SO-DIMM margining buffers at once or VRef source may be overloaded.

5DDAC Channel:

PCA9557D Pin:

DAC range:

Nominal value

DAC step size:VRef current:

Margined target:

MEM A VREF DQ

B21

A


C3 4

- =PP3V3_S3_VREFMRGN

- =I2C_VREFDACS_SCL- =I2C_VREFDACS_SDA

- =I2C_PCA9557D_SDA

Circuitry.

Circuitry.

- =PPVTT_S3_DDR_BUF


VREFMRGN - Stuffs VREF Margining

VREFMRGN_NOT - Bypasses VREF Margining


10mA max load


- =I2C_PCA9557D_SCL

+6.0mA - -5.0mA (- = sourced)

1.056V - 1.442V (+/- 180mV)

(OD)

1.267V (DAC: 0x8B)

a DAC output, cannot enableNOTE: MEMVREG and FRAMEBUF share

1.000V - 2.000V (+/- 500mV)

Required zero ohm resistors when no VREF margining circuit stuffed

watchdog will disable margining.

66

VREFMRGN

0.1UF

CERM402

20%10V

C3302 1

2

402

1%1/16W


VREFMRGN

MF-LF

33.2KR33141 2

402MF-LF

100K

VREFMRGN

1/16W5%

R33131

2

100K5%1/16WMF-LF402

VREFMRGN

R33151

2

VREFMRGN

MAX4253UCSP

U3302

C3

C2

C1

C4

B1

B4

CRITICAL

MAX4253UCSP

VREFMRGNU3303

A3

A2

A1

A4

B1

B4

CRITICAL

MAX4253UCSP

VREFMRGNU3302

A3

A2

A1

A4

B1

B4

CRITICAL

UCSPMAX4253U3303

C3

C2

C1

C4

B1

B4

VREFMRGN

CRITICAL

UCSPMAX4253

A3

A2

A1

A4

B1

B4

U3304VREFMRGN

CRITICAL

UCSP

VREFMRGN

MAX4253U3304

C3

C2

C1

C4

B1

B4

CRITICAL


1/16W1%

402MF-LF

VREFMRGN

200R33091 2

PLACE_NEAR=J3100.126:2.54mm200

MF-LF402

1%1/16W

VREFMRGN

R33111 2

SHORT

NONE402

NONENONE

OMIT

R33181 2

NONE

402NONE

SHORT

OMIT

NONE

R33191 2

25

200

MF-LF402

1%1/16W

VREFMRGN

PLACE_NEAR=J2900.1:2.54mmR33031 2

133

PLACE_NEAR=R3303.2:1mm1%

402MF-LF

VREFMRGN

1/16W

R33041 2

VREFMRGN

200

MF-LF402

1%1/16W

PLACE_NEAR=J3100.1:2.54mmR33051 2

133


VREFMRGN

1/16W1%

MF-LF402

R33061 2

402MF-LF1/16W5%0

VREFMRGNR33171

2

MF-LF402

1/16W5%0

VREFMRGNR33161

2

MF-LF

VREFMRGN

5%100K1/16W

402

R33021

2

MF-LF

5%100K

402

VREFMRGN

1/16W

R33011

2

133


VREFMRGN

MF-LF402

1%1/16W

R33101 2

1/16W

VREFMRGN

402

5%

MF-LF

100KR33071

2

PCA9557QFN

VREFMRGN

U3301

3

4

5

8

6

7

9

10

11

12

13

14

15

1

2

17

16

CRITICAL

20%

CERM10V

0.1UF

402

VREFMRGNC3304 1

2

PLACE_NEAR=R3311.2:1mmMF-LF

133

1%

VREFMRGN

1/16W

402

R33121 2

1/16W5%

402MF-LF

100K

VREFMRGNR33081

2

16 23 26 28 30 41 47 61 88 93

16 23 26 28 30 41 47 61 88 93

DAC5574

CRITICAL

MSOP

VREFMRGNU3300

9

10

3

6

7

8

1

2

4

5

16 23 26 28 30 41 47 61 88 93

16 23 26 28 30 41 47 61 88 93

10V20%

402CERM

0.1UF

VREFMRGNC33011

220%

402-LFCERM

2.2UF

VREFMRGN1

26.3V

C3300

402CERM10V20%

0.1UF

VREFMRGNC3305 1

2

VREFMRGN

402CERM

20%10V

0.1UFC3303 1

2

R3309,R3311RES,MTL FILM,0,5%,0402,SM,LF116S0004 2 VREFMRGN_NOT

R3303,R3305116S0004 RES,MTL FILM,0,5%,0402,SM,LF2 VREFMRGN_NOT

SYNC_DATE=04/27/2010SYNC_MASTER=K18_MLB

FSB/DDR3/FRAMEBUF Vref Margining

VREFMRGN_FRAMEBUF_BUF

PPVTTDDR_S3

PCA9557D_RESET_L

VREFMRGN_DQ_SODIMMB_BUF

DDRREG_FB

VREFMRGN_SODIMMB_DQ

SMBUS_PCH_CLK

SMBUS_PCH_CLK


VOLTAGE=0.75V


MIN_NECK_WIDTH=0.2 mmVOLTAGE=0.75V

MIN_LINE_WIDTH=0.3 mmPP0V75_S3_MEM_VREFDQ_B

PP0V75_S3_MEM_VREFCA_AMIN_LINE_WIDTH=0.3 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=0.75V

PP0V75_S3_MEM_VREFCA_BMIN_LINE_WIDTH=0.3 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=0.75V

VREFMRGN_DQ_SODIMMA_BUF

SMBUS_PCH_DATA

VREFMRGN_DQ_SODIMMA_EN


PP3V3_S3_VREFMRGN_CTRLMIN_LINE_WIDTH=0.3 mm

VREFMRGN_MEMVREG_FBVREF_R

VREFMRGN_FRAMEBUF_EN

VREFMRGN_MEMVREG_BUF

VREFMRGN_CA_SODIMMB_ENVREFMRGN_CA_SODIMMA_EN

PP3V3_S3

VREFMRGN_CA_SODIMMA_BUF

VREFMRGN_DQ_SODIMMB_EN

VREFMRGN_MEMVREG_FBVREF

VREFMRGN_SODIMMS_CA

VREFMRGN_SODIMMA_DQ

VREFMRGN_CA_SODIMMB_BUF

VREFMRGN_FRAMEBUF_BUF_R

VREFMRGN_MEMVREG_EN

SMBUS_PCH_DATA


VOLTAGE=3.3V

PP3V3_S3_VREFMRGN_DAC

33 OF 132

30 OF 101

6 7 66

9 26

9 28

26

28

6 7 8 18 19 24 25 29 31 32 47 48 49 53 54 71 72 87

BI

BI

IN

BI

SYM_VER-1

IN

SG

D

IN

IN

IN

IN

BI

BI

SYM_VER-1

OUT

RESET*

OUT

EN

MR*

GNDTHRM

IN

VDD

SENSE +-

PAD

(OD)

0.7V

DLY

IN

IN

OUT

BI

IN

IN OUT

OUT





36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

LOADING

RDS(ON)

1 A (EDP)

20-30 MOHM @2.5V

Supervisor & CLKFREG # Isolation

Delay = 60 ms +/- 20%

3V S3 WLAN FET

TPCP8102

P-TYPE

MOSFET

BLUETOOTH

1A PEAK

AIRPORT

516S0582

518S0816

206 mA nominal max

ALSCAMERA

275 mA peak

155S0367

CHANNEL

0402-LF

L3408

12

FERR-120-OHM-1.5A

PLACE_NEAR=J3402.6:2.54MM

C34521

2 CERM

20%10V

402

0.1uF

18

18

6 44 47 53 54 96

6 44 47 53 54 96

L3407

1 2

34

DLP0NS90-OHM

CRITICAL


72

R34511

2 402

1/16W

10K5%

MF-LF

133K

2

R3450

402

5%1/16WMF-LF

C3451 1

2

10%

402X5R16V

0.033UF

6

21

CRITICALQ3450

578

4

3

TPCP810223V1K-SM

0.1UF2

C3450

16V

402-1

1

10%

X5R

FERR-120-OHM-3A

0603

L34041 2


CERM

C3421 1

2

402

10V

0.1uF20%

C3422 1

2

0.1uF

402

20%10V

CERM


16 93

16 93

16 93

16 93

24 92

24 92

C34311 2 0.1UF

402-1X5R16V10%


X5R

PLACE_NEAR=J3401.17:2.54mmC3430

402-1

0.1UF1

16V

2

10%

90-OHM-100MA

CRITICALL3401


DLP11S

4

1 2

3

0402-LFFERR-120-OHM-1.5A


2 1

L3406

6 17 25 84

31

J3401

1

1011121314

1516171819

2

20212223242526272829

3

30

32

3334

456789

500913-0302F-ST-SM

CRITICAL

402CERM

0.01UF

16V10%

2

1 C3432

J3402

7

8

1

2

3

4

5

6

CRITICAL

CCR20-6K710SF-RT-SM

U3440

6

5

7

3

8

4

2

9

1CRITICAL

SLG4AP016VTDFN

25

18 72

16 23

C34401

2

0.1uF

402

10V20%

CERM

R34541

2

1%1/16W

402MF-LF

232K

R34551

2

100K1%1/16WMF-LF402

R34531

2

1/16WMF-LF402

1%100K

6 44 47 50 79 96

6 44 47 50 79 96

6 44 45

2

1

0201X5R-CERM16V

0.1UFC3470

10%

NOSTUFF

OMIT_TABLEL3470

0.6NH+/-0.1NH-0.85A

21

0201

10.1UFC3471

10%

NOSTUFF

2 16VX5R-CERM0201

2

1

16V

0.1UFC3473

X5R-CERM

10%

0201

NOSTUFFOMIT_TABLE

L347121

02010.6NH+/-0.1NH-0.85A

2

1

0201X5R-CERM

10%16V

0.1UFC3472NOSTUFF

2 X5R-CERM

10%16V

0.1UF

0201

1 C3475NOSTUFF0.6NH+/-0.1NH-0.85A

OMIT_TABLE

21

0201

L3473

C3474

X5R-CERM2

1

0201

10%0.1UF

16V NOSTUFF

C34770.1UF

2

1

0201

10%

X5R-CERM16V

NOSTUFF

OMIT_TABLE

21

0201

L3474

0.6NH+/-0.1NH-0.85A

2

1

0201X5R-CERM

C34760.1UF10%16V NOSTUFF

6 16 93

6 16 93

SMXW3452

2 1

SYNC_MASTER=K91_MARY SYNC_DATE=10/08/2010

X19/ALS/CAMERA CONNECTOR

L3470,L3471,L3473,L3474RES, 0OHM, 02014117S0002

USB_CAMERA_N

USB_CAMERA_P

PP5V_S3

AP_RESET_L

P3V3WLAN_VMON

AP_PWR_EN

AP_CLKREQ_L

PP3V3_S3

PM_WLAN_EN_L

PCIE_WAKE_L

USB_CAMERA_CONN_NUSB_CAMERA_CONN_PSMBUS_SMC_A_S3_SDA

PP5V_S3_ALSCAMERA_FMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.2 mmSMBUS_SMC_A_S3_SCL

PCIE_CLK100M_AP_N

PP3V3_S3_BT_FMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.2 mm

WIFI_EVENT_L

SMBUS_SMC_0_S0_SCL

PP3V3_S3

SMBUS_SMC_0_S0_SDA

AP_RESET_CONN_L

PCIE_AP_D2R_PI_P

AP_CLKREQ_Q_L

PCIE_CLK100M_AP_P

PCIE_CLK100M_AP_CONN_NPCIE_CLK100M_AP_CONN_P

PCIE_AP_D2R_PI_N

USB_BT_P

PCIE_AP_R2D_C_N

PCIE_AP_R2D_C_P

PCIE_AP_R2D_PI_N

USB_BT_N

PP3V3_WLAN_F

PCIE_AP_R2D_N

PCIE_AP_D2R_N

PCIE_AP_R2D_P

PCIE_AP_R2D_PI_P

PCIE_AP_D2R_P

PP3V3_WLAN

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=1 mm

PP3V3_WLAN_F

MIN_LINE_WIDTH=1 mmMIN_NECK_WIDTH=0.4 mm

PP3V3_S3

P3V3WLAN_SS

MIN_LINE_WIDTH=1 mmMIN_NECK_WIDTH=0.5 mm

PP3V3_WLAN_R

34 OF 132

31 OF 101

6 7 29 41 42 43 45 65 66 71 81 100

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6 92

6 92

6

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

6

6

6 98

6 98

31

6 93

6 45 31

6 7 8 18 19 24 25 29 30 31 32 47 48

49 53 54 71 72 87

OUT

BI

BI

OUT

BI

BI

BI

IN

BI

BI

BI

OC*

OUT2

OUT1

OUT0

THRMGND

EN

IN1

IN0

PAD

IN

VDD

WRITE_PROTECT_SW

CARD_DETECT_SW

CARD_DETECT_GND

DAT6

DAT7

DAT1

CD/DAT3

DAT2

DAT4

DAT5

VSS

VSS

CLK

CMD

DAT0

SHLD_PIN

SHLD_PIN

SHLD_PIN

SHLD_PIN

OUT

OUT

IN

DET_OUT

DET_IN

RST_IN*

DET_CHNGD*

LOW_PWRRST_OUT*

VDD

THRMGND PAD

(IPU) (OD)

(OD)

DLY

XOR

LOGIC

RSTOUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

deasserts for >80ms, then asserts for

SDCONN DETECT DEBOUNCE, INVERSION, AND DETECT-CHANGED PCH GPIO LATCH CIRCUIT

R3511 and R3510 mutually exclusiveto control effect of =ENET_RESET_L

FROM SD CONN ->

R3514 and R3512 mutually exclusive

-> TO ENET CHIP

-> TO PCH GPIO

DLY block is 20ms nominalWhen ENET_LOW_PWR deasserts, RST_OUT#

10ms regardless ofmove RST_IN# state.Otherwise RST_OUT# follows RST_IN#

to bypass reset logicon DET_CHANGED# logic.

when R3511 is NOT STUFFED.Must STUFF R3512 and NOSTUFF R3514

353S3004

SD CARD 3.3V OVERCURRENT PROTECTION CHIP WITH ACTIVE LOAD DISCHARGETPS2065-1 (1.0A limit) has active load discharge so R4810 is NOSTUFF.

516-0225

SD CARD CONNECTOR

MAKES THE ACTIVE-HIGH CASE UNUSABLE.

(CARD INSERTED = OPEN)CAESAR-IV CARD DETECT IS PROGRAMMABLE, BUT A SILICON BUG

-> FROM PCH GPIO

36 94

36 94

36 94

36

36 94

36 94

36 94

36 94

36 94

36 94

36 94

CRITICAL

DGN2TPS2065-1U3500

4

1

3

5

678

9

CRITICAL

6.3VX5R603

20%10UF

2

C35021

2

1C35030.1UF10%16VX7R-CERM402

NOSTUFF

47KR35001

2MF-LF1/16W402

5%CRITICAL

6.3V

C350010UF20%

603X5R

1

2

10.1UF16V

C3501

X7R-CERM10%

2402

0R35021 2

MF-LF1/16W402

5%

10KR35011

2MF-LF1/16W

402

5%

25 35

J3500F-RT-TH

8

1

15

14

5

2

7

9

10

11

13

17

18

19

20

4

6

16

SD-CARD-K19-K24

3

CRITICAL

12

0 1 2R3560 MF-LF1/16W 4025%

18 23

36 NOSTUFF

R35101

2

10KMF-LF1/16W

402

5%

402-1

10%1UF

X5R10V

C3510 1

2

0R3511

1 2

MF-LF1/16W402

5%

19 36

SLG4AP014VU3511

TDFN

CRITICAL

86

7

2

3

4

9

1

5

0R3514

1 2

MF-LF1/16W402

5%36 94

0

NOSTUFFR3512

2MF-LF1/16W

402

5%

1

133 2R3579 5% 4021/16W MF-LF

47NH-1.3OHM

0402

1 2

L3500CRITICAL

2

1

CERM

C3570

50V

15PF

NOSTUFF

402

5%50V

22PF

CERM

1

2

C3571NOSTUFF

402

5%

R3571 402MF-LF1/16W33 5%21

5%33 1/16W MF-LF 40221R35725%33 1/16W MF-LF 40221R35735%33 1/16W MF-LF 40221R35745%33 1/16W MF-LF 40221R35755%33 1/16W MF-LF 40221R35765%33 1/16W MF-LF 40221R3577

MF-LF1/16W33 5% 40221R3578

1 2 402R3561 5%33 1/16W MF-LF


SD READER CONNECTORSYNC_MASTER=K91_ERIC

SDCONN_CMD SDCONN_CMD_R

PLT_RST_BUF_L

SDCONN_DATA<7> SDCONN_R_DATA<7>SDCONN_DATA<6> SDCONN_R_DATA<6>SDCONN_DATA<5> SDCONN_R_DATA<5>SDCONN_DATA<4> SDCONN_R_DATA<4>SDCONN_DATA<3> SDCONN_R_DATA<3>SDCONN_DATA<2> SDCONN_R_DATA<2>SDCONN_DATA<1> SDCONN_R_DATA<1>SDCONN_DATA<0> SDCONN_R_DATA<0>

SDCONN_CLK_R_LSDCONN_CLK_R

PP3V3_S0_SW_SD_PWR


MAKE_BASE=TRUEMIN_LINE_WIDTH=0.4 mm

SDCONN_OC_L_R

ENET_LOW_PWR

ENET_CR_PWREN

SDCONN_OC_L

PP3V3_S0

PP3V3_S0

PP3V3_S0_SW_SD_PWR

SDCONN_STATE_CHANGE

SDCONN_DETECT_L

SDCONN_DETECT

ENET_RESET_LSLG_ENET_RESET_OUT_L

SLG_ENET_RESET_IN_L

PP3V3_S3

SDCONN_DETECT_R

PP3V3_S0_SW_SD_PWRSDCONN_WP

SDCONN_CLK

SDCONN_DETECT

35 OF 132

32 OF 101

94

94 94

32

36

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

32

32

6 7 8 18 19 24 25 29 30 31 47 48 49 53 54 71 72 87

32

32

OUT

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

IN

OUT

IN

OUT

OUT

OUT

IN

IN

IN

OUT

IN

IN

OUT

OUT

BI

DPSNK0_ML_LANE_3P

DPSNK0_ML_LANE_3N

DPSNK0_ML_LANE_2P

DPSRC0_HOT_PLUG_DET

TEST_POINT_2

TEST_POINT_3

DPSNK0_HOT_PLUG_DET

DPSNK0_AUX_CHN

DPSNK0_AUX_CHP

DPSNK0_ML_LANE_0N

DPSNK0_ML_LANE_0P

DPSNK0_ML_LANE_1N

DPSNK0_ML_LANE_1P

DPSNK0_ML_LANE_2N

TEST_POINT_0

TEST_EN

THERM_DP

EE_CLK

EE_CS*

EE_DO

EE_DI

PCIE_CLKREQ_3*

PCIE_CLKREQ_2*

PCIE_CLKREQ_1*

PCIE_CLKREQ_0*

DPSNK1_ML_LANE_1P

DPSNK1_ML_LANE_2N

DPSNK1_ML_LANE_2P

DPSNK1_ML_LANE_3N

DPSNK1_ML_LANE_3P

DP_RES_1

DP_RES_0

DP_ATEST

DPSRC0_AUX_CHN

DPSRC0_AUX_CHP

DPSRC0_ML_LANE_0N

DPSRC0_ML_LANE_0P

DPSRC0_ML_LANE_1N

DPSRC0_ML_LANE_1P

DPSRC0_ML_LANE_2N

DPSRC0_ML_LANE_2P

DPSRC0_ML_LANE_3N

DPSRC0_ML_LANE_3P

TMU_CLK_OUT

TMU_CLK_IN

XTAL_25_IN

XTAL_25_OUT

REFCLK_100_IN_P

REFCLK_100_IN_N

TDO

TCK

TMS

TDI

PCIE_RST_3*

PCIE_RST_1*

PCIE_RST_2*

PCIE_RST_0*

RBIAS

RSENSE

PERST*

WAKE*

PER_1_P

PER_2_P

PER_3_P

MONDC0

MONOBSN

MONOBSP

MONDC1

PER_3_N

PER_2_N

PER_0_N

PER_0_P

PET_3_P

PET_3_N

PET_2_N

PET_2_P

PET_1_P

PET_1_N

PET_0_N

PET_0_P

TEST_POINT_1

DPSNK1_ML_LANE_0N

PER_1_N

DPSNK1_ML_LANE_0P

DPSNK1_ML_LANE_1N

DPSNK1_AUX_CHP

DPSNK1_HOT_PLUG_DET

DPSNK1_AUX_CHN

PRT0_T29T_N

PRT0_T29R_P

PRT0_T29R_N

T29_0_LSEO

T29_0_LSOE

PRT1_T29T_P

PRT1_T29T_N

PRT1_T29R_P

PRT1_T29R_N

T29_1_LSEO

T29_1_LSOE

T29_SDA

T29_SCL

PRT2_T29T_P

PRT2_T29T_N

PRT2_T29R_P

PRT2_T29R_N

T29_2_LSEO

T29_2_LSOE

PRT3_T29T_P

PRT3_T29T_N

PRT3_T29R_P

PRT3_T29R_N

T29_3_LSEO

T29_3_LSOE

PRT0_T29T_P

PORT2

PCIE GEN2

RECEIVE

TRANSMIT

PORTS

(SYM 1 OF 2)

JTAG

POWER ON RESET

MISC

CLOCKS

SOURCE PORT 0

DISPLAY

PORT3

PORT0

PORT1

CLK REQUEST

EEPROM

TEST PORT

SINK PORT 0

SINK PORT 1

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

IN

IN

IN

OUT

IN

D

VCC

THMVSS PAD

Q

C

S_L

W_L

HOLD_L

OUT

IN

OUT

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

DEBUG: For monitoring current/voltage

DEBUG: For monitoring clock

together. Other signals okay to float (TP/NC).

(T29_SPI_CS_L)

(T29_SPI_CLK)

NOTE: All unused LSOE/EO pairs should be aliased

SNK0 AC Coupling

SNK1 AC Coupling

Use B1 GND ball for THERM_DN

100pF SRF > 40MHz

Not used in host mode.

(T29_SPI_MISO)(T29_SPI_MOSI)

1/16W5%

402MF-LF

3.3KR36901

2

402

1/16W1%

MF-LF

14.0KR36851

2

402

100PF

BYPASS=U3600.Y19::2mm

5%50V

CERM

C3685 1

2

0.01UF

BYPASS=U3600.Y19::5.08mm

402CERM16V10%

C36861

2

79 83

79 83

402MF-LF1/16W5%0R36251

2

MF-LF402

100K1/16W5%

R36321

2

84

6 84 95

6 84 95

84

6 84 95

6 84 95

6 84 95

6 84 95

6 84 95

6 84 95

8 33

8

8

8 33

8

8

8

8

8

8

402MF-LF

100K1/16W

5%

R36301

2

1/16W

402

100K

MF-LF

5%

R36311

2

5%10K

402

NO STUFF

MF-LF1/16W

R36991

2

47 84 95

47 84 95

OMIT_TABLE

T29FCBGA

CRITICAL

U3600

Y19

Y21

AA20

W2

V1

V5

Y9

AA10

Y7

AA8

Y5

AA6

Y3

AA4

U6

V7

U4

U14

V15

U12

V13

U10

V11

U8

V9

U16

W16

V3

Y11

AA12

Y13

AA14

Y15

AA16

Y17

AA18

L2

N2

P1

M1

B21

A20

M17

K17

P3

N4

M3

L4

K1

J2

K3

J4

T19

V19

M19

P19

H19

K19

D19

F19

E6

T21

V21

M21

P21

H21

K21

D21

F21

C2

C4

A4

A6

C6

C8

A8

A10

C10

C12

A12

A14

C14

C16

A16

A18

E16

G16H17

E14

J6

K5

G6

H5

G4

H3

G2

H1

F5

F3

R2

T3

T1

E4

P5

N6

M5

L6

A2

R4

E2

U2

F1

P17

R16

MF-LF

5%0

402

1/16W

R36291

2

1/16WMF-LF402

5%3.3KR36931

2

1/16W5%10K

402MF-LF

R36981

2

402

5%1/16WMF-LF

10KR36231

2MF-LF

10K1/16W

402

5%

R36221

2

1/16W5%10K

MF-LF402

R36211

2

40210%0.1uF 16VX5R

C3629 1 26 78 95

6 78 95

6 78 95

6 78 95

6 78 95

6 78 95

6 78 95

6 78 95

6 78 95

6 78 95

40216V10%

X5R0.1uFC3628 1 2

10%40216V0.1uF X5R

C3627 1 2

16V10%X5R0.1uF 402

C3626 1 2

10%0.1uF X5R16V402

C3625 1 2

16VX5R 40210%0.1uF

C3624 1 2

0.1uF 10% 16VX5R 402

C3623 1 2

40216V10%0.1uF X5R

C3622 1 2

1.0K0.5%

1/16WMF-LF

603

R36551

2

10%X5R 402

16V0.1uFC3621 1 2

X5R10%0.1uF 402

16VC3620 1 2

0.1uF 10%X5R 402

16VC3630 1 2

0.1uF 10%X5R 402

16VC3631 1 2

0.1uF X5R10% 16V

402

C3632 1 2

X5R0.1uF 10%40216V

C3633 1 2

0.1uF X5R10%

40216V

C3634 1 2

0.1uF 10%X5R 402

16VC3635 1 2

0.1uF X5R10%

40216V

C3636 1 2

0.1uF 10%X5R 402

16VC3637 1 2

0.1uF 10%X5R 402

16VC3638 1 2

402X5R0.1uF 10% 16VC3639 1 2

6 78 95

6 78 95

6 78 95

6 78 95

6 78 95

6 78 95

6 78 95

6 78 95

CERM

10%1UF6.3V

402

C3690 1

2

6 78 95

6 78 95

10K 402MF-LF1/16W5%R3651 2 1

8 19 87

16

8 19 23 87

8 19 87

1K

402

5%1/16WMF-LF

R36961

2

1%

806

402

1/16WMF-LF

R36951 2 25

2KX8-1.8VMLP

M95160

CRITICALOMIT_TABLE

U3690

6

5

7

2

1

9

8

4

3

84

84

8 33

8 33

35

16 93

16 93

402X5R16V10%0.1uFC3601 1 2

40216V10%0.1uF X5RC3600 1 2

10% 16V X5R 4020.1uFC3602 1 2

10% 16V X5R 4020.1uFC3603 1 2

0.1uF

NO STUFF

10% 402X5R16VC3615 1 2

16V10%

NO STUFF

402X5R0.1uFC3616 1 2

3.3K5%

402

1/16WMF-LF

R36921

2

NO STUFF

5% 1/16W MF-LF 4020R3611 1 2

NO STUFF

5% 1/16W 4020 MF-LFR3610 1 2

402X5R0.1uF 16V10%C3604 1 2

0.1uF 402X5R16V10%C3605 1 2

16V10%0.1uF 402X5RC3606 1 2

40210% 16V0.1uF X5RC3607 1 2

16V 402X5R10%0.1uFC3640 1 2

X5R 40210%0.1uF 16VC3641 1 2

16V 40210%0.1uF X5RC3642 1 2

3.3K

402MF-LF

5%1/16W

R36911

2

X5R16V10% 4020.1uFC3643 1 2

0.1uF 10% 402X5R16VC3645 1 2

10% X5R16V 4020.1uFC3644 1 2

X5R 40210%0.1uF 16VC3646 1 2

16V10%0.1uF X5R 402C3647 1 2

35

8 9 93

8 9 93

8 9 93

8 9 93

8 9 93

8 9 93

8 9 93

8 9 93

8 9 93

8 9 93

8 9 93

8 9 93

8 9 93

8 9 93

8 9 93

8 9 93

SYNC_MASTER=T29_REF SYNC_DATE=10/12/2010

T29 Host (1 of 2)

T29_LSOE<1>T29_LSEO<1>

DP_T29SNK0_AUXCH_N

DP_T29SNK0_ML_N<3>DP_T29SNK0_ML_C_N<3>

T29_MONOBSP

T29_MONOBSN

T29_PCIE_WAKE_L

DP_T29SNK0_ML_P<3>DP_T29SNK0_ML_N<3>

DP_T29SNK0_ML_P<2>

DP_T29SRC_HPD

TP_T29_TEST_POINT_2T29_TEST_POINT_3

DP_T29SNK0_HPD

DP_T29SNK0_AUXCH_NDP_T29SNK0_AUXCH_P

DP_T29SNK0_ML_N<0>DP_T29SNK0_ML_P<0>


DP_T29SNK0_ML_N<2>

TP_T29_TEST_POINT_0T29_TEST_EN

T29_THERMD_P

T29_RSVDT29_GPIO<2>T29_GPIO<1>T29_CLKREQ_ISOL_L

DP_T29SNK1_ML_P<1>



T29_DP_RES

T29_DP_ATEST

TP_DP_T29SRC_AUXCH_CNTP_DP_T29SRC_AUXCH_CP

TP_DP_T29SRC_ML_CN<0>TP_DP_T29SRC_ML_CP<0>




T29_TMU_CLK_OUTT29_TMU_CLK_IN

SYSCLK_CLK25M_T29_RTP_T29_XTAL25OUT

PCIE_CLK100M_T29_PPCIE_CLK100M_T29_N

JTAG_ISP_TDOJTAG_ISP_TCKJTAG_T29_TMSJTAG_ISP_TDI

TP_T29_PCIE_RESET3_L

TP_T29_PCIE_RESET1_LTP_T29_PCIE_RESET2_L

TP_T29_PCIE_RESET0_L

T29_RBIAS

T29_RSENSE

T29_RESET_L

PCIE_T29_R2D_P<1>

PCIE_T29_R2D_P<2>

PCIE_T29_R2D_P<3>

T29_MONDC0

T29_MONDC1

PCIE_T29_R2D_N<3>

PCIE_T29_R2D_N<2>

PCIE_T29_R2D_N<0>PCIE_T29_R2D_P<0>

PCIE_T29_D2R_C_P<3>PCIE_T29_D2R_C_N<3>

PCIE_T29_D2R_C_N<2>PCIE_T29_D2R_C_P<2>

PCIE_T29_D2R_C_P<1>PCIE_T29_D2R_C_N<1>

PCIE_T29_D2R_C_N<0>PCIE_T29_D2R_C_P<0>

TP_T29_TEST_POINT_1

DP_T29SNK1_ML_N<0>

PCIE_T29_R2D_N<1>

DP_T29SNK1_ML_P<0>

DP_T29SNK1_ML_N<1>

DP_T29SNK1_AUXCH_P

DP_T29SNK1_HPD

DP_T29SNK1_AUXCH_N

T29_R2D_C_N<0>

T29_D2R_P<0>T29_D2R_N<0>

T29_LSEO<0>T29_LSOE<0>

T29_R2D_C_P<1>T29_R2D_C_N<1>

T29_D2R_P<1>T29_D2R_N<1>

NC_T29_R2D_CP<2>NC_T29_R2D_CN<2>

NC_T29_D2RP<2>NC_T29_D2RN<2>

NC_T29_R2D_CP<3>NC_T29_R2D_CN<3>

NC_T29_D2RP<3>NC_T29_D2RN<3>

T29_R2D_C_P<0>

DP_T29SNK1_ML_P<3>

DP_T29SNK1_ML_P<2>

DP_T29SNK1_ML_N<1>

DP_T29SNK1_ML_P<1>

DP_T29SNK1_AUXCH_N

DP_T29SNK1_AUXCH_P

DP_T29SNK1_ML_N<3>

DP_T29SNK1_ML_N<2>

DP_T29SNK0_ML_P<2>

DP_T29SNK0_ML_N<2>

DP_T29SNK0_AUXCH_P

DP_T29SNK1_ML_N<0>

DP_T29SNK1_ML_P<0>

DP_T29SNK0_ML_P<3>

DP_T29SNK0_ML_N<1>

DP_T29SNK0_ML_P<0>

DP_T29SNK0_ML_N<0>

DP_T29SNK0_ML_P<1>

DP_T29SNK1_AUXCH_C_N

DP_T29SNK1_AUXCH_C_P

DP_T29SNK1_ML_C_N<3>

DP_T29SNK1_ML_C_P<3>
















PCIE_T29_R2D_C_N<0>

PCIE_T29_D2R_P<3>

PCIE_T29_D2R_P<0>

PCIE_T29_D2R_N<1>

PCIE_T29_R2D_C_P<2>

PCIE_T29_R2D_C_P<0>

PCIE_T29_R2D_C_P<1>

PCIE_T29_R2D_C_N<1>

TP_T29_MONOBSN

TP_T29_MONOBSP

SYSCLK_CLK25M_T29

TP_T29_MONDC1

PCIE_T29_D2R_N<0>

PP3V3_T29

PCIE_T29_R2D_C_N<3>

PCIE_T29_R2D_C_P<3>

TP_T29_MONDC0

PCIE_T29_D2R_N<3>

PCIE_T29_D2R_N<2>

PCIE_T29_D2R_P<2>

PCIE_T29_D2R_P<1>

PP3V3_T29T29_SPI_MOSI

T29_SPI_CLKT29_SPI_CS_L

T29ROM_WP_L

T29ROM_HOLD_L

I2C_T29_SDAI2C_T29_SCL

T29_SPI_MISO

PP3V3_T29

PCIE_T29_R2D_C_N<2>

T29_LSEO_LSOE2T29_LSEO_LSOE2

T29_LSEO_LSOE3T29_LSEO_LSOE3

36 OF 132

33 OF 101

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

50

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6

6

6

6

6

6

6

6

6

6

6

6

6

6

93

93

93

93

93

93

93

93

93

93

93

93

93

93

93

6 33 95

93

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

7 16 19 25 33 34 35 87

7 16 19 25 33 34 35 87

95

95

95

95

7 16 19 25 33 34 35 87

VCC3P3_DP_RX1

VCC3P3_DP_RX1

VCC3P3_DP_TXRX

VCC3P3_DP_TXRX

VDD3P3DP_PLL

VCC3P3_DP_TXRXBIAS

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP_PLL

VSSDP

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VCC1P0

VCC1P0

VCC1P0

VCC1P0

VCC1P0

VCC1P0

VCC1P0

VCC1P0

VCC1P0

VCC1P0_PE

VCC1P0_PE

VCC1P0_PE

VCC1P0_PE

VCC1P0_PE

VDD1P0_DP_TXRX

VDD1P0_DP_RX1

VDD1P0_DP_TXRX

VDD1P0_DP_PLL

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VCC1P0_PE

VCC1P0_PE

VCC3P3

VCC3P3

VCC3P3

VCC3P3_T29

VCC3P3_T29

GND

VCC

(SYM 2 OF 2)




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

EDP: 200 mA152 mA (Dual-Port)

with proper values after characterization.

135 mA (Single-Port)

EDP: 3000 mA2250 mA (Dual Port)2100 mA (Single Port)

0-ohms are placeholders for now, replace

Current numbers from Vendor slide (<REDACTED> power measure 1.ppt), emailed 6/21/2010, TDP @ 90C.

FERR-120-OHM-1.5A

0402

L3730

1 2

10%

402CERM

1UF6.3V

C37121

2 CERM402

10%6.3V

1UFC37131

2

402

5%

MF-LF1/16W

0R37201 2

1UF

CERM402

10%6.3V

C37141

2

402-LF

2.2UF20%6.3VCERM

C37301

2

1UF

CERM402

10%6.3V

C37201

2

1UF

CERM402

10%6.3V

C37211

2

1UF

CERM402

10%6.3V

C37221

2

6.3V10%

402CERM

1UFC37081

26.3V20%

603X5R

10UFC3700 1

2

10UF

X5R603

20%6.3V

C3701 1

21UF

CERM402

10%6.3V

C3753 1

2

1UF

CERM402

10%6.3V

C3752 1

2

1UF

CERM402

10%6.3V

C3744 1

2

1UF

CERM402

10%6.3V

C3743 1

2

6.3V10%

402CERM

1UFC37091

2

402-LF

2.2UF20%

CERM6.3V

C3770 1

2

402-LF

2.2UF20%

6.3VCERM

C3760 1

2

0402

FERR-120-OHM-1.5AL3770

1 2

1UF

402

10%6.3VCERM

C3751 1

2 6.3V10%

402

1UF

CERM

C3750 1

2

1/16W5%

402

0

MF-LF

R37601 2

1/16W5%

402

0

MF-LF

R37501 2

6.3V10%

402CERM

1UFC3745 1

2 X5R

10UF20%6.3V

603

C37461

2

10UF

X5R603

20%6.3V

C37471

2

CERM

1UF

402

10%6.3V

C37101

2 6.3V10%

402CERM

1UFC37111

2

T29

CRITICAL

OMIT_TABLE

FCBGA

U3600H9

H11

H13

K9

K11

K13

M9

M11

M13

H15

K15

M15

E8

E10

E12

G14

H7

M7

K7

P7

R6

P9

P11

P15

G10

G12

R14

R8

R10

R12

P13

G8

J8

N10

N12

N14

J10

J12

J14

L8

L10

L12

L14

N8

T5

T7

W10

W12

W14

Y1

AA2

T9

T11

T15

T17

V17

W4

W6

W8

T13B1

B3

C18

C20

D1

D3

D5

D7

D9

D11

D13

D15

B5

D17

E18

E20

F7

F9

F11

F13

F15

F17

G18

B7

G20

J16

J18

J20

L16

L18

L20

N16

N18

N20

B9

R18

R20

U18

U20

W18

W20

B11

B13

B15

B17

B19

CERM402

10%6.3V

1UFC37051

2

1UF6.3V10%

402CERM

C37061

2

1UF6.3V10%

402CERM

C37071

2

T29 Host (2 of 2)SYNC_DATE=10/12/2010SYNC_MASTER=T29_REF

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmPP3V3_T29_DP

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmPP3V3_T29_PLL

MIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=3.3V

PP3V3_T29_DPBIAS

PP1V05_T29


PP1V05_T29_VDD_DP

VOLTAGE=1.05V

MIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mm

PP1V05_T29_VDD_DPPLL

PP3V3_T29

37 OF 132

34 OF 101

7 35

7 16 19 25 33 35 87

GND

VOUT

ON

VIN

GND

VOUT

ON

VIN

OUT

OUT

IN

IN

RESET*

OUT

EN

MR*

GNDTHRM

IN

VDD

SENSE+-

PAD

(OD)

0.7V

DLY

IN

GND

VOUT

ON

VIN

IN

IN

D

G S

D

S G

D

S G

IN

S

G

D

NC

VIN

FBX

EN/UVLO

INTVCC

VC

RT

SS

SYNC

SW

SGND GND

NC

SNS1

SNS2




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

SI8409DB:

Rds(on): 46mOhm @ 4.5V Vgs

- =PP3V3_T29_FET (3.3V FET Output)- =PP3V3_T29_P3V3T29FET (3.3V FET Input)

Power aliases required by this page: T29 15V Boost Regulator

Vout = 15VMax Current = 0.8AFreq = 300KHz

Vout = 1.6V * (1 + Ra / Rb)UVLO = 4.55V (falling), 4.95 (rising)

UVLO(falling) = 1.22 * (R1 + R2) / R2UVLO(rising) = UVLO(falling) + (2uA * R1)

<R1>

GND inside package,no XW necessary.

SGND shorted to

<Ra>

8-13V Input

<Rb>

Max Vgs: 10V

Supervisor & CLKREQ# Isolation

1.05V T29 Switch

Changes required

Max Current = 1.7A (85C)

DLY = 60 ms +/- 20%

U3810 & U3815/U3816

for 2S.- =PP1V05_T29_P1V05T29FET (1.05V FET Input)

- =PPVIN_SW_T29BST (8-13V Boost Input)

add property on another page.Voltage not specified here,

T29BST:Y - Stuffs 18V boost circuitry.

- =PP18V_T29_REG (18V Boost Output)


- =PP3V3_S0_T29PWRCTL

- =T29_CLKREQ_L- =T29_RESET_L

- =PP1V05_T29_FET (1.05V FET Output)


<R2>

Vgs(th): -1.4V

Id(max): 3.7A @ 70C

Vgs(max): +/-12VVds(max): -30V

Page Notes

Open-Drain GPIO

Platform (PCIe) Reset

Pull-up provided by SB page.

Pull-up provided by SB page.

U3816.A2:

Type

Part

R(on)


Max Output: 2A per IC

TPS22924C

50 mOhm Max18 mOhm Typ

Load Switch

3.3V T29 SwitchU3810

B1

A1

B2

A2

C2

C1

TPS22924CSP

CRITICAL

B2 B1

A1A2

C2

C1

U3815CSP

CRITICAL

TPS22924

33

1

2

1/16W

402MF-LF

5%10K

R3803

16

2

1C38000.1UF

X5R25V

402

10%

25 32

33 35

2

1C3810

402CERM

1UF10%

6.3V

2

1C38151UF10%

6.3VCERM402

1

9

2

4

8

3

7

5

6

U3800SLG4AP016V

CRITICAL

TDFN2

1R3807

402MF-LF

5%100K1/16W

19

B1

A1

B2

A2

C2

C1

U3816TPS22924

CRITICAL

CSP

PLACE_NEAR=U3815.B2:3 mm19

84 85

2

1R3881330K1/16WMF-LF

5%

402

T29BST:Y

470K

T29BST:Y

2

1R3880

1/16W5%

402MF-LF

402

T29BST:Y

C38800.1UF10%

2

1

X5R25V

21

3

Q3805SSM3K15FV

T29BST:Y

SOD-VESM-HF

2

1R389273.2K

402

1%1/16WMF-LF

T29BST:Y

T29BST:YR38875%

2

1

MF-LF1/16W

402

330K

4 5

3

SOT563

T29BST:YQ3888SSM6N37FEAPE

Q3888SSM6N37FEAPE

21

6

SOT563

T29BST:Y

402

1/16WMF-LF

2

1R38941%

41.2K

T29BST:YT29BST:YC3894

2

1

10%

402CERM-X5R6.3V

0.33UF

R3888

2

1

330K1/16W

402

5%

T29BST:Y

MF-LF

44 89

NO STUFFC3889

2

1

50VCERM

100PF5%

402

T29BST:Y1R3896

2

1/16W

15.8K1%

402MF-LF

2

1

1206

50V10%

X7R-CERM

T29BST:Y

4.7UFC3895

C389610%

X7R-CERM

T29BST:Y

2

1

50V

1206

4.7UF

T29BST:Y1 C3897

1206

4.7UF10%50VX7R-CERM2

47PF50V5%

402CERM

C38871

2210%

C3892T29BST:Y

1

805

4.7UF

X5R10V

T29BST:Y

Q3880

4

1

32

BGASI8409DB

CRITICAL

R3893T29BST:Y

2

1

MF-LF402

1/16W1%

10K

MF-LF

T29BST:Y

2

1R3891

402

1%200K1/16W

C389010UF

T29BST:Y

2

1

10%

X5R805

25V2

1C3891

805X5R

10UF10%25V

T29BST:Y

21

L389510UH-4A-68-MOHM

PCMB063T-100MS

T29BST:YCRITICAL

10PFC38881

50VCERM

5%

4022

QFNLT3957

36

17

U3890

27

30

34

38

21

2098

32

37

24

23

4

3

6

33 35

1

28

16

15

14

13

12

31

25

CRITICALT29BST:Y

2

10

137KR3895

T29BST:Y

402

1/16W1%

MF-LF

1

2

PLACE_NEAR=C3895.1:2 mm2 1

XW3895SM

2

1

402MF-LF

5%0

T29BST:YR3889

1/16W2

1D3895DFLS230LPOWERDI-123

CRITICALT29BST:Y

T29BST:YC3898 1

1206

10%

X7R-CERM50V

2

4.7UF 0.001UF

2

1 C389910%

402X7R50V

T29BST:Y3300PF

0402X7R-CERM

T29BST:Y

50V10%

C38931

2

T29 Power SupportSYNC_MASTER=T29_REF SYNC_DATE=10/12/2010

PP3V3_T29PP3V3_S0

T29_CLKREQ_ISOL_LMAKE_BASE=TRUE

PP3V3_S0

PP1V05_T29PP1V05_S0

T29_RESET_LT29_SW_RESET_L

T29_CLKREQ_L

T29_PWR_EN

PP3V3_T29

T29BST_SNS1

SMC_DELAYED_PWRGD

T29_A_HV_EN

PPBUS_G3H

T29_CLKREQ_ISOL_L

PLT_RST_BUF_LPP1V05_T29

PPVIN_SW_T29BSTMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

T29BST_SHDN_DIV


DIDT=TRUESWITCH_NODE=TRUE

T29BST_BOOST

T29BST_FBX

T29BST_VSNS

T29BST_SS

T29BST_VC_RC

T29BST_SNS2

T29BST_RT

T29BST_VC

T29BST_EN_UVLO

GND_T29BST_SGND

VOLTAGE=0VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

T29BST_PWREN_L

T29BST_PWREN_DIV_L

PP15V_T29

T29BST_INTVCC

38 OF 132

35 OF 101

7 16 19 25 33 34 35 87

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

33 35

6 7 12 16 17 18 19 20 22 23

25 26 28 32 35

36 39 40 41 45

47 48 49 50 51

53 56 60 61 71

72 79 82 83 84

87 88 89 98

7 34 35 6 7 9 10 12 13 14 16 17 20 22 23 39

44 67 69 72 101

7 16 19 25 33 34 35 87

6 7 8 39 48 49 62 63 88

7 34 35

7 8 85

IN

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

NC

BI

BI

BI

OUT

IN

IN

IN

OUT

VDDC

SR_LX

PCIE_PLLVDDL

SR_VFB

SR_VDDP

SR_VDD

SCLK

SI/LINKLED*

CS*

SO

SPD100LED*/SERIAL_DO

TRAFFICLED*/SERIAL_DI

TRD0_P

TRD1_P

TRD0_N

TRD1_N

TRD2_N

TRD2_P

TRD3_N

TRD3_P

GPIO_1/CR_BUS_PWR

GPIO_0

RE*/GPIO_2

VMAIN_PRSNT

PCIE_TXD_N

PCIE_TXD_P

PCIE_RXD_N

PCIE_RXD_P

PCIE_REFCLK_N

PCIE_REFCLK_P

PERST*

CLKREQ*

WAKE*

LOW_PWR

SD_DETECT/WE*

CR_CMD/CLE

CR_CLK/RY_BY*

CR_DATA0

CR_DATA1

CR_DATA3

CR_DATA2

CR_DATA4

CR_DATA5

CR_DATA6

CE*/MS_INS*

CR_DATA7

CR_LED/ALE

XD_DETECTTHRM_PAD

XTALI

XTALO

RDAC

GPHY_PLLVDDL

AVDDH VDDO

XTALVDDH

BIASVDDH

AVDDL

SMD_DATA

SMB_CLK

CR_WP*/XD_WP*OUT

BI

BI

BI

BI

BI

NC

RESET*

CS*

SCK

SOWP*

SI

GND

VCC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

281mA (1000base-T max power, Caesar IV)

LimitingResistor

(IPD)

(See note)

(IPD)

VDD for Card Reader I/O

Special Star routing needed on these pins. Decoupling on Pg 37.

If disabled: Okay to float VDD, VDDP & LX pin. VFB must always connect to =PP1V2_S3_ENET_PHY.BCM57765 ENET SR pins are internal 1.2V switching regulator. See note for SR_DISABLE below.

NOTE: Pull-down on SO plus internal pull-ups on

BCM57765 supports both active-levels for WP.

Connect only to U3900 pin 20.the card reader on-chip I/O.

Must isolate from PCIe WAKE# if PHY

internal SR. IPD has a race condition.SR_DISABLE must be pulled down to use

No MS (Memory Stick) Insert feature needed.

LR_OUT/GPIO1 is used as a 3.3V/1.8V internal LDO out for

N-channel FET isolation suggested.

WAKE#

info as well as code for Bonjour proxy.Required for proper PHY operation.

Internal 1.2V Switching Regulator pins.

If enabled: VDD/VDDP connect to =PP3V3_S3_ENET_PHY (add bypassing), LX connects to inductor.

???mA (1000base-T, Caesar V)

ROM contains MAC address, PCIe config

is powered-down in S3/S5. Standard

If PHY is always powered then alias=ENET_WAKE_L to PCIE_WAKE_L.

(Required ROM size TBD)

PHY Non-Volatile Memory

NOTE: ENETM requires SI pull-down instead of SO.

(OD)

o

(OD)

Current

(IPD)

(OD)

(OD)

(IPD)

(IPU)

(IPU)

Control signal to light LED or control SD bus power.

(IPU)

other 3 SPI pins configures ENET for the Atmel AT45DB011D (1Mbit) ROM. If a different ROM is used then the straps must change.

(IPx)

(IPD)

(IPU)SD_DETECT can only be used active low due to errata.

NOTE: "IPx" == Programmable pull-up/down

2

1C3921

402

16V10%

X7R-CERM

0.1UF

2

1 C3935

X5R

10UF10%

805

6.3V

CRITICAL

2

1 C3925

X5R-CERM603

10%4.7UF6.3V

21

L3925

SM

CRITICAL

FERR-600-OHM-0.5A

2

1 C392010%6.3V

603X5R-CERM

4.7UF

21

L3920

SM

CRITICAL

FERR-600-OHM-0.5A21

L3900

SM

FERR-600-OHM-0.5A

CRITICAL

21

L3905CRITICAL

SM

FERR-600-OHM-0.5A

2

1R3942

MF-LF

1K

402

5%1/16W

16 93

16 93

32 94

16

25

19 32

25

0.1uFC3951

402

21

10%16VX5R

0.1uF21

C3950

402X5R16V10%

0.1uF21

C3956

402X5R

10%16V

C395521

0.1uF

10%16VX5R402

2

1R39651%1.24K

MF-LF402

1/16W

16 93

16 93

16 93

16 93

37 94

37 94

37 94

37 94

37 94

37 94

37 94

37 94

2

1

MF-LF402

5%4.7K1/16W

R3941

2

5%

402MF-LF1/16W

1R39404.7K

32 94

32 94

32 94

32 94

32 5%

R394321

0

402MF-LF1/16W

2

1R3990

402

5%

MF-LF1/16W

4.7K

NOSTUFF

32 94

32

2

1 C3970

X5R-CERM

4.7UF

603

6.3V10%

2

1 C3971

X7R-CERM

10%0.1UF

402

16V 2

1 C39720.1UF

X7R-CERM402

16V10%

25

2MF-LF

402

5%1/16W

4.7KR39101

17

3

58

20

62

56

7 61

35

50

49

46

47

44

43

40

41

67

69

13

15

14

16

68

2

65

10

6

64

1

66

38

11

28

27

33

34

31

30

32

29

59

9

8

4

5

36

63

57

60

55

54

53

52

22

23

24

25

26

21

12

37

51

45

39

48

U3900OMIT

BCM57765B0QFN-8X8

18

19

42

21R3980MF-LF5% 402

1K1/16W

32

1

L3910CRITICAL

SM

FERR-600-OHM-0.5A2

32 94

32 94

32 94

2

1 C3910

16V10%

402X7R-CERM

0.1UF

32 94

32 94

2

1C3900

402X7R-CERM

16V10%

0.1UF

2

1

X7R-CERM16V10%

402

0.1UFC3911

2

1 C399010%

402

16VX7R-CERM

0.1UF

2

1 C3905

X7R-CERM16V

0.1UF10%

402

2

1 C3930

603X5R-CERM6.3V10%4.7UF

2

1C393110%16V

0.1UF

X7R-CERM402

21

L3930

SM

FERR-600-OHM-0.5A

CRITICAL

2

1C391510%

6.3VX5R-CERM

603

4.7UF

2

1 C3916

402

0.1UF16VX7R-CERM

10%

5

6

8

12

3

7

4

U3990AT45DB011D

OMIT

SOIC-8S1

2

1R3997

1/16W5%

402

4.7K

MF-LF

2

1C39360.1UF

10%16V

402X7R-CERM

2

1C39260.1UF

X7R-CERM

10%16V

402

SYNC_DATE=10/11/2010SYNC_MASTER=K91_ERIC

ETHERNET PHY (CAESAR IV)

ENET_MDI_N<1>

ENET_MDI_P<0>ENET_MDI_N<0>ENET_MDI_P<1>

SDCONN_DATA<0>

SYSCLK_CLK25M_ENET

BDM57765_SR_DISABLE

ENET_CR_PWRENSDCONN_WP

SDCONN_DATA<7>

TP_CE_L_MS_INS_L

SDCONN_DATA<6>SDCONN_DATA<5>SDCONN_DATA<4>

SDCONN_DATA<2>SDCONN_DATA<3>

SDCONN_DATA<1>

SDCONN_CLK

ENET_LOW_PWR

ENET_WAKE_R_L

ENET_CLKREQ_L

ENET_RESET_L

PCIE_CLK100M_ENET_PPCIE_CLK100M_ENET_N

PCIE_ENET_R2D_P

PCIE_ENET_D2R_C_P

ENET_MEDIA_SENSE

MAKE_BASE=TRUEMIN_LINE_WIDTH=0.3 mm

VOLTAGE=1.8VMIN_NECK_WIDTH=0.2 mm

PP3V3R1V8_ENET_LR_OUT_REG

ENET_MDI_P<3>ENET_MDI_N<3>

ENET_MDI_P<2>ENET_MDI_N<2>

TP_BCM57765_TRAFFICLED_LTP_BCM57765_SPD100LED_L

BCM57765_MOSIBCM57765_CS_L

BCM57765_MISOBCM57765_SCLK

BCM57765_SMB_CLK

VOLTAGE=1.2VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmPP1V2_ENET_PHY_PCIEPLL

PP1V2_ENET


PP3V3_ENET

ENET_WAKE_L

BCM57765_SCLK

BCM57765_CS_LBCM57765_MISO


BCM57765_MOSI

BCM57765_RDAC


PP3V3_S3_ENET_PHY_AVDDH


MIN_LINE_WIDTH=0.4 mmPP3V3_S3_ENET_PHY_XTALVDDH

ENET_SR_LX

PP1V2_ENET

VOLTAGE=1.2VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmPP1V2_ENET_PHY_AVDDL


PP1V2_ENET_PHY_GPHYPLL

PCIE_ENET_D2R_N

PCIE_ENET_D2R_P

PCIE_ENET_R2D_C_P

PCIE_ENET_R2D_C_N

PCIE_ENET_D2R_C_N

SDCONN_CMD

SDCONN_DETECT_L

PCIE_ENET_R2D_N

BCM57765_SMB_DATA

ENET_VMAIN_PRSNT

PP3V3_S0

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.4 mmPP3V3_S3_ENET_PHY_BIASVDDHMIN_NECK_WIDTH=0.2 mm

PP3V3_ENET

39 OF 132

36 OF 101

93

93

36

36

36

36

36

6 7 36 70

36

6 7 25 36 70 72

36

36

36

36

36

70

6 7 36 70

93

93

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 25 36 70 72

BI

RX

TX

BIRX

TX

BI

IO

NC

NC

IO

NC

IO

IO

NC

GND

IO

NC

NC

IO

NC

IO

IO

NC

GND

BI

BI

BI

BI

BI




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

sides of the board


(NONE)

(NONE)

(NONE)

514-0636

Place one of 0.1uf cap close to each centertap pin of transformer

mirrored on opposite



Page Notes

Transformers should be

36 94

CRITICAL

SM

TLA-6T213HF

T40001

10

11

12

2

3

4

5

6 7

8

9

75MF-LF

5%1/16W

402

R40001

2

75MF-LF

5%1/16W

402

R40011

2

75MF-LF5%1/16W402

R40021

2

75MF-LF5%1/16W402

R40031

2

10%2KV1206CERM

CRITICAL

1000PFC4008

1 2

36 94

16VX5R402-1

0.1UF10%

C40061

2

0.1UF16VX5R402-1

10%

C40041

2

0.1UF16VX5R402-1

10%

C40021

2

TLA-6T213HF

SM

CRITICALT4001

1

10

11

12

2

3

4

5

6 7

8

9

0.1UF16VX5R402-1

10%

C40001

2

36 94

CRITICAL

RJ45-M97-3F-RT-TH

J4000

1

10

11

12

2

3

4

5

6

7

8

9

NOSTUFF

PLACE_NEAR=T4001.1:5mm

RCLAMP0524P

CRITICALSLP2510P8

D4001

3

5 4 2 16 7 9 10

NOSTUFF

PLACE_NEAR=T4000.5:5mm

RCLAMP0524P

CRITICALSLP2510P8

D4000

3

5 4 2 16 7 9 10

36 94

36 94

36 94

36 94

36 94

SYNC_DATE=05/26/2010SYNC_MASTER=K91_TRINHNI

Ethernet Connector

ENET_MDI_N<2>

ENET_MDI_P<1>

ENET_MDI_P<2>

ENET_MDI_P<0>

ENET_MDI_P<3>

ENET_MDI_N<3> ENETCONN_N<3>

ENETCONN_P<3>

ENETCONN_P<0>

ENETCONN_CTAP

ENET_MDI_N<1>

ENET_CTAP2

ENETCONN_P<1>

ENET_CTAP1

ENET_CTAP0

ENET_BOB_SMITH_CAPMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

ENET_CTAP3

ENETCONN_P<2>

ENETCONN_N<1>

ENETCONN_N<2>

ENETCONN_N<0>ENET_MDI_N<0>

40 OF 132

37 OF 101

98

98

98

98

98

98

98

98

DS2

ATBUSH

ATBUSN

VP25

OCR_CTL_V10

VAUX_DETECT

TMS

TCK

REFCLKN

PCIE_TXD0P

TRST*

ATBUSB

TDI

DS1

TPA0N

TPA0P

AVREG

CE

CLKREQN

FW_RESET*

FW620*

JASI_EN

MODE_A

NAND_TREE

OCR_CTL_V12

PCIE_RXD0N

PCIE_RXD0P

PCIE_TXD0N

PERST*

R0

REFCLKP

REGCLT

REXT

SCIFCLK

SCIFDAIN

SCIFDOUT

SCIFMC

SCL

SDA

SE

SM

TDO

TPA1N

TPA2N

TPA2P

TPB0N

TPB0P

TPB1N

TPB1P

TPB2N

TPB2P

TPBIAS0

TPBIAS1

TPBIAS2

TPCPS

VAUX_DISABLE

VBUF

VDDH VP VREG_PWR

WAKE*

XI

XO

DS0

TPA1P

VDD33VDD10

VREG_VSSVSS

SERIAL EEPROM

MISCELLANEOUS

CONTROLLER

POWER MANAGEMENT

TEST CONTROLLER

PCI EXPRESS PHY

CHIP RESET

SCIF

1394 PHY

NCNCNC

NC

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

NCNC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

110 mA Digital Core

25 mA PCIe SerDes

NT-9

(IPD)

(IPD)

(IPD)

NT-7

NT-12 (IPD)

(IPU)

(IPD) NT-20

(IPD) NT-19

(Reserved)

NT-OUTNT-14 (IPD)

NT-5

NT-17

NT-16 (IPD)

(OD)

NT-4 (IPU)

17 mA PCIe SerDes

0 mA VReg PWR

114 mA FireWire PHY

7 mA I/O138 mA

(IPU) NT-8

(IPD) NT-11

NT-15 (IPD)

(IPU)

NOTE: NT-xx notes show

NAND tree order.

NT-3 (IPU)

FIXME!!! - TYPO IN SYMBOL REGCTL

NT-13

NT-1 (IPU)

NT-2 (IPU)

NT-6(IPD) NT-18

(IPD) NT-21

NT-10 (IPD)

135 mA

402

1/16W1%

MF-LF

191R41701

2

10%

402

6.3VCERM-X5R

0.33UFC41621

2402

MF-LF1/16W

5%470K

R41621

2

BGA

FW643

CRITICALOMIT

U4100

B13

A13

A11

A10

L13

L2

F12

E12

E13

D12

K13

D1

J2

K1

J12

J13

N8

N7

N5

N6

N4

B11

N9

N10

D13

L8

G2

G1

H1

F2

N12

M11

M13

N13

M4

N2

M1

M3

B8

A8

B5

A5

B3

A3

B9

A9

B6

A6

B4

A4

B7

C3

A2

B10

N1

E1

D2

H13

A1

B1

M12

N3

N11

B12

C13

E2

E10

H2

H12

K2

L1

C1

C12

F1

G12

J1

L3

L11

M2

A12

D5

D6

D8

L5

L10

L6

L9

K12

L12

B2

D4

F7

F8

F10

G4

G6

G7

G8

G10

H4

H6

D7

H7

H8

H10

J4

J5

J9

J10

K4

K5

K7

D9

K8

K9

L7

K6

K10

D10

E4

E5

E9

F4

F6

C2

G13

F13

402

50V5%

CERM

22PFC41511 2

402

5%

CERM

22PF

50V

C41501 2

402

PLACE_NEAR=U4100.B10:2mm

1/16W1%

MF-LF

200KR41601

2

402

1/16W1%

MF-LF

412R41501 2

402

1/16W5%

MF-LF

10KR41631

2

402

1/16W5%

MF-LF

10KR41641

2

402

1/16W5%

MF-LF

10K

FW643_LDOR41651

2

10%

402-1X5R

16V0.1UF

PLACE_NEAR=U1800.BJ36:2.54mmC41761 2

10%

402-1X5R

16V0.1UF

PLACE_NEAR=U1800.BG36:2.54mmC41751 2

402

1/16W5%

MF-LF

10KR41661

2

10%

X5R0.1UF 402-1

16VPLACE_NEAR=U1800.AU34:2.54mm

C41711 2

402-1X5R

16V10%PLACE_NEAR=U1800.AV34:2.54mm

0.1UFC41701 2

10%

402

6.3VCERM

1UFC4130 1

210%

402

6.3VCERM

1UFC4131 1

2

10%

402

6.3VCERM

1UFC41001

210%

402

6.3VCERM

1UFC41011

2

10%

402

6.3VCERM

1UFC4132 1

2

10%

402

6.3VCERM

1UFC41021

2402CERM6.3V10%1UFC41031

2

10%

402

6.3VCERM

1UFC4135 1

210%

402

6.3VCERM

1UFC4136 1

2

10%

402CERM

1UF6.3V

C41041

2

10%

402

6.3VCERM

1UFC41101

2

10%

402

6.3VCERM

1UFC41051

210%

402

6.3VCERM

1UFC41061

2

10%

402

6.3VCERM

1UFC4120 1

210%

402

6.3VCERM

1UFC4121 1

210%

402

6.3VCERM

1UFC4122 1

210%

402

6.3VCERM

1UFC4123 1

210%

402

6.3VCERM

1UFC4124 1

2

402

10V20%

CERM

0.1UFC4141 1

2

10%

402

6.3VCERM

1UFC41111

2

10%

402

6.3VCERM

1UFC41401

2

16 93

16 93

16 93

16 93

16 93

16 93

8 39

39

402

1/16W1%

MF-LF

2.94KR41611

2

40

40

40

40 94

6 40 94

40 94

40 94

6 40

6 40

6 40 94

6 40 94

40 94

40 94

6 40

6 40

40

39 40

6 40

0402-LF

120-OHM-0.3A-EMIL4130

1 2

0402-LF

120-OHM-0.3A-EMIL4135

1 2

39

0402-LF

120-OHM-0.3A-EMIL4110

1 2

24.576MHZSM-3.2X2.5MM

CRITICALY4150

24

13

5%

402MF-LF1/16W

0R41001 2

FireWire LLC/PHY (FW643)SYNC_MASTER=K18_MLB SYNC_DATE=04/27/2010

PP1V0_FW_RMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.0V

PP3V3_FW_FWPHY

FW_CLK24P576M_XO_RFW_CLK24P576M_XI

TP_FW643_SE

PCIE_FW_D2R_P

PCIE_FW_D2R_N

PCIE_FW_R2D_C_N

PCIE_FW_R2D_C_P

TP_FW643_VAUX_ENABLE

FW643_TRST_L

FW643_WAKE_LFW643_REGCTLFW643_VAUX_DETECT

PCIE_CLK100M_FW_P

PCIE_FW_D2R_C_P

PP3V3_FW_FWPHY

FW_CLKREQ_PHY_L

TP_FW643_TMS

NC_FW643_TDITP_FW643_TCK

PCIE_FW_R2D_PPCIE_FW_R2D_N

TP_FW643_SCIFCLKFW643_TPCPS

PP1V0_FW_FWPHY

FW643_R0

NC_FW2_TPBN

FW643_PU_RST_L

TP_FW643_SDA

FW_RESET_L

TP_FW643_SCIFDOUTTP_FW643_SCIFMC

FW_CLK24P576M_XO

PPVP_FW_CPS

TP_FW643_OCR10_CTL

NC_FW643_AVREG

TP_FW643_FW620_L

TP_FW643_SM

TP_FW643_VBUF

FW_PORT1_TPA_PFW_PORT1_TPA_N

NC_FW2_TPANNC_FW2_TPAPNC_FW0_TPBN

FW_PORT1_TPB_NFW_PORT1_TPB_P

NC_FW2_TPBP

NC_FW0_TPBIAS

NC_FW2_TPBIAS

FW643_REXT

FWPHY_DS2

FWPHY_DS0FWPHY_DS1

FW_P1_TPBIAS

NC_FW0_TPBP

NC_FW0_TPAPNC_FW0_TPAN

TP_FW643_NAND_TREE

TP_FW643_TDO

PCIE_FW_D2R_C_N

PCIE_CLK100M_FW_N

TP_FW643_JASI_EN

TP_FW643_CETP_FW643_MODE_A

FW643_SCL

TP_FW643_SCIFDAIN

MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.0V

PP1V0_FW_FWPHY_AVDD


VOLTAGE=3.3V

PP3V3_FW_FWPHY_VDDA

PP3V3_FW_FWPHY_VP25


41 OF 132

38 OF 101

6 7 38 39 40

6

6

93

6 7 38 39 40

6

6

6

93

93

6

6 7 39

6

6

6

40

6

6

6

6

6

6

6

93

6

6

6

G

D

S

IN

IN

G

D

S

OUT

IN

S

G

D

(SYM-VER2)

G

S (SYM-VER1)

D

GND

VOUT

ON

VIN

GND

VOUT

ON

VIN

IN

OUT

IN

OUT

IN

IN

D

G S

RESET*

OUT

EN

MR*

GNDTHRM

IN

VDD

SENSE+-

PAD

(OD)

0.7V

DLY




36

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PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

FireWire Port 5K Pull-Down DetectAll FireWire devices require 5K pull-down on TPB pair.

Q4262 provides for fast-off of Q4260 in S0 (Late-VG detection)

Supervisor & CLKREQ# Isolation

Pull-up provided by another page.

3.3V FW Switch

1.0V FW Switch

Part

U4201 & U4202

When PHY is powered, FW_5KPD_DET_L acts as legacy PME# signal.

LSI FireWire PHY requires 1.0V.To avoid an extra power supply,1.05V is used with a series R


Load Switch

50 mOhm Max

FireWire Port Power Switch

2) FW643 WAKE# (PME#) when PHY is powered.

- =FW_CLKREQ_L- =FW_PME_L

Pull-up provided on another page.

1) 5K Pull-down Detect when FW_PWR_EN is low.

Host can detect as load on TPBIAS signal.Current source only active when FW_PWR_EN is low.


Page Notes

- =PP3V3_S0_FWLATEVG

- =PP1V0_FW_FET_R (1.0V FET Output)

(NONE)

- =PP1V05_S0_FWPWRCTL (5KPD Bias Rail)

- =PP3V3_FW_FWPHY (PHY 3.3V Power)- =PP3V3_FW_FET (3.3V FET Output)

- =PP1V05_FW_P1V0FWFET (1.0V FET Input)


- =PP1V0_FW_FWPHY (PHY 1.0V)

- =PP3V3_S0_FWPWRCTL

Max Output: 2A

R(on) 18 mOhm Typ

TPS22924C

to reduce voltage.

Type

DLY = 60 ms +/- 20%

Dual-purpose output:

- =PP3V3_FW_P3V3FWFET (3.3V FET Input)- =PPBUS_FW_FET (FW VP FET Output)- =PPBUS_S5_FWPWRSW (FW VP FET Input)


FireWire PHY WAKE# Support

0.1UF10%

X5R25V

402

C4260 1

2

300K

MF-LF402

5%1/16W

R42601

2

470K

MF-LF402

5%1/16W

R42611

2

CRITICAL

MINISMDC110H24

1.1A-24VF4260

1 2SM

CRS08-1.5A-30V

CRITICALD42601 2

CRITICAL

BC847CDXV6TXGSOT563

Q42702

6

1

CRITICAL

BC847CDXV6TXGSOT563

Q42705

3

4

330K1/16W

402

5%

MF-LF

R42701

2

1/16W5%

402MF-LF

56KR42711

2

12K

402MF-LF1/16W

5%

R42731

2

1/16W

1K5%

402MF-LF

PLACE_NEAR=C4360.1:2 mm

R42721

2

SOT-563DMB53D0UV

CRITICALQ4275

6

2

1

DMB53D0UVSOT-563

CRITICALQ42755

3

4

16VX5R402

0.1UF10%

C4270 1

2

38 40

402

1K5%

MF-LF1/16W

R42751

2

19 39

CRITICAL

SOT-563DMB53D0UVQ42765

3

4

SOT-563DMB53D0UV

CRITICALQ4276

6

2

1

100K

402MF-LF1/16W5%

R42761

2

402X5R16V10%

0.1UF

NO STUFFC4276 1

2

10K

402

1/16W5%

MF-LF

R42771

2

8 19

8 38 39

BSS8402DWSOT-363

Q4262

3

5

4

CRITICAL

10K

MF-LF

5%1/16W

402

R42621

2

SOT-363BSS8402DWQ4262

6

2

1

CRITICAL

NO STUFF

0.1UF10%

X5R25V

402

C4261 1

2

402MF-LF1/16W

5%10

R42631

2

TPS22924CSP

CRITICAL

U4201

C1

C2

A2

B2

A1

B1

CRITICAL

CSPTPS22924U4202

C1

C2

A2

B2

A1

B1

40

0.5491%1/16WMF402

R42021

2

38

MF-LF

10K5%

402

1/16W

R42832

1

19 39

16 23

0.1UF10%

X5R25V

402

C4290 1

2

18 25 29

38 39

SMFDC638P_G

1

2

5

6

3

4

Q4260CRITICAL

SOD-VESM-HF

SSM3K15FVQ4261

3

12

CRITICAL

1UF10%

6.3VCERM402

C4201 1

2

402

1UF10%

6.3VCERM

C4202 1

2

SLG4AP016V

CRITICAL

TDFN

U4290

6

5

7

3

8

4

2

9

1

100K1/16WMF-LF

5%

402

R42901

2

FireWire Port & PHY PowerSYNC_DATE=06/10/2010SYNC_MASTER=T27_REF

FWPORT_FASTOFF_L_DIV

PLT_RESET_L

FW_PWR_EN

FW_CLKREQ_PHY_LMAKE_BASE=TRUE

PP1V0_FW_FWPHY

FW_RESET_L

FW_CLKREQ_PHY_L

MIN_LINE_WIDTH=0.5 mmPPBUS_FW_FWPWRSW_DMIN_NECK_WIDTH=0.25 mmVOLTAGE=12.6V

PP3V3_FW_FWPHY

FWPORT_PWREN_LPP3V3_S0

FWPORT_FASTOFF_L

VOLTAGE=12.6V

MIN_LINE_WIDTH=0.5 mmPPBUS_FW_FWPWRSW_FMIN_NECK_WIDTH=0.25 mm

FW643_WAKE_L

FW_PLUG_DET_L

FW_PWR_EN

FW_P1_TPBIAS

FW_WAKE

PP3V3_FW_FWPHY

PP1V05_S0

FW_P1_TPBIAS_R FWDET_EMIT

FWDET_MIRROR

FW643_WAKE_LMAKE_BASE=TRUE

PPVP_FW

PP1V0_FW_FWPHY

PP3V3_S5FW_5KPD_DET_LMAKE_BASE=TRUE

FW_5KPD_DET_RC

FW_PWR_EN_L

FWPORT_PWR_EN

FW_RESET_R_L

PP1V05_FW_FET

VOLTAGE=1.05VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mm

PP1V05_S0

FW_CLKREQ_L

PP3V3_S0PP3V3_FW_FWPHY

FWPORT_PWREN_L_DIV

PPBUS_G3H

42 OF 132

39 OF 101

38 39

6 7 38 39

6 7 38 39 40

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 38 39 40

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67

69 72 101

6 7 40

6 7 38 39

6 7 17 19 20 22 23 24 25 29 45 55 65 70 71 72 82 85 89 98

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 38 39 40

6 7 8 35 48 49 62 63 88

SC/NC

TPA+ TPA(R)

VG

VPTPB+

TPB(R)TPB-

TPA-

CHASSISGND

S

G

D

(SYM-VER2)

G

S (SYM-VER1)

D

NC

VCC

VCLMP

D1-

GNDD2-

D2+

D1+

FWPWR_ENOUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

BI

BI

BI

BI

IN




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2 1


Apple Inc.

PAGE


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B

C

345678

D

B

8 7 5 4 2 1


"Snapback" & "Late VG" Protection

FireWire Design Guide (FWDG 0.6, 5/14/03)1394b implementation based on Apple


properly terminate unused signals. appropriate connectors and/or to

the necessary aliases to map the

- =FW_PHY_DS1


- =PP3V3_S0_FWLATEVG

- =PPVP_FW_PHY_CPS (To PHY)- =PPVP_FW_PHY_CPS_FET (From Port)

BILINGUAL

Cable Power

AREF needs to be isolated from all

beta-only device, there is no DC path

BREF should be hard-connected to logic

Note: Trace PPVP_FW_PORT1 must handle up to 5A

(NONE)

- =FW_PHY_DS2

- =FW_PHY_DS0

- =PP3V3_FW_FWPHY

From Port

To FW643

- =PPVP_FW_PORT1FET blocks current to TPCPS until VDD33 is powered.

FW643 TPCPS Leakage Protection

Termination

(FW_PORT1_TPA_P)

(FW_PORT1_TPA_N)

(FW_PORT1_TPA_N)

(FW_PORT1_TPB_P)

(FW_PORT1_TPB_P)

(FW_PORT1_TPB_N)

(FW_PORT1_TPB_N)

514S0605

PORT 1

(GND)

local grounds per 1394b spec

(FW_PORT1_BREF)

ground for speed signaling and connection

between them (to avoid ground offset issue)

When a bilingual device is connected to a

TPA<R>

TPA+

TPA-

VG

TPB+

VP

NC

INPUT

OUTPUTTPB<R>

TPB-

(All unused port signals TP/NC)Disabled per LSI instructions

Unused FireWire Ports

- Port "1" Bilingual (1394B)Configures PHY for:

FireWire PHY Config Straps

(FW_PORT1_TPA_P)

Place close to FireWire PHY

NOTE: This page is expected to contain

Page Notes

FireWire TPA/TPB pairs to their

FW643 has internal leakage path from TPCPS pin to VDD33.

1/16W1%

402MF-LF

56.2

SIGNAL_MODEL=EMPTY

R43631

2

1/16W1%

402MF-LF

4.99KR43641

2

SIGNAL_MODEL=EMPTY

56.2

MF-LF402

1%1/16W

R43621

2

220pF

CERM402

5%25V

C43641

2

56.2

MF-LF402

1%1/16W

SIGNAL_MODEL=EMPTY

R43611

2

0.33UF

CERM-X5R402

10%6.3V

C43601

2

1/16W1%

402MF-LF

56.2

SIGNAL_MODEL=EMPTY

R43601

2

PLACE_NEAR=J4310.5:2 mm

50V10%

0.1uF

X7R603-1

C4319 1

2

PLACE_NOTE=J4310.5:2 mm

1/16W5%

402MF-LF

1MR43191

2

50V10%

X7R

0.01UF

402

C43141

2

SM

FERR-250-OHM

CRITICALL4310

1 2

F-RT-TH

CRITICAL

1394B-M97J4310

1

10

11

12

13

2

3

4

5

6

7

8

9

1/16W1%

402MF-LF

10KR43811

2

10K

MF-LF402

1%1/16W

R43821

2

1/16W1%

402MF-LF

10KR43801

2

BSS8402DW

SOT-363

Q4300

3

5

4

CRITICAL

BSS8402DWSOT-363

Q4300

6

2

1

CRITICAL

330K

MF-LF402

5%1/16W

R43121

2

470K

MF-LF402

5%1/16W

R43111

2

LLP

U4350

7

8

5

6

4

21

3TPD4S1394

CRITICAL

402

10%

X5R16V

0.1UF

PLACE_NEAR=U4350.1:2 mm

C4350 1

2

MF-LF402

1/16W5%

100KR43501

2

39

38 40

38 40

38 40

6 38 40 94

38 40 94

6 38 40 94

6 38 40 94

6 38 40

6 38 40

6 38 40

6 38 40

38 40

6 38 40

38 40 94

38 40 94

38 40 94

38 40 94

38 39


FireWire Connector

PPVP_FW

FW_P1_TPBIAS

FWPORT_PWR_EN

FW_PORT1_TPA_PMAKE_BASE=TRUE

PP3V3_S0

PP3V3_FW_FWPHY

MAKE_BASE=TRUEFWPHY_DS0

MAKE_BASE=TRUEFWPHY_DS2

FWPHY_DS0

FWPHY_DS2

FWPHY_DS1MAKE_BASE=TRUEFWPHY_DS1

NO_TEST=TRUEMAKE_BASE=TRUENC_FW0_TPBIAS

NO_TEST=TRUEMAKE_BASE=TRUENC_FW0_TPAP

NO_TEST=TRUEMAKE_BASE=TRUENC_FW0_TPAN

NO_TEST=TRUENC_FW0_TPBPMAKE_BASE=TRUE

NO_TEST=TRUENC_FW0_TPBNMAKE_BASE=TRUE

NO_TEST=TRUENC_FW2_TPBIASMAKE_BASE=TRUE

NO_TEST=TRUEMAKE_BASE=TRUENC_FW2_TPAP

NO_TEST=TRUEMAKE_BASE=TRUENC_FW2_TPAN

NO_TEST=TRUENC_FW2_TPBPMAKE_BASE=TRUE

NO_TEST=TRUENC_FW2_TPBNMAKE_BASE=TRUE

NC_FW0_TPBIAS

NC_FW0_TPBP

NC_FW0_TPAN

NC_FW0_TPAP

NC_FW2_TPBIAS

NC_FW2_TPAP

NC_FW0_TPBN

NC_FW2_TPBN

NC_FW2_TPBP

NC_FW2_TPAN

FW_PORT1_AREF

PPVP_FW

FW_PORT1_TPB_C

FW_PORT1_TPA_N

FW_PORT1_TPB_P

FW_PORT1_TPB_N

FW_PORT1_TPA_P

TP_FWLATEVG_VCLMP

CPS_EN_L

PP3V3_FW_FWPHY

PPVP_FW_CPS

MAKE_BASE=TRUEFW_PORT1_TPA_N

MIN_LINE_WIDTH=0.5 mm

VOLTAGE=33V

PPVP_FW_PORT1_FMIN_NECK_WIDTH=0.25 mm

MAKE_BASE=TRUEFW_PORT1_TPB_NMAKE_BASE=TRUEFW_PORT1_TPB_P

CPS_EN_L_DIV

MIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=12.6VMAKE_BASE=TRUE

PPVP_FW_CPS

43 OF 132

40 OF 101

6 7 39 40

38 40 94

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 38 39 40

38 40

38 40

38 40

38 40

6 38 40 94

38 40 94

6 38 40 94

6 38 40 94

6 38 40

6 38 40

6 38 40

6 38 40

6 38 40

6 7 39 40

6 7 38 39 40

38 40

38 40 94

38 40 94

38 40 94

38 40

SG

D

SYM_VER-1

IN

OUT

SYM_VER-1

SYM_VER-1

OUT

OUT

IN

IN

NC

NC NC

IN

OUT

EN

A_INN

A_INP

TEST

B_PRE0/I2C_ADDR0

APRE0/I2C_ADDR1

I2C_EN*

A_OUTP

B_INN

A_OUTN

B_INP

REXT

B_PRE1/SDA_CTL

A_PRE1/SCL_CTL

VDD

THRMGND

B_OUTP

B_OUTN

PAD

OUT

OUT

IN

IN

IN

BI

IN

D

SG

D

SG




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A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

D2R values for 4.5dB de-emphasis

R2D values for 3dB de-emphasis

516S0616

ODD Power Control

SATA HDD / IR / SIL Connector

Indicates disc presence

0xB8/0xB9

SATA ODD Connector

Write:0xB6 Read:0xB7Internally PD ~150K

Address (R/W)

0xB6/0xB70x98/0x990x96/0x97

ADD0

HHH

HL

LLL

ADDR1

338S0907

516S0687

NOTE: 3.3V must be S0 if 5V is S3 or S5 to ensure the drive is unpowered in S3/S5.

7

23V1K-SM

TPCP8102Q4590

56

8

4

12

3

CRITICAL

CRITICALPLACE_NEAR=J4501.9:3mm

L4500

0603

21

FERR-70-OHM-4A

18

7

1

F-ST-SM

5

9

11

14

8

6

43

2221

2

19

17

1615

13

10

20

CRITICALJ4501

54722-0224

12

1

32

4

12-OHM-100MA-8.5GHZTCM0806-4SM

FL4501CRITICAL

0.01UF

1

GND_VOID=TRUE

40216V

2

10%

C4511CERM

C451010%0.01UF

1 2

GND_VOID=TRUE

16V CERM 402

CERM 402

21

16V10%

C4516

0.01UF

GND_VOID=TRUE

GND_VOID=TRUE0.01UF

21

CERM16V 402

C451510%

19

6 44

2

1R45905%

402MF-LF1/16W

33K

54722-0164F-ST-SM

CRITICAL

J4500

1

10

11 12

13 14

15 16

2

3 4

5 6

7 8

9

DLP11S

4 3

21

CRITICAL

90-OHM-100MAFL4525

DLP11S

FL4520

12

3 4

CRITICAL

90-OHM-100MA

10% 16V CERM 402

21

0.01UF

C452510% CERM

2

16V 402

C4526 1

0.01UF

10% 4020.01UF

C4520 1 2

16V CERM

40216V10%0.01UF

C4521 1 2

CERM

16 92

16 92

16 92

16 92

2

0.1UF16V10%

1 C4532

X7R-CERM402

R45320

MF-LF1

2

1/16W5%

402

0.001UFC4531

10%

1

4022CERM

50V

402

2 1

5%1/16WMF-LF

R45314.7

6 45

6 43

2402CERM10V20%0.1UF

1 C450220%10VCERM

0.1UF

4022

1 C4501

U4510

5

3

13

21

6 16

19

17

20

11

14

15

10

9

8

18

1

2

PS8521A

124

CRITICAL

TQFN

7

16 92

16 92

16 92

16 92

16 23

NO STUFF

MF-LF1/16W

5%

402

4.7KR4510

C4514


CERM10V20%

2

1

402

0.1UF

1

2

1/16WMF-LF

1%4.99K

402

R4512

0.01UFC451920%

CERM402


2

1

16V

CERM10% 16V

1 2

402

C4512

0.01UF

GND_VOID=TRUE

1 2C4513

0.01UF 10% 16V CERM 402

GND_VOID=TRUE

10% 402

2C4518 1

0.01UF CERM

GND_VOID=TRUE

16V

16V CERM 402

1C4517 2GND_VOID=TRUE

10%0.01UF

5%

1

2

4.7K

402MF-LF1/16W

R45134.7K

402

1NO STUFFR4515

1/16WMF-LF

5%

2

16 23 26 28 30 47 61 88 93

16 23 26 28 30 47 61 88 93

2

R4511

MF-LF1/16W5%

1

0

402

MF-LF

R45341 2 402

1%1/16W

41.2GND_VOID=TRUE

1 2

402

C4533

CERM50V5%GND_VOID=TRUE

15PF

1 2 402GND_VOID=TRUE

R453341.2

1/16W1% MF-LF

68.1GND_VOID=TRUE1/16W1% MF-LF

4022

R45351

68.1 MF-LF1%1/16W

GND_VOID=TRUE40221

R4536

1 2

402

C4534

CERM50V5%GND_VOID=TRUE

15PF

GND_VOID=TRUE

C45351 2

402CERM

50V+/-0.25PF

5PF

1

C45362

402

GND_VOID=TRUE

50VCERM+/-0.25PF

5PF

XW4598

21

SM

2

XW4599

1

SM

SOT563

Q4596 3

5 4

SSM6N15FEAPE

CRITICAL

1/16WMF-LF

5%100K

402

1

2

R4597

6

2 1

SSM6N15FEAPEQ4596CRITICAL

SOT563

100K

MF-LF1/16W

402

R45961

2

5%

5%

100K

MF-LF402

1/16W

1 2

R4595

CERM

0.068UF

402

10%10V

1

2

C4595

402CERM

10%16V

C45961 20.01UF

SATA/IR/SIL ConnectorsSYNC_DATE=11/08/2010SYNC_MASTER=K91_ERIC

SATA_HDD_D2R_RC_C_N

SATA_HDD_R2D_RC_UF_N

SATA_HDD_R2D_UF_P SATA_HDD_R2D_RC_UF_P

SATA_HDD_R2D_RDRVR_OUT_N

SYS_LED_ANODE

SATA_HDD_R2D_P

ODD_PWR_EN

PP5V_S3

SATA_ODD_D2R_UF_P

PP5V_S3_IR_RMIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mmVOLTAGE=5V

PP1V5_S0

SATA_HDD_R2D_RDRVR_OUT_P

SATA_HDD_D2R_P

SATA_HDD_D2R_N

SATA_HDD_R2D_C_N

SATA_HDD_R2D_RDRVR_IN_P

PP3V3_S0

SATARDRVR_I2C_ADDR1

ODD_PWR_EN_L

ODD_PWR_EN_LS5V_L

PP3V3_S0

SATA_ODD_R2D_NSATA_ODD_R2D_P

SATA_ODD_R2D_UF_N

SATA_ODD_R2D_UF_P

SATA_ODD_D2R_P

SATA_ODD_R2D_C_P

ODD_PWR_SS

PP1V5_S0

SATARDRVR_I2C_ADDR0

SATARDRVR_I2C_ADDR1

SATA_ODD_R2D_C_N

SATA_ODD_D2R_C_N

SATA_ODD_D2R_C_P

SATA_ODD_D2R_N

SATA_ODD_D2R_UF_N

SATA_HDD_R2D_C_P

SATARDRVR_TEST

SATARDRVR_I2C_EN_L

SMBUS_PCH_CLK

SMBUS_PCH_DATA

SATARDRVR_REXT

SATARDRVR_I2C_ADDR0

SATA_HDD_D2R_RDRVR_OUT_P

SATA_HDD_D2R_RDRVR_OUT_N

SATA_HDD_R2D_RDRVR_IN_N

IR_RX_OUT

SYS_LED_ANODE_R

SATA_HDD_R2D_UF_N

PP5V_SW_ODD_R

VOLTAGE=5V

MIN_LINE_WIDTH=0.6mmMIN_NECK_WIDTH=0.4mm

MIN_LINE_WIDTH=0.6mm

VOLTAGE=5VMIN_NECK_WIDTH=0.4mm

PP5V_SW_ODD

PP5V_S0PP5V_S0_HDD_RMIN_LINE_WIDTH=0.6mmMIN_NECK_WIDTH=0.4mmVOLTAGE=5V

PP1V5_S0

SATA_HDD_R2D_N

SATARDRVR_EN

SATA_HDD_D2R_RDRVR_IN_N

SATA_HDD_D2R_RDRVR_IN_P

PP5V_S3

PP5V_SW_ODD

SMC_ODD_DETECT

PP5V_SW_ODD_R

SATA_HDD_D2R_C_P

MIN_LINE_WIDTH=0.6mmPP5V_S0_HDD_FLTMIN_NECK_WIDTH=0.4mmVOLTAGE=5V

SATA_HDD_D2R_RC_C_P

SATA_HDD_D2R_C_N

45 OF 132

41 OF 101

92

6 92

6 7 29 31 41 42 43 45 65 66 71 81 100

6 92

6

7 16 20 22 25 41 56 70

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

41

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89

98

6 92

6 92

7 16 20 22 25 41 56 70

41

41

6

6

6 92

41

6

92

41 6 41

6 7 8 22 46 51 53 64 67 68 69 71 72 86 88 101

7 16 20 22 25 41 56 70

6 92

6 7 29 31 41 42 43 45 65 66 71 81 100

6 41

41

6 92

6

6 92

OUT

BI

BI

SYM_VER-1

IN

OUT

IN

SYM_VER-1

BI

BI

OUT

IO

IO

NC

GND

VBUS

NC

IO

IO

NC

GND

VBUS

NC

GNDTHRM

OUT2

OUT1

ILIM

IN_0

IN_1

EN2

FAULT1*

FAULT2*

EN1

PAD

VCC

GND

SELOE*

D+

D-

Y+

Y-

M+

M-




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

USB Port Power Switch

Place L4605 and L4615 at connector pin

SEL=0 Choose SMCSEL=1 Choose USB

Left USB Port B

Left USB Port A

We can add protection to 5V if we want, but leaving NC for now

Current limit per port (R4600): 2.18A min / 2.63A max

USB/SMC Debug Mux

CRITICALL4605

FERR-120-OHM-3A

0603

1 2

POLY-TANT6.3V20%

C4696CRITICAL

CASE-B2-SM12

1

220UF-35MOHM

CRITICAL

10UFC4695

2

1

6.3VX5R

20%

603

0.1UF20%10V2

1 C4691

402CERM

24

24 92

24 92

CERM402

10V

0.1UF

SMC_DEBUG_YES

20%

C4650 1

2

SMC_DEBUG_YES

MF-LF

5%10K

402

1/16W

R46501

2

2

3

CRITICAL

DLP11S90-OHM-100MAL4600

1

4

6 44 45 46

6 44 45 46

44

21

R4651SMC_DEBUG_NO

1/16WMF-LF

0

5%

402

SMC_DEBUG_NO

0

402

5%1/16WMF-LF

R46521 2

0.01uFC4605

16V

402CERM

20%

1

2

C4615

2

1

20%0.01uF

16VCERM402

FERR-120-OHM-3A

CRITICAL

0603

1 2

L4615

4 3

21

L4610DLP11S

CRITICAL

90-OHM-100MA

CRITICAL

2

1C461720%

603

10UF

X5R6.3V

CRITICAL

100UF1 C4616

6.3V

NOSTUFF

20%

CASE-B2-SMPOLY-TANT2

24 92

24 92

24

CRITICAL

52

RCLAMP0502NSLP1210N6

D4600

1

43

6

SLP1210N6RCLAMP0502N

CRITICAL

D4610

1

5 42 3

6

CRITICAL

2

1

6.3V20%

10UF

603X5R

C4690

F-RT-TH-M97-4

CRITICAL

USBJ4600

1

2

3

4

5

6

7

8

F-RT-TH-M97-4

CRITICAL

USBJ4610

1

2

3

4

5

6

7

8

CRITICAL

U4600TPS2561DR

1

11

8

9

7

2

3

5

10

4

SON

6

R4690

2

1

5%

MF-LF1/16W

402

5.1K

2

1C46920.47UF

X5R402

10V10%

SMC_DEBUG_YES

TQFNCRITICAL

PI3USB102ZLEU4650

6

7

3

4

5

8 10

9

2

1

4022

1

MF-LF1/16W

1%23.2K

R4600

SYNC_MASTER=K91_ERIC

External USB ConnectorsSYNC_DATE=10/08/2010

USB_PWR_EN

PP5V_S3

USB_EXTA_OC_L

USB2_EXTA_MUXED_N

USB2_EXTA_MUXED_P

PP5V_S3_RTUSB_A_ILIMMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.375 mmVOLTAGE=5V

USB2_LT1_N


PP5V_S3_RTUSB_A_F

VOLTAGE=5V

USB_EXTA_PUSB_EXTA_N

USB_LT2_P

USB_EXTB_P

USB_LT2_NUSB_EXTB_N

PP3V42_G3H

SMC_RX_LSMC_TX_L

USB_DEBUGPRT_EN_L

VOLTAGE=5V


PP5V_S3_RTUSB_B_F

PP5V_S3_RTUSB_B_ILIM


PM_SLP_S4_L

USB_ILIMUSB_EXTB_OC_L

USB2_LT1_P

46 OF 132

42 OF 101

6 7 29 31 41 43 45 65 66 71 81 100

98

98

6 98

6

6 98

6 98

6 7 25 44 45 46 47 52 62 63 72

6

17 29 44 65 72

6 98

BI

BI

VCC

P1.0/D+

P1.1/D-

P1.2/VREG

P1.3/SSEL

P1.4/SCLK

P1.5/SMOSI

P1.6/SMISO

P0.0

P0.1

INT0/P0.2

INT1/P0.3

TIO1/P0.6

NC

TIO0/P0.5

INT2/P0.4

VSSPADTHRML

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

IR SUPPORT

24 92

24 92

1UF

X5R402-1

10%10V

C48031

2

CY7C63803-LQXCQFN

OMITCRITICAL

U4800

5

4

3

8

9

10

20

21

22

23

24

7

6

12

13

15

16

17

18

19

25

2

1

14

11

X7R-CERM

10%0.1UF

402

16V

C48011

2

0.001UF

CERM402

10%50V

C48041

2

100

MF-LF402

5%1/16W

R48001 2 6 41


Front Flex Support

USB_IR_NDIFFERENTIAL_PAIR=USB2_IR

USB_IR_PDIFFERENTIAL_PAIR=USB2_IR

PP5V_S3

IR_VREF_FILTER

IR_RX_OUTIR_RX_OUT_RC

48 OF 132

P/N 338S0633

43 OF 101

6 7 29 31 41 42 45 65 66 71 81 100

IN

IN

IN

OUT

OUT

OUT

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

OUT

BI

IN

IN

OUT

BI

OUT

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

BI

BI

BI

BI

BI

BI

OUT

OUT

IN

IN

OUT

ININ

BI

BI

OUT

IN

OUT

OUT

NC

OUT

OUTNC

NCNCNC

NC

NC

NC

NCNC

NCNCNC

NC

NC

NC

NC

NCNC

NCNC

NC

IN

OUT

P11

P82

P83

P35

P96

P95

P94

P93

P92

P91

P90

P86

P85

P84

P81

P80

P77

P67

P52

P51

P50

P47

P46

P45

P44

P43

P42

P41

P40

P37

P36

P34

P33

P32

P31

P30

P27

P26

P25

P24

P23

P21

P17

P12

P66P16

P15

P14

P13

P22

P20

P63

P61

P60

P65

P64

P62

P70

P71

P72

P73

P74

P75

P76

P97

P10

(1 OF 3)

PEVREF/PH4

PECI/PH3

PH2

PG5

PG4

PG3

PG2

PG1

PG0

PF7

PF6

PF5

PF4

PF3

PF2

PF1

PF0

PE4

PE3

PE2

PE1

PE0

PD7

PD6

PD5

PD4

PD3

PD2

PD1

PD0

PC7

PC6

PC5

PC4

PC3

PC2

PC1

PC0

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0

PA7

PA6

PA3

PA2

PA1

PA0

PA4

PA5

PG6

PG7

PH0

PH1

PEVSTP/PH5

(2 OF 3)

EXTAL

XTAL

RES*

VSSAVSS

ETRST*

NMI

MD2

MD1

NC

AVCC VCC VCL AVREF

(3 OF 3)

NC

INBI

OUT

IN

OUT

BI

BI

BI

BI

IN

IN

IN

OUT

BI

IN

IN

IN

IN

BI

BI

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

If SMS interrupt is not used, pull up to SMC rail.

(OC)(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)(OC)(OC)(OC)(OC)

(OC)

(OC)

(OC)(OC)

(OC)

(OC)

NOTE: SMS Interrupt can be active high or low, rename net accordingly.

those designated as inputs require pull-ups. pins designed as outputs can be left floating,NOTE: Unused pins have "SMC_Pxx" names. Unused

22UF

CERM805

20%6.3V

C4902 1

2

6 17 46

6 45 46 63

6 45 52

0.47UF

CERM-X5R

10%6.3V

PLACE_NEAR=U4900.E1:3mm

402

C4907 1

2

20%10VCERM

0.1UF

402

C49031

2

10V20%

CERM

0.1UF

PLACE_NEAR=U4900.M12:3mm

402

C4920 1

2

4.7PLACE_NEAR=U4900.M12:3mm

MF-LF1/16W

402

5%

R49991 2

0.1UF

CERM

20%10V

402

C49041

2

PLACE_NEAR=U4900.L3:4mm

SMXW4900

12

17 23

35 89

0.1UF

CERM

20%10V

402

C49051

2

17

65 72

23 72 87 89

45

0.1UF

CERM

20%10V

402

C49061

2

45 48

45 49

45 48

45 48

45 48

45 49

45 48

45 48

45 48 62 63

6 42 44 45 46

6 42 44 45 46

65 72

47 96 100

MF1/20W

201

10K5%

R49091

2

6 46

6 46

MF1/20W

201

10K5%

R49011

2

MF1/20W

201

10K5%

R49021

2MF1/20W

201

10K5%

R49981

2

42

62

45 72

6 41

45

51

51

6 45

6 45

6 45

6 45

51

51

45 48

45 48

45 49

45 49

45 49

45 49

45 49

6 45 46

45

6 45 46

6 45 46

6 45 46

45 52 62

6 47 62 63 96

6 47 62 63 96

6 31 47 53 54 96

6 31 47 53 54 96

47 50 96

47 50 96

45

45

45 48

6 42 44 45 46

6 42 44 45 46

45 54 79

6 16 46

26 28

6 17 25

6 46

16 19

6 17 46

79

17 45 72

6 45 62

45

U4900TLP-145V

A9

E10

F13

A6

B5

D4

D8

B7

DF2117RVPLP20HV

OMIT

B12

A13

A12

B13

D11

C13

C12

D10

D13

E11

D12

F11

E13

E12

D9

C8

A8

D7

D6

A5

B4

A1

C2

B2

C1

C3

G2

F3

E4

L13

K12

K11

J12

K13

J10

J11

H12

N10

M11

L10

N11

N12

M13

N13

L12

A7

B6

C7

D5

C6

J4

G3

H2

G1

H4

G4

F4

F1

U4900

C10

DF2117RVPLP20HVTLP-145V

OMIT

N3

N1

M3

M2

N2

L1

K3

L2

B8

C9

B9

A10

B10

C11

A11

G11

G13

F12

H13

G10

G12

H11

J13

M10

N9

K10

L8

M9

N8

K9

L7

K1

J3

K2

J1

K4

A4

B3

C4

K5

N5

M6

L5

M5

N4

L4

M4

M8

N7

K8

K7

K6

N6

M7

L6

E2

F2

J2

OMIT

DF2117RVPLP20HVTLP-145V

U4900

M12

L11

L9

H3

A2

D1

H1

E5

E3

D3

B1

M1

H10

E1

D2

L3

F10

B11

C5

A3

45 6 31 45

43

MF-LF1/16W

402

5%

R49101 2

0

MF-LF1/16W

402

5%

R49111 2

0

MF-LF1/16W

402

5%

R49121 2

20%0.1UF

CERM10V

402

C4910 1

2

45 72 85

45 52

19

6 16 46 87 93

6 16 46 87 93

6 16 46 87 93

6 16 46 87 93

6 16 46 87 93

25

25 93

53

6 31 47 50 79 96

6 17 29 72

17 29 42 65 72

17 72

45

6 31 47 50 79 96

47 96 100

45

SYNC_DATE=07/12/2010SYNC_MASTER=K91_BEN

SMC

TP_SMC_P43

SMC_PBUS_VSENSE

SMC_SA_ISENSE

SMC_PA0_PUTP_SPI_DESCRIPTOR_OVERRIDE_L

USB_DEBUGPRT_EN_LMEM_EVENT_L

SMC_RUNTIME_SCI_LSMC_ODD_DETECTSMC_S4_WAKESRC_ENSMC_PB4

TP_SMC_P24

TP_SMC_P20

PM_PWRBTN_LSMC_DELAYED_PWRGD

SMC_BMON_MUX_SEL

LPC_AD<2>

TP_SMC_RSTGATE_L

PM_SYSRST_L

SMC_BATLOW_L

SMC_FAN_0_CTLSMC_FAN_1_CTLNC_SMC_FAN_2_CTLNC_SMC_FAN_3_CTL

NC_SMC_FAN_3_TACHNC_SMC_FAN_2_TACHSMC_FAN_1_TACH

WIFI_EVENT_L

SMC_ONOFF_LSMC_BC_ACOKSMC_PME_S4_WAKE_L

PM_SLP_S4_LPM_SLP_S5_L

LPC_SERIRQLPC_CLK33M_SMCSMC_LRESET_L

LPC_PWRDWN_L

SMC_SCI_L

PM_CLKRUN_L

SMC_TX_LSMC_RX_LSMBUS_SMC_MGMT_SCL

SMC_CLK32KSMBUS_SMC_0_S0_SDA

SYS_ONEWIRE

SMC_DP_HPD_L

PP1V05_S0

PM_PECI_PWRGD

SMS_INT_LSMBUS_SMC_BSA_SDA

SMC_DCIN_VSENSE

SMC_GPU_HI_ISENSE

PVCCIO_S0_SMC_R

SMBUS_SMC_A_S3_SCL

SMC_SYS_LED

SMC_CPU_ISENSE

SMC_OTHER_HI_ISENSE

CPU_PECI

PP3V3_S5_AVREF_SMC

SMC_VCL

PP3V42_G3H

SMC_MD1SMC_KBC_MDE

SMC_NMI

SMC_TRST_L

GND_SMC_AVSS

SMC_RESET_L

SMC_XTALSMC_EXTAL

TP_SMC_P41

LPC_AD<3>

SMBUS_SMC_MGMT_SDA

SMC_GFX_THROTTLE_LSMC_SYS_KBDLED

SMC_DCIN_ISENSE

SMC_BMON_ISENSESMC_CPU_HI_ISENSE

PM_PECI_PWRGD_R

SMC_THRMTRIPSMC_PROCHOT

SMBUS_SMC_B_S0_SDA

SMBUS_SMC_A_S3_SDA

G3_POWERON_L

SMC_TCKSMC_CASE_OPEN

SMC_GPU_ISENSE

SMC_PROCHOT_3_3_L


PP3V3_S5_SMC_AVCC

VOLTAGE=3.3V


SMC_TDI

SMBUS_SMC_B_S0_SCL

SMC_PM_G2_EN

SMC_P1V5S3_ISENSESMC_CPUVCCIO_ISENSE

TP_SMC_P10

ALL_SYS_PWRGD

PM_DSW_PWRGD

SMC_TMS

SMC_GFX_VSENSESMC_GFX_ISENSE

SMC_CPU_VSENSE

SMC_GPU_VSENSE

SMC_FAN_0_TACH

SMC_GFX_OVERTEMP_L

SMBUS_SMC_0_S0_SCLSMC_RX_LSMC_TX_L

LPC_FRAME_L

LPC_AD<1>LPC_AD<0>

S5_PWRGD

CPU_PECI_R

SMBUS_SMC_BSA_SCL

TP_SMC_PF5

SMC_LID

SMC_TDO

SMC_BIL_BUTTON_L

SMC_ADAPTER_EN

PM_SLP_S3_L

49 OF 132

44 OF 101

45

45

6

45

6 45

45

45 49

6 7 9 10 12 13 14 16 17 20 22 23 35 39 67 69 72 101

72

10 19 90

6 45

6 7 25 42 45 46 47 52 62 63 72

45 48 49

45

45

6 45

6 45

6 45

D

S G

IN

OUT

BI

IN

D

S G

IN

E

Q2

C

BD

Q1

GS

OUT

G

D

S

OUT

IN

IN

REFOUT

MR1*

THRMGND

RESET*

DELAY

MR2*

VINV+

SN0903048

PAD

OUT

IN OUT

IN

OUT

D

G S

IN OUT

IN

D

GS

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

NOTE: Internal pull-ups are to VIN, not V+.

(IPU)

MR1* and MR2* must both be low to cause manual reset.

Mobiles: 3.42V

(IPU)

System (Sleep) LED Circuit

SMC Crystal Circuit

TO SMC

Desktops: 5V

Used on mobiles to support SMC reset via keyboard.

Debug Power "Buttons"

SMC Reset "Button", Supervisor & AVREF Supply

Internal 20K pull-up on PM_BATLOW_L in PCH.

TO CPU

SMC FSB to 3.3V Level Shifting

BATLOW# Isolation

CRITICAL

Q5059SSM6N15FEAPE

4 5

3

SOT563

215%

10K2011/20W MF

R5070

R5071MF

215%

100K2011/20WR5073

MF21

5%10K

2011/20WR5074 215%

100K2011/20W MF

10K 215% 2011/20W MF

R507710K 1

5% 1/20W2

201MFR5078

1/20W21

5%10K

201MFR5079

215%

10K2011/20W MF

R5080

R5085 10K5% 2011/20W MF

21

210K 15% 2011/20W MF

R5086

10K 12011/20W5% MF

2R5088

44

19

R5015PLACE_SIDE=TOP

2

1

5%

MF-LF603

OMIT

01/10W

SILK_PART=PWR_BTN

R506221

5%

402

1/16WMF-LF

3.3K10 67 90

44

SSM6N15FEAPE

CRITICAL

Q5059

1

6

2

SOT563

R5091MF 2011/20W5%

100K 21

10K 15% MF

22011/20W

R5089

215%

10K2011/20W MF

R5081

21

R5010

5%

402

1/16WMF-LF

0

CRITICALY5010

20.00MHZ5X3.2-SM

2

1

21

C5011

5%

402

15pF

CERM50V

C501021

5%

402

50VCERM

15pF R50875%

12011/20W MF

470K 2

R5093 10K5% 2011/20W MF

21

NOSTUFF

R5072 215%

10K2011/20W MF

44

2

1R5032

402

1/16WMF-LF

1.47K1%

2

1R5031

402

1/16WMF-LF

5231%

R5030

2

1

402

1/16WMF-LF

201%

CRITICAL

Q5030DMB54D0UVSOT-563

1 2

46

3

5

6 41

DMB53D0UV

CRITICAL

4

3

5 Q5060SOT-563

2

1R50615%

402

1/16WMF-LF

100K

1

CRITICAL6

2

Q5060SOT-563DMB53D0UV

2

1R50605%

402

1/16WMF-LF

10K

44

SILK_PART=PWR_BTN2

1R50165%

MF-LF

PLACE_SIDE=BOTTOM01/10W

603

OMIT

OMITR5001

SILK_PART=SMC_RST2

1

PLACEMENT_NOTE=Place R5001 on BOTTOM side

5%

MF-LF

0

603

1/10W

6 44 45 52

52

0.01UF

2

1C5001

402CERM

10%16V

C5020

2

1

402CERM-X5R

10%6.3V

0.47UF

9

VREF-3.3V-VDET-3.0V

CRITICAL

31

5

8

7

6

2

4

U5010

DFN

6032

1C5025

6.3VX5R

10uF20%

2

1 C5026

402

10%16VCERM

0.01UF

1KR5000

2

1

5%

402

1/16WMF-LF

6 44 46 63

17

MF-LF402

1/16W

1 2

5%

22R5012


44

83 84

44

Q5020CRITICAL

SSM3K15FV

21

3SOD-VESM-HF

R5090 211/20W5% 201MF

100K

44 45 52 44 45 52

R5076100K

201

5%1/20WMF

1

2

R5020

1/20W

2

1

201

100K5%

MF

44 72

Q5040

CRITICAL

2

1

3

SSM3K15FVSOD-VESM-HF

17

R50401

2201MF

1/20W5%

100K

NOSTUFF

R50411 2

402MF-LF1/16W

0

5%

6 44 45 52

SYNC_MASTER=K91_BEN SYNC_DATE=07/12/2010

SMC Support

SMC_PME_S4_WAKE_LMAKE_BASE=TRUE

SMC_PME_S4_WAKE_L

PP3V3_S5

SMC_BATLOW_L

SMC_CLK32K

PM_THRMTRIP_L_R

MAKE_BASE=TRUESMC_PBUS_VSENSE

TP_SMC_P10MAKE_BASE=TRUE

SMC_THRMTRIP

MAKE_BASE=TRUESMC_GPU_VSENSE

SMC_CPUVCCIO_ISENSE

SMC_SA_ISENSEMAKE_BASE=TRUESMC_SA_ISENSE

SMC_PROCHOT

SMC_OTHER_HI_ISENSEMAKE_BASE=TRUESMC_OTHER_HI_ISENSE

SMC_CPU_ISENSEMAKE_BASE=TRUE

SMC_BMON_ISENSE

SMC_DCIN_ISENSEMAKE_BASE=TRUE

SMC_PBUS_VSENSE

SMC_CPU_HI_ISENSE


CPU_PROCHOT_L_R

SMC_GPU_ISENSEMAKE_BASE=TRUE

SMC_GFX_VSENSE

SMC_GFX_ISENSE

CPU_PROCHOT_LMAKE_BASE=TRUESMC_CPUVCCIO_ISENSE

SMC_GPU_HI_ISENSEMAKE_BASE=TRUE


SMC_DP_HPD_L

PM_BATLOW_L

PP3V3_SUS

DP_A_EXT_HPD

SMC_RX_L

PP3V42_G3H

SMC_TDI

SMC_ADAPTER_EN

WIFI_EVENT_L

SMC_TCKSMC_BIL_BUTTON_L

SMS_INT_L

SMC_PA0_PU

SMC_PB4

PP3V3_S4

SMC_BMON_MUX_SEL

SMC_S4_WAKESRC_EN

SMC_GPU_ISENSE

SMS_INT_L

NC_SMC_FAN_3_TACH

NC_SMC_FAN_3_CTL

PM_CLK32K_SUSCLK_R

TP_SMC_P43

TP_SMC_P41

SMC_ONOFF_L

PP3V3_WLAN

SMC_RESET_L

PP3V42_G3H

SMC_GPU_HI_ISENSE

TP_SMC_P10

MAKE_BASE=TRUETP_SMC_PF5

SMC_BMON_MUX_SELMAKE_BASE=TRUE

MAKE_BASE=TRUESMC_BMON_ISENSE

G3_POWERON_L

TP_SMC_RSTGATE_LMAKE_BASE=TRUE

SMC_TDOSMC_TMS

SMC_TX_LSMC_LID

MAKE_BASE=TRUESMC_DCIN_VSENSE

SMC_ONOFF_L

SMC_MANUAL_RST_L

NC_SMC_FAN_2_TACHMAKE_BASE=TRUE

MAKE_BASE=TRUENC_SMC_FAN_2_CTL

SMC_BC_ACOK

SMC_SYS_LED

SYS_LED_L

SMC_TPAD_RST_L

SYS_LED_ANODE

PP5V_S3

SMC_XTAL_RSMC_XTAL

TP_SMC_RSTGATE_L

SYS_LED_ILIM

CPU_PROCHOT_BUF

PP3V42_G3H

SMC_P1V5S3_ISENSE

PP3V3_S0

SMC_ONOFF_L

PP3V3_S4


PP3V3_S5_AVREF_SMCMIN_LINE_WIDTH=0.4 mm


NC_SMC_FAN_2_CTL

MAKE_BASE=TRUESMC_CPU_VSENSE

MAKE_BASE=TRUENC_SMC_FAN_3_CTL

MAKE_BASE=TRUESMC_BC_ACOK

SMC_GFX_VSENSEMAKE_BASE=TRUE

NC_SMC_FAN_2_TACH

MAKE_BASE=TRUESMS_INT_L

MAKE_BASE=TRUENC_SMC_FAN_3_TACH

SMC_P1V5S3_ISENSEMAKE_BASE=TRUE

SMC_GFX_ISENSEMAKE_BASE=TRUE

SMC_DCIN_VSENSE

SMC_DCIN_ISENSE

SMC_CPU_VSENSE

SMC_GPU_VSENSE

SMC_CPU_ISENSE

SMC_CPU_HI_ISENSEMAKE_BASE=TRUE

SMC_PROCHOT_3_3_L

TP_SMC_P20

TP_SMC_P24

SMC_EXTAL


SMC_BC_ACOK


VOLTAGE=0VMIN_NECK_WIDTH=0.1 mm

GND_SMC_AVSS

SMC_CASE_OPEN

TP_SMC_PF5

SYS_LED_L_VDIV

50 OF 132

45 OF 101

6 7 17 19 20 22 23 24 25 29 39 55 65 70 71 72 82 85 89 98

44 45 48

6 44 45

44 45 48

44 45 48

44 45 48 44 45 48

44 45 49 44 45 49

44 45 49

44 45 49

44 45 49

44 45 48

44 45 49

44 45

44 45 48

44 45 48

44 45 49

44 45 48

44 45 49

6 44 45

7 16 17 18 19 20 22 70 71 72

6 42 44 46

6 7 25 42 44 45 46 47 52 62 63 72

6 44 46

17 44 72

6 31 44

6 44 46

6 44 62

44 45 54

44

44

7 45 52 53 71

44 45 49

44 72 85

44 45 48

44 45 54

6 44 45

6 44 45

44 45

6 44 45

6 44 45 52

6 31

6 7 25 42 44 45 46 47 52 62 63 72

44 45 49

6 44 45

6 44 45

44 45 49

44 45 49

44

44 45

6 44 46

6 44 46

6 42 44 46

44 52 62

44 45 48

6 44 45

6 44 45

44 45 48 62 63

6 7 29 31 41 42

43 65 66 71

81

100

44

44 45

6 7 25 42 44 45 46 47 52 62 63 72

44 45 48

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

7 45 52 53 71

44 45

6 44

6 44 45

44 45 48

6 44 45

44 45 48 62 63

44 45 48

6 44 45

44 45 54

6 44 45

44 45 48

44 45 49

44 45 48

44 45 49

44 45 48

44 45 48

44 45 49

44 45 49

44 45

6 44 45

44

6 44 45

44 45 48 62 63

44 48 49

44

6 44 45

OUTIN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

IN

OUT

IN

BI

BI

OUT

IN

BI

IN

IN

OUT

BI

BI

IN

OUTIN

OUTIN

INOUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

SPI Bus Series Termination

516S0573

LPC+SPI Connector

5%1/16WMF-LF

2

471R5126

PLACE_NEAR=J5100.12:5mm

402

LPCPLUS_R:YES

55

402

1/16W5%

MF-LF

47


R51221 2

PLACE_NEAR=U1800.AY1:5mm

15

402MF-LF

5%1/16W

R51121 216 93

402MF-LF1/16W5%47

PLACE_NEAR=J5100.9:5mm

2

R51271LPCPLUS_R:YES

PLACE_NEAR=J5100.11:5mm5%

402

0

MF-LF1/16W

R51281

2

LPCPLUS_R:YES

6 42 44 45

6 44

6 44

6 44 45

CRITICAL

1

10

11 12

13 14

15 16

17 18

19

2

20

22

23 24

25 26

27 28

29

3

30

31 32

34

4

5 6

7 8

9

21

M-ST-SM

LPCPLUS_CONN:YESJ5100

55909-0374

33

6 19

6 42 44 45

6 44

6 44 45 63

6 44 45

6 44 45

6 25 87 93

6 46

6 16 44 87 93

6 17 44

6 46

6 16 44 87 93

6 16 44 87 93

6 44 45

6 17 44

6 16 44

6 46

6 46

6 19 55

6 16 44 87 93

6 16 44 87 93

6 25 93

55

15

5%1/16WMF-LF402

PLACE_NEAR=U1800.AV3:5mm R51101 216 93

55

15

402MF-LF

5%1/16W

PLACE_NEAR=U1800.BA2:5mm R51111 216 93

55

1/16W5%

MF-LF402

15

PLACE_NEAR=U6100.2:5mm

R51231 216 93

MF-LF

5%1/16W

402

47


R51201 2

5%1/16WMF-LF402

471

PLACE_NEAR=J5100.14:5mmR5125

2

LPCPLUS_R:YES

402

5%

MF-LF

47

1/16WPLACE_NEAR=R5126.2:5mm

R51211 2


LPC+SPI Debug Connector

SPI_ALT_CS_LSPI_ALT_CLK

SPI_MOSI_R

SPI_MLB_MISO

SPI_MLB_CS_L

SPI_MLB_CLK

SPI_MLB_MOSI

SPI_ALT_CS_L

SPI_CS0_LSPI_CS0_R_L

SPI_CLK_R SPI_CLK

SPI_MISO

SPI_MOSI

PP3V42_G3H

LPC_CLK33M_LPCPLUSLPC_AD<2>LPC_AD<3>

SMC_RX_LLPCPLUS_GPIO

LPC_AD<0>

SPI_ALT_MISO

PM_CLKRUN_LLPC_FRAME_L

SMC_TMS

SMC_TDOLPCPLUS_RESET_L

SMC_TRST_L

SPIROM_USE_MLB

SPI_ALT_CLKSPI_ALT_MOSISPI_ALT_MISO

SPI_ALT_MOSI

LPC_AD<1>

SMC_NMISMC_RESET_LSMC_TCKSMC_TDILPC_PWRDWN_LLPC_SERIRQ

SMC_MD1SMC_TX_L

PP5V_S0

51 OF 132

46 OF 101

6 46

93

93

93

6 7 25 42 44 45 47 52 62 63 72

6 46

6 46

6 46

6 7 8 22 41 51 53 64 67 68 69 71 72 86 88 101




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

SMC "B" SMBus Connections

(Write: 0x90 Read: 0x91)EMC1412-A: U5520

T29 Temp

DP SDRV "A"

T29 IC

LIS331DLH: U5920(Write: 0x30 Read: 0x31)

PCH "SMLink 1" Connections

U9701

(Write: 0x88 Read: 0x89)U1800

Cougar Point

SMLink 1 is slave port to

U6880

U3300

U3301

Margin Control

Cougar PointU4900

(Write: 0xA4 Read: 0xA5)

(MASTER)

CPU TempEMC1414-A: U5570

U4510

(Write: 0x30 Read: 0x31)

Mikey

U5930U4900

GPU Temp (Ext)

access PCH & CPU via PECI.

Cougar PointU1800

VRef DACs

Battery Charger

Battery

ISL6258 - U7000

J6955

U4900(MASTER)

SMC

SMC "Battery A" SMBus Connections

Battery

J2900


(See Table)

SO-DIMM "A"

J3100

(MASTER)

SMC

(MASTER)(Write: 0x72 Read: 0x73)

Sensor ADC A

(Write: 0xA0 Read: 0xA1)

The bus formerly known as "Battery B"

(MASTER)

J9330

T29 Port A MCU



X19

Whistler: U8000

SMC "0" SMBus Connections

GPU Temp (Int)

ALS

U1800



(MASTER)

SMC

Battery LED Driver - (Write: 0x36 Read: 0x37)

(Write: 0x98 Read: 0x99)EMC1414-A: U5550

U9310

U9310

J3401

U4900

DP SDRV "A"

SMC

(MASTER)

Battery Temp - (Write: 0x92 Read: 0x93)

Battery Manager - (Write: 0x16 Read: 0x17)

(MASTER)J2500 & J2550

XDP Connectors

(Write: 0xB6 Read: 0xB7)


U3600

PCH "SMLink 0" Connections

LED BACKLIGHT

SO-DIMM "B"

U4900

SATA Redriver

(WRITE: 0x58 READ: 0x59)

Digital SMS


J5800


Lid Angle Detect(Write: 0x94 Read: 0x95)(Write: 0x32 Read: 0x33)

(MASTER)

SMC "A" SMBus Connections

PCH SMBus "0" Connections

Trackpad

NOTE: SMC RMT bus remains powered and may be active in S3 state



SMC "Management" SMBus Connections

T29 SMBus Connections

SMC R5291

2

1

402

5%

MF-LF

4.7K1/16W

2

1R5290

1/16W

402MF-LF

5%4.7K

4022

4.7KR52611

5%1/16WMF-LF

2

1R52605%

402

4.7K

MF-LF1/16W

2

1R52802.0K

5%1/16WMF-LF

402 2

1R52812.0K5%1/16WMF-LF402

1K

2

1R5270

402MF-LF

5%1/16W

R5271

2

1

402MF-LF1/16W5%1K

R5251

4022

1

4.7K1/16W5%

MF-LF2

1R5250

MF-LF402

5%1/16W

4.7K

2

1R5210

MF-LF402

5%1/16W

8.2K

2

1R5211

402

8.2K1/16WMF-LF

5%

2

1R5221

MF-LF402

1/16W

NO STUFF

5%8.2K

2

1R5220

402

5%1/16W

8.2K

MF-LF

NO STUFF

21

R5223

MF-LF1/16W5%0

402

21

R522205%

MF-LF402

1/16W

2

1R5201

MF-LF1/16W5%1K

4022

1R52005%

MF-LF

1K1/16W

402

4.7K

402

1

5%

MF-LF

R5230

2

1/16W

2402MF-LF1/16W

1

5%4.7KR5231

SDRVI2C:MCU

R5235

4022MF-LF1/16W5%01

SDRVI2C:MCU

R523405%

1/16W

1

2MF-LF

402

2

1

1/16WMF-LF

402

5%0

R5237SDRVI2C:SB

1

05%

2402MF-LF1/16W

R5236SDRVI2C:SB


SMBus Connections

SMBUS_PCH_DATA

SMBUS_PCH_CLK

SMBUS_PCH_DATAMAKE_BASE=TRUE

SMBUS_PCH_CLKMAKE_BASE=TRUE

MAKE_BASE=TRUEI2C_T29_SDA

PP3V3_S0

I2C_DPSDRVA_SCLMAKE_BASE=TRUE

MAKE_BASE=TRUEI2C_T29_SCL

I2C_DPSDRVA_SDAMAKE_BASE=TRUE

I2C_DPSDRVA_SCL

MAKE_BASE=TRUEI2C_DPSDRVA_SDA

SMBUS_SMC_A_S3_SCL

SMBUS_SMC_A_S3_SCL

MAKE_BASE=TRUEI2C_DPSDRVA_SDA

I2C_DPSDRVA_SCL

I2C_T29_SDA

SMBUS_SMC_A_S3_SDA

MAKE_BASE=TRUESMBUS_SMC_A_S3_SDA

SMBUS_SMC_A_S3_SCLMAKE_BASE=TRUE

SMBUS_SMC_0_S0_SCL

SMBUS_SMC_0_S0_SDAMAKE_BASE=TRUESMBUS_SMC_0_S0_SDA

SMBUS_SMC_MGMT_SDA

SMBUS_SMC_0_S0_SDA

PP3V3_S3

SMBUS_PCH_CLK

SMBUS_SMC_A_S3_SCL

SMBUS_SMC_A_S3_SDA

SMBUS_PCH_DATA

SMBUS_SMC_A_S3_SDA

SMBUS_SMC_A_S3_SCL

SMBUS_PCH_CLK

SMBUS_PCH_DATA

SMBUS_SMC_MGMT_SDA

SMBUS_SMC_MGMT_SCL

SMBUS_SMC_0_S0_SCLMAKE_BASE=TRUE

I2C_T29_SCL

SMBUS_PCH_CLK

SMBUS_SMC_0_S0_SCL

SMBUS_SMC_0_S0_SDA

MAKE_BASE=TRUESML_PCH_0_DATA

PP3V3_S3

MAKE_BASE=TRUESMBUS_SMC_MGMT_SDA

SMBUS_SMC_0_S0_SCL

SMBUS_SMC_MGMT_SCLMAKE_BASE=TRUE

SMBUS_SMC_B_S0_SCL

SMBUS_SMC_A_S3_SDA

PP3V3_S0

SMBUS_PCH_CLK

SMBUS_PCH_DATA

PP3V3_S0

SMBUS_SMC_BSA_SCL

SMBUS_SMC_BSA_SDA SMBUS_SMC_BSA_SDA

SMBUS_SMC_BSA_SCL

SMBUS_SMC_BSA_SCL

SMBUS_SMC_BSA_SDA

SMBUS_PCH_DATA

MAKE_BASE=TRUESMBUS_SMC_BSA_SCL

MAKE_BASE=TRUESMBUS_SMC_BSA_SDA

PP3V42_G3H

SML_PCH_1_DATAMAKE_BASE=TRUE

MAKE_BASE=TRUESML_PCH_1_CLK

SMBUS_SMC_MGMT_SCL

SMBUS_PCH_DATA

SMBUS_PCH_CLK

PP3V3_S0

SMBUS_PCH_CLK

SMBUS_PCH_DATA

SMBUS_PCH_CLK

SMBUS_SMC_0_S0_SCL

SMBUS_PCH_DATA

MAKE_BASE=TRUESML_PCH_0_CLK

SMBUS_SMC_0_S0_SDA

I2C_DPSDRVA_SDA

I2C_DPSDRVA_SCL

PP3V3_S0

SMBUS_SMC_B_S0_SDA

PP3V3_S0

SMBUS_SMC_B_S0_SCL

SMBUS_SMC_B_S0_SDA

SMBUS_SMC_B_S0_SCL

SMBUS_SMC_B_S0_SDAMAKE_BASE=TRUESMBUS_SMC_B_S0_SCL

SMBUS_SMC_B_S0_SDAMAKE_BASE=TRUE

52 OF 132

47 OF 101

16 23 26 28 30 41

47 61 88

93

16 23 26 28 30 41

47 61 88

93

16 23 26 28 30 41 47 61

88 93

16 23 26 28 30 41 47 61

88 93

33 47 84 95

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89

98

47 84

33 47 84 95

47 84

47 84

47 84

6 31 44 47 53

54 96

6 31 44 47 53

54 96

47 84

47 84

33 47 84 95

6 31 44 47 53

54 96

6 31 44 47

50

79

96

6 31 44 47 50 79 96

44 47 96 100

6 31 44 47

50

79

96

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

16 23 26 28 30 41

47 61 88

93

6 31 44 47 53 54 96

6 31 44 47 53 54 96

16 23 26 28 30 41

47 61 88

93

6 31 44 47 53

54 96

6 31 44 47 53

54 96

16 23 26 28 30 41 47 61

88 93

16 23 26 28 30 41 47 61

88 93

44 47 96 100

44 47 96 100

33 47 84 95

16 23 26 28 30 41

47 61 88

93

6 31 44 47 50

79 96

6 31 44 47 50

79 96

16 93

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87

44 47 96

100

6 31

44

47

50

79

96

44 47 96 100

44 47 50 96

6 31 44 47 53

54 96

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89

98

16 23 26 28 30 41

47 61 88

93

16 23 26 28 30 41

47 61 88

93

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89

98

6 44 47 62 63 96

6 44 47 62 63 96

6 44 47 62 63 96

6 44 47 62 63 96

6 44 47 62 63 96

6 44 47 62 63 96

16 23 26 28 30 41

47 61 88

93

6 7 25 42 44 45 46 52 62 63 72

16 93

16 93

44 47 96 100

16 23 26 28 30 41

47 61 88

93

16 23 26 28 30 41

47 61 88

93

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89

98

16 23 26 28 30 41

47 61 88

93

16 23 26 28 30 41 47 61

88 93

16 23 26 28 30 41 47 61

88 93

6 31 44 47 50 79 96

16 23 26 28 30 41

47 61 88

93

16 93

47 84

47 84

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36

39 40 41 45 47

48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

44 47 50 96

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89

98

44 47 50 96

44 47 50 96

44 47 50 96

44 47 50 96

44 47 50 96

44 47 50

96

OUT

IN

OUT

S

S

D

N-CHANNEL

G

D

G

P-CHANNEL

OUT

S

S

D

N-CHANNEL

G

D

G

P-CHANNEL

IN

OUT

IN V+

V-THRM

OUT

IN

IN V+

V-THRM

OUT

OUTV+

V-THRM

IN

IN

OUTV+

V-THRM

IN

IN

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1


Vi=Voltage across R7640=0.02139V

GAIN:549X

EDP:28AVimon=31xVoltage across R8940=0.868V

PBUS Voltage Sense Enable & Filter

DC-In Voltage Sense Enable & Filter

SMC_ADC9

SMC Key VP0R

DDR3 1.5V S3 Current Sense / Filter

Vi=Voltage across R7140=0.006V

SMC Key VD0R

Enables PBUS VSense

CPU 1.05V VCCIO Current Sense / Filter

GPU VCore Load Side Current Sense / Filter

CPU Vcore Voltage Sense / Filter

RTHEVENIN = 4573 Ohms

divider when AC present.

divider when in S0.

Gain: 182x

SMC_ADC2

SMC Key VG0CGPU Vcore Voltage Sense / Filter

SMC_ADC4

SMC Key VN0RAXG Vcore Voltage Sense / Filter

Gain: 3.75x

Gain: 154x

EDP:6A

EDP:21.329A

Vi=Voltage across R7350=0.006V=0.018V

EDP:18A

Enables DC-In VSense

SMC Key IG0C

SMC_ADC3

SMC_ADC7

SMC_ADC8

SMC_ADC6

RTHEVENIN = 4573 Ohms

SMC_ADC0SMC Key VC0C

CPU SA Current Sense / Filter

SMC_ADC11

SMC Key IC2C

SMC Key IC1C

SMC Key IM0C

44 45

2

1 C53300.22UF

402X5R6.3V20%

PLACE_NEAR=U4900.N12:5MM

21

R5330


MF-LF

4.53K

1%

402

1/16W

71 72

2

1R5302100K

402MF-LF1/16W

1%

2

1R5301

402MF-LF1/16W

1%100K

44 45

2

1 C5304PLACE_NEAR=U4900.L8:5MM

0.22UF

402X5R

20%6.3V

2

1R53031%

MF-LF1/16W

402

PLACE_NEAR=U4900.L8:5MM27.4K

2

1R5304PLACE_NEAR=U4900.L8:5MM

402

1/16W1%

MF-LF

5.49K

4

1

5

2

3

6

Q5300NTUD3169CZ

SOT-963

CRITICAL

44 45

2

1R5313

MF-LF1/16W

1%27.4K

402


2

1R5312

402MF-LF

1%1/16W

100K

4

1

5

2

3

6

Q5310NTUD3169CZ

SOT-963

CRITICAL

2

1 C5314

402

6.3V

0.22UF

X5R

20%


2

1R5314PLACE_NEAR=U4900.N9:5MM

402

1/16W1%

MF-LF

5.49K

2

1R5311100K

1%1/16WMF-LF

402

44 45 62 63

44 45

2

1 C5335

402X5R6.3V20%0.22UF

PLACE_NEAR=U4900.L10:5MM

21

R5335

MF-LF402

1%1/16W

4.53K

PLACE_NEAR=U4900.L10:5MM

21

XW5335

PLACE_NEAR=R8940.1:5 MM

SM

81

21

1/16WMF-LF

1%

10K

SIGNAL_MODEL=EMPTY

R5306

402

ISNS_ON:YES

ISNS_ON:YESSIGNAL_MODEL=EMPTY

R53052.87K

MF-LF1/16W1%

402

21

21

R5307

402

1/16W1%

4.02K

MF-LF

SIGNAL_MODEL=EMPTYISNS_ON:YES

8

49

1

2

3

U5310DFNOPA2333

CRITICALISNS_ON:YES

ISNS_ON:YES

21

R5308PLACE_NEAR=U4900.N11:5mm

1%

MF-LF

4.53K

1/16W

402

44 45

2

1 C5308

402

6.3V20%0.22UF

X5R


ISNS_ON:YES

69 98

69 98

21

R5324

402

6.49K

MF-LF

1%1/16WISNS_ON:YES

2

1R53251M

MF-LF

1%

402

1/16W

ISNS_ON:YES 21

R5326

402MF-LF

1%1/16W

1M


21

R53236.49K

1%1/16WMF-LF402

ISNS_ON:YES

8

49

7

6

5

U5310DFN

CRITICAL

OPA2333ISNS_ON:YES

21

R5327PLACE_NEAR=U4900.L12:5mm

1%

402

4.53K

1/16WMF-LF

ISNS_ON:YES2

1 C5327

402X5R6.3V20%

PLACE_NEAR=U4900.L12:5mm0.22UF

ISNS_ON:YES

44 45

2

1 C5310

10V20%

402

0.1UF

CERM

ISNS_ON:YES

44 45

402MF-LF1/16W

21

R5367PLACE_NEAR=U4900.M10:5mm

4.53K

1%

ISNS_ON:YES1 C53670.22UF20%

ISNS_ON:YES2 X5R

402

PLACE_NEAR=U4900.M10:5mm

6.3V

11.82K

ISNS_ON:YES

2

R5363

1%

402MF-LF1/16W

ISNS_ON:YESCRITICAL

8

49

1

3 DFNOPA2333U5360

2


2

R5366

1%1/16W

1M

402MF-LF

1ISNS_ON:YES

R5365

2

1

MF-LF

1%1M

402

1/16W

402MF-LFISNS_ON:YES

1.82K21

1/16W1%

R5364

64 98

64 98

44 45 21

R5377

MF-LF

1%1/16W

402


4.53K

ISNS_ON:YES

2

1 C537720%6.3V

402X5R

0.22UF PLACE_NEAR=U4900.N13:5mm

ISNS_ON:YES

21

R5373

1%

MF-LF1/16W

5.49K

402

ISNS_ON:YES

8

49

7

6

5

U5360DFNOPA2333

CRITICAL

ISNS_ON:YES

21

R5376

1%

MF-LF

1M

402

1/16W


2

1R53751M1%

MF-LF1/16W

402

ISNS_ON:YES

21

R5374

MF-LF1/16W

402

5.49K

1%

ISNS_ON:YES

66 98

66 98

ISNS_ON:YES

2

1 C5360

402

10V20%0.1UF

CERM

21

XW5330SM


44 45 21

R5320

PLACE_NEAR=U4900.N10:5MM402

1%

MF-LF1/16W

4.53K

2

1 C5320PLACE_NEAR=U4900.N10:5MM

0.22UF

402X5R6.3V20%

21

XW5320


SM

ISNS_ON:NOC5308,C5327,C5367,C5377RES, 0OHM, 04024116S0090

Voltage & Load Side Current Sensing

SYNC_DATE=08/16/2010SYNC_MASTER=K91_DINESH

VCCSAISNS_R_P

VCCSAISNS_R_N

PDCINVSENS_EN_L_DIV

PBUSVSENS_EN_L

ISENSE_CPUVCCIO_IOUTDCINVSENS_EN_L

SMC_DCIN_VSENSE

GND_SMC_AVSS

GND_SMC_AVSS

SMC_PBUS_VSENSE

PBUS_S0_VSENSE

PBUSVSENS_EN_L_DIV

ISNS_1V5_S3_P ISNS_1V5_S3_R_P

SMC_CPUVCCIO_ISENSECPUVCCIOS0_CS_P

VCCSAS0_CS_P

GFXIMVP6_IMON

CPUVCCIOISNS_R_P

PPBUS_G3H

GPUVCORE_IOUT

CPUVCCIOISNS_R_N

ISNS_1V5_S3_R_N

PP3V3_S3

ISENSE_P1V5S3_IOUT

CPUVCCIOS0_CS_N

GND_SMC_AVSS

SMC_GPU_ISENSE

GND_SMC_AVSSGND_SMC_AVSS

PPDCIN_G3H

GND_SMC_AVSS

GND_SMC_AVSS

SMC_CPU_VSENSE

GFXVSENSE_IN

PM_SLP_S3_R_L

SMC_BC_ACOK

PPVCORE_S0_AXG

PPVCORE_GPU

PPVCORE_S0_CPU

GND_SMC_AVSS

CPUVSENSE_IN

SMC_GFX_VSENSE

SMC_GPU_VSENSEGPUVSENSE_IN

GND_SMC_AVSS

SMC_P1V5S3_ISENSE

ISNS_1V5_S3_N

DCIN_S5_VSENSE

GPUISENS_P

GPUISENS_N

VCCSAS0_CS_N

PP3V3_S0

SMC_SA_ISENSE

GND_SMC_AVSS

ISENSE_SA_IOUT

53 OF 132

48 OF 101

98

44 45 48 49

44 45 48 49

98

98

6 7 8 35 39 49 62 63 88

6 7 8 18 19 24 25 29 30 31 32 47 49 53 54 71 72 87

44 45 48 49

44 45 48 49

6 7 62 63

44 45 48 49

44 45 48 49

7 12 13 15 68

6 7 74 81

6 7 12 14 68 101

44 45 48 49

44 45 48 49

98

98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

44 45 48 49

IN

OUT

VER 1

VCC

A

1

0

B1

GND

B0

SELIN

IN

IN

OUTIN

OUT

OUT

V+

REFIN+

IN- OUT

GND

IN

OUT

OUTV+

REFIN+

IN- OUT

GND

IN

OUT

V+

REFIN+

IN- OUT

GND

IN

OUT

OUTIN-

IN+ REF

V+

GND

OUT

OUT

V-

V++

-

IN

IN

IN

IN

V-

V++

-

IN

IN

IN

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1


OTHER High Side Current Sense / Filter

GRAPHICS High Side Current Sense / Filter

CHARGER BMON High Side (BATTERY DISCHARGE) Current Sense, MUX & Filter

RC values chosen per K17 Radar 7337775For Production, Bmon=36*18.33A*R7050=3.3V

Gain:200x

Sense R is R7510, R7520 & R7530Individual Sense R is 0.75mOhm

(Effective Sense R is 0.25mOhm due to summing of the 3 phases)

GFX/IG VCore Load Side Current Sense / Filter

EDP: 94A TDP :45A

CPU VCore Load Side Current Sense / Filter

Scale: 28.55A / VMax VOut: 3.3V at 94.2A

Gain:140x

SMC_ADC13

SMC_ADC1Power Drop across R5400 at EDP becomes 1.21W

SMC Key IC0R

SMC Key IB0R

SMC Key IO0R

SMC Key IG0REDP Current:4.9A

EDP Current:20.1A

DC-IN (AMON) Current Sense Filter

For engineering, stuff BMON_ENG

SMC Key IC0C

SMC Key IN0R

Charger/Load side

For production, stuff BMON_PROD

SMC Key ID0REDP Current:4.6A

For engineering, Bmon=6.6A*100*R7050=3.3V

battery to PBUS (battery discharge)

EDP Current:6.6A

From charger

NOTE: Monitoring current from

Sense R is R7050, 5mOhm

(100V/V)

Gain:100x

Gain:50x

EDP Current:12.546A

Battery side

SMC_ADC10

Gain:50x

SMC_ADC5

SMC_ADC12ISL6259 Gain: 36x

SMC_ADC15

SMC_ADC14

Gain:133.33xScale: 10A / VSense R is R7550, 0.75mOhm

COMPUTING High Side Current Sense / Filter

Max VOut: 3.3V at 33AEDP: 33A TDP: 21.5A

2

1 C542020%0.1uF

BMON:ENG

402CERM10V

63 12

R5420

PLACE_NEAR=U5421.1:5MM

BMON:PROD

402

0

1/16W5%

MF-LF

2

1C54210.1uF

BMON:ENG

20%10V

CERM402

44 45

5

6

2

1

3 4

U5421BMON:ENG

SC70NC7SB3157P6XG

CRITICAL

44 45

63 98

63 98

44 45

2

1 C5441PLACE_NEAR=U4900.K10:5MM

X5R402

20%6.3V

0.22UF

21

R5441PLACE_NEAR=U4900.K10:5MM

402

1/16W1%

4.53K

MF-LF

63

2

1 C5403PLACE_NEAR=U4900.N8:5MM

0.22UF20%

402

6.3VX5R

21

R5403

402MF-LF

1%1/16W

4.53K


44 45

21

R5433PLACE_NEAR=U4900.L7:5MM

1%1/16W

4.53K

MF-LF402

2

1 C5433

402X5R6.3V

0.22UF20%

PLACE_NEAR=U4900.L7:5MM44 45

402

2145.3KR5422

PLACE_NEAR=U4900.M9:5MM

1%

MF-LF1/16W

402

1

216VCERM-X5R

0.022UF10%

C5422PLACE_NEAR=U4900.M9:5MM

2

1R5423

402

100K

BMON:ENG

5%1/16WMF-LF

3

1

6

4

5

2

U5400SC70

INA213

CRITICAL

6 7 8 35 39 48 49 62 63 88

7 64 66 67 68 69 2

1 C5401

10V20%

CERM

0.1UF

402

2

1 C5431

402

0.1UF20%

CERM10V

7 65

3

1

6

4

5

2

INA213SC70

CRITICAL

U5430

6 7 8 35 39 48 49 62 63 88

44 45

2

1C54130.22UF6.3V20%

X5R402

PLACE_NEAR=U4900.K9:5MM

21

R5413

1%

MF-LF402

1/16W

4.53K

PLACE_NEAR=U4900.K9:5MM

2

120%

402CERM10V

0.1UFC5411

3

1

6

4

5

2

U5410INA210SC70

CRITICAL

6 7 8 35 39 48 49 62 63 88

7 81 86

4

3

2

1

1W1%

CRITICAL

MF0612

0.003

R5400

4

3

2

1

MF1W1%

0612

0.003

CRITICAL

R5410

4

3

2

1

R5430

1%MF1W

CRITICAL

0612

0.005

3

1

6

4

5

2

SC70

BMON:ENG

INA214U5420

CRITICAL

44 45

44 45

2

1 C5451PLACE_NEAR=U4900.M11:5MM

20%0.22UF

X5R402

6.3V

ISNS_ON:YES

21

R5451

MF-LF

IMVPISNS_ENGPLACE_NEAR=U4900.M11:5MM

4.53K

402

1%1/16W

2

1 C5450

IMVPISNS_ENG

0.1UF

CERM402

20%10V

PLACE_NEAR=U5450.5:3MM

21

R5455

1/16W SIGNAL_MODEL=EMPTY1%

IMVPISNS_ENG

402MF-LF

732K

5

2

4

3

1

U5450OPA333DCKG4SC70-5

IMVPISNS_ENGCRITICAL

402

21

MF-LF

3.48K

1%

R5452IMVPISNS_ENG

1/16W

402

21

MF-LF

3.48K

1%

R5453IMVPISNS_ENG

1/16W

21

R5457PLACE_NEAR=R7520.3:5MM

1/16WMF402

0.5%

IMVPISNS_ENGSIGNAL_MODEL=EMPTY5.23K

MF1/16W0.5%

5.23K

402

IMVPISNS_ENGPLACE_NEAR=R7530.3:5MM

SIGNAL_MODEL=EMPTY

R54581 2

67 68

67 68

68

68

2

1 C5461PLACE_NEAR=U4900.M13:5MM

0.22UF6.3V20%

402X5RISNS_ON:YES

21

R5461

IMVPISNS_ENGPLACE_NEAR=U4900.M13:5MM

4.53K

1%1/16WMF-LF402

2

1 C5460

CERM402

10V20%0.1UF

IMVPISNS_ENGPLACE_NEAR=U5460.5:3MM

2

1R5454

SIGNAL_MODEL=EMPTY

1/16W

IMVPISNS_ENG

732K

402

1%

MF-LF

5

2

4

3

1

U5460

IMVPISNS_ENG

SC70-5

CRITICAL

OPA333DCKG4

21

R5465IMVPISNS_ENG

SIGNAL_MODEL=EMPTY

732K

MF-LF1/16W1%

402

21

R5462

1/16W

IMVPISNS_ENG

MF-LF

5.49K

1%

402

21

R5463

IMVPISNS_ENG

5.49K

MF-LF1/16W1%

402

2

1R54641%

MF-LF1/16W

732K

402

SIGNAL_MODEL=EMPTY

IMVPISNS_ENG

68 98

68 98

21


402MF

1/16W

IMVPISNS_ENG

5.23K

0.5%

SIGNAL_MODEL=EMPTY

67 68

68

402

21

MF

5.23K

0.5%


SIGNAL_MODEL=EMPTY1/16W

402

21

MF

5.23K

0.5%



402

21

MF

5.23K

0.5%



21

R5467

MF-LF

5%

PLACE_NEAR=R7550.4:5MM

1/16W

0

SIGNAL_MODEL=EMPTY

402

IMVPISNS_ENG

R546621

IMVPISNS_ENG

MF-LF1/16W5%

0

SIGNAL_MODEL=EMPTY

PLACE_NEAR=R7550.3:5MM

402

2 C5451,C5461RES, 0OHM, 0402 ISNS_ON:NO116S0090

SYNC_MASTER=K91_DINESH SYNC_DATE=10/29/2010

High Side and CPU/AXG Current Sensing

SMC_CPU_HI_ISENSE

SMC_OTHER_HI_ISENSE

GND_SMC_AVSS

CPUIMVP_ISNS1G_P

CPUIMVP_ISNS1G_R_NCPUIMVP_ISNS1G_N

CPUIMVP_ISNS2_P

CPUIMVP_ISNS1_P

CPUIMVP_ISNS1_N

PP3V3_S0

HS_GPU_IOUT SMC_GPU_HI_ISENSE

GND_SMC_AVSS

GND_SMC_AVSS

ISNS_HS_GPU_P


ISNS_HS_OTHER_N

SMC_DCIN_ISENSE

HS_OTHER_IOUT

GND_SMC_AVSS

CHGR_CSO_R_N

CHGR_CSO_R_P BMON_INA_OUT

SMC_BMON_ISENSE

CHGR_AMON

ISNS_HS_GPU_N

PPBUS_G3H

ISNS_HS_COMPUTING_N

PPBUS_G3H

SMC_GFX_ISENSE

HS_COMPUTING_IOUT

PP3V3_S0

CPUIMVP_ISNS2_N

CPUIMVP_ISNS3_N

CPUIMVP_ISNS3_P

PP3V3_S0

CPUIMVP_ISUMG_R_P

CPUIMVP_ISUMG_R_N

CPUIMVP_ISNS1G_R_P

GND_SMC_AVSS

PPBUS_G3H


SMC_CPU_ISENSE

GND_SMC_AVSS

CPUIMVP_ISNS_P

CPUIMVP_ISUM_R_N

CPUIMVP_ISUM_R_P

CPUIMVP_ISUM_IOUT

CPUIMVP_ISUMG_IOUT

CPUIMVP_ISNS_N

CHGR_BMON

ISNS_HS_OTHER_P

ISNS_HS_COMPUTING_P


BMON_AMUX_OUT

PP3V3_S3

GND_SMC_AVSS

SMC_BMON_MUX_SEL

PP3V3_S0

PP3V3_S0

54 OF 132

49 OF 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

44 45 48 49

44 45 48 49

98

98

44 45 48 49

98

98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

44 45 48 49

44 45 48 49

98

98

6 7 8 18 19 24 25 29 30 31 32 47 48 53 54 71 72 87

44 45 48 49

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

BI

BI

BI

BI ALERT*

THERM*/ADDRDP1

SMCLK

SMDATA

VDD

DN1

DP2/DN3

DN2/DP3GND

ALERT*

THERM*/ADDRDP1

SMCLK

SMDATA

VDD

DN1

DP2/DN3

DN2/DP3GND

BI

BI

BI BI

BI

V+

GNDS

SDA

SCL

A0

ALERT NC

BI

BI




36

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REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Place Q5502 on bottom side

T29 Proximity

Placement note:Place Q5504 under PCH

Read Address: 0x99

Placement note:

CPU Proximity/CPU Die/PCH Proximity/LVDS Connector Proximity

Detect Left Heat Pipe Temperature

Read Address: 0x99

Placement note:

Write Address: 0x98

Detect Right Fin Stack Temperature

close to the right fin stack

Placement note:

Placement note:

Place U5570 under CPU

Write Address: 0x98

Detect PCH Proximity Temperature

Placement note:

Compensation for External Diode 1 onlyNote: EMC1414 can perform Beta

Detect LVDS Connector Proximity Temperature

close to the LVDS Connector

Place U5550 on bottom side under GPU

Detect GPU Die Temperature

GPU Proximity/GPU Die/Left Heat Pipe/Right Fin Stack

Use GND pin B1 on U3600 for N leg

T29 Die

Read Address: 0x91

Place U5520 close to T29 router on BOTTOM side

Placement note:

Write Address: 0x90

Place Q5503 on top side under left heat pipe near GPU

Detect CPU Die Temperature

Place Q5501 on bottom side

10K5%1/16WMF-LF402

R55721

2402

5%

MF-LF

10K1/16W

R55711

2

CRITICAL

SOT732-3BC846BMXXH

Q5504 1

3

2

6 31 44 47 79 96

6 31 44 47 79 96

1/16W

10K5%

402MF-LF

R55511

2MF-LF

10K1/16W

402

5%

R55521

2

CERM10V20%0.1uF

402

C55501

2

402MF-LF1/16W

47

5%

R55501 2

10%50V

402CERM

0.0022uF

SIGNAL_MODEL=EMPTY

PLACE_NEAR=U5550.3:5mmPLACE_NEAR=U5550.2:5mm

C5551 1

2


402CERM

0.0022uF


10%50V

SIGNAL_MODEL=EMPTY

C5552 1

2

78 98

78 98

CRITICAL

SOT732-3BC846BMXXH

Q5503 1

3

2

MSOP

CRITICAL

EMC1414-AU5550

83

5

2

4

6

10

9

7

1

CRITICAL

SOT732-3BC846BMXXH

Q5501

1

3

2

4 CRITICAL

EMC1414-AU5570

MSOP

83

5

2

6

10

9

7

1

CRITICAL

BC846BMXXHSOT732-3

Q5502

1

3

2


CERM402

50V10%


SIGNAL_MODEL=EMPTY

0.0022uFC5571 1

2

9 98

9 98

33 50


21

SMXW5520

C5520

402CERM10V20%0.1uF

1

2

44 47 50 96

44 47 50 96

PLACE_SIDE=BOTTOM

A2

PLACE_NEAR=U3600

CRITICAL

WCSP-6TMP105U5520

C2

B2B1

A1

C1

MF-LF1/16W

PLACE_SIDE=BOTTOM

1R552010K

402

NOSTUFF

5%

2

44 47 50 96

44 47 50 96

0.1uF20%10VCERM402

C55701

2

1/16WMF-LF402

5%

47R55701 2

402

0.0022uF10%50V

CERM


SIGNAL_MODEL=EMPTY

C5590 1

2


Thermal Sensors

PP3V3_S0_CPUTHMSNS_RMIN_NECK_WIDTH=0.2 mmVOLTAGE=3.3V


GPUTHMSNS_D_P

T29_THERMD_P


PP3V3_S0_GPUTHMSNS_R

VOLTAGE=3.3V

GPUTHMSNS_D_N

SMBUS_SMC_B_S0_SDA

SMBUS_SMC_B_S0_SCL

CPUTHMSNS_THM_L

CPUTHMSNS_ALERT_L

PP3V3_S0

GPU_TDIODE_N

SMBUS_SMC_0_S0_SDA

SMBUS_SMC_0_S0_SCL

GPUTHMSNS_THM_L

GPUTHMSNS_ALERT_L

GPU_TDIODE_P

PP3V3_S0

CPU_THERMD_N

T29_THERMD_PMAKE_BASE=TRUE

PP3V3_S0

CPU_THERMD_P

CPUTHMSNS_D2_P

T29_THERMD_N

SMBUS_SMC_B_S0_SDA

CPUTHMSNS_D2_N

SMBUS_SMC_B_S0_SCL

55 OF 132

50 OF 101

98

98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

33 50

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

98

98

G

S D

G

S DIN

OUT OUT

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

518S0369

Right FanLeft Fan

518S0369

1/16W5%

402MF-LF

47KR56501

2

1/16W5%

402MF-LF

47KR56551 2

1/16W5%

402MF-LF

47KR56601

2

1/16W5%

402MF-LF

47KR56651 2

1/16W5%

402MF-LF

100KR56511

2 SOT-3632N7002DW-X-GQ5660

3

5

4

1/16W5%

402MF-LF

100KR56611

2 SOT-3632N7002DW-X-GQ5660

6

2

1

M-RT-SM78171-0004

CRITICAL

J5650

5

6

1

2

3

4

M-RT-SM78171-0004

CRITICAL

J5660

5

6

1

2

3

4

44

44 44

44


Fan Connectors

FAN_LT_PWM SMC_FAN_1_CTL

SMC_FAN_1_TACH

SMC_FAN_0_CTL FAN_RT_PWM

PP5V_S0

FAN_RT_TACH

PP3V3_S0

FAN_LT_TACH

PP5V_S0PP3V3_S0

SMC_FAN_0_TACH

56 OF 132

51 OF 101

6 6

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53

56 60 61 71 72 79 82 83 84 87 88 89 98

6

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53

56 60 61 71 72 79 82 83 84 87 88 89 98

P2_4

P2_6

VDD

P0_4

P0_2

P2_0P2_2P

0_0

P2_3P2_1P4_7P4_5P4_3P4_1P3_7P3_5P3_3P3_1P5_7P5_5P5_3P5_1

P1_1

P1_3

P1_5

P1_7

P7_7

VSS

D+D-VDD

P7_0

P1_0

P1_2

P1_4

P1_6 P5_0

P5_2P5_4P5_6P3_0P3_2P3_4

P4_0P4_2P4_4P4_6

P3_6

P2_5

P2_7

P0_3

VSS

P0_5

P0_7

P0_6

PADTHRML

(SYM-VER2)

P0_1

IN

NC

NC

OUT

NC

IN_A1

OUT_B

IN_A3_B2

GNDTHRM

OUT_A

VDD

IN_A2

IN_B1

PAD

(IPD)

(IPD)

(IPD)

(IPD)

IN_A1

OUT_B

IN_A3_B2

GNDTHRM

OUT_A

VDD

IN_A2

IN_B1

PAD

(IPD)

(IPD)

(IPD)

(IPD)

D

SG

D

SG

OUT

OUT

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

337S2983

THIS ASSUMES THERE’S A PP3V42_G3H PULL UP ON MLB

THE TPAD BUTTONS WILL BE DISABLE

LID OPEN => SMC_LID_LC ~ 3.42VWHEN THE LID IS CLOSED

SMC Manual Reset & Isolation

PLACE THESE COMPONENTS CLOSE TO J5800

(PP3V3_S4_PSOC)

4.7 OHM

0.2 OHM 10 OHM

2.55 KOHM

Keys ANDed with PSOC power to isolate when PSOC is not powered.

Left shift, option & control keys combined with power button cause SMC RESET# assertion.

1.5 OHM

4MA (MAX) 0.0188 V

ISSP SCLK/I2C SCL ISSP SDATA/I2C SDA

- KEYBOARD SCANNER

PSOC USB CONTROLLER Keyboard ConnectorTMP102- USB INTERFACES TO MLB- SPI HOST TO Z2- TRACKPAD PICK BUTTONS

Pull-up in U5010.

PSOC VDD

VIN18V BOOSTER

0.021 V0.012 V

0.012 V0.6 V

0.204 V0.0255 V

POWERV_SNSR_SNSCURRENTIC

10UAV+80UA

VOUTVDD3V3 LDO 60MA (MAX)

60MA (MAX)

8MA (TYP)14MA (MAX)

0.255E-6 W16.32E-6 W

0.72E-3 W

294E-6 W

75.2E-6 W

96E-6 W

518S0637

36E-3 W

PIN NAME

TPAD Buttons Disable

LID CLOSE => SMC_LID_LC < 0.50V

2

1 C570620%6.3VX5R603

4.7UF

BYPASS=U5701.49:50:11 mm

2

1 C57050.1UF10%

X7R-CERM402

BYPASS=U5701.49:50:8 mm

16V2

1 C5704

BYPASS=U5701.49:50:5 mm

100PF

402CERM50V5%

2

1 C5703

16V

BYPASS=U5701.22:19:8 mm

10%

X7R-CERM402

0.1UF

2

1 C5702

BYPASS=U5701.22:19:5 mm

CERM402

5%100PF50V 2

1 C570120%

BYPASS=U5701.22:19:11 mm

4.7UF

603X5R6.3V

21

R5702

402

5%

MF-LF1/16W

24

50

19

49

22

57

23

24

11 32

12 31

13 30

14 29

3 40

4 39

5 38

6 37

7 36

8 35

9 34

10 33

55

44

56

43

1 42

2 41

28

16

27

17

26

18

25

51

48

52

47

53

46

54

45

21

20

U5701MLF

OMIT

CY8C24794

15

CRITICAL

21

R570124

1/16WMF-LF

5%

402

44 45 62

2

1C57100.1UF

10VCERM

PLACEMENT_NOTE=NEAR J5713

402

20%

21

R5710

5%1/16W

1K

MF-LF402

21

R5714470

MF-LF1/16W

402

1%

21

R571510K

1/16WMF-LF

1%

402

9

8

7

6

5

4

30

3

29

28

27

26

25

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

32

31

J5713

F-RT-SM

FF14-30A-R11B-B-3H

CRITICAL

6 44 45

1/16WMF-LF

5%

0

402

R57042 1

1

9

8

4

6

7

3

2

5

U5755TDFN

SLG4AP006

CRITICAL

2

1 C5755

X7R-CERM

0.1UF

402

10%16V

2

1 C57500.1UF

402

10%16VX7R-CERM

1

9

8

4

6

7

3

2

5

U5750

CRITICAL

SLG4AP006TDFN

12

6Q5701SOT563

SSM6N15FEAPE

CRITICAL

45

3Q5701SSM6N15FEAPE

SOT563

CRITICAL

45

44 45

72

220K5%1/16WMF-LF

R5703

4022

1

WELLSPRING 1SYNC_MASTER=K91_ERIC SYNC_DATE=10/08/2010

PICKB_LBUTTON_DISABLEZ2_HOST_INTNWS_LEFT_SHIFT_KEY

PP3V3_S4

TPAD_VBUS_EN

Z2_RESETWS_KBD13

PP3V3_S4

WS_KBD2

WS_LEFT_OPTION_KEY

WS_CONTROL_KBD

WS_LEFT_OPTION_KBD

WS_CONTROL_KEY

WS_LEFT_SHIFT_KEY

WS_KBD15_C

WS_KBD16N

WS_KBD8

WS_KBD23

WS_KBD19WS_KBD20WS_KBD21

WS_KBD9

WS_KBD12WS_KBD11

WS_KBD13WS_KBD14

WS_KBD17WS_KBD18

WS_KBD4WS_KBD3

WS_KBD1

WS_KBD19WS_KBD18

WS_KBD6

WS_KBD17WS_KBD16NWS_KBD15_C

USB_TPAD_P

WS_LEFT_SHIFT_KBDWS_LEFT_OPTION_KBDWS_CONTROL_KBD

SMC_ONOFF_L

PSOC_F_CS_L

Z2_MISO

SMC_LID

BUTTON_DISABLE

SMC_TPAD_RST_L

SMC_TPAD_RST

WS_KBD7WS_KBD6WS_KBD5

Z2_MOSIZ2_SCLK

WS_KBD1

PSOC_SCLK

WS_LEFT_OPTION_KEY

WS_LEFT_SHIFT_KBD

PP3V3_S4

PSOC_MOSI

WS_KBD2

WS_KBD8

WS_KBD12

WS_KBD10

WS_KBD7

WS_KBD3

WS_KBD11

WS_KBD21WS_KBD20

WS_KBD4

TP_ISSP_SDATA_P1_0

WS_KBD5

PSOC_MISO

Z2_CS_L

USB_TPAD_R_P TP_P7_7

USB_TPAD_R_NUSB_TPAD_N

TP_PSOC_SDANC_PSOC_P1_3

WS_KBD14

WS_KBD22

WS_CONTROL_KEYZ2_KEY_ACT_L

SMC_PME_S4_WAKE_L

WS_KBD_ONOFF_L

WS_KBD22

PP3V42_G3H

WS_KBD10

WS_KBD16_NUMWS_KBD15_CAP

PP3V42_G3H

WS_KBD9

TP_PSOC_SCL

TP_ISSP_SCLK_P1_1

Z2_CLKIN

WS_KBD23

Z2_DEBUG3

PP3V3_S4_PSOC

VOLTAGE=3.3VMIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.50MM

52 OF 101

57 OF 132

6 53

52

6 53

52

7 45 52 53 71

6 53

6 52

7 45 52 53 71

6 52

52

6 52

6 52

52

52

52

52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

52

52

24 92

6 52

6 52

6 52

6 53

6 53

52

6 52

6 52

6 52

6 53

6 53

6 52

6 53

52

6 52

7 45 52 53 71

6 53

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 52

6 8

6 52

6 53

6 53

98 6

98 24 92

6

6

6 52

6 52

52

6 53

6

6 52

6 7 25 42 44 45 46 47 52 62 63 72

6 52

6

6

6 7 25 42 44 45 46 47 52 62 63 72

6 52

6

6 8

6 53

6 52

6 53

CTRL

PGND

THRML

L

VIN

DO

FB

SW

PAD GND

BI

THRML

CAP

SW

LED

VIN

CTRL

PADGND

NC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

516S0689

BOOSTER +18.5VDC FOR SENSORS

- R5812,R5813,C5818 MODIFIED

Keyboard Backlight Driver & Detection

- DROOP LINE REGULATION- RIPPLE TO MEET ERS- 100-300 KHZ CLEAN SPECTRUM- STARTUP TIME LESS THAN 2MS

(SMC_KBDLED_PRESENT_L)

grounded when KB BL flex connected.R5853 always stuffed, R5854 only

If LOW, keyboard backlight present

- POWER CONSUMPTIONBOOSTER DESIGN CONSIDERATION:

Keyboard Backlight Connector

J5815 pin 1 is grounded on keyboard backlight flex

518S0691If HIGH, keyboard backlight not present

tristate and read SMC_SYS_KBDLED: To detect Keyboard backlight, SMC will

IPD Flex Connector

M-ST-SM55560-0228

CRITICALJ5800

1

10

1112

1314

1516

1718

19

2

20

2122

34

56

78

9

CRITICAL

SOD-323

B0520WSXG

D58021 2

10%1UF25V

603-1X5R

C5819 1

2

MF-LF

5%

402

0

1/16W

R58061 2

16V

0.1UF

402X7R-CERM

10%

C5816 1

2

1/16WMF-LF

5%

402

0R58052 1

10%

X5R603

2.2UF16V

C58171

2

TPS61045

CRITICAL

QFN

U5805

53

4

6

1

7

8

9

2

CRITICAL

VLF3010AT-SM-HF

3.3UH-870MAL5801

1 2

1%

402

1/16WMF-LF

100KR58111

2

44

5%1/16WMF-LF402

KB_BL

4.7KR58541

2

402

1/16W5%

470K

MF-LF

R58531

2

DFN

CRITICAL

KB_BL

LT3491U5850

4

6

2

5

3

7

1

10K

MF-LF402

NO STUFF

5%1/16W

R58521

2

10V

1UF

402-1X5R

10%

KB_BLC5850 1

2

101%1/16WMF-LF402

KB_BLR58551

2

10UH-0.58A-0.35OHM

1098AS-SM

KB_BLCRITICAL

L5850

1 2

10%

X5R603

1UF35V

KB_BLC58551

2

F-RT-SMFF18-4A-R11AD-B-3H

KB_BLCRITICAL

J5815

1

2

3

4

50VCERM402

5%39PF

C5818 1

2402

1%1M1/16WMF-LF

R58121

2

402

1/16W1%71.5K

MF-LF

R58131

2

25V5%

NP0-C0G

1000PF

402

C58151

2

402

5%

MF-LF1/16W

0

NO STUFF

R58001 2

SYNC_MASTER=K91_ERIC SYNC_DATE=07/14/2010

WELLSPRING 2

SMC_SYS_KBDLED

PP3V3_S0

SMC_KDBLED_PRESENT_L

KBDLED_ANODEMIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.2 MM

MIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.25 MMKBDLED_CAP

SWITCH_NODE=TRUE

KBDLED_SWMIN_LINE_WIDTH=0.3 MMMIN_NECK_WIDTH=0.25 MM

PP5V_S0

PP5V_S5

MIN_NECK_WIDTH=0.20MMVOLTAGE=5V

MIN_LINE_WIDTH=0.50MMPP5V_S5_P18V5S5_VIN


P18V5S4_SW

SWITCH_NODE=TRUE


VOLTAGE=5V

PP5V_S4_P18V5S5MIN_NECK_WIDTH=0.20MM MIN_NECK_WIDTH=0.20MM

VOLTAGE=18.5V

PP18V5_S4_RMIN_LINE_WIDTH=0.50MM

P18V5S4_FB

Z2_BOOST_EN

PP18V5_S4MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.50MM

VOLTAGE=18.5V

Z2_RESETPSOC_F_CS_LPICKB_LPSOC_MISOPSOC_MOSIPSOC_SCLKSMBUS_SMC_A_S3_SDASMBUS_SMC_A_S3_SCL

PP18V5_S4

Z2_KEY_ACT_LZ2_CS_LZ2_DEBUG3Z2_MOSIZ2_MISOZ2_SCLKZ2_BOOST_ENZ2_HOST_INTN

PP3V3_S4

Z2_CLKIN

PP3V3_S3

PP3V3_S3_TPADMIN_NECK_WIDT=0.20MMMIN_LINE_WIDTH=0.50MM

VOLTAGE=3.3V

58 OF 132

53 OF 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 56 60 61 71 72

79 82 83 84 87 88 89 98

6

6

6 7 8 22 41 46 51 64 67 68 69 71 72 86 88 101

6 7 65 71

6 53

6 52

6 52

6 52

6 52

6 52

6 52

6 31 44 47 54 96

6 31 44 47 54 96

6 53

6 52 6 52

6 52

6 52

6 52

6 52

6 53

6 52

7 45 52 71

6 52

6 7 8 18 19 24 25 29 30 31 32 47 48 49 54 71 72 87

INT2

VDD VDD_IO

SDO

GND

NC

RESERVED

INT1

CS

SDA/SDI/SDO

SCL/SPC

NCNC

OUT

BI

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

placed on board bottom-side (view thru top):

Front of system

Circle indicates pin 1 location when placed

338S0687

+X

+Y

in correct orientation

+Z (dn)

Desired orientation when

NOTE: SDA and SCL have internal pull-ups to VDD_IO.

SMS_ADDR_SELECT=1 Addr: 0x32(Wr)/0x33(Rd)SMS_ADDR_SELECT=0 Addr: 0x30(Wr)/0x31(Rd)

114

7

6

4

15

10

3

2

9

11

16

13

125

8

U5920

CRITICAL

LGALIS331DLH

PLACEMENT_NOTE=See schematic for orientation.

2

1 C5922

BYPASS=U5920.14:13:8 mm

6.3V

0.1UF

201X5R

10%2

1C5926

BYPASS=U5920.14:13:8 mm603X5R

6.3V

10UF20%

2

1R592010K1/20W

5%

MF201

2

1R592110K

5%1/20W

MF201

21

R5922

201

1/20W5%

0

MF

21

R5923

201

1/20W

0

MF

5%2

1R592410K

5%1/20W

201MF

44 45

6 31 44 47 53 96

6 31 44 47 53 96

2

1R5925

MF

5%1/20W

NOSTUFF

201

10K


Digital Accelerometer

SMS_I2C_SEL

PP3V3_S3

SMBUS_SMC_A_S3_SCL

SMS_ADDR_SELECTI2C_SMC_SMS_SDA_R

TP_SMS_INT2SMS_INT_L

I2C_SMC_SMS_SCL_R

SMBUS_SMC_A_S3_SDA

59 OF 132

54 OF 101

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 71 72 87

OUTIN

IN IN

IN

WP*

SI

HOLD*VSS

SCK

CE*

VDD

SO




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

NOTE: If HOLD* is assertedROM will ignore SPI cycles.

402

20%

CERM

0.1UF10V

C6100 1

2402

3.3K5%

MF-LF1/16W

R61011

2

46 46

46 46

6 19 46

SOIC

SST25VF064C

64MBIT

OMIT

CRITICAL

U6100

1

7

6 5

2

84

3

SPI ROMSYNC_MASTER=K91_BEN SYNC_DATE=06/08/2010

SPI_MLB_CLK

SPI_MLB_MISOSPI_WP_LSPI_MLB_CS_L

SPI_MLB_MOSI

PP3V3_S5

SPIROM_USE_MLB

61 OF 132

55 OF 101

6 7 17 19 20 22 23 24 25 29 39 45 65 70 71 72 82 85 89 98

IN

IN

IN

IN

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

IN

OUT

IN

OUT

OUT

OUT

BP

NC

SHDN*

IN OUT

GND

/SPDIF_OUT2

VL_HD

SENSE_A

GPIO1/DMIC_SDA2

GPIO0/DMIC_SDA1

VHP_FILT+

GPIO2

RESET*

LINEOUT_L1-

VBIAS_DAC

FLYP

VA_REFVD

GPIO3

VHP_FILT-

LINEOUT_R1-

LINEOUT_R1+

LINEOUT_R2-

SPDIF_OUT

LINEIN_C-

FLYC

FLYN

SPDIF_IN

LINEOUT_L1+

THRM_PAD

VA_HP

HPOUT_R

HPREF

VCOM

AGND

VA

LINEIN_R+

LINEIN_L+

MICIN_L+

MICIN_L-

MICBIAS

SYNC

DGND

DMIC_SCL

HPOUT_L

SDI

SDO

VL_IF

BITCLK

MICIN_R-

MICIN_R+

VREF+_ADC

LINEOUT_L2+

LINEOUT_L2-

LINEOUT_R2+




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

NC

4.5V POWER SUPPLY FOR CODEC

NCNC

DAC2/3 FSOUTPUTDIFF= 2.67VRMSDAC2/3 FSOUTPUTSE= 1.34VRMS

APPLE P/N 353S2234

NCNC

DAC1 FSOUTPUT= 1.34VRMSSE FSINPUT= 1.22VRMSDIFF FSINPUT= 2.45VRMS

NOTES ON CODEC I/O

AUDIO CODECAPPLE P/N 353S3199

1

10UF

CRITICALC6221

2X5R6.3V20%

603

SMXW62011 2

2.2UFC6222CRITICAL

20%

CERM402-LF

6.3V

1

2 2 6.3V

2.2UF20%

1 C6223

CERM

CRITICAL

402-LF

CRITICAL

10UFC6220

6.3V

603X5R

20%

1

2

CASE-P3-HF

1UF

TANT20V10%

CRITICALC6224 1

2

CRITICALC621020%

2

1

4V

402

4.7UF

X5R-1

16 93

16 93

16 93

16 93

16 93

61

59

58

58

59 98

59 98

59 98

61

57

57

61

61

61

61

10UF

603

6.3V20%

CRITICALC6213

X5R

1

2

57

0402

FERR-220-OHM

CRITICALL6200

1 2

1%

2.21K

1/16W

402MF-LF

R62001 2

402-1

C62150.1UF

10%

X5R16V

1

2

C62110.1UF10%

X5R402-1

1

2 16V

0.1UF1

10%

402-1X5R16V 2

C6214

R62102.67K1%1/16WMF-LF

1

2402

R6213

402MF-LF

100K5%1/16W

1

2

R6211

1/16WMF-LF402

39

5%

1 2

C6218

16V

0.1UF10%

402-1X5R

1

2

C621710UF16V

2012-LLPTANT-POLY

20%

1

2

CRITICALC6219CRITICAL

1

10UF

TANT-POLY16V20%

22012-LLP

8 56

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41

45 47 48 49 50 51 53 56 60

61 71 72 79 82 83 84 87 88

89 98

60

56

7 16 20 22 25 41 70

56

60

56

60

10%

CRITICAL

1UF1C6216

210VX5R402-1

0.1UF

X7R-CERM

10%

402

16V

C62021 2

59 98

59 98

59 98

SMXW62001 2

402

0

MF-LF

5%1/16W

NOSTUFFR62011 2

L6201FERR-220-OHM

CRITICAL

0402

1 2

R62121

402

39

MF-LF

5%1/16W

2

CRITICAL

UDFNMAX8840-4.5V

U6200

4

2

1

5

6

3

C620010%

X5R402-1

10V

1UF1

210V10%

X5R

CRITICAL

402-1

1UFC62011

2

402-1

10%

X5R

1UF10V

CRITICALC62031

2

POLY-TANT16V20%

1

2

CASE-B2-SM

10UFC6225CRITICAL

CRITICAL

QFN

32

30

31

27

19

20

6

1

5

8

38

4

7

10

16

17

18

21

23

25

26

28

39

40

46

49

35

47

42

43

22

48

33

36

37

41

15

9 24

45

29

34

11

14

44

2

12

13

3

U6201CS4206B

AUDIO: CODEC/REGULATORSYNC_DATE=09/30/2010SYNC_MASTER=K91_AUDIO

HDA_SYNC

AUD_SDI_R

AUD_DMIC_SDA1

VBIAS_DAC


PP4V5_AUDIO_ANALOG

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.30MM

PP1V5_S0_AUDIO_DIG

TP_AUD_GPIO_2


CS4206_FLYN

TP_AUD_GPIO_1

PP5V_S0_AUDIO

PP3V3_S0


CS4206_FLYC

HDA_RST_L

AUD_LO2_R_P

AUD_MIC_INP_R


CS4206_FNMIN_LINE_WIDTH=0.20MM

AUD_SENSE_A


CS4206_FP

TP_AUD_LO1_L_N

CS4206_FLYPMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.20MM

AUD_GPIO_3 AUD_LO1_R_NAUD_LO1_R_P

AUD_LO2_R_N

AUD_SPDIF_OUT_CHIP

AUD_LI_REF

AUD_SPDIF_IN

TP_AUD_LO1_L_P

GND_AUDIO_HPAMP

MIN_LINE_WIDTH=0.30MM AUD_HP_PORT_RMIN_NECK_WIDTH=0.20MM

AUD_HP_PORT_REFMIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM

CS4206_VCOMMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.20MM

MIN_LINE_WIDTH=0.5MMGND_AUDIO_CODECVOLTAGE=0VMIN_NECK_WIDTH=0.2MM

AUD_LI_P_R

AUD_LI_P_L

AUD_MIC_INP_LAUD_MIC_INN_L

AUD_CODEC_MICBIAS

AUD_DMIC_CLK

MIN_LINE_WIDTH=0.30MM AUD_HP_PORT_LMIN_NECK_WIDTH=0.20MM

HDA_SDOUT

HDA_BIT_CLK

AUD_MIC_INN_R

CS4206_VREF_ADCMIN_LINE_WIDTH=0.20MMMIN_NECK_WIDTH=0.15MM

AUD_LO2_L_PAUD_LO2_L_N

GND_AUDIO_HPAMP

GND_AUDIO_CODEC

PP1V5_S0

PP4V5_AUDIO_ANALOG

PP3V3_S0

VOLTAGE=0VGND_AUDIO_CODEC

VOLTAGE=4.5V


PP4V5_AUDIO_ANALOG



4V5_NR

VOLTAGE=0V

MIN_LINE_WIDTH=0.50MMMIN_NECK_WIDTH=0.20MM GND_AUDIO_HPAMP

HDA_SDIN0

4V5_REG_EN


4V5_REG_INVOLTAGE=5V

AUD_SPDIF_OUT

PP5V_S0_AUDIO

GND_AUDIO_HPAMP

62 OF 132

56 OF 101

93

60

6

6

8 56

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6

6

56 58 60

56 57 61

60

56 58 60

56 57 61

56 57 61

56 58 60

56 58 60

IN

IN

IN

OUT

OUT

OUT

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

FC = 8 HZ

LINE INPUT VOLTAGE DIVIDER

VIN = 2VRMS, CODEC VIN = 1.14 VRMS

NET RIN = 18K OHMSCODEC RIN = 20K OHMS

60

60

60

56

56

56

56 61

1%

402MF-LF1/16W

7.87KR63001 2

7.87K

402

1/16W1%

MF-LF

R63061 2

1%1/16WMF-LF

402

21.5KR63051

2

CRITICAL

16VTANT

3.3UF

10%

SMA-HF1

C630012

TANT

CRITICAL

SMA-HF1

16V10%

3.3UFC6302

12

CRITICAL

10%16VTANT

SMA-HF1

3.3UFC6303

12

NOSTUFF

50VCERM402

820PF10%

C63011

2

10%820PF

402CERM50V

NOSTUFFC63041

2

21.5K

MF-LF1/16W

1%

402

R63011

2

101%

MF-LF1/16W

402

R63031

2

SYNC_MASTER=K91_AUDIO SYNC_DATE=07/12/2010

AUDIO: LINE INPUT FILTER

AUD_LI_R_DIVMIN_LINE_WIDTH=.1MMMIN_NECK_WIDTH=.1MM

AUD_LI_GNDMIN_LINE_WIDTH=.1MMMIN_NECK_WIDTH=.1MM

AUD_LI_L_DIVMIN_NECK_WIDTH=.1MMMIN_LINE_WIDTH=.1MM

AUD_LI_REFMIN_LINE_WIDTH=.1MMMIN_NECK_WIDTH=.1MM

AUD_LI_P_RMIN_LINE_WIDTH=.1MMMIN_NECK_WIDTH=.1MM

AUD_LI_P_LMIN_LINE_WIDTH=.1MMMIN_NECK_WIDTH=.1MM

GND_AUDIO_CODEC

MIN_LINE_WIDTH=.1MMMIN_NECK_WIDTH=.1MM

AUD_LI_R

AUD_LI_LMIN_NECK_WIDTH=.1MMMIN_LINE_WIDTH=.1MM

63 OF 132

57 OF 101

OUT

OUT

IN

IN

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

NC

ZOBEL NETWORK & 1ST ORDER DAC FILTER PLACEHOLDER

NC

60

1/16W

402MF-LF

3.32K1%

R65021

2

1%3.32K1/16W

402MF-LF

R65121

2

16V10%

X7R-CERM

0.1UF

CRITICAL

402

C6500 1

2

1/16W5%39

402MF-LF

R65001

2

402

10%16V

CRITICAL

X7R-CERM

0.1UFC6510 1

2

5%39

402

1/16WMF-LF

R65101

2

60

0

MF-LF603

5%1/10W

R65011 2

0

MF-LF603

5%1/10W

R65111 2

56

56 60

56

SYNC_DATE=07/12/2010SYNC_MASTER=K91_AUDIO

AUDIO: HEADPHONE FILTER

AUD_HP_RMIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.30MM

AUD_HP_LMIN_LINE_WIDTH=0.30MMMIN_NECK_WIDTH=0.20MM


AUD_HP_ZOBEL_R

AUD_HP_PORT_R

GND_AUDIO_HPAMP

AUD_HP_ZOBEL_LMIN_LINE_WIDTH=0.30MMMIN_NECK_WIDTH=0.20MM

AUD_HP_PORT_L

65 OF 132

58 OF 101

IN

IN

OUT

OUT

OUT

IN

OUT

IN

OUT

OUT

IN

IN

IN

VDD

EDGE

GND

GAINSD*

OUT+

OUT-IN-

IN+

VDD

EDGE

GND

GAINSD*

OUT+

OUT-IN-

IN+

VDD

EDGE

GND

GAINSD*

OUT+

OUT-IN-

IN+




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

3X MONO SPEAKER AMPLIFIERS (SSM2375)

NC

PLACE C6621 CLOSE TO VDD PIN

GAIN = +3 DB


NC

NC


1ST ORDER FC (L&R) = ~737 HZ

1ST ORDER FC (SUB) = ~90 HZ

APN: 353S2958

5%

MF-LF1/16W

100K

402

R66001

2

CRITICAL

FERR-1000-OHM

0402

L6601

1 2

56 98

56

FERR-1000-OHM

CRITICAL

0402

L6611

1 2

6 60 98

6 60 98

6 60 98

10%0.1UF

402-1

16VX5R

CRITICALC66111

2

20%

CRITICAL

6.3V

47UF

TANT-POLYCASE-A4

C6622 1

2402-1

0.1UF

X5R16V10%

CRITICALC66211

2

CRITICAL

FERR-1000-OHM

0402

L6621

1 256 98

6 60 98

TANT-POLY

CRITICAL

47UF6.3V

CASE-A4

20%

C6612 1

2

CASE-AL1

100UF20%

TANT6.3V

CRITICALC6632 1

2

CRITICAL

0402

FERR-1000-OHML6631

1 256 98

6 60 98

6 60 98

FERR-1000-OHM

CRITICAL

0402

L6610

1 256 98

0402

FERR-1000-OHM

CRITICALL6620

1 256 98

CRITICAL

0402

FERR-1000-OHML6630

1 256 98

CRITICAL

0.1UF

X5R16V

402-1

10%

C66311

2

CRITICAL

SSM2375WLCSP

U6610

B2

A3

C1

A1

B1

B3

C3

A2

C2

SSM2375WLCSP

CRITICAL

U6620

B2

A3

C1

A1

B1

B3

C3

A2

C2

CRITICAL

SSM2375WLCSP

U6630

B2

A3

C1

A1

B1

B3

C3

A2

C2

402

50V

CRITICAL

10%

0.0027UF

CERM

C66231 2

25V

CRITICAL

0.022UF

0402X7R

10%

C66331 2

0.022UF

10%

CRITICAL

25VX7R0402

C66341 2

10%50VCERM402

CRITICAL

0.0027UFC6624

1 2

10%50V

CRITICAL

0.0027UF

402CERM

C66141 2

0.0027UF

CERM402

CRITICAL

10%50V

C66131 2

MF-LF402

5%100K1/16W

R66011

2

SYNC_MASTER=K91_AUDIO SYNC_DATE=07/12/2010

AUDIO: SPEAKER AMP

AUD_LO2_L_P

AUD_SPKRAMP_SHUTDOWN_L

PP5V_S0_AUDIO_AMP_R

PP5V_S0_AUDIO_AMP_R

AUD_SPKRAMP_SUBIN_PNO_TEST=TRUE

AUD_LO2_R_P AUD_SPKRAMP_RIN_PNO_TEST=TRUE

PP5V_S0_AUDIO_AMP_L

NO_TEST=TRUEAUD_SPKRAMP_LIN_P

NO_TEST=TRUEAUD_SPKRAMP_RIN_N

NO_TEST=TRUEAUD_SPKRAMP_SUBIN_N

SSM2375S_N

SSM2375R_P


AUD_GPIO_3

AUD_LO2_L_N

AUD_LO2_R_N

AUD_LO1_R_P

AUD_LO1_R_N


SPKRCONN_S_OUT_PMIN_NECK_WIDTH=0.20 MM


SPKRCONN_S_OUT_NMIN_NECK_WIDTH=0.20 MMTP_SW_GAIN


MIN_NECK_WIDTH=0.20 MMSPKRCONN_L_OUT_P

SPKRCONN_L_OUT_N


MIN_NECK_WIDTH=0.20 MMTP_LT_GAIN

TP_RT_GAIN

AUD_SPKRAMP_LIN_NNO_TEST=TRUE


MIN_NECK_WIDTH=0.20 MMSPKRCONN_R_OUT_N

SPKRCONN_R_OUT_P



SSM2375S_P


SSM2375R_N

SSM2375L_NSSM2375L_P

66 OF 132

59 OF 101

59

8 59

8 59

98

98

8

98

98

98

98

98

59

98

98

59

98

98

98

IN

IN

IN

IN

OUT

IN

IN

PINS

SHELL

SHIELD

POF

A - VDD

B - GND

C - VOUT

OPERATING VOLTAGE 3.3

AUDIO

SWITCH

LEFT

RIGHT

GROUND

DETECT FOR PLUG TYPE

OUT

OUT

RIGHT

MIC

AUDIO

GND

LEFT

SWITCH

DETECT

B - VCC

POF

SHIELD

SHELL

PINS

C - GND

A - VIN

OPERATING VOLTAGE 3.3

BI

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

OUT

IN

BI

BI

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

GND PATCH

APN: 514-0671

APN: 514-0635

MIC CONNECTOR

AUDIO JACK 2 LINE IN JACK, SPDIF RX

APN: 518S0519

Sept 21st 2010

Dual DMIC removed.Added single analog mic like K18.

SPEAKER CONNECTOR

APN: 518S0521

Place this in place of DMIC connector J6780AUDIO JACK 1 LO/HP JACK, SPDIF TX

6 59 98

6 59 98

6 59 98

6 59 98

21

R67494.7

1/16W

402

5%

MF-LF

2

1 C675010%

X5R402-1

10V

1UF

2

1

DZ67014026.8V-100PF

CRITICAL

2

1

DZ6758ESDALC5-1BM2

CRITICAL

SOD882

1 2

CRITICAL

600-OHM-300MA

0402

L6758

2

1

DZ6700CRITICAL

4026.8V-100PF

2

1

DZ67066.8V-100PF402

CRITICAL

2

1

DZ6704CRITICAL

6.8V-100PF402

2

1

402

CRITICAL

6.8V-100PFDZ6754

56 58

21

L6702CRITICALFERR-1000-OHM

0402

21

L6703FERR-1000-OHM

0402

CRITICAL

2

1

DZ6703402

CRITICAL

6.8V-100PF 1

CRITICAL

0402

2

FERR-1000-OHML6705

21

CRITICAL

FERR-1000-OHM

0402

L6752

2

1 C670010%

402-1X5R16V

0.1UF

CRITICALJ6782

4

3

2

1

6

5

78171-0004M-RT-SM

CRITICALJ6781M-RT-SM

1

78171-0002

2

4

3

6 59 98

6 59 98

2

1 C6701

6.3VCERM402-LF

20%2.2UF

21

402

5%

MF-LF

0R6701

1/16W

21

L6754

0402

CRITICAL

FERR-1000-OHM

8

6

2

3

1

9

12

11

10

4

7

5

J6750AUDIO-RCVR-M97

F-RT-TH5

CRITICAL

2

1 C6782

402

NOSTUFFCRITICAL

33PF

CERM

5%50V2

C6781

402

NOSTUFF

33PF

CERM

5%50V

1CRITICAL

C6784

2

1

402

NOSTUFFCRITICAL

33PF

CERM

5%50V2

1C6783

402

NOSTUFFCRITICAL

33PF

CERM

5%50V

61

21

L6756CRITICAL

0402

FERR-1000-OHM

61

2

3

6

1

9

8

7

13

12

11

10

4

5

J6700SPDIF-TXRX-K24

F-RT-TH

CRITICAL56

2

1

DZ67566.8V-100PF402

CRITICAL

21

SMXW6702

21

XW6701SM

21

0402

FERR-220-OHML6707 CRITICAL

2

1

DZ6757CRITICAL

ESDALC5-1BM2SOD882

1

5

3

2

4M-RT-SM

78171-0003J6780CRITICAL

6 61

6 61

6 61

5

1

2

4

6

3

M-RT-SM78171-0004J6783CRITICALDIGI_MIC

21

0402

L6783CRITICAL

600-OHM-300MADIGI_MIC

21

CRITICALL6784

0402

600-OHM-300MADIGI_MIC

2

0402

1

DIGI_MIC600-OHM-300MA

L6785CRITICAL

56

56

2

1 C6756

402

100PF

CERM

5%50V

56

57

57

61

56

58

58

21

L6701CRITICAL

0603

FERR-220-OHM-2.5A

21

L6704

0402

CRITICAL

FERR-220-OHM

1

L6706FERR-220-OHM

0402

CRITICAL

2

61

61

21

R670010K

MF-LF1/16W5%

402

C6705

2

1

402

100PF5%50VCERM


AUDIO: JACKS

AUD_DMIC_CLK

AUD_SPDIF_OUT

AUD_CONNJ1_SLEEVE2



AUD_CONNJ1_SLEEVE



MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.40MMAUD_CONNJ2_TIP

AUD_DMIC_SDA1

PP3V3_S0


SPKRCONN_L_OUT_N

CON_DMIC_CLK

SPKRCONN_L_OUT_P

SPKRCONN_S_OUT_NSPKRCONN_R_OUT_P

CON_DMIC_PWR

CON_DMIC_SDA

AUD_J1_SLEEVEDET_R

GND_AUDIO_HPAMP

AUD_HP_PORT_REF

HS_MIC_N

SPKRCONN_S_OUT_P

AUD_SPDIF_IN

AUD_J1_TIPDET_R

AUD_LI_RMIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.40MMAUD_CONNJ2_RING

AUD_LI_L

BI_MIC_PBI_MIC_SHIELDBI_MIC_N


AUD_LI_GND

AUD_HP_L

AUD_CONNJ1_SLEEVEDET MIN_LINE_WIDTH=0.40MMMIN_NECK_WIDTH=0.20MM

MIN_LINE_WIDTH=0.40MMAUD_CONNJ1_TIPDET



AUD_CONNJ1_TIP


AUD_CONNJ1_RING

HS_MIC_P

SPKRCONN_R_OUT_N

AUD_J2_OPT_OUT

AUD_J2_TIPDET_R

PP3V3_S0

AUD_HP_R

MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.40MMAUD_CONNJ2_TIPDET

MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.40MMAUD_CONNJ2_SLEEVE

PP3V3_S0

67 OF 132

60 OF 101

8 60

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89

98

8 60

8 60

57

6 7 12 16 17 18 19 20 22 23

25 26 28 32

35 36 39 40 41

45 47 48 49

50 51 53 56 60

61 71 72 79

82 83 84 87

88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32

35 36 39 40 41

45 47 48 49 50 51 53 56

60 61 71 72 79

82 83 84 87 88 89 98

IN

OUT

IN

IN

D

SG

D

SG

D

SG

D

SG

D

G S

OUT

IN

OUT

OUT

IN

IN

OUT

OUT

OUT

D

SG

D

SG

IN

CS

HDET

AGND

DGND

ENABLE

AVDD

SDA

BYPASS

DETECT

MICBIAS

INT*

SCL

IN

BI

OUT

IN

IN

IN

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

0X0D (13)

0X0D (13,V22,B,LEFT)

MUTE CONTROL

SATA4GP/GPIO 16

CODEC INPUT SIGNAL PATHS

0X06 (6)

PORT B DETECT(SPDIF DELEGATE)

PORT B RIGHT(BUILT-IN MIC)

N/A

SPDIF OUT

SATELLITES

HP/LINE OUT

PORT A DETECT (HEADPHONES)

NC

APN:353S2640

CSP MIKEY

HP=80HZ

0X03 (3)

CODEC OUTPUT SIGNAL PATHS

N/A

0X02 (2)

PERIPHERAL DETECT

MIKEY ENABLE

HEADSET MIC

PIRQ F

PIRQ H GPIO 5

GPIO 3

0X03 (03)

0X04 (4)

N/A

GPIO_3

CONVERTER

MIKEYMIKEY

0X02 (2)

APN:376S0612

N/A

0X09 (A)

N/A

N/A

0X0C (B)

NC

NC

0X0A (10)

N/A

N/A

VREF

FUNCTION GPIO

0X05 (5)

SUB

0X08 (8)

APN:376S0613

VOLUME

PULLUPS ON MCP PAGE

PIN COMPLEX

0X0B (11)

0X10 (16)

0X0C (12,C)LINE IN

BUILT-IN MIC

SPDIF IN

FUNCTION

N/A

INT

GPIO_3

0X0C (12,C)

0X07 (7) 0X0F (15)

PIN COMPLEX

PORT C DETECT (LINE-IN)

DET ASSIGNMENT

PORT B LEFT(HEADSET MIC)HP=80HZ, LP=8.82KHZ

MIKEY INTERRUPT

0X09 (9,A)

DET ASSIGNMENT

0X04 (4)

CONVERTER

N/A

FUNCTION

SYSTEM INT AND GPIO LINES

0X06 (6)

EXTRACTION NOTIFICATION

Place this next to the connector

10VCERM

0.1UF402

20%

C68011

2

47K

402

5%1/16WMF-LF

R68021 2

220K

402

5%1/16WMF-LF

R68011

2

60 61

MF-LF402

1%1/16W

39.2KR68061

2

220K

MF-LF402

5%1/16W

R68031 2

MF-LF402

5%1/16W

220KR68041

2

402CERM16V10%0.01UFC68021

2

56 61

60 61

10K

402

1%1/16WMF-LF

R68131

2

0.1UFCERM 40220% 10V

C68111

2

270K

MF-LF402

5%1/16W

R68111

2

47K

MF-LF402

5%1/16W

R68121 260

1%

MF-LF1/16W

402

20.0KR68051

2

SOT563SSM6N15FEAPE

Q6800 3

5 4

SOT563SSM6N15FEAPE

Q6800 6

2 1

SOT563SSM6N15FEAPE

Q6801 3

5 4

SOT563SSM6N15FEAPE

Q6801 6

2 1


Q68023

1 2

56 61

1%

2.4K

MF1/16W

402-1

R68511 2

0.1UF

25V

402X5R

CRITICAL

10%

C68501 2

CERM40210%50V

0.001UF

CRITICAL

C68531

2MF-LF

5%100K1/16W

402

R68521

2

56

56

56

TANT

20%6.3V

402

2.2UF

CRITICALC68521

2

0402

FERR-1000-OHML6851

1 2

0402

FERR-1000-OHML6850

1 2

60

60

MF-LF402

5%1/16W

2.2KR68811

2

CRITICAL

27PFCERM 4025% 50V

C68851

20.0082UF25V

CRITICAL

10%402X7R

C68841

2

5%100K1/16WMF-LF402

R68881

2

402

10%25V

0.1UF

X5R

CRITICALC68831 2

SMXW68801 2

56

402

1%1/16W

1K

MF-LF

R68801

2

CERM 40210% 16V0.01UFC6881

1

2

0402

FERR-1000-OHM

CRITICALL6880

1 2

6.3V20%

10UF

CRITICAL

X5R603

C6880 1

2

TANT402

20%6.3V

2.2UF

CRITICALC68821

2

MF-LF402

5%

2.2K

1/16W

R68901 2

25V

0.1UF

10%

X5R402

CRITICALC68861 2

56

25V10%

402X5R

0.1UF

CRITICALC68511 2

MF-LF

1%1/16W

100

402

R68501 2

402-1

1%

MF

2.4K

1/16W

R68531 2

18

SOT563SSM6N15FEAPE

Q68036

2 1

20%40210V

CERM

0.1UFC6861

1

2

0402

CRITICAL

FERR-1000-OHML6862

1 2

5%

MF-LF

220K

1/16W

402

R68641 2

402

5%1/16W

100K

MF-LF

R68651 2

SSM6N15FEAPESOT563

Q6803 3

5 4

CERM20%

40210V

0.1UFC6860

1

2

MF-LF402

5%

15K

1/16W

R68601 2

6 7 12 16 17 18 19 20 22 23 25 26 28

32 35 36 39 40 41

45 47 48 49 50 51

53 56 60 61 71 72

79 82 83 84 87 88

89 98

WCSP

CRITICAL

CD3282A1U6880

D2

A2

D1

B2

B1

C2

A3

A1

D3

C1C3

B3

16 23 26 28 30 41 47 88 93

16 23 26 28 30 41 47 88 93

18

19

402

0

MF-LF

5%1/16W

R68821 2

1/16W5%

MF-LF

0

402

R68831 2

0

5%

MF-LF1/16W

402

R68841 2

1/16W5%

0

MF-LF402

R68851 2

5%100K

MF-LF1/16W

402

R68871

2

402MF-LF1/16W

5%10K

R68861

2

X5R402

25V10%0.1UF

CRITICALC68871

2

0

402MF-LF1/16W5%

R68671 2

MF-LF402

1/16W

0

5%

R68661 2

6 60

6 60

6 60

SMXW68511 2


AUDIO: JACK TRANSLATORS

BI_MIC_SHIELD

BI_MIC_HI_F

BI_MIC_NBI_MIC_LO_F

GND_AUDIO_CODEC

MIC_BIAS_FILT

HS_MIC_N

AUD_MIC_INP_R

AUD_MIC_INN_R

BI_MIC_P

PP3V3_S0

GND_AUDIO_CODEC

TIPDET_UNFILT

TIPDET_UNFILT

AUD_J1_SLEEVEDET_INV

PP3V3_S0_AUDIO_F

VOLTAGE=3.3V


AUD_MIC_INP_L

GND_AUDIO_CODEC

HS_SDA

HS_SCL

AUD_J1_SLEEVEDET_R

AUD_IP_PERIPHERAL_DETAUD_PERPH_DET_R

AUD_J1_TIPDET_INV

GND_AUDIO_CODEC

TIPDET_FILT

AUD_OUTJACK_INSERT_L

GND_AUDIO_CODEC

HS_RX_BP

PP3V3_S0_AUDIO_F

AUD_J1_TIPDET_R

AUD_J1_SLEEVEDET_R

HS_ENABLE


PP3V3_S0_HS_RX


VOLTAGE=3.3V

AUD_IPHS_SWITCH_EN

AUD_I2C_INT_L

AUD_SENSE_A

AUD_J2_DET_RC

PP3V3_S0_AUDIO_F

AUD_SENSE_A

GND_AUDIO_CODEC

GND_AUDIO_CODEC

PP3V3_S0

HS_INT_L

SMBUS_PCH_CLK

SMBUS_PCH_DATA

AUD_J1_DET_RC

AUD_PORTA_DET_L AUD_PORTB_DET_L

PP3V3_S0_AUDIO_F

AUD_INJACK_INSERT_L

AUD_J2_TIPDET_R

GND_AUDIO_CODEC

AUD_CODEC_MICBIAS

HS_MIC_P

GND_AUDIO_CODEC

AUD_MIC_INN_L

GND_AUDIO_CODEC

HS_MIC_BIASMIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.2MM

HS_SW_DET

HS_MIC_HI_RC

AUD_J1_TIPDET_R

68 OF 132

61 OF 101

56 57 61

56 57 61

61

61

61

56 57 61

60 61

56 57 61

56 57 61

61

61

56 57 61

56 57 61

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

61

56 57 61

56 57 61

56 57 61

60 61

BI

VCC

EXTINT

NCGND

Y

B

A IN

OUT

OUT

NCNC

BI

BI

BYP

GNDREF

TON

SW

FB

EN

REF3

THRM

VIN

VCC

PADNC

P3

P4

P5

P6

P7

P8

P1

P2

P9

SHLD_PIN

SHLD_PIN

SHLD_PIN

SHLD_PIN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

518-0375

PWR

GND

BIL CONNECTOR

TO SMC

NC

516S0523

GND

PWR

SIG

connected.

send transients onto ADAPTER_SENSE when AC is

The chassis ground will otherwise float and can

1-Wire OverVoltage Protection

MagSafe DC Power Jack

Vout = 3.425

353S2776 BATTERY CONNECTOR300mA max output

f = 470 kHz

Supply needs to guarantee 3.31V delivered to SMC VRef generator

3.425V "G3Hot" Supply

1206-2

CRITICAL

6AMP-24VF6905

1 2

50V20%

CERM603

0.01UFC69051

2

44

33UH-20%-0.44A-0.455OHM

D52LC-SM

1 2

L6995CRITICAL

C699922UF20%6.3VX5R-CERM-1603

1

2

CRITICAL

78048-0573M-RT-SM

J6900

1

2

3

4

5

CRITICAL

MAX9940SC70-5

U6900

5

2

4

3

1

0.1UF

402

10V PLACEMENT_NOTE=PLACE NEAR U6900 and U6901

CERM

20%

C69081

2CRITICAL

SOT665TC7SZ08AFEAPE

U6901

2

1

3

5

444 45 48 63

10%

402CERM

0.001UF

50V

C6954 1

2

402

5%47PF

CERM50V

C6953 1

2 CERM402

5%50V

47PFC6952 1

2

CRITICAL

CPB6312-0101FF-ST-SM

J6955

1

10

1112

1314

1516

2

34

56

78

9

10%0.1UF

402X5R25V

C6951 1

2

10%

402

0.001UF

CERM50V

C6955 1

2

402

MF-LF

100

1/16W5%

R69611244 45 52

6 44 45 6 44 47 62 63 96

6 44 47 62 63

96

402MF-LF1/16W5%2.0KR69291

2

CRITICAL

DFNPM6640U6990

9

4

2

5

1

10

6

11

3

8

7

402

5%1/16W

1M

MF-LF

R69951

2

16V

402-1

10%0.1UF

X5R

C6994 1

2

402

25V

1UF

X5R

10%

C6991 1

2

CRITICAL

BAT30CWFILMSOT-323

D6990

1

2

3

805MF

1/3W1%

47R69901 2

0805

4.7UF35V10%

X5R-CERM

C6990 1

2

0.1UF

402

20%

CERM10V

C6995 1

2

X5R

402

10%25V

0.1UF

C6950 1

2

10%

X5R25V

603-1

1UFC6960 1

2

RCLAMP2402B

CRITICAL

SC-75

D6950

3

1 2

MF-LF

402

1/16W5%

10K

R69501

2

9

8

7

6

5

4

3

2

1

13

12

11

10

M-RT-TH

CRITICAL

BAT-K90-K91-K92J6950


DC-In & Battery Connectors


VOLTAGE=18.5V

PPVIN_G3H_P3V42G3H

SMC_BC_ACOK

VOLTAGE=18.5V

MIN_LINE_WIDTH=1mmMIN_NECK_WIDTH=0.20mm

PP18V5_DCIN_FUSE

P3V42G3H_REF3


PPDCIN_S5_P3V42G3HPPDCIN_G3H

PPBUS_G3H


P3V42G3H_SW

DIDT=TRUE


SWITCH_NODE=TRUE

P3V42G3H_TON

P3V42G3H_FB

SYS_ONEWIRE

SMC_BC_ACOK_VCC

PPDCIN_G3H

PP3V42_G3H

SMC_LID SMC_LID_R

PP3V42_G3H

SMBUS_SMC_BSA_SDA

SMBUS_SMC_BSA_SCL SMC_BIL_BUTTON_L

ADAPTER_SENSE

PP3V42_G3H

PPVBAT_G3H_CONN

SMBUS_SMC_BSA_SDA

SYS_DETECT_L

SMBUS_SMC_BSA_SCL

69 OF 132

62 OF 101

6

6 7 48 62 63

6 7 8 35 39 48 49 63 88

6 7 48 62 63

6 7 25 42 44 45 46 47 52 62 63 72

6

6 7 25 42 44 45 46 47 52 62 63 72

6

6 7 25 42 44 45 46 47 52 62 63 72

6 63

6 44 47 62 63 96

6

6 44 47 62 63 96

OUT

OUT

IN

BI

OUT

AMON

BMON

ACOK

LGATE

PHASE

BOOT

SGATE

AGATE

CSIP

CSIN

DCIN

VNEG

CSOP

CSON

THRM_PAD

PGND

VDDPVDD

BGATE

UGATE

ICOMP

VCOMP

ACIN

SDA

VFRQ

CELL

VHST

SCL

SMB_RST_N

IN

S

G

D

G

D

S

IN

NCNC

GG

S D S D

NC NC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Reverse-Current ProtectionInrush Limiter

Input impedance of ~40K meets

(PPVBAT_G3H_CHGR_R)

20V/V

TO SYSTEM

TO/FROM BATTERY

36V/V

f = 400 kHz

(CHGR_CSO_P)

(GND)

(AGND)

(CHGR_BGATE)

30mA max load

ACIN pin threshold is 3.2V, +/- 50mV

(CHGR_SGATE)(CHGR_AGATE)

FROM ADAPTER

(PPVBAT_G3H_CHGR_R)

(CHGR_CSO_N)

(CHGR_DCIN)

(L7030 limit)Max Current = 8A

sparkitecture requirements

Divider sets ACIN threshold at 13.55V

353S2392

(OD)

1%9.31K1/16WMF-LF402

R70111

2

0.068UF

CERM10V

402

10%

C70421

2

470PF50VCERM402

10%

C70161

2

1%

MF-LF1/16W

3.01K

402

R70161

2

10%

402

50VX7R-CERM

220PFC7015 1

2

402

1/16WMF-LF

5%330KR70151

2

10V

1UF

X5R402

10%

C7002 1

2

10V

1UF

402-1X5R

10%

C70001

2

MF-LF1/16W5%

402

4.7R70011 2

30.1K1%

MF-LF1/16W

402

R70101

2

CERM

0.01uF16V

402

10%

C7057 1

216VX5R

402-1

0.1UF10%

C7056 1

2

XW7000


SM1 2

10V

1UF

X5R402

10%

C7001 1

2 25VX5R402

0.1UF10%

C70211

225VX5R402

0.1UF10%

C7022 1

2

10V

402

10%0.047UF

CERM

C70201

2

0.22UF

CERM10V

PLACE_NEAR=U7000.25:2mm402

10%

C70251

2

CRITICAL

RJK0305DPBLFPAK-HF

Q7035

5

4

1 2 3

1/16W

10

MF-LF

5%

402

R70221 2

10

MF-LF

5%1/16W

402

R70211 2

CASE-D2-SMPOLY-TANT25V20%

CRITICAL

22UFC70301

2CASE-D2-SM

20%

POLY-TANT25V

22UF

CRITICALC70311

2

5% 1/16W 4022.2

MF-LFR7051 1 2

MF-LF5% 1/16W0

402R7052 1 2

20%0.22UF

603

25VX5R

C7005 1

2

49

49

6 44 47 62 96

6 44 47 62 96

CERM

0.01UF16V

402

10%

C7011 1

2

1UF16VX5R402

10%

C70501

2

50VCERM

0.001UF

402

10%

C7026 1

2

44 45 48 62

MF-LF1W0.5%

CRITICAL

0.020

0612

R70202

1

4

3

50V

0.001UF

X7R402

10%

C70371

2

NO STUFF

50VCERM

470PF

402

10%

C70391

2

5%

MF-LF1/10W

180

603

NO STUFFR70391

2

0.001UF50VX7R402

10%

C70451

2

ISL6259

8

12

4

20

19

7

24

29

1326

10

11

23

22

21

5

2

18

17

28

276

25

15

16

9

1

14

3

U7000

CRITICAL

TQFN

1/16W

100K5%

MF-LF

NO STUFF

402

R70021

2

72

SO-8SI7137DP

CRITICAL

Q7055

5

4

12

3

CRITICAL

BAT30CWFILMSOT-323

D7005

1

2

3

1/16WMF-LF

1%1K

402

R70121

2

FDA1254F-SM

4.7UH-10.2A

CRITICAL

L7030

1

2

3

CRITICAL

RJK0332DPB-01LFPAK-SM

Q7030

5

4

1 2 3

POLY-TANT25V

CRITICAL

20%22UF

CASE-D2-SM

C70401

2

1/16W

20

402

5%

MF-LF

R70051 2

25V

1UF

603-1X5R

10%

C70351

225V

1UF

603-1X5R

10%

C70361

2

603-1

1UF25VX5R

10%

C7055 1

2

5%

0

1/16WMF-LF402

R70001 2

10%0.1UF

402X5R25V

C70851

2402MF-LF1/16W1%470KR70851

2

402MF-LF

332K1/16W

1%

R70861

2

MF-LF1/16W5%62K

402

R70811

2

5%100K

402MF-LF1/16W

R70801

2

DIRECTFET-MC

CRITICAL

IRF9395TRPBFQ7080

8 79 10

6 3

4 15 2

1206

8AMP-24V

CRITICALF7041

1 2

CRITICAL

8AMP-24V

1206

F70401 2

0.005

MF

CRITICAL

1%1W

0612

R7050

2 1

4 3

PBus Supply & Battery ChargerSYNC_MASTER=K91_CHANG SYNC_DATE=07/20/2010

PP3V42_G3H

SMBUS_SMC_BSA_SDA

CHGR_CSO_PCHGR_VNEG

CHGR_BMON

GATE_NODE=TRUE DIDT=TRUECHGR_LGATEMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mm

SWITCH_NODE=TRUEDIDT=TRUE

CHGR_PHASEMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mm

CHGR_DCIN

CHGR_BGATE

CHGR_DCIN_D_R

CHGR_AGATE

VOLTAGE=12.6VMIN_NECK_WIDTH=0.4 mmMIN_LINE_WIDTH=0.6 mmPPVBAT_G3H_CHGR_REG

CHGR_CSO_R_N

CHGR_CSO_R_P

PPVBAT_G3H_CHGR_R


PPBUS_G3H

VOLTAGE=12.6VMIN_NECK_WIDTH=0.4 mmMIN_LINE_WIDTH=0.6 mmPPVBAT_G3H_CONN

PPDCIN_G3H

CHGR_CELL

CHGR_CSI_R_P

VOLTAGE=18.5V


PPDCIN_G3H_CHGR

CHGR_CSI_PCHGR_CSI_N

VOLTAGE=0V

GND_CHGR_AGNDMIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mm

CHGR_AMON

CHGR_RST_L

CHGR_VFRQ

CHGR_SGATE

CHGR_ACIN

SMC_RESET_L

GND_CHGR_AGND

CHGR_BOOT DIDT=TRUE

PP5V1_CHGR_VDDPMIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=5.1V

SMC_BC_ACOK

CHGR_ICOMP

CHGR_PHASE_RCDIDT=TRUE

CHGR_VNEG_R

CHGR_CSI_R_N

SMBUS_SMC_BSA_SCL

CHGR_UGATE GATE_NODE=TRUE DIDT=TRUEMIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm

PP5V1_CHGR_VDD

VOLTAGE=5.1V


CHGR_CSO_N

CHGR_VCOMP

CHGR_VCOMP_R


PPDCIN_G3H_INRUSH

MIN_NECK_WIDTH=0.3 mmMIN_LINE_WIDTH=0.3 mmCHGR_AGATE_DIV

MIN_NECK_WIDTH=0.3 mmMIN_LINE_WIDTH=0.3 mmCHGR_SGATE_DIV

70 OF 132

63 OF 101

6 7 25 42 44 45 46 47 52 62 72

96

49 98

49 98

6 7 8 35 39 48 49 62 88

6 62

6 7 48 62

98

96

96

63

63

98

96

OUT

IN

FB

EN

PVCCVCC

SREF

VO

OCSET

PGOOD

FSEL

RTN

PHASE

LGATE

UGATE

BOOT

PGNDGND

SET0

SET1

VID0

VID1

IN

IN





36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

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Apple Inc.

PAGE


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8 7 5 4 2 1

OCP = 8.5AOCP = R7141 x 8.5uA / R7140

VID1 VID0 Voltage

0 0 0.9V

1 0 0.8V

(VCCSAS0_OCSET)

(VCCSAS0_VO)

f = 300 kHz6A Max Output

72

72


SMXW71001 2

402

1/16W

2.2

MF-LF

5%

R71011

2

CRITICAL

603

10VX5R

20%10UFC71011

2R7130

MF-LF

5%1/10W

0

603

1

2

10V

402

10%

CERM

0.22UFC71301

2

25V5%

402NP0-C0G

1000PFC7140

12

MF-LF1/16W

1%1K

402

R71411

2

MF-LF1/16W1%1K

402

R71421

2

25V5%1000PF

NP0-C0G402

PLACE_NEAR=Q7100.2:1.5mm

C71221

2

1W1%

CRITICAL

0.001

0612MF-1

R7140

1 2

3 4

POWERPAIR-6X3.7SIZ700DT

CRITICALQ7100

1

6

4 5

2 3 7

8

FDV0630H-SM

CRITICAL

1.0UH-7.7AL7100

1 2

CRITICAL

16V10%

0805X5R-CERM

10UFC7120 1

2402

X7R-CERM

0.1UF10%16V

C7121 1

2

1000PF25VNP0-C0G

5%

402

C71051

2

CRITICAL

OMIT_TABLE

UTQFNISL95870AU7100

1815

10

13

3

1

11

2

14

16

20

4

8

9

7

17

19

6

5

12

113K

402

1%1/16WMF-LF

R71471

2

402

140K1%1/16WMF-LF

R71481

2

402

47.5K1%1/16WMF-LF

R71491

2

12

12

CRITICAL

0805

10%10UF

16VX5R-CERM

C7119 1

2

CERM-X5R

0.022UF10%16V

402

C7103 1

2

SM

PLACE_NEAR=C1763.2:3mm

XW7101

1

2

05%

1/16WMF-LF

402

R71031

210%16V

2.2UF

603X5R

C71021

2

System Agent Supply


CRITICAL1353S3074 U7100IC,ISL95870A,PWM,2BIT-VID,RMOT-SNSE,20P

VCCSAS0_RTN


PP5V_S0_VCCSAS0_VCC

VOLTAGE=5V


VCCSAS0_FSEL

VCCSAS0_OCSET

VCCSAS0_SREF

PVCCSA_PGOOD

VCCSAS0_SET1

PVCCSA_EN

CPU_VCCSASENSE

VCCSAS0_SET0

PPVCCSA_S0_REGMIN_NECK_WIDTH=0.2 mmGATE_NODE=TRUEDIDT=TRUE

MIN_LINE_WIDTH=0.6 mmVCCSAS0_DRVH

VCCSAS0_VBSTMIN_LINE_WIDTH=0.3 mm

DIDT=TRUEMIN_NECK_WIDTH=0.2 mm

GATE_NODE=TRUEMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmVCCSAS0_DRVL

DIDT=TRUE

CPU_VCCSA_VID<1>

VCCSAS0_LLMIN_LINE_WIDTH=0.6 mm

DIDT=TRUESWITCH_NODE=TRUEMIN_NECK_WIDTH=0.2 mm

VCCSAS0_CS_N

VOLTAGE=1.05V


PPVCCSA_S0_REG_R

PP5V_S0

VCCSAS0_AGNDMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=0V

VCCSAS0_CS_P

VCCSAS0_VO



VCCSAS0_BOOT_RC

DIDT=TRUE

71 OF 132

64 OF 101

7 12 15

48 98

6 7 8 22 41 46 51 53 67 68 69 71 72 86 88 101

48 98

7 49 66 67 68 69

OUT

IN

EN

EN2EN1

DRVL2

SKIPSEL1

SKIPSEL2

DRVL1

V5SW

VBST2VBST1

VREG5

VREF2

VIN

THRM_PAD

SW2SW1

RF

PGOOD2PGOOD1

GND

DRVH2DRVH1

CSP2

CSN2CSN1

COMP2COMP1

VREG3

VFB1 VFB2

OCSEL

MODE

CSP1

IN

VSW

PGND

TGR

TG

BG

VIN

IN

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

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2 1


Apple Inc.

PAGE


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C

345678

D

B

8 7 5 4 2 1

100mA MAX OUTPUT

(P5VP3V3_VREF2)(P5VP3V3_VREF2)

10A MAX OUTPUTVout = 3.3V

Vout = 5V

f = 400 kHZf = 400 kHZ

Vout = 5.0V14.4A MAX OUTPUT

C7200 1

210%25V

603-1

1UF

X5R

CRITICALL7260

2

1

2.2UH-14AIHLP2525CZ-SM1

603-12X7R

C7264 1

50V10%

0.1UF

CRITICAL

10UFC72901

220%6.3V

603X5R

C72241

210%50VX7R

0.1UF

603-1

C7252 1

2

CRITICAL

CASE-D3L-SM1

6.3V20%

330UF

POLY-TANT

CRITICALC7250 1

220%10VX5R805

10UF

C72811

210%25VX5R603-1

1UF

402

C7203

X5R-CERM

20%2.2UF

2

1

10V

CRITICAL

10UFC72051

26.3V

603

20%

X5R

1R7206

2402MF-LF1/16W

1%249K

72

PLACE_NEAR=L7260.2:3mm

XW7261

1

2

SM

C72010.22UF

1

2402

CERM10V10%

402MF-LF

R72601

2

23.2K1%

1/16W

R72611

2

10K1%

1/16WMF-LF

402

R72201

2 402MF-LF1/16W1%40.2K

R72211

2

10K1%1/16WMF-LF402

C7280 1

2

CRITICAL

CASE-D2E-SMPOLY-TANT

16V20%

68UFC7240 1

2

CRITICAL


16V20%

68UF

C72881 2

10%10VCERM

0.22UF

402


XW7260

1

2

SM

1 20.1UF

402-1

10%16VX5R

C7218

1%

215.11K

402MF-LF1/16W

R7247

MF-LF1/16W

1%

402 2

1

9.09KR7256

XW7220

1

2


SMXW7221

1

2


SM

1

1%10K

R7236

4022MF-LF1/16W

20.0K

1

2402MF-LF1/16W

NO STUFFR72371%

1

210%100VCERM402

4700PFC7236C7237 1

25%50V

CERM402

47PF


XW7262

1

2

SM


1

2

SMXW7222

CRITICALC72921

2

CASE-D3L-SM1

6.3V20%330UF

POLY-TANT

R72397.5K

1%1/16W

1

2402MF-LF

2

1

402CERM50V

C7239330PF10%

1/16W

10K

NO STUFF

2402

1%

1

MF-LF

R7238

NO STUFFC72384700PF

210%

1

402CERM100V

17 29 42 44 72

2

1

402

05%

MF-LF1/16W

R72490.0033UF

402CERM50V10%

NO STUFF

2

1C7299

NO STUFF

603MF-LF1/10W5%1

2

1R7299

603MF-LF

5%10

2

1NO STUFFR7298

1/10W

2402X7R50V10%

0.001UF1C7272

10%

C72831

2 50VX7R402

0.001UFC72701

2402

50V10%

X7R

0.001UF

C72711

210%50VX7R402

0.001UF

4

11

18

10

17

7

1 24

30 27

12

21

28

14

5 20

3

6

19

32 25

33

2

31 26

9 16

23

13

22

29

CRITICAL

TPS51980

15

QFN

8

U7201

1

216V

CASE-D2E-SM

20%

CRITICALC7242

68UF

POLY-TANT

C7282 1

2

CRITICAL


16V20%

68UF

44 72

4

RJK0214DPAWPAK2

6

3

1

2

5

7

Q7260CRITICAL

Q7220

5

9

4

1

6

7

8

CRITICAL

SON5X6CSD58864Q5D

3

R72461 2

402MF-LF1/16W1%

511

R72161

2402MF-LF1/16W1%3.16K

R72630

21

402

5%

MF-LF1/16W

1

MF-LF1/16W

5%

2

4.7R7244

402

1

2 X5R25V10%1UF

603-1

C7241

72

44 72

1

MF-LF

5%0

402

1/16W

2

R7248NO STUFF

50VX7R402

NO STUFF

10%0.001UF

1

2

C7298

2.2UH-14A-7.0M-OHML7220

1

2

PIMB104E2R2MS-SM

CRITICAL

5V / 3.3V Power SupplySYNC_MASTER=K91_ERIC SYNC_DATE=10/08/2010

PP5V_S3

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmP5VS3_VSW

DIDT=TRUE


DIDT=TRUEGATE_NODE=TRUEP5VS3_DRVL


MIN_LINE_WIDTH=0.6 mmP5VS3_LL

SWITCH_NODE=TRUE DIDT=TRUEMIN_NECK_WIDTH=0.2 mm


P5VS3_VBSTDIDT=TRUE

PP5V_S5

P3V3S5_CSP2

P3V3S5_CSP2_R

P3V3S5_VFB2

GATE_NODE=TRUE MIN_LINE_WIDTH=0.6 mmDIDT=TRUEP3V3S5_DRVL

MIN_NECK_WIDTH=0.2 mmP5VS3_CSP1

DIDT=TRUEP3V3S5_VBST


SWITCH_NODE=TRUEMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmDIDT=TRUE

P3V3S5_LL

P3V3S5_TG

GATE_NODE=TRUE

MIN_NECK_WIDTH=0.2 mmDIDT=TRUE


GATE_NODE=TRUE MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mm

P3V3S5_DRVHDIDT=TRUE

P3V3S5_RF

P5VP3V3_VREG3

PM_SLP_S4_L

P5VS3_CSP1_R

P5VS3_COMP1

P5VS3_PGOODP3V3S5_EN

SMC_PM_G2_EN

PP5V_S3

P5VS3_VFB1_R P3V3S5_VFB2_R

MIN_LINE_WIDTH=0.6 mmP5VS3_SNUBR


P3V3S5_COMP2_R

P3V3S5_SNUBRMIN_LINE_WIDTH=0.6 mm


PP3V3_S5

P5VS3_COMP1_R

P5VS3_MODE

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmP5VS3_TG

P3V3S5_CSN2

S5_PWRGD

P5VP3V3_VREF2

P5VS3_DRVHDIDT=TRUEGATE_NODE=TRUEMIN_LINE_WIDTH=0.6 mm


P3V3S5_COMP2

P5VS3_CSN1

P5VS3_VFB1

72 OF 132

65 OF 101

6 7 29 31 41 42 43 45 65 66 71 81

100

7 49

6 7 53 71

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 17 19 20 22 23 24 25 29

39 45 55 70 71

72 82 85 89

98

VSW

PGND

TGR

TG

BG

VIN

IN

OUT

OUT

V5IN

REFIN

S5

VREF

S3

MODE

TRIP

SW

DRVL

PGOOD

VDDQSNS

VTT

VTTSNS

VTTREF

DRVH

VBST

VLDOIN

THRMVTTGNDPGND PADGND

OUT

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

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D

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Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

(Q7335 limit)f = 400 kHz

Vout = 1.5V(DDRREG_LL)

(DDRREG_DRVL)

10mA max load

18A max output

(DDRREG_DRVH)

(VDDQ/VTTREF Enable)

C7360, C7361 close to memory(DDRREG_VDDQSNS)

(VTT Enable)

CRITICAL

603

20%

X5R

10UF10V

C7300 1

2

68UF

CRITICAL

CASE-D2E-SM

16VPOLY-TANT

20%

C7330 1

2

SON5X6CSD58864Q5D

CRITICALQ7330

5

9

3

4

1

6

7

8

4.7

402

1/16W5%

MF-LF

R73301 2

68UF

CASE-D2E-SM

16V

CRITICAL

20%

POLY-TANT

C7331 1

2 25V10%

603-1X5R

1UFC73321

2

10%

0.1UF

X7R603-1

50V

C73251 2

0.001UF

X7R402

10%50V

C73331

2

CRITICAL

CASE-B4-SM

2VTANT

270UF20%

C73401

2

FDU1040D-SM

CRITICAL

1.0UH-21AL7330

1 2

CASE-B4-SM

CRITICAL

20%270UF

TANT2V

C7341 1

2

CRITICAL

10UF

X5R603

20%6.3V

C73451

2

50V10%

402X7R

0.001UFC73461

2

SMXW7301

1

2

72

CRITICAL

1WMF-1

0.0011%

0612

R7350

2 1

4 3

48 98

48 98

CRITICAL

TPS51916QFN

U7300 14

11

7

19

10

20

8

17

16

13

21

18

12 15

9

2

6

3

4

5

1

89


SMXW73601 2

XW7300SM


2

10VCERM

0.22UF

402

10%

C7350 1

2

10UF

CRITICAL

20%6.3VX5R603


C7360 1

2

8 29

X5R16V

0.1UF10%

402

C7315 1

2

6.3V

10UF


CRITICAL

20%

X5R603

C73611

2

MF-LF1/16W

402

1%200KR73171

2MF-LF1/16W

402

1%47.5KR73181

2

402

1/16WMF-LF

20.0K1%

R73151

2

1%

402

1/16WMF-LF

100KR73161

2

16V10%

402CERM

0.01UFC73161

2

CRITICAL

603

10UF10V20%

X5R

C7301 1

2

1UF

X5R

10%25V

603-1

C73341

2

1.5V DDR3 Supply


DDRREG_FB

VOLTAGE=0VMIN_NECK_WIDTH=0.17 mmMIN_LINE_WIDTH=0.6 mmGND_DDRREG_SGND

MEMVTT_EN

DDRREG_1V8_VREF

DDRREG_EN

PP1V5_S3

PP5V_S3



DDRREG_VDDQSNS

TP_DDRREG_PGOOD

DDRREG_VBSTMIN_NECK_WIDTH=0.17 mmMIN_LINE_WIDTH=0.6 mm

DDRREG_VTTSNS

DIDT=TRUE

DDRREG_DRVLGATE_NODE=TRUE


PP0V75_S0_DDRVTT

SWITCH_NODE=TRUE DIDT=TRUE

DDRREG_LL



GATE_NODE=TRUE DIDT=TRUE

DDRREG_DRVH

PPVTTDDR_S3

DDRREG_MODE MIN_NECK_WIDTH=0.17 mmMIN_LINE_WIDTH=0.6 mm

DDRREG_VSW



DDRREG_DRVH_R


PPDDR_S3_REG_R PP1V5_S3

ISNS_1V5_S3_P

ISNS_1V5_S3_N

DDRREG_TRIP

73 OF 132

66 OF 101

30

6 7 26 28 29 66 71

6 7 29 31 41 42 43 45 65 71 81 100

7 49 64 67 68 69

6 7 30

6 7 26 28 29 66 71

IN

IN

IN

EN

VDIO

VDDA

IMAXA

VDDB

DRVPWMA

VCC

POKB

TON

BSTA1

DHA1

LXA1

DLA1

CSPA1

CSPAAVE

FBA

CSNA

BSTA2

CSPA2

DHA2

LXA2

DLA2

BSTB

LXB

DHB

CSPB1

DLB

CSNB

FBB

POKA

CSPA3

VRHOT*

CLK

ALERT*

THERMA

THERMB

SR

IMAXB

THRM

GNDSA

GNDSB

PAD

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

OUT





36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

R7401

1/16WMF-LF

5%

10

402

1 2

X5R-CERM

2.2UF

402

C7401 1

20%10V

2


X5R-CERM402

2.2UF10V20%

C74021

2

12 90

12 90

12 90

NO STUFF

100PF5%50V

402CERM

C74141

2

CERM

C74041

10V

2200PF5%

04022

SIGNAL_MODEL=EMPTY

402MF-LF1/16W5%

300R74061 2

1/16WMF-LF

5%

1

402

1 2

R7410

50VCERM

5%

402

1

SIGNAL_MODEL=EMPTY

C7408150PF

2

402

10%50VCERM

470PF1 2

C7409NO STUFF

NO STUFF

402

1%1/16WMF-LF

SIGNAL_MODEL=EMPTY

40.2KR74091 2

26

MAX17511

19

4

38

22

QFN

18

16

40

CRITICAL 20

17

28

11

37

9

36

39

35

8

13

23

25

14

31

1

6

3 7

29

30

21

12

10

32

33

34

41

2

24

15

5

27

OMIT_TABLE

U7400

89

89

72

10 45 90

68

6 68

68

68

68

68

68

68

68

68

68

68

68

SMXW7400

12

R740290.9K

2

MF-LF1/16W1%

402

1

MF-LF1/16W1%5.76K

402

R74681

2MF-LF1/16W1%

402

5.76KR74661

2

10V


X5R-CERM

2.2UFC7403

402

20%

1

2

1%1/16WMF-LF402

215KR74621

2 402MF-LF1/16W1%215KR74601

2

MF-LF1/16W1%

402

137KR74631

2

1%1/16WMF-LF402

137KR74611

2

100PF50V

402

NO STUFF

5%

CERM

C74151

2402

NO STUFF

50VCERM

100PF5%

C74161

2

C74055%10V

SIGNAL_MODEL=EMPTY

CERM

2200PF

0402

1

2

68

SIGNAL_MODEL=EMPTY

10V2 CERM

2200PF5%

0402

1 C7406

50VCERM

100PF5%

NO STUFF

402

C74171

2

10

MF-LF1/16W5%

402

R74401 2

MF-LF1/16W

402

5%

10R74411 2

12 90

12 90

SIGNAL_MODEL=EMPTY

5%1000PF

NP0-C0G25V

402

C74401

2

SIGNAL_MODEL=EMPTY402

5%1000PF

NP0-C0G25V

C74411

21%

1/16WMF-LF

12.7K

402

R74121 2

25VNP0-C0G

1000PF5%

402

SIGNAL_MODEL=EMPTY

C74121

2

5%1/16WMF-LF

10

402

R74131 2 12 90

12 90

SIGNAL_MODEL=EMPTY

25VNP0-C0G

1000PF5%

402

C7422 1

2

10

MF-LF1/16W5%

402

R74231 2

402

1/16WMF-LF

1%

8.06KR74221 2

49 68

49 68

49 68

NO STUFF

100PF

402

50VCERM

5%

C74191

2CERM50V5%100PF

NO STUFF

402

C74181

2

68

402CERM

10%

SIGNAL_MODEL=EMPTY

50V

0.001UFC74071

2

SIGNAL_MODEL=EMPTY

OMIT

NONENONE

NOSTUFFNONE

402

C74421

2

SIGNAL_MODEL=EMPTY

402

NONENOSTUFF

NONENONE

OMITC74431

2

1/16W


MF-LF

54.91%

R74791

2PLACE_NEAR=U7400.16:2mm2MF-LF

1301/16W

402

1%

1R7480

MF-LF1/16W5%

300

402

R74071 2

300

5%1/16WMF-LF402

R74081 2

CRITICAL

PLACE_NEAR=Q7510.1:1mm

0402

100KOHMR7469

1

2


0402

CRITICAL

100KOHMR7467

1

2

OMIT

NOSTUFF

NONENONENONE

402

R74641

2

200K

MF-LF1/16W1%

402

R74651

2

CRITICALU74001 IC,MAX15092,3+1PH CPU REG,IMVP7,5X5QFN40353S3259

CPU IMVP7 & AXG VCore Regulator


CPUIMVP_ISUM_R

CPUIMVP_ISUM_NCPUIMVP_ISUM

CPUIMVP_ISUM1_P

CPUIMVP_ISUM2_P

CPUIMVP_LGATE1G



GND_CPUIMVP_SGND

CPUIMVP_SLEW

CPUIMVP_FBB_R

CPUIMVP_ISUM3_P

CPU_AXG_SENSE_R

CPUIMVP_IMAXB

CPUIMVP_ISNS1_P

CPUIMVP_ISNS2_P

CPUIMVP_ISNS3_P

CPU_VCCSENSE_P

CPU_AXG_SENSE_PCPUIMVP_FBB

CPUIMVP_PHASE1CPUIMVP_LGATE1

CPUIMVP_BOOT1G

CPUIMVP_PHASE1G

CPUIMVP_FBB

CPUIMVP_ISUM3_P

CPU_AXG_SENSE_N

CPU_VCCSENSE_N

CPUIMVP_PWM3

CPUIMVP_PGOOD

CPUIMVP_IMAXA

CPU_VCCSENSE_R

CPUIMVP_LGATE2

PP1V05_S0

CPUIMVP_UGATE1G

CPUIMVP_ISUMG_NCPUIMVP_ISUMG_P

CPUIMVP_FBA_RCPUIMVP_FBA

CPUIMVP_UGATE1CPUIMVP_BOOT1

CPUIMVP_BOOT2

CPUIMVP_TON


CPU_VIDALERT_L

CPUIMVP_NTCG

PP5V_S0_CPUIMVP_VCC

VOLTAGE=5VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MM

CPUIMVP_AXG_PGOOD

CPU_PROCHOT_L

CPUIMVP_NTC

CPU_VIDSOUT

CPUIMVP_VR_ON

CPU_VIDSCLK

PP5V_S0

CPUIMVP_FBA

CPUIMVP_PHASE2CPUIMVP_UGATE2

74 OF 132

67 OF 101

68

67 68

67

67

67 68

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 69 72 101

67

7 49 64 66 68 69

6 7 8 22 41 46 51 53 64 68 69 71 72 86 88 101

67

IN

IN

IN

IN IN

IN

IN

IN

D

G

S

S

G

D

D

G

S

IN

IN

IN

IN

IN

VSW

PGND

TGR

TG

BG

VIN

D

S

G

D

S

G

SKIP*

PWN

THRMDL

LX

VDD

BST

DH

PADGND

D

G

S




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

152S1019

Additonal Input Bulk Caps

THESE TWO CAPS ARE FOR EMC

152S1019

PHASE 3

152S1019

PHASE 1


376S0930

AXG PHASE

376S0772

376S0906


152S1019


376S0872

PHASE 2

376S0930

376S0872

376S0930

1

402CERM

NOSTUFF

C75120.001UF10%50V2

21

L7510

PIMA104E-SM

0.36UH-20%-40A-0.00075OHM

CRITICAL

1CRITICAL

16VX5R-CERM

10%10UFC7515

20805

2

1 C7513

16V20%

CRITICAL

68UF

POLY-TANTCASE-D2E-SM

2

1 C7516

X5R-CERM0805

16V10%10UF

CRITICAL

4022

1 C75171UF

X5R16V10%

2

1 C75180.001UF

X7R50V10%

4022

1 C751910%50VX7R402

0.001UF

6 67

67

67

67

2

1CRITICAL

16V

C7514


20%68UF

67

67

43

5

7621

IRF6798MTRPBF

CRITICAL

Q7525DIRECTFET-MX

2

1

50V10%

402

NOSTUFF

0.001UF

CERM

C7522

2

1R7522NOSTUFF

1/10W5%

603MF-LF

2.2

PIMA104E-SM

CRITICALL7520

21

0.36UH-20%-40A-0.00075OHM

2

1 C7523CRITICAL

68UF20%16VPOLY-TANTCASE-D2E-SM

2

1 C752420%16VPOLY-TANT

68UF

CASE-D2E-SM

CRITICAL

2

1 C752510UF

CRITICAL

X5R-CERM

10%

0805

16V 2

1 C752610UF

CRITICAL

16VX5R-CERM

10%

0805

0612

0.00075

CRITICAL

MF1W1%

R7520

1 2

3 4

2

1 C7527

402

1UF10%16VX5R 2

1 C75280.001UF

402

10%50VX7R 2

1 C7529

402

0.001UF

X7R50V10%

2

1 C753910%50VX7R

0.001UF

4022

1

0.001UF10%

X7R50V

402

C7538

402

1UFC7537

2

1

X5R

10%16V2

1 C753610UF

CRITICAL

16VX5R-CERM

10%

08052

1CRITICAL

10UF16VX5R-CERM

10%

0805

C7535

2 16V

CASE-D2E-SM

20%

POLY-TANT

CRITICAL

68UF1 C7534

10612

0.00075

43

R7530

1WMF

CRITICAL

2

1%

21

L75300.36UH-20%-40A-0.00075OHM

CRITICAL

PIMA104E-SM

2

1 C753368UF

CRITICAL

20%16VPOLY-TANTCASE-D2E-SM

3

4 6

5

2

1

CRITICAL

IRF6710S1

Q7530

2

1R7532

MF-LF

5%2.2

NOSTUFF

1/10W

603

NOSTUFF

2

1 C7532

50VCERM402

10%0.001UF

43

5

7621

Q7535CRITICAL

DIRECTFET-MXIRF6798MTRPBF

2

1 C75310.22UF10%

CERM10V

4022

1R7531

MF-LF

5%0

1/16W

402

2

1 C7541

X5R402

16V10%1UF

67

1 C75210.22UF10%10V

402CERM2

2

1R75215%0

1/16W

402MF-LF

2

1R75110

1/16W5%

MF-LF402

2

1 C75110.22UF10VCERM

10%

402

2

1R7547

1/16WMF-LF402

10K5%

2

1 C7559

50V

0.001UF

X7R402

10%2

1 C7558

402

10%0.001UF

X7R50V2

1 C75571UF10%16VX5R4020805

2

1 C755610UF

X5R-CERM

10%16V

CRITICAL

CASE-D2E-SM

2

1 C755468UF16V

CRITICAL

POLY-TANT

20%2

1 C755368UF

POLY-TANT16V20%

CRITICAL

CASE-D2E-SM

2.2

2

1R75525%

MF-LF1/10W

603

NOSTUFF

NOSTUFF

2

1 C755210%

402CERM50V

0.001UF

2

1C7551

CERM402

10V10%

0.22UF67

67

67

67

2

1 C756420%16V

CRITICAL

68UF


2

1 C756520%

CRITICAL

16VPOLY-TANT

68UF

CASE-D2E-SM

2

1 C756620%

CRITICAL

16VPOLY-TANT

68UF

CASE-D2E-SM

2

1 C756720%

CRITICAL

16VPOLY-TANT

68UF

CASE-D2E-SM

2

1 C756820%

CRITICAL

16VPOLY-TANT

68UF

CASE-D2E-SM

2

1 C756920%

CRITICAL

16VPOLY-TANT

68UF

CASE-D2E-SM

2

1 C756320%

CRITICAL

16VPOLY-TANT

68UF

CASE-D2E-SM

2

1 C756220%16VPOLY-TANT

68UF

CASE-D2E-SM

CRITICAL

C7561

2

1CRITICAL

20%16VPOLY-TANT

68UF

CASE-D2E-SM

2

1

MF-LF1/16W

402

1%46.4

R7513

2

1

1%

402

1/16WMF-LF

10.2R7514

8

7

6

1

4

3

9

5

Q7550CRITICAL

SON5X6CSD58864Q5D

IRF6723M2DPBF

1

2

78

DIRECTFET-MA

CRITICAL

Q7510

4

3

56

DIRECTFET-MA

CRITICAL

IRF6723M2DPBFQ7510

43

21

CRITICAL

1%1WMF

0612

0.00075R7510

0.00075

43

21

R7550CRITICAL

1%1WMF

0612

2

1 C7555

0805

10UF16VX5R-CERM

10%

CRITICAL

2

1 C7571

402

10%

CERM50V

330PF

NOSTUFF

2

1 C7572

402

50VCERM

10%330PF

NOSTUFF

2

1 C7573

402

10%

CERM

NOSTUFF

330PF50V

2

1 C7574

402

NOSTUFF

50VCERM

330PF10%

PIMA104E-SM

CRITICAL

0.36UH-20%-40A-0.00075OHM21

L7550

5

9

6

2

7

3

4

8

1

U7541MAX17491

TQFN

CRITICAL

21

R7555

5%1/16WMF-LF

4.7

402

1/16W1%

46.4R7523

2

1

MF-LF402

MF-LF

46.4

402 2

R75331

1/16W1%

R755346.41/16W

1%

2

1

MF-LF402

1

2

R7524

402

10.21%

MF-LF1/16W

MF-LF402

10.2

2

1R75341%1/16W

1R7554

2 402

10.21%

MF-LF1/16W

21

R7556

MF-LF1/16W

402

0

5%

43

5

7621

Q7515CRITICAL

DIRECTFET-MXIRF6798MTRPBF

2

1R7512NOSTUFF

5%

MF-LF

2.21/10W

603

CPU IMVP7 & AXG VCore Output



DIDT=TRUE

CPUIMVP_BOOT1_RC

CPUIMVP_BOOT1MIN_LINE_WIDTH=0.25 MM DIDT=TRUEMIN_NECK_WIDTH=0.2 MM

MIN_NECK_WIDTH=0.2 MM GATE_NODE=TRUEMIN_LINE_WIDTH=0.5 MM DIDT=TRUECPUIMVP_LGATE1

DIDT=TRUEMIN_NECK_WIDTH=0.25 MM

CPUIMVP_BOOT2_RCMIN_LINE_WIDTH=0.25 MM

DIDT=TRUE

CPUIMVP_AXG_SNUB

DIDT=TRUE

CPUIMVP_PH3_SNUB

PP5V_S0

CPUIMVP_PWM3CPUIMVP_SKIP

MIN_LINE_WIDTH=0.5 MM DIDT=TRUEGATE_NODE=TRUEMIN_NECK_WIDTH=0.2 MM

CPUIMVP_LGATE1G

CPUIMVP_ISUMG_P

CPUIMVP_PH1_SNUBDIDT=TRUE

MIN_LINE_WIDTH=1.5 MMMIN_NECK_WIDTH=0.2 MM SWITCH_NODE=TRUE

CPUIMVP_PHASE1DIDT=TRUE

PPVCORE_S0_CPU_PH1_L

CPUIMVP_ISUM2_P

CPUIMVP_ISUM_N

CPUIMVP_ISUMG_N

SWITCH_NODE=TRUEMIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.5 MMCPUIMVP_VSWG


CPUIMVP_ISUM1_P

CPUIMVP_ISNS2_N

PPVCORE_S0_CPU_PH3 PPVCORE_S0_CPU

CPUIMVP_ISNS3_N

CPUIMVP_ISUM3_P

CPUIMVP_ISUM_N



DIDT=TRUEMIN_NECK_WIDTH=0.25 MM

CPUIMVP_BOOT3_RC

MIN_NECK_WIDTH=0.2 MMDIDT=TRUEMIN_LINE_WIDTH=0.5 MM GATE_NODE=TRUE

CPUIMVP_UGATE3

PPVCORE_S0_CPU_PH2 PPVCORE_S0_CPU

CPUIMVP_PHASE1GMIN_NECK_WIDTH=0.2 MM SWITCH_NODE=TRUE

DIDT=TRUEMIN_LINE_WIDTH=1.5 MM

CPUIMVP_UGATE1G_RMIN_LINE_WIDTH=0.5 MM

DIDT=TRUEGATE_NODE=TRUE

MIN_NECK_WIDTH=0.2 MMMIN_NECK_WIDTH=0.2 MM

CPUIMVP_UGATE1GMIN_LINE_WIDTH=0.5 MM

GATE_NODE=TRUEDIDT=TRUE


SWITCH_NODE=TRUE

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=1.5 MMCPUIMVP_PHASE3


CPUIMVP_LGATE3MIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.2 MM GATE_NODE=TRUE

DIDT=TRUE

CPUIMVP_BOOT1GMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.25 MMDIDT=TRUE

CPUIMVP_BOOT1G_RMIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.2 MMDIDT=TRUE

MIN_NECK_WIDTH=0.2 MM GATE_NODE=TRUE

CPUIMVP_UGATE1MIN_LINE_WIDTH=0.5 MM DIDT=TRUE

MIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.2 MM DIDT=TRUECPUIMVP_BOOT2

CPUIMVP_ISUM_N


CPUIMVP_LGATE2DIDT=TRUEMIN_LINE_WIDTH=0.5 MM GATE_NODE=TRUE

CPUIMVP_UGATE2MIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.2 MM


CPUIMVP_PH2_SNUBDIDT=TRUE


CPUIMVP_PHASE2SWITCH_NODE=TRUEDIDT=TRUEMIN_LINE_WIDTH=1.5 MM

CPUIMVP_BOOT3DIDT=TRUEMIN_LINE_WIDTH=0.25 MM


PPVCORE_S0_CPU_PH1

CPUIMVP_ISNS1_P CPUIMVP_ISNS1_N

PPVCORE_S0_CPU

CPUIMVP_ISNS2_P

CPUIMVP_ISNS3_P


PPVCORE_S0_AXGPPVCORE_S0_AXG_L

CPUIMVP_ISNS1G_P CPUIMVP_ISNS1G_N

75 OF 132

68 OF 101

6 7 8 22 41 46 51 53 64 67 69 71 72 86 88 101

67

67

67 68

67

67

49

6 7 12 14 48 68 101

49

67

67 68

7 49 64 66 67 68 69

6 7 12 14 48 68 101

67 68

49 67 49

6 7

12 14 48 68 101

49 67

49 67

7 49 64 66 67 68 69

7 12 13 15 48

49 98 49 98

OUT

IN BOOT

UGATE

LGATE

PHASE

RTN

FSEL

PGOOD

OCSET

VO

SREF

VCC PVCC

GND PGND

EN

FB

G

D

S




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

OCP = 25.6AVout = 0.5V * (1 + Ra / Rb)

OCP = R7641 x 8.5uA / R7640(CPUVCCIOS0_VO)

CPU VCCIO (1.05V S0) Regulator

<Ra>

f = 300 kHz

Vout = 1.05V21A Max Output

<Rb>

(CPUVCCIOS0_OCSET)

MF-LF1/16W1%3.01KR7644

4022

1

72

72

1C760210%

603X5R 216V

2.2UF 5%0R7603

1/16W

4022

1

MF-LF


21

XW7600SM

CRITICAL

8

13

11

4

2

14

10

9

16

7

15

1

5

6

3 12

U7600

UTQFNISL95870

2

1R76012.2

603MF-LF

5%1/10W

10UF

2

1 C7601

603

10VX5R

20%

CRITICAL

Q7635WPAK

4

1 2 3

5

CRITICAL

RJK0208DPA

5

Q7630RJK0365DPA-01WPAK

4

32

CRITICAL

1

1

1UF

2 16V10%

X5R402

C7630

3.01K1%

R7642

1/16WMF-LF4022

1

1%

R7641

1/16WMF-LF

3.01K

4022

1

1000PFC7640

2 1

NP0-C0G402

5%25V

1

402

C7623

2NP0-C0G25V5%

1000PF

PLACE_NEAR=L7630.2:1.5mm

CRITICAL

20%68UF

16V 2

1C7620


16V

68UFC7621


20%2

1CRITICAL

PLACE_NEAR=Q7630.1:1.5mm

25V5%1000PFC76221

2402NP0-C0G

CRITICALNO STUFF

CASE-B4-SM

2

270UF

TANT

C764820%

1

2V

R7640

3

12

1W

0.001

CRITICAL

4

1%

MF-10612

NO STUFFCRITICAL

270UF

CASE-B4-SM

220%

TANT2V

1C7649

6032

1R7630

1/10W5%

MF-LF

2.2

5%

CERM50V

C7604

402

1

2

47PF

0.68UH-22A-2.7MOHML7630

CRITICAL

PIMB104T-SM

1 2

5%47PFC7605

CERM50V

402

1

2 2

1 C7603

402

0.047UF16V10%

X7R

2.74K1%

R7645

MF-LF2

1

402

1/16W

2.74K1%

R7605

MF-LF1/16W

402 2

1

1

2

3.01K1%

R7604

1/16WMF-LF

402

CPU VCCIO (1.05V) Power Supply


CPUVCCIOS0_FB

CPUVCCIOS0_SREF

CPUVCCIOS0_EN

CPUVCCIOS0_AGND


CPUVCCIOS0_RTN

CPUVCCIOS0_VO

CPUVCCIOS0_OCSET

PP5V_S0_CPUVCCIOS0_VCCMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=5V


MIN_LINE_WIDTH=0.3 mmCPUVCCIOS0_BOOT_RC


MIN_LINE_WIDTH=0.3 mmCPUVCCIOS0_VBST

CPUVCCIOS0_DRVLMIN_LINE_WIDTH=0.6 mm

DIDT=TRUEGATE_NODE=TRUEMIN_NECK_WIDTH=0.2 mm

PP5V_S0

CPUVCCIOS0_FSEL

CPUVCCIOS0_PGOOD

CPU_VCCIOSENSE_P

CPU_VCCIOSENSE_N

PP1V05_S0


VOLTAGE=1.05VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmPPCPUVCCIO_S0_REG_R

CPUVCCIOS0_CS_N

CPUVCCIOS0_CS_P


DIDT=TRUESWITCH_NODE=TRUEMIN_NECK_WIDTH=0.2 mm

CPUVCCIOS0_LL

MIN_LINE_WIDTH=0.6 mmCPUVCCIOS0_DRVHMIN_NECK_WIDTH=0.2 mmGATE_NODE=TRUEDIDT=TRUE

76 OF 132

69 OF 101

6 7 8 22 41 46 51 53 64 67 68 71 72 86 88 101

12 90

12 90

6 7 9 10 12 13 14

16 17 20

22 23

35 39 44

67 72

101

7 49 64 66 67 68

48 98

48 98

NC

IN

BIAS

NC

OUT

THRM

EN

PADGND

OUT

IN

NCNCNC

LX

VDD

VIN

THRM_PAD

PGND

SGND

EN

PG

SYNCH

LX

VFB

NC

IN EN

MODE

VID1

LX

VOUT

VIN

VID0

SYNC/PWM

THRMPGNDGND PAD

IN

VIN

LX

VFB

RSI

EN

POR

SKIP

GND THRM_PAD

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

CAESAR IV 1.2V INT.VR CMPTS

Cougar Point-M requires JTAG pull-ups to be powered at 1.05V in Sus.Pull-ups (3) must be 51 ohms to support XDP (not required in production).

dividers (200/100) to 3.3V Sus, which burns 100mW in all S-states.

1.05V SUS LDO

1.2V S0 (GMUX) Regulator

353S2535

Vout = 0.8V * (1 + Ra / Rb)

<Ra>

Vout = 1.05VMax Current = 0.35A

MAX CURRENT = 0.7AVout = 1.2V

152S0771

353S2719

Freq = 1 MHzMax Current = 4AVout = 1.794V

152S1302

<Rb>

1.5V S0 Regulator

Vout = 0.8V * (1 + Ra / Rb)

<Rb>

Freq = 1.6MHZ

Vout = 1.508V

Max Current = 0.8A

<Ra>

FREQ = 1MHZ

1.8V S0 Regulator

70mA is required to support pull-ups. Alternative is strong voltage

CRITICAL

1.0UH-7APIMB053T-SM

L7720

1 2

X5R402

XDP_PCH

6.3V10%2.2UFC77411

2

SON

CRITICALXDP_PCH

TPS720105U7740

4

3

5

6

2

1

71UF

402CERM6.3V10%

XDP_PCHC7740 1

2

MF-LF1/16W

1%

402

90.9KR77211

2

CRITICAL

20%6.3VCERM805

22UFC7722 1

2

72

72

22UF

CRITICAL

6.3VCERM805

20%

C7720 1

2

402

1/16W1%

113K

MF-LF

R77201

2

CERM6.3V20%

CRITICALC77211

22UF

8052

5%

CERM50V

402

1

2

47PFC7723

25VNP0-C0G

1000PF5%

402

C7724 1

2

ISL8014AQFN

CRITICAL

U77205 14

15

6

16

13

7

11

129

10

4

17

3

8

1 2

2 6.3V20%X5R402

4.7UFC77371

CRITICAL

10UFC77351

24024VX5R20%

C773810%

4022

10.1UFX5R16V

1C77360.1UF

210%X5R40216V

4.7UH-0.8A

CRITICAL

PCAA031B-SM

L77301 2

1/16WMF-LF

05%

402

R77611

2

MF-LF1/16W

05%

402

NO STUFFR77601

2

72

CRITICAL

4024VX5R

10UF20%

C77601

2

CRITICAL

MLP10SC194AU7760

4

8

10

2

9

3

11

6

7

1

5

402

0.1UF10%X5R16V

C77641

2

SM

PLACE_NEAR=L7760.2:1MM

XW77611 2

CRITICAL

2.2UH-1.2APCAA031B-SM

P1V2S0_SW

L7760

1 2

CRITICAL

805

20%22UF

6.3VCERM

C77611

2

72

DFN

ISL8009BU7710

2

7

8

3

54

9

6

1

CRITICAL

CERM

CRITICAL

20%22UF

805

6.3V

C77501

2

IHLP1616BZ-SM

2.2UH-3.25A

CRITICAL

L7770

1 2

402MF-LF1/16W

113K1%

R77811

2

5%50V

402CERM

47PFC7776 1

2

100K

MF-LF

1%

402

1/16W

R77801

2CRITICAL

805

22UF

CERM

20%6.3V

C77711

2

72


Misc Power SuppliesSYNC_MASTER=K91_ERIC

PP3V3_S5

PP3V3_S5

P1V5S0_PGOOD

P1V8S0_EN

1V5_S0_FB

1V5_S0_SW


DIDT=TRUE


SWITCH_NODE=TRUE

P1V5S0_EN

P1V8S0_PGOOD


P1V8S0_SW

P1V8S0_FB

P1V2S0_EN

P1V2S0_SYNC_PWM



PP1V2_S0

P1V2S0_FB

MIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.2MMVOLTAGE=1.2V

ENET_SR_LX


PP1V05_SUS

PP1V5_S0

PP3V3_S5

PP1V8_S0

PP3V3_SUS

PP1V2_ENET

PP1V2_ENET

PP3V3_ENET

77 OF 132

70 OF 101

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71

72 82 85 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71

72 82 85 89 98

6 7 87

36

7 23

7 16 20 22 25 41 56

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

6 7 14 17 20 22 25 71 87

7 16 17 18 19 20 22 45 71 72

6 7 36 70

6 7 36 70

6 7 25 36 72

IN

IN

IN

D

SG

S

D

G

D

G S

DS

G

DS

G

THRMGND

G

PG

SHDN*

D

VCC

S

ON

PAD

OUT

IN

D

SG

DS

G

IN

DS

GD

SG

IN

DS

G

IN

D

G S

IN

D

SG

S

G

D

IN

D

G S

S

G

D

EN

C_SR

DRAIN

VCC

GNDTHRM

C_DELAY NC

R_BLEED

SOURCE

EN_POL_CTRL

PAD




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

376S0945

0.7? A (EDP)

26 mOhm @1.8V

P-TYPE 8V/5V

MOSFET

CHANNEL

LOADING

RDS(ON)

N-TYPE

NCP4543

18 mOhm @4.5V

2.4A (EDP)

1.8V GPU FET

1.5V S3/S0 FET

5V_SUS FET inuot filter

5V_SUS FET

5V SUS FET

3.3V S0 FET

P-TYPE 20V/12V

5.5 mOhm @4.5V

5.6 A (EDP)

SI7615DN

SiA413

2 mA (EDP)

29 mOhm @4.5V

P-TYPE 12V

CHANNEL

RDS(ON)

LOADING

CHANNEL

3 A (EDP)

MOSFET

SiA42726 mOhm @1.8V

26 mOhm @1.8V

LOADING

3.3V S3 FET

3.3V S3 FET

3.3V_SUS FET

P-TYPE 8V/5V

100? mA (EDP)

3.3V S0 GPU FET

0.11A (EDP)LOADING

RDS(ON)

RDS(ON)

LOADING

5.0V S0 FET

1.5V S3/S0 FET

RDS(ON)

RDS(ON)

SiA427

CHANNEL

MOSFET

LOADING

MOSFET

P-TYPE 8V/5V

SiA427

CHANNEL

MOSFET

5 A (EDP)

6 mOhm @4.5V

N-TYPE

SI7108DN

LOADING

RDS(ON)

CHANNEL

MOSFET

P-TYPE 8V/5V

LOADING

CHANNEL

SiA427

MOSFET

3.3V SUS FET

3.3V S0 GPU FET

RDS(ON)

CHANNEL

MOSFET

8 A (EDP)

5.5 MOHM @4.5V

P-TYPE 20V/12V

SI7615DN

LOADING

RDS(ON)

CHANNEL

MOSFET

APN 376S0651

5.0V S0 FET

26 mOhm @1.8V3.3V S0 FET

1.8V GPU FET

input side

U7880 default Turn on delay EN--> on is 200~650us.

3.3V S4 FET

3.3V S4 FET

load side

353S3256

402

10%10V

1UF

X5R

C7871 1

2

CERM16V10%

402

0.01UFC7870

1 21K

MF-LF

5%

402

1/16W

R78701 2

5%51K

MF-LF402

1/16W

R7872 1

2

87 89

29

402CERM16V10%

0.01UFC7810

1 2

0.033UF

16V

402

10%

X5R

C7811 1

2

47K

402

5%1/16WMF-LF

R78101 2

MF-LF

100K

402

5%1/16W

R78121

2

72

SSM6N15FEAPESOT563

Q7812 6

2 1

SI7108DN

CRITICAL

PWRPK-1212-8-HF

Q7801

5

4

1 2 3

SOD-VESM-HFSSM3K15FVQ7872

3

1 2

SC70-6L

CRITICAL

SIA427DJQ7810

1

3

47

SIA427DJ

CRITICAL

SC70-6L

Q7870

1

3

47

SLG5AP020TDFN

CRITICAL

U78015

7

4

2

8

6

3

9

1

0.1UF

CERM10V20%

402

C7801 1

2

21

R7801

1/16W

0

5%

402MF-LF

89

72

SSM6N15FEAPESOT563

Q7802 6

21

NOSTUFF

5%1/16WMF-LF

402

220K

1

2

R7802

NOSTUFF

402MF-LF

5%1/16W

5.1KR7800

1 2

NOSTUFF

X5R16V10%

402

0.033UFC7809 1

2

NOSTUFF

SIA427DJSC70-6L

47

1

3

CRITICAL

Q7800

NOSTUFF

0.01UF

402CERM

10%16V

C7800

1 2

89

0.1UF

402

10V20%

CERM

1

2

C7880

PLACE_NEAR=U7880.2:2.54mm

16V10%

402X5R

0.033UFC7821 1

2

SIA427DJSC70-6L

CRITICAL

Q7820

1

3

47

0.01UF

10%16V

402CERM

C7820

1 2

1/16W5%

MF-LF402

100KR78221

2

Q7802

SOT563

SSM6N15FEAPE

3

5 4

1/16WMF-LF402

5%

12KR78201 2

71 72

0.033UF10%16VX5R402

C7841 1

2

SIA413DJSC70-6L

CRITICAL

Q7840

1

3

47

0.01UF

10%16VCERM402

C7840

1 2

1/16WMF-LF

5%

402

220KR78421

2

5%

402MF-LF1/16W

3.3KR78401 2

71 72


Q78423

1 2

48 71 72

SSM6N15FEAPESOT563

Q7812 3

54

47K5%

1/16WMF-LF

402

R78321

2

33K

5%1/16WMF-LF402

R7830

1 2

0.033UF

X5R

10%

16V

402

C7831 1

2

0.01UF

10%16VCERM402

C7830

1 2

CRITICAL

SI7615DNPWRPK-1212-8

Q7830

5

4

12

3

48 71 72

SSM3K15FV

SOD-VESM-HF

Q78653

12

402MF-LF1/16W

5%

220KR7862 1

2

402MF-LF1/16W5%

10KR7860

1 2

402X5R16V10%

0.033UFC7861 1

2

402

CERM16V10%

0.01UFC7860

1 2

SI7615DNPWRPK-1212-8

CRITICAL

Q7860

5

4

12

3

402

10%

10V

1UF

X5R

NO STUFFC7802 1

2

2

19

8

7

6

13

18

14

3

16

15 12

11

10

9

5

4

17

1

U7880

CRITICAL

QFN

NCP4543IMN5RG-A

0.1UF

10VCERM

20%

402

NO STUFF

C7881 1

2

5%25V

1000PF

402NP0-C0G

NO STUFF

C7882 1

2

20%2.2UF

X5R-CERM10V

402

NO STUFF

C7843 1

2PLACE_NEAR=Q7840.4:5mm

402

5%1/16WMF-LF

0R78431 2

1 2

402

5%1/16W

R7803

MF-LF

0

Power FETsSYNC_MASTER=K91_MARY SYNC_DATE=10/14/2010

PP1V8_GPUIFPX

PP3V3_S4

PP3V3_S5

GPUFET_C_SR

P3V3S3_S4

PP1V8_GPUIFPX

GPUFET_C_DELAY

PP3V3_S5

P3V3S0_EN_L

P3V3GPU_EN_L

PP1V5_S3RS0_CPUDDR

P3V3GPU_EN

P5VSUS_SS

PM_SUS_EN

PP5V_S3

P5V0S0_EN_L

PP5V_S5_P5VSUSFET_R

PP1V5_S3

P3V3_S4_EN

P1V5S3RS0FET_GATE

PP5V_S5

PP5V_S0

P5V0S0_SS

PM_SLP_S3_R_L

PM_SUS_EN

TP_P1V5S3RS0_RAMP_DONE

PP3V3_S0GPU

P1V5S3RS0FET_GATE_R

P3V3SUS_SSP3V3SUS_EN_L

P3V3S0_SS

PP3V3_S5

PP3V3_SUS

PP3V3_S5

P3V3S3_EN

P3V3GPU_SS

P1V5CPU_EN

P3V3S3_EN_L

PP3V3_S3

PM_SLP_S3_R_L

PP3V3_S0

P1V8GPU_EN

PP3V3_S0

PP3V3_S0

PP3V3_S5

PP1V8_S0

PP5V_SUS

P5VSUS_EN_L

PP5V_S5 PP5V_S5_P5VSUSFET_R

P3V3S3_SS

P3V3S4_EN_L

78 OF 132

71 OF 101

6 7 71 100

7 45 52 53

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

6 7 71 100

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

7 10 13 15 29 72

6 7 29 31 41 42 43 45 65 66 81 100

71

6 7 26 28 29 66

6 7 53 65 71

6 7 8 22 41 46 51 53 64 67 68 69 72 86 88 101

6 7 74 78 79 81 83 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

7 16 17 18 19 20 22 45 70 72

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 72 87

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

6 7 14 17 20 22 25 70 87

7 22

6 7 53 65 71 71

G

D

SIN

IN

IN

G

D

S IN

OUT

G

DS

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

D

G S

IN

OUT

OUT

OUT

IN

IN

IN

IN

NC

NC

Q3

Q2

Q4

Q1

OUTIN

SENSE

CT

VDD

GND

RESET*

MR*

IN

G

D

S

G

D

S

OUT

OUT

OUT

IN OUT

OUT

NC

VDD

MR*

RST*V4MON

V3MON

V2MON

GND THRM_PAD

D

G S

OUT

VCC

A

Y

GND

B

C

OUT

OUTIN

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Battery Off (G3Hot)

3.3V/5.0V Sus ENABLE

3.3V/5.0V S4 ENABLE

Deep Sleep (S5)

Deep Sleep (S4)

Sleep (S3)

SMC_BATLOW_L:100K pull up on SMC page

SMC-->PM_DSW_PWRGD

S5_PWRGD (old name RSMRST_PWRGD)-->SMC

CPUVCORE ENABLE

S0 Rail PGOOD (BJT Version)

PM_SLP_S3_L:100K pull down in PCH page

PM_SLP_S5_L:100K pull down on PCH page

PM_SLP_SUS_L:100K pull down on PCH page

S5 Rail Enables & PGOOD Run (S0)

Q4: 0.660V

(ISL Version in development)

S0 Rail PGOOD Circuitry

Min delay time

3.3V SUS Detect

3.3V ENET FETENET Enable Generation

3.3V,5V S3 ENABLE

PP1V5_S3RS0

SMC_PM_G2_ENABLE

1

1

1 0

0

353S2809

No stuff C7931, 12ms

Thresholds:

V3MON: 0.572V-0.630VV2MON: 2.815V-3.099V

(IPU)

P1V5S0_PGOOD from U7710

PM_SLP_S3_L

1

PM_SLP_S4_LState

0

1

0

01

01

1

0

1

0

0

0

VFRQ High: Variable Frequency

PM_SLP_S5_L

VFRQ Low: Fix Frequency

0

(PM_SLP_S3_R_L)

(AC_EN_L)

(PM_SLP_S3_L)

threhold is 3.07V

PM_RSMRST_L goes to U1800.C21

on open-drain AP_PWR_EN signal.

CHGR VFRQ Generation

U7930 Sense input

353S2310

NOTE: S3 term is guaranteed by S3 pull-up"WLAN" = ("S3" && "AP_PWR_EN" && ("AC" || "S0"))

(PM_SLP_S4_L)

S0 ENABLE

PM_SLP_S4_L:100K pull down in PCH page

3.3V w/Divider: 2.345VQ3: 0.640VQ2: 0.XXXV

Worst-Case Thresholds:

VDD: 2.734V-3.010V

V4MON: 0.572V-0.630V

1

2

6

Q7920SOT-363

2N7002DW-X-G

17 44 45

19

6 17 29 44 72

2

1R7921

402

5%10K

MF-LF1/16W

21

R7922

5%

MF-LF

100K

1/16W

402

1

2

6

Q79252N7002DW-X-GSOT-363

18 31

31

2

1 C79210.033UF

X5R402

16V10%

2

1

3

Q7922CRITICAL

NTR4101PSOT-23-HF

2 1

C79220.01UF

10%16VCERM402

17 29 42 44

65 72

66 72

71 72

1

R7912

1/16W

402

5%


MF-LF

0

2

2

1 C79120.47UF

CERM-X5R6.3V

402

10%

NO STUFF

67 21

R7974

MF-LF

5%

0

402

1/16WPLACE_NEAR=U7400.7:5mm

48 71 72

48 71 72

48 71 72

69 72

70 72

70 72

64 72

2

1

R7911

MF-LF

5%

402PLACE_NEAR=U7300.16:6mm

1/16W

5.1K

2

1 C79100.47UF

402CERM-X5R6.3V10%

17 29 42 44 65 72

2

1 C7986

402CERM-X5R

10%0.47UF

6.3V


2

1

R7986

5%1/16WMF-LF

5.1K

402


1

2 R7985

5%20K


1/16WMF-LF402

2

1

R798120K

402MF-LF

5%1/16W


2

1 C7985

6.3V10%


402CERM-X5R

1UF

2

1 C7981PLACE_NEAR=U7600.3:6mm

CERM-X5R402

10%6.3V

0.47UF

2

1 C7987

CERM-X5R

0.47UF

6.3V10%

402


2

1

R798733K


MF-LF402

1/16W5%

2 R7931

5%1/16W

402

100K

MF-LF1

63

21

3

Q7931SSM3K15FV

SOD-VESM-HF

6 17 29 44 72

44 45 72 85

210

5%

402MF-LF1/16W

R7975PLACE_NEAR=U7400.7:5mm

44 5%

NO STUFF

1/16W

21

MF-LF402


0R7976

2

1R7929

MF-LF402

5%

NO STUFF

01/16W

2

1R79675%

1/16WMF-LF

402

10K

23 44 72 87 89

2

1R7957100

402

5%

MF-LF1/16W

21

R7966

1/16W

402

5%

MF-LF

100

21

R7964

MF-LF1/16W

402

5%

100

21

R7965

1/16W5%

MF-LF402

100

70

65

21

R7963

MF-LF402

1/16W5%

100

21

R7962

MF-LF402

1/16W5%

330

S0PGOOD_ISL

69 72

64

2

1R7956150K1/16W

1%

402MF-LF

21

R7953

5%

402

1/16W

1K

MF-LF

2

1R79511%1/16W

402MF-LF

15.0K

2

1R7952

1/16W

402MF-LF

1%7.15K

3

2

8

46

1

7

5

Q7950

CRITICAL

DFN2015H4-8ASMCC0179

21

R7954

MF-LF1/16W5%

1K

402

21

R79551K

MF-LF402

1/16W5%

71 72 1 2

5%

MF-LF1/16W

402PLACE_NEAR=U1800.G18:5mm

R79160

NOSTUFF

17 44

6

5 1

3

2

4

U7930

CRITICAL

SOT23-6TPS3808G33DBVRG4

2

1 C7931

50VCERM402

NO STUFF

20%0.001UF

2

1R7933

1/16WMF-LF

5%100K

402

PLACE_NEAR=U7930.6:2.3mm

402

10V20%

CERM

0.1uFC7930 1

2

21

R7968

1/16W

402MF-LF

100

5%

70

4

5

3

Q79202N7002DW-X-G

SOT-363

4

5

3

Q7925SOT-363

2N7002DW-X-G

21

R7978

402

5%1/16WMF-LF

100

21

R798810K5%1/16WMF-LF402

70 72

2

1 C7988PLACE_NEAR=U7710.2:6mm

402

0.47UF10%

CERM-X5R6.3V

6 17

44 65 72

44 65 72

402

C7942

2

1

50VCERM

NO STUFF

0.0033UF10%

1002

R7940

402

5%

MF-LF


1

1/16W

65 72

44 65 72

2

1R7941PLACE_NEAR=U7201.20:7mm

1/16WMF-LF

402

5%100K

0.1uF

S0PGOOD_ISL

2

1C7960

402CERM10V20%

72

653

9

8

1

4

U7960

S0PGOOD_ISL

CRITICAL

TDFNISL88042IRTEZ

2

1R79726.04K

1/16W1%

MF-LF

S0PGOOD_ISL

402

2

1R7973

402MF-LF

1/16W1%

15.0K

S0PGOOD_ISL

2

1R7970

1%

MF-LF

S0PGOOD_ISL

10K

402

1/16W

2

1R7971

402MF-LF

1/16W1%

10K

S0PGOOD_ISL

2

1R7960

402MF-LF1/16W

1%6.04K

S0PGOOD_ISL

2

1R7961

402MF-LF

1/16W1%

15.0K

S0PGOOD_ISL

21

3

Q7921SSM3K15FV

SOD-VESM-HF

52

21

R7913PLACE_NEAR=U5701.4:6mm

3.3K5%1/16WMF-LF402

6

3

4

1

74AUP1G3208

2

SOT891

5

U79402

1

0.1uF

CERM

20%10V

402

C7940PLACE_NEAR=U7940.1:2.3mm

71 72

71 72 17

44 45

1/16WMF-LF

05%

402

21

NO STUFF

R7917

Power Control 1/ENABLESYNC_DATE=07/22/2010SYNC_MASTER=K91_MARY

ALL_SYS_PWRGD

PM_SUS_EN

VMON_Q4_BASE

P1V8S0_PGOOD

CPUVCCIOS0_PGOOD

VMON_Q3_BASE

PM_SLP_S4_L

Sus_PGOOD_CT

PM_RSMRST_L

P3V3S3_EN

DDRREG_EN

PM_SLP_S3_ENET

PM_SLP_S3_LPM_WLAN_EN_L

P3V3ENET_SS

PP3V3_S3

P1V2S0_EN

S0PGD_BJT_GND_R

SMC_S4_WAKESRC_EN

MAKE_BASE=TRUEP3V3S5_EN P3V3S5_EN

MAKE_BASE=TRUES5_PWRGD

AC_EN_L

PVCCSA_PGOOD

VMON_Q2_BASE

WOL_EN

PM_SLP_S3_R_L

S0PGD_C

P5VS3_PGOOD

SMC_ADAPTER_EN

PM_SLP_S3_R_L

P3V3_S4_EN

S5_PWRGD

PP1V05_S0

PP3V3_S0

P1V5S0_PGOOD

PP1V5_S3RS0_CPUDDR

PP3V3_S0

CHGR_VFRQ

PP3V42_G3H

PP5V_S0

PP1V5_S3RS0_CPUDDR

PP1V05_S0

PP3V3_S0

PP1V05_VID_VMON

PP1V5_DIV_VMON

PP5V_DIV_VMON

ALL_SYS_PWRGD_R

PP3V3_S5

P1V8S0_EN

PP3V3_SUS

AP_PWR_EN

PP3V3_ENET

MAKE_BASE=TRUESMC_S4_WAKESRC_EN

PM_SLP_S3_L

PM_SLP_S3_R_L

ALL_SYS_PWRGD

PP3V42_G3H

MAKE_BASE=TRUEPM_SLP_S4_L

PP3V3_SUS

CPUVCCIOS0_EN

MAKE_BASE=TRUEP1V5S0_EN P1V5S0_EN

MAKE_BASE=TRUEP1V2S0_EN

CPUVCCIOS0_ENMAKE_BASE=TRUE

SMC_PM_G2_EN

P1V8S0_ENMAKE_BASE=TRUE

PVCCSA_ENMAKE_BASE=TRUE

PVCCSA_EN

VMON_3V3_DIV

ALL_SYS_PWRGD

PP3V3_S5

PM_SUS_EN

DDRREG_ENMAKE_BASE=TRUE

TPAD_VBUS_EN

P3V3S3_ENMAKE_BASE=TRUE

MAKE_BASE=TRUE

PM_SLP_S3_R_L

CPUVCCIOS0_PGOOD PM_PECI_PWRGD

CPUIMVP_VR_ON

MAKE_BASE=TRUESMC_PM_G2_EN

SMC_BATLOW_L

PM_SLP_SUS_LMAKE_BASE=TRUEPM_SUS_EN

MAKE_BASE=TRUE

P3V3_S4_ENPM_SLP_S5_L

PP3V3_S5

79 OF 132

72 OF 101

23 44 72 87 89

6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 87

65 72

44 65 72

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

7 10 13 15 29 71 72

6 7 12 16 17 18

19 20 22 23

25 26 28 32

35 36 39 40

41 45 47 48

49 50 51 53

56 60 61 71

72 79 82 83

84 87 88 89

98

6 7 25

42

44

45

46

47

52

62

63

72

6 7 8 22 41

46 51

53 64

67 68

69 71

86 88 101

7 10 13 15 29 71 72

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72

82 85 89 98

7 16 17 18 19 20 22 45 70 71 72

6 7 25 36 70

44 45 72 85

23 44 72 87 89

6 7 25 42 44 45 46 47 52 62 63 72

7 16 17 18 19 20 22 45 70 71 72

70 72

70 72

69 72

70 72

64 72

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

66 72

71 72

48 71 72

69 72

71 72

71 72

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

PCIE_TX4P

PCIE_TX4N

PCIE_TX5P

PCIE_TX5N

PCIE_TX6P

PCIE_TX6N

PCIE_TX7P

PCIE_TX7N

PCIE_TX8P

PCIE_TX8N

PCIE_TX9P

PCIE_TX9N

PCIE_TX10P

PCIE_TX10N

PCIE_TX11P

PCIE_TX11N

PCIE_TX12P

PCIE_TX12N

PCIE_TX13P

PCIE_TX13N

PCIE_TX14P

PCIE_TX14N

PCIE_TX15P

PCIE_TX15N

PCIE_TX3P

PCIE_TX3N

PCIE_TX2P

PCIE_TX2N

PCIE_TX1P

PCIE_TX1N

PCIE_TX0P

PCIE_TX0N

PCIE_CALRP

PCIE_CALRN

PCIE_RX3P

PCIE_RX3N

PCIE_RX2N

PCIE_RX2P

PCIE_RX1N

PCIE_RX0N

PCIE_RX0P

PCIE_RX7N

PCIE_RX7P

PCIE_RX6N

PCIE_RX6P

PCIE_RX5N

PCIE_RX4P

PCIE_RX4N

PCIE_RX5P

PCIE_RX11N

PCIE_RX11P

PCIE_RX10N

PCIE_RX10P

PCIE_RX9N

PCIE_RX9P

PCIE_RX8N

PCIE_RX12P

PCIE_RX15N

PCIE_RX15P

PCIE_RX14N

PCIE_RX14P

PCIE_RX13N

PCIE_RX12N

PCIE_RX13P

PCIE_REFCLKP

PWRGOOD

PERST*

PCIE_REFCLKN

PCIE_RX8P

PCIE_RX1P (1 OF 9)PCIE

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1


- =PP1V2_GPU_PEX_IOVDDQ

- =PP1V2_GPU_PEX_IOVDD

- =PP1V2_GPU_PEX_PLLXVDD

(NONE)

Page Notes

(NONE)



201

21C80206.3VX5R

0.1UF

10%

8 90

8 90

C8069 21

6.3VX5R 201

0.1UF

10%

21

X5R 201

0.1UF

10%6.3V

C8070

8 90

8 90

21C80676.3VX5R 201

0.1UF

10%

21C80216.3VX5R 201

0.1UF

10%

21C80686.3VX5R 201

0.1UF

10%

8 90

8 90

21C80656.3VX5R 201

0.1UF

10%

21C80666.3VX5R 201

0.1UF

10%

8 90

8 90

21C80636.3VX5R 201

0.1UF

10%

21C80646.3VX5R 201

0.1UF

10%

8 90

8 90

21C80616.3VX5R 201

0.1UF

10%

21C80626.3VX5R 201

0.1UF

10%

8 90

8 90

21C80596.3VX5R 201

0.1UF

10%

21C80606.3VX5R 201

0.1UF

10%

8 90

8 90

21C8057X5R 201

0.1UF

10%6.3V

21C80586.3VX5R 201

0.1UF

10%

0

MF-LF

5%

R8000 1 2

402

1/16W

21C80346.3VX5R 201

0.1UF

10%

21C80356.3VX5R 201

0.1UF

10%

21C80326.3VX5R 201

0.1UF

10%

21C80336.3VX5R 201

0.1UF

10%

AH16

AA30

N30

N29

N33

N32

P30

P29

P33

P32

T30

T29

T33

T32

U30

U29

U33

U32

W33

W32

H33

H32

K30

K29

J33

J32

K33

L30

L29

L33

L32

Y33

Y32

M35

L36

N38

P35

N36

R38

P37

T35

R36

U38

T37

V35

U36

W38

V37

Y35

W36

F35

E37

G38

F37

H35

G36

J38

H37

K35

J36

L38

K37

AA38

Y37

AA36

Y30

Y29

U8000FCBGA

WHISTLER

40NM-ES

OMIT

M37

K32

AB35

MF-LF1/16W1%

402

1.27KR80021

22

1

2.0K

402

1%

MF-LF

R8001

1/16W

21C80306.3VX5R 201

0.1UF

10%

21C80316.3VX5R 201

0.1UF

10%

21C80286.3VX5R 201

0.1UF

10%

21C80296.3VX5R 201

0.1UF

10%

8 81 86 87 89 2

5%

0R8003

MF-LF1/16W

402

1

NOSTUFF

1/16W

1

5%

2

R800410K

402MF-LF

21C80266.3VX5R 201

0.1UF

10%

21C80276.3VX5R 201

0.1UF

10%

21C80246.3VX5R 201

0.1UF

10%

21C80256.3VX5R 201

0.1UF

10%

21C80226.3VX5R 201

0.1UF

10%

21C80236.3VX5R 201

0.1UF

10%

8 90

8 90

8 90

8 90

8 90

8 90

8 90

8 90

8 90

8 90

8 90

8 90

8 90

8 90

8 90

8 90

16 93

16 93

8 87

21C80556.3VX5R 201

0.1UF

10%

21C80566.3VX5R 201

0.1UF

10%

8 90

8 90

Whistler PCI-ESYNC_DATE=06/15/2010SYNC_MASTER=K92_SUMA

PEG_R2D_P<2>

PEG_R2D_N<1>

PEG_R2D_P<3>

PEG_R2D_P<4>

PEG_R2D_C_N<1>

PEG_R2D_C_N<0>

PEG_D2R_C_N<5>

PEG_CALRNPEG_CLK100M_P

PEG_D2R_C_N<0>PEG_R2D_N<0>

PEG_D2R_C_P<5>

PEG_R2D_C_N<7>

PEG_R2D_C_P<7>

PEG_R2D_C_N<6>

PEG_R2D_C_P<6>

PEG_R2D_C_N<5>

PEG_R2D_C_P<5>

PEG_R2D_C_N<4>

PEG_R2D_C_P<4>

PEG_R2D_C_N<3>

PEG_R2D_N<7>

PEG_R2D_P<7>

PEG_R2D_P<6>

PEG_R2D_N<5>

PEG_R2D_P<5>

PEG_R2D_N<4>

PEG_R2D_N<3>

PEG_D2R_N<7>

PEG_D2R_P<7>

PEG_D2R_C_N<6>

PEG_D2R_N<5>

PEG_D2R_P<5>

PEG_D2R_N<4>PEG_D2R_C_N<4>

PEG_D2R_P<4>


PEG_R2D_C_P<3> PEG_D2R_P<3>PEG_D2R_C_P<3>

PEG_R2D_C_N<2>

PEG_R2D_C_P<2>

PEG_R2D_C_P<1> PEG_R2D_P<1>

PEG_R2D_P<0>


PEG_D2R_C_P<2>


PEG_D2R_P<1>PEG_D2R_C_P<1>

PEG_D2R_P<0>

PEG_R2D_P<1>

PEG_R2D_P<5>

PEG_R2D_P<4>

PEG_R2D_N<5>

PEG_R2D_N<6>

PEG_R2D_P<0>PEG_R2D_N<0>

PEG_R2D_N<3>

PEG_D2R_C_N<0>PEG_D2R_C_P<0>








PEG_R2D_P<7>

PEG_R2D_N<2>PEG_R2D_P<2>

PEG_R2D_N<7>

PEG_R2D_P<6>

PEG_R2D_N<1>

PEG_R2D_P<3>

PEG_R2D_C_P<0>

PEG_D2R_C_P<4>

PEG_R2D_N<4>

PEG_D2R_N<0>

PEG_D2R_C_N<7>

PEG_CLK100M_N

PP1V0_S0GPU_ISNS

GPU_PWRGOOD

GPU_RESET_R_L

PEG_CALRP

PEG_D2R_C_P<7>

PEG_R2D_N<6>

PM_ALL_GPU_PGOODEG_RESET_L

PEG_D2R_N<6>

PEG_D2R_P<6>

PEG_D2R_P<2>

PEG_D2R_C_P<0>

PEG_D2R_C_P<6>

PEG_R2D_N<2>

80 OF 132

73 OF 101

73 90

73 90

73 90

73 90

73 90

73 90 73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

73 90

7 74 78 80 100

73 90

73 90

73 90

73 90

73 90

VDDC_V22

MPV18_H8

MPV18_H7

VDDR1_U11

VDDR1_Y7

VDDR1_Y11

VDDR1_U7

VDDR1_L12

VDDR1_L7

VDDR1_L16

VDDR1_N11

VDDR1_P7

VDDR1_R11

VDDR1_M11

VDDR1_L26

VDDR1_L23

VDDR1_L21

VDDR1_G20

VDDR1_G23

VDDR1_G26

VDDR1_K13

VDDR1_K11

VDDR1_K8

VDDR1_J9

VDDR1_J7

VDDR1_H10

VDDR1_G29

VDDR1_AD11

VDDR1_AC7

VDDR1_G17

VDDR1_G14

VDDR1_G11

VDDR1_AL9

VDDR1_AK8

VDDR1_AJ7

VDDR1_AG10

VDDR1_AF7

PCIE_VDDC_N28

PCIE_VDDC_M28

PCIE_VDDC_L28

PCIE_VDDC_H29

PCIE_VDDC_R28

PCIE_VDDC_U28

PCIE_VDDC_T28

SPV10

SPVSS

FB_VDDC

FB_VDDCI

FB_GND

PCIE_VDDR_AA31

PCIE_VDDR_AA32

PCIE_VDDR_W29

PCIE_VDDR_W30

PCIE_VDDR_AA34

PCIE_VDDR_V28

PCIE_VDDR_AB37

PCIE_VDDR_AA33

PCIE_VDDR_Y31

PCIE_VDDC_G30

SPV18

VDDR4_AD12

VDDR4_AG15

VDDR4_AG13

VDDR4_AF15

VDDR4_AF13

VDDR3_AG23

VDDR3_AG24

NC/VDDRHB

NC/VSSRHB

NC/VSSRHA

NC/VDDRHA

VDDR4_AF11

VDDR4_AF12

VDDR4_AG11

VDDR3_AF23

VDD_CT_AG27

VDD_CT_AG26

VDD_CT_AF26

VDD_CT_AF27

VDDR3_AF24

BIF_VDDC_T27

VDDC_U16

VDDC_U23

VDDC_U18

VDDC_U21

VDDC_U26

VDDC_V17

VDDC_V20

VDDC_V24

VDDC_V27

VDDC_Y16

VDDC_Y21

VDDC_Y26

VDDC_Y23

VDDC_Y18

VDDC_Y28

VDDC_T24

VDDC_AA24

VDDC_AA20

VDDC_AA22

VDDC_AA17

VDDC_AA15

VDDC_AA27

VDDC_AB16

VDDC_AB18

VDDC_AB21

VDDC_AB23

VDDC_AB28

VDDC_AB26

VDDC_AC17

VDDC_AC24

VDDC_AC20

VDDC_AC22

VDDC_AC27

VDDC_AD18

VDDC_AD21

VDDC_AD23

VDDC_AD26

VDDC_AF17

VDDC_AF20

VDDC_AG18

VDDC_AF22

VDDC_AG16

BIF_VDDC_N27

VDDC_AG21

VDDC_AH22

VDDC_AH27

VDDC_AH28

VDDC_M26

VDDC_N24

VDDC_R23

VDDC_R18

VDDC_R21

VDDC_R26

VDDC_T17

VDDC_T22

VDDC_T20

VDDCI_AC15

VDDCI_T15

VDDCI_T12

VDDCI_R16

VDDCI_M23

VDDCI_M18

VDDCI_M16

VDDCI_M15

VDDCI_AD16

VDDCI_AC12

VDDCI_AB13

VDDCI_AA13

VDDCI_AD13

VDDCI_R13

VDDCI_R12

VDDCI_N22

PCIE_VDDC_G31

PCIE_VDDC_H30

PCIE_VDDC_J29

PCIE_VDDC_J30

VDDCI_V15

VDDCI_Y13

VDDCI_N13

VDDCI_N20

VDDCI_N17

VDDCI_N15

PCIE

ISOLATED CORE I/O

VOLT

SENSE

PLL

I/O

LEVEL

TRNSL

CORE

MEM I/O

(7 OF 9)

NCNC

NCNC

NC

OUT

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1


- =PP1V5R1V35_GPU_FB_VDDR1- =PP1V8_GPU_VDD_CT- =PP1V0_GPU_PLL

- =PPVCORE_GPU


(NONE)


(NONE)

60 mA

Page Notes

150mA

120mA

75mA

504mA

1920mA

219mA

- =PP1V8_GPU_PCIE_VDDC- =PP1V8_GPU_PCIE_VDDR- =PP1V8_GPU_PLL- =PP1V8_GPU_MEM_PLL

- =PP3V3_GPU_VDDR3- =PP3V3_GPU_VDDR4

TBD mA

TBD mA

40NM-ESWHISTLER

FCBGA

OMIT

U8000

N27

T27

AH29

AF28

AG28

H7

H8

M20

M21

U12

V12

G30

G31

H29

H30

J29

J30

L28

M28

N28

R28

T28

U28

AA31

AA32

AA33

AA34

AB37

V28

W29

W30

Y31

AN9

AM10

AN10

AF26

AF27

AG26

AG27

AA15

AA17

AA20

AA22

AA24

AA27

AB16

AB18

AB21

AB23

AC17

AC22

AC24

AC27

AD18

AD21

AD23

AD26

AF17

AF20

AF22

AG16

AG18

AG21

AH22

AH27

AH28

M26

N24

R18

R21

R23

R26

T17

T20

T22

T24

U16

U18

U21

U23

U26

V17

V20

V22

V24

V27

Y16

Y18

Y21

Y23

Y26

Y28

AA13

AB13

AC12

AC15

AD13

AD16

M15

M16

M18

M23

N13

N15

N17

N20

N22

R12

R13

R16

T12

T15

V15

Y13

AC7

AD11

AF7

AG10

AJ7

AK8

AL9

G11

G14

G17

G20

G23

G26

H10

J7

J9

K11

K13

K8

L12

L16

L21

L23

L26

L7

M11

N11

P7

R11

U11

U7

Y11

Y7

AF23

AF24

AG23

AG24

AD12

AF11

AF12

AF13

AF15

AG11

AG13

AG15

G29

AB26

AB28

AC20

FERR-220-OHM-2A

0603

L8140

1 2

CRITICAL

10V

10UF20%

X5R603

C81451

225VX5R

1UF10%

402

C81461

225VX5R

1UF10%

402

C81471

2

1UF25VX5R402

10%

C81481

2201

0.1UF10%

X5R6.3V

C81491

2201X5R

10%6.3V

C81501

2

0.1UF

25VX5R

1UF10%

402

C81541

225VX5R

1UF10%

402

C81531

210%1UF

X5R25V

402

C81521

2X5R

10UF20%

603

10V

C81511

225VX5R

10%1UF

402

C81571

225VX5R

10%1UF

402

C81561

225VX5R

1UF10%

402

C81551

2 X5R

1UF10%25V

402

C81581

2

20%

X5R10V

10UF

603

1

2

C8100

10%

X5R402

25V

1UFC81101

2 X5R25V

1UF

402

10%

C81111

2 X5R25V10%1UF

402

C81121

2 X5R25V10%

402

1UFC81131

2

1UF

X5R25V10%

402

C81141

2

20%

X5R603

10V

10UFC81011

220%

X5R10V

10UF

603

C81021

2

10UF10V20%

X5R603

C81031

2603

20%

X5R10V

10UFC81041

2

X5R25V

1UF10%

402

C81081

2 X5R25V

1UF10%

402

C81091

2

201

10%0.1UF6.3VX5R

C81171

2201

10%0.1UF6.3VX5R

C81181

2201

0.1UF10%6.3VX5R

C81191

2201

0.1UF10%6.3VX5R

C81201

2201

0.1UF10%6.3VX5R

C81211

2201

0.1UF10%6.3VX5R

C81221

2201

0.1UF10%6.3VX5R

C81231

2201

10%0.1UF6.3VX5R

C81241

2201

10%0.1UF6.3VX5R

C81161

2

25V

1UF10%

402X5R

C81361

2X5R

1UF

402

10%25V

C81351

2

1UF25VX5R

10%

402

C81341

220%

X5R10V

10UF

603

C81331

2

25VX5R

10%

402

1UFC81271

225VX5R

1UF10%

402

C81261

210V20%10UF

X5R603

C81251

2 25VX5R

10%1UF

402

C81281

2201

0.1UF10%6.3VX5R

C81291

2

120OHM-0.3A

0402

L8120

1 2

CRITICAL

1UF

X5R25V10%

402

C81391

225VX5R

1UF10%

402

C81381

220%10UF

X5R10V

603

C81371

2201

0.1UF10%6.3VX5R

C81401

2201

0.1UF10%6.3VX5R

C81411

2

0603

470OHM-1A-150MOHML8131

1 2

CRITICAL

10%1UF

X5R25V

402

C81431

2X5R

20%10UF10V

603

C81421

2

0402

120OHM-0.3AL8132

1 2

CRITICAL

201

6.3V

0.1UF10%

X5R

C81441

2

SMXW81001 2

81

81

470OHM-1A-150MOHM

0603

L8130

1 2

CRITICAL

402

10%1UF25VX5R

C81311

2603

10VX5R

10UF20%

C81301

2201X5R

10%0.1UF6.3V

C81321

2

10%1UF

X5R25V

402

C81661

210%1UF

X5R25V

402

C81651

210%1UF

X5R25V

402

C81641

210%1UF

X5R25V

402

C81631

210%1UF

X5R25V

402

C81621

210%1UF

402X5R25V

C81611

210%1UF

X5R25V

402

C81601

210%1UF

X5R25V

402

C81671

210%1UF

X5R25V

402

C81681

210%1UF

X5R25V

402

C81691

2

10%1UF

X5R25V

402

C81791

210%1UF

X5R25V

402

C81781

210%1UF

X5R25V

402

C81771

210%1UF

X5R25V

402

C81761

210%1UF

X5R25V

402

C81751

210%1UF

X5R402

25V

C81741

210%1UF

X5R25V

402

C81731

210%1UF

X5R25V

402

C81721

2X5R

10%1UF25V

402

C81711

2X5R

10%1UF25V

402

C81701

2

10%1UF

X5R25V

402

C81891

210%1UF

X5R25V

402

C81881

210%1UF

X5R25V

402

C81871

210%1UF

X5R25V

402

C81861

210%1UF

X5R25V

402

C81851

210%1UF

X5R25V

402

C81841

210%1UF

X5R25V

402

C81831

210%1UF

X5R25V

402

C81821

210%1UF

X5R25V

402

C81811

210%1UF

X5R25V

402

C81801

2

201

10%0.1UF6.3VX5R

C81151

2

X5R25V10%1UF

402

C81071

2X5R25V10%1UF

402

C81061

2X5R25V10%

402

1UFC81051

2

20%10UF

X5R10V

603

C81991

210VX5R

10UF20%

603

C81981

210VX5R

10UF20%

603

C81971

210VX5R

10UF20%

603

C81961

220%10UF

X5R10V

603

C81951

220%10UF

X5R10V

603

C81941

210VX5R

10UF

603

20%

C81931

210V

10UF20%

603X5R

C81921

210V

10UF20%

603X5R

C81911

2

10UF

X5R10V

603

20%

C81901

2

25VX5R

1UF10%

402

C81A91

225VX5R

1UF10%

402

C81A81

225VX5R

1UF10%

402

C81A71

210%1UF

X5R25V

402

C81A61

210%1UF25V

402X5R

C81A51

210%1UF

X5R25V

402

C81A41

210%1UF

X5R25V

402

C81A31

210%1UF

X5R25V

402

C81A21

210%

X5R25V

1UF

402

C81A11

210%1UF

X5R25V

402

C81A01

2

20%

X5R10V

10UF

603

C81B21

2X5R10V20%10UF

603

C81B11

210VX5R

20%10UF

603

C81B01

2

201

0.1UF10%6.3VX5R

C81C11

2X5R25V

1UF10%

402

C81C01

2

0402

120OHM-0.3AL8150

1 2

CRITICAL

0603

FERR-120-OHM-3AL8155

1 2

CRITICAL


Whistler CORE/FB POWER

PP1V0_S0GPU_ISNS

GND_GPU_PLL

PP1V0_S0GPU_ISNS

PP1V8_S0GPU_ISNS

PP1V5_S0GPU_ISNS PP1V8_S0GPU_ISNS

PP1V8_GPU_VDDR4

PP1V0_GPU_PLL

GPU_VDD_SENSE

GPU_GND_SENSE

PP3V3_S0GPU

PP1V8_S0GPU_ISNS

PP1V8_S0GPU_ISNS

PP1V8_S0GPU_ISNS

VOLTAGE=1.8V


PP1V8_GPU_PCIE_VDDR


GND_GPU_PLL


PP1V8_GPU_MEM_PLL

PP1V0_GPU_PCIE_VDDC


PP1V8_GPU_VDDR4


PP1V8_GPU_PLLMIN_LINE_WIDTH=0.25 mm



MIN_LINE_WIDTH=0.3 mmPP1V8_GPU_VDD_CT



PP1V0_GPU_PLL

PPVCORE_GPU

81 OF 132

74 OF 101

7 73 74 78 80 100

74

7 73 74 78 80 100

7 74 78 80 100

7 75 76 77 100 7 74 78 80 100

74

74

6 7 71 78 79 81 83

7 74 78 80 100

7 74 78 80 100

7 74 78 80 100

74

6 7 48 81

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

DQA0_31/DQA_31

DQA0_27/DQA_27

DQA0_29/DQA_29

DQA0_25/DQA_25

DQA0_21/DQA_21

DQA0_22/DQA_22

DQA0_23/DQA_23

DQA0_24/DQA_24

DQA0_28/DQA_28

DQA0_26/DQA_26

DQA0_30/DQA_30

DQA0_20/DQA_20

DQA0_16/DQA_16

DQA0_17/DQA_17

DQA0_18/DQA_18

DQA0_19/DQA_19

DQA0_12/DQA_12

DQA0_13/DQA_13

DQA0_14/DQA_14

DQA0_4/DQA_4

DQA0_3/DQA_3

DQA0_0/DQA_0

DQA0_9/DQA_9

DQA0_8/DQA_8

DQA0_7/DQA_7

DQA0_6/DQA_6

DQA0_5/DQA_5

MEM_CALRN1

MEM_CALRN0

MEM_CALRN2

MEM_CALRP0

MEM_CALRP1

MEM_CALRP2

MVREFSA

DQA1_29/DQA_61

DQA1_30/DQA_62

DQA1_31/DQA_63

MVREFDA

DQA1_28/DQA_60

DQA1_24/DQA_56

DQA1_25/DQA_57

DQA1_26/DQA_58

DQA1_27/DQA_59

DQA1_23/DQA_55

DQA1_19/DQA_51

DQA1_20/DQA_52

DQA1_21/DQA_53

DQA1_22/DQA_54

DQA1_15/DQA_47

DQA1_16/DQA_48

DQA1_17/DQA_49

DQA1_9/DQA_41

DQA1_10/DQA_42

DQA1_11/DQA_43

DQA1_12/DQA_44

DQA1_13/DQA_45

DQA1_14/DQA_46

DQA1_18/DQA_50

DQA1_8/DQA_40

DQA1_3/DQA_35

DQA1_5/DQA_37

DQA1_4/DQA_36

DQA1_6/DQA_38

DQA1_7/DQA_39

DQA1_0/DQA_32

DQA1_1/DQA_33

DQA1_2/DQA_34

EDCA0_1/QSA_1/RDQSA_1


WCKA1_0*/DQMA_5

MAA0_7/MMA_7

MAA0_2/MMA_2

MAA0_0/MMA_0

MAA0_1/MMA_1

MAA0_4/MMA_4

MAA0_3/MMA_3

MAA1_8

MAA0_8

CLKA1

CLKA0

ADBIA1/ODTA1

CKEA0

DDBIA1_3/QSA_7B/WDQSA_7






DQA0_15/DQA_15

DQA0_1/DQA_1

DQA0_2/DQA_2

DQA0_10/DQA_10

DQA0_11/DQA_11

MAA0_6/MMA_6

MAA1_0/MMA_8

WCKA0_0/DQMA_0

WCKA0_0*/DQMA_1

MAA1_5/MMA_13_BA2

WCKA1_0/DQMA_4

WCKA1_1/DQMA_6

WCKA1_1*/DQMA_7


WCKA0_1/DQMA_2






RASA1*

CASA0*

CASA1*

CSA0_0*

CSA0_1*

CSA1_0*

CSA1_1*

CKEA1

WEA0*

WEA1*

CLKA0*

RASA0*

ADBIA0/ODTA0

CLKA1*


MAA0_5/MMA_5

MAA1_1/MMA_9

MAA1_2/MMA_10

MAA1_4/MMA_12

MAA1_6/MMA_14_BA0

MAA1_3/MMA_11

MAA1_7/MMA_A15_BA1

WCKA0_1*/DQMA_3


MEM INTERFACE A(4 OF 9)

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

NC

NC

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

DQB0_31/DQB_31

DQB1_1/DQB33

MAB0_4/MAB_4

MAB0_6/MAB_6

MAB1_1/MAB_9

DQB1_0/DQB32

DQB0_30/DQB_30

CKEB1

CKEB0

CSB1_1*

WEB1*

WEB0*

RASB1*

RASB0*

CLKB1*

CASB0*

CASB1*

CSB0_0*

CSB0_1*

CSB1_0*

ADBIB1/ODTB1

ADBIB0/ODTB0

DDBIB1_2/QSB_6B/WDQSB_6




CLKB0

CLKB0*

CLKB1





MAB0_8

MAB1_8

DRAM_RST

EDCB1_3/QSB_7/RDQSB_7








WCKB1_1*/DQMB_7

WCKB1_1/DQMB_6

WCKB1_0/DQMB_4WCKB1_0*/DQMB_5

WCKB0_1*/DQMB_3WCKB0_1/DQMB_2

MAB1_3/MAB_11

MAB1_6/BA0

MAB1_5/BA2

MAB1_7/BA1

MAB1_2/MAB_10

MAB1_4/MAB_12

WCKB0_0/DQMB_0

WCKB0_0*/DQMB_1

MAB0_7/MAB_7

MAB0_5/MAB_5

MAB0_2/MAB_2

MAB0_3/MAB_3

MAB0_1/MAB_1

MAB0_0/MAB_0

MAB1_0/MAB_8

DQB1_8/DQB40

DQB1_3/DQB35

DQB1_2/DQB34

DQB1_7/DQB39

DQB1_6/DQB38

DQB1_4/DQB36

DQB1_5/DQB37

DQB0_0/DQB_0

DQB0_1/DQB_1

DQB0_3/DQB_3

DQB0_4/DQB_4

DQB0_2/DQB_2

DQB0_9/DQB_9

DQB0_8/DQB_8

DQB0_6/DQB_6

DQB0_7/DQB_7

DQB0_5/DQB_5

DQB0_11/DQB_11

DQB0_10/DQB_10

DQB0_20/DQB_20

DQB0_21/DQB_21

DQB0_15/DQB_15

DQB0_12/DQB_12

DQB0_13/DQB_13

DQB0_14/DQB_14

DQB0_18/DQB_18

DQB0_19/DQB_19

DQB0_17/DQB_17

DQB0_16/DQB_16

DQB0_23/DQB_23

DQB0_24/DQB_24

DQB0_22/DQB_22

DQB0_25/DQB_25

DQB0_27/DQB_27

DQB0_26/DQB_26

DQB0_28/DQB_28

DQB0_29/DQB_29

DQB1_10/DQB42

DQB1_11/DQB43

DQB1_13/DQB45

DQB1_12/DQB44

DQB1_16/DQB48

DQB1_14/DQB46

DQB1_15/DQB47

DQB1_18/DQB50

DQB1_17/DQB49

DQB1_21/DQB53

DQB1_20/DQB52

DQB1_19/DQB51

DQB1_23/DQB55

DQB1_22/DQB54

DQB1_26/DQB58

DQB1_24/DQB56

DQB1_25/DQB57

DQB1_27/DQB59

DQB1_28/DQB60

DQB1_30/DQB62

DQB1_31/DQB63

DQB1_29/DQB61

MVREFDB

MVREFSB

TESTEN

CLKTESTA

CLKTESTB

DQB1_9/DQB41

MEM INTERFACE B

(5 OF 9)

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

NC

NC

OUT




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

- =PP1V5R1V35_FB_REF

- =PP1V5R1V35_FB_CAL

(NONE)

(NONE)



Page NotesPower aliases required by this page:

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

76 97

76 97

76 97

76 97

40NM-ESWHISTLER

FCBGA

OMIT

U8000

J21

G19

K20

K17

K21

J20

H27

G27

J14

H14

K24

K27

M13

K16

A34

E30

E26

C20

C16

C12

J11

F8

C37

C35

C30

A30

F28

C28

A28

E28

D27

F26

C26

A26

A35

F24

C24

A24

E24

C22

A22

F22

D21

A20

F20

E34

D19

E18

G32

D33

F32

E32

D31

F30

C18

A18

F12

A12

D11

F10

A10

C10

G13

H13

J13

H11

F18

G10

G8

K9

K10

G9

A8

C8

E8

A6

C6

D17

E6

A5

A16

F16

D15

E14

F14

D13

C34

D29

D25

E20

E16

E12

J10

D7

G24

J23

H24

J24

H26

J26

H21

G21

H23

H19

H20

L13

G16

J16

H16

J17

H17

J19

L27

N12

AG12

M27

M12

AH12

L18

L20

K23

K19

A32

C32

D23

E22

C14

A14

E10D9

K26

L15

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

76 97

76 97

76 97

76 97

76 97

76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

76 97

76 97

76 97

76 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

40NM-ESFCBGA

OMIT

WHISTLERU8000

T7

W7

W10

AA10

U10

AA11

L9

L8

AD8

AD7

AK10

AL10

P10

L10

AD10

AC10

G7

K1

P1

W4

AC4

AH3

AJ8

AM3

C5

C3

J4

K6

K5

L4

M6

M1

M3

M5

N4

P6

E3

P5

R4

T6

T1

U4

V6

V1

V3

Y6

Y1

E1

Y3

Y5

F1

F3

F5

G4

H5

H6

AA4

AB6

AF6

AG4

AH5

AH6

AJ4

AK3

AF8

AF9

AG8

AG7

AB1

AK9

AL7

AM8

AM7

AK1

AL4

AM6

AM1

AN4

AP3

AB3

AP1

AP5

AD6

AD1

AD3

AD5

AF1

AF3

AH11

F6

K3

P3

V5

AB5

AH1

AJ9

AM5

P8

T9

P9

N7

N8

N9

U9

U8

T8

Y9

W9

AC8

AC9

AA7

AA8

Y8

AA9

W8

Y12

AA12

T10

Y10

AD28

H3

H1

T3T5

AE4AF5

AK6AK5

N10

AB11

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 76 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

6 77 97

77 97

77 97

77 97

77 97

77 97

77 97

77 97

77 97

77 97

77 97

77 97

77 97

77 97

6 77 97

77 97

6 77 97

10K5%

1/16WMF-LF

402

R82501

2

402 1% 1/16W MF-LF

243GPU:WHISTLER

R8210 1 2

MF-LF

243

1/16W402 1%

R8211 1 2

GPU:WHISTLER243

MF-LF402 1/16W1%

R8212 1 2

243

402 MF-LF1/16W1%

R8214 1 2

GPU:WHISTLER

402 MF-LF1/16W1%

243R8213 1 2

GPU:WHISTLER1/16W

243

1% MF-LF402

R8215 1 2

GPU:WHISTLER

PLACE_NEAR=U8000.L18:2.54MM

40.21%1/16WMF-LF402

R82001

2


GPU:WHISTLER 1/16W

1001%

MF-LF402

R82011

2

GPU:WHISTLER

16VX5R

0.1UF10%

402-1


C82001

2

402-1

10%0.1UF

X5R16V

NOSTUFF

C8251 1

2402-1

10%0.1UF

X5R16V

NOSTUFF

C82521

2 50V5%

CERM

120PF

402

C82601

2MF-LF1/16W

5%5.1K

402

R82601

2

5%

51

1/16WMF-LF402

R82621 2

402MF-LF1/16W

10

5%

R82611 2

402MF-LF1/16W

1%51.1NOSTUFF

R82511

2 402MF-LF1/16W1%51.1 NOSTUFFR82521

2

76 77 97

GPU:WHISTLER

402-1

10%0.1UF

X5R16V


C82011

2

GPU:WHISTLER

402MF-LF1/16W1%40.2


R82021

2

GPU:WHISTLER402MF-LF1/16W1%100


R82031

2

402-1

10%0.1UF

X5R16V

PLACE_NEAR=U8000.Y12:2.54MM

C82021

2

PLACE_NEAR=U8000.Y12:2.54MM402MF-LF1/16W1%40.2R82041

2

402

1/16W1%100

MF-LF

PLACE_NEAR=U8000.Y12:2.54MM

R82051

2

402-1

10%0.1UF

X5R16V

PLACE_NEAR=U8000.AA12:2.54MM

C82031

2

402

1/16W

40.2

MF-LF

1%


R82061

2

402MF-LF

1%100


1/16W

R82071

2


Whistler FRAME BUFFER I/F

FB_A0_DQ<6>FB_A0_DQ<7>

FB_A1_A<6>

FB_A1_A<1>

FB_A0_A<4>FB_A0_A<3>

FB_B1_DQ<12>

FB_B1_DQ<28>

FB_B1_DQ<30>

GPU_TEST_EN

GPU_CLK_TEST_P

FB_A_VREFD

FB_B1_DQ<15>FB_B1_DQ<16>

FB_A1_DQ<18>

FB_A0_DQ<2>

FB_A0_DQ<4>

FB_A1_DQ<2>

FB_A0_A<0>FB_A0_A<1>FB_A0_A<2>

FB_A0_A<5>FB_A0_A<6>FB_A0_A<7>

FB_A1_A<0>

FB_A1_A<2>FB_A1_A<3>FB_A1_A<4>FB_A1_A<5>

FB_A0_WCLK_P<0>

FB_A1_A<7>

FB_A0_WCLK_N<0>

FB_A0_WCLK_P<1>

FB_A1_WCLK_P<0>

FB_A0_WCLK_N<1>

FB_A0_EDC<0>

FB_A0_EDC<2>

FB_A1_WCLK_N<1>

FB_A0_EDC<3>

FB_A1_EDC<0>FB_A1_EDC<1>

FB_A0_DBI_L<0>FB_A0_DBI_L<1>FB_A0_DBI_L<2>FB_A0_DBI_L<3>

FB_A0_ABI_L

FB_A1_DBI_L<1>FB_A1_DBI_L<0>

FB_A0_CLK_P

FB_B0_DQ<31>

FB_B0_A<4>

FB_B0_A<6>

FB_B1_A<1>

FB_B1_DQ<0>

FB_B0_DQ<30>

FB_B1_CKE_LFB_B0_CKE_L

FB_B0_WE_L

FB_B1_RAS_LFB_B0_RAS_L

FB_B1_CLK_N

FB_B0_CAS_LFB_B1_CAS_L

FB_B0_CS_L

FB_B1_DBI_L<0>FB_B1_DBI_L<1>

FB_B0_CLK_PFB_B0_CLK_N

FB_B1_CLK_P

FB_B0_DBI_L<2>FB_B0_DBI_L<1>

FB_B0_DBI_L<3>

FB_B0_DBI_L<0>

FB_B0_A<8>FB_B1_A<8>

FB_B1_EDC<3>

FB_B1_EDC<1>FB_B1_EDC<2>

FB_B1_EDC<0>

FB_B0_EDC<3>


FB_B0_EDC<0>

FB_B1_WCLK_N<1>FB_B1_WCLK_P<1>

FB_B1_WCLK_P<0>FB_B1_WCLK_N<0>


FB_B1_A<3>


FB_B1_A<7>

FB_B1_A<2>

FB_B1_A<4>

FB_B0_WCLK_P<0>FB_B0_WCLK_N<0>

FB_B0_A<7>

FB_B0_A<5>



FB_B1_A<0>




FB_B0_DQ<1>


FB_B0_DQ<8>


FB_B0_DQ<5>

FB_B0_DQ<11>


FB_B0_DQ<15>

FB_B0_DQ<12>FB_B0_DQ<13>FB_B0_DQ<14>




FB_B0_DQ<22>

FB_B0_DQ<25>







FB_B1_DQ<23>



FB_B1_DQ<29>

FB_A0_RAS_LFB_A1_RAS_L

FB_A0_CAS_LFB_A1_CAS_L

FB_A0_CS_L

FB_A1_CS_L

FB_A0_CKE_L

FB_A0_WE_L

FB_A1_CKE_L

FB_A1_WE_L

FB_A0_A<8>

FB_A0_DQ<1>

FB_A0_DQ<3>

FB_A0_DQ<5>

FB_A0_DQ<11>


FB_A0_DQ<15>FB_A0_DQ<16>FB_A0_DQ<17>


FB_A0_DQ<20>FB_A0_DQ<21>FB_A0_DQ<22>FB_A0_DQ<23>FB_A0_DQ<24>FB_A0_DQ<25>FB_A0_DQ<26>FB_A0_DQ<27>FB_A0_DQ<28>FB_A0_DQ<29>FB_A0_DQ<30>FB_A0_DQ<31>




FB_A1_DQ<12>FB_A1_DQ<13>FB_A1_DQ<14>FB_A1_DQ<15>FB_A1_DQ<16>FB_A1_DQ<17>

FB_A1_DQ<19>FB_A1_DQ<20>FB_A1_DQ<21>FB_A1_DQ<22>



FB_A1_EDC<3>


FB_B1_DQ<8>

FB_A0_EDC<1>


FB_A1_EDC<2> FB_B1_DQ<1>

FB_B1_DQ<9>

FB_A1_WCLK_P<1>

FB_A1_WCLK_N<0>

FB_A1_DQ<29>


FB_B0_ABI_LFB_B1_ABI_L

FB_RESET_RC_L FB_RESET_L

FB_B1_DBI_L<3>


FB_B1_DBI_L<2>

FB_B0_DQ<4>

FB_B0_DQ<0>

GPU_CLK_TEST_RC_P

GPU_FB_RESET_L

PP1V5_S0GPU_ISNS

PP1V5_S0GPU_ISNS

FB_B_VREFD

FB_A_VREFS

FB_A_VREFD

FB_B1_WE_L

FB_B1_CS_L

GPU_CLK_TEST_RC_N

PP1V5_S0GPU_ISNS

FB_A1_DBI_L<2>FB_A1_DBI_L<3>

FB_A1_ABI_L

FB_A0_CLK_N

FB_A1_CLK_PFB_A1_CLK_N

FB_A0_DQ<12>

FB_A0_DQ<10>

FB_B1_DQ<31>

FB_B_VREFDFB_B_VREFS

FB_B_VREFS

GPU_CLK_TEST_N


FB_A0_DQ<0>

FB_A1_A<8>

PP1V5_S0GPU_ISNS

PP1V5_S0GPU_ISNSFB_A_VREFS

FB_A1_DQ<6>

FB_CALRP2FB_CALRP1FB_CALRP0

FB_CALRN2FB_CALRN1FB_CALRN0

82 OF 132

75 OF 101

75

7 74 75 76 77 100

7 74 75 76 77 100

75

75

75

7 74 75 76 77 100

75

75

75

7 74 75 76 77 100

7 74 75 76 77 100

75

WCK01

DQ24

DQ31

NC

DQ14

DBI0*

DQ27

DQ15

DQ13

RAS*

EDC3

EDC0

DQ26

DQ25

DQ23

DQ22

DQ21

DQ20

DQ19

DQ18

DQ17

DQ16

DQ12

DQ7

DQ2

DQ1

DQ0

DBI3*

DBI1*

CS*

CK

ABI*

DQ30

CK*

A8/A7

A9/A1

DBI2*

WE*

BA2/A4

BA3/A3

DQ11

DQ10

DQ9

DQ8

DQ6

DQ5

DQ4

DQ3

BA0/A2

CKE*

A10/A0

DQ28

EDC2

EDC1

RESET*

WCK23*

WCK23

WCK01*

DQ29

BA1/A5

A11/A6

CAS*

SEN

MF

ZQ

(MF=0)

(1 OF 2)

WCK01

DQ24

DQ31

NC

DQ14

DBI0*

DQ27

DQ15

DQ13

RAS*

EDC3

EDC0

DQ26

DQ25

DQ23

DQ22

DQ21

DQ20

DQ19

DQ18

DQ17

DQ16

DQ12

DQ7

DQ2

DQ1

DQ0

DBI3*

DBI1*

CS*

CK

ABI*

DQ30

CK*

A8/A7

A9/A1

DBI2*

WE*

BA2/A4

BA3/A3

DQ11

DQ10

DQ9

DQ8

DQ6

DQ5

DQ4

DQ3

BA0/A2

CKE*

A10/A0

DQ28

EDC2

EDC1

RESET*

WCK23*

WCK23

WCK01*

DQ29

BA1/A5

A11/A6

CAS*

SEN

MF

ZQ

(MF=0)

(1 OF 2)

VSSQ

VSS

VREFD

VREFC

VDDQ

VDD

(2 OF 2)

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

NC

NC

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

IN

IN

IN

IN

VSSQ

VSS

VREFD

VREFC

VDDQ

VDD

(2 OF 2)

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

NC

NC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1



GPU:WHISTLER is the BOM option called out on all Rs and Cs on this page

GPU:WHISTLER is the BOM option called out on ALL Rs and Cs on this page!- =PP1V5R1V35_S0_FB_VDD


(NONE)

Page Notes

402

10%1UF

CERM-X5R6.3V

C84841

2402

1%2.37K

MF-LF1/16W

R84841

2

6.3VCERM-X5R

1UF10%

402

C84851

2MF-LF402

1/16W

5.49K1%

R84851

2

402

4.7UF6.3VX5R

20%

C84001

2402

4.7UF20%6.3VX5R

C84011

2

4.7UF

402

20%6.3VX5R

C84021

2

402

4.7UF20%6.3VX5R

C84031

2

4.7UF

402

20%6.3VX5R

C84041

2402

4.7UF20%6.3VX5R

C84051

2

20%4.7UF6.3V

402X5R

C84501

2402X5R6.3V20%4.7UFC84511

2 X5R6.3V20%4.7UF

402

C84521

2

4.7UF20%6.3VX5R402

C84531

2 6.3V20%4.7UF

X5R402

C84541

2 6.3V20%4.7UF

402X5R

C84551

2

1/20WMF201

1201%

R84031

2

1/20W1%

120

MF201

R84041

2

120

201

1%1/20W

MF

R84001

2

201

1201%

1/20WMF

R84531

2

MF1/20W

1%120

201

R84541

2

120

201

1%1/20W

MF

R84501

2

H5GQ1H24AFR-T2C

32MX32-1.25GHZ-MFL

OMIT

BGA

U8450

H4

K5

K4

H5

J4

H11

K10

K11

H10

L3

J12

J11

J3

G12

D2

D13

P13

P2

A4

A2

B11

B13

E11

E13

F11

F13

U11

U13

T11

T13

B4

N11

N13

M11

M13

U4

U2

T4

T2

N4

N2

B2

M4

M2

E4

E2

F4

F2

A11

A13

C2

C13

R13

R2

J1

A5

J5

U5

G3

J2

J10

D4

D5

P4

P5

L12

J13

32MX32-1.25GHZ-MFLBGA

OMIT

H5GQ1H24AFR-T2C

U8400

H4

K5

K4

H5

J4

H11

K10

K11

H10

L3

J12

J11

J3

G12

D2

D13

P13

P2

A4

A2

B11

B13

E11

E13

F11

F13

U11

U13

T11

T13

B4

N11

N13

M11

M13

U4

U2

T4

T2

N4

N2

B2

M4

M2

E4

E2

F4

F2

A11

A13

C2

C13

R13

R2

J1

A5

J5

U5

G3

J2

J10

D4

D5

P4

P5

L12

J13

OMIT

H5GQ1H24AFR-T2C


U8400

C5

C10

L14

P11

R5

R10

D11

G1

G4

G11

G14

L1

L4

L11

B1

B3

F1

F3

F12

F14

G2

G13

H3

H12

K3

K12

B12

L2

L13

M1

M3

M12

M14

N5

N10

P1

P3

B14

P12

P14

T1

T3

T12

T14

D1

D3

D12

D14

E5

E10

J14

A10

U10

B5

B10

L10

P10

T5

T10

D10

G5

G10

H1

H14

K1

K14

L5

A1

A3

E1

E3

E12

E14

F5

F10

H2

H13

K2

K13

A12

M5

M10

N1

N3

N12

N14

R1

R3

R4

R11

A14

R12

R14

U1

U3

U12

U14

C1

C3

C4

C11

C12

C14

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

75 97

75 97

75 97

6 75 97

6 75 97

6 75 97

6 75 97

75 97

75 97

75 97

75 97

75 76 77 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

60.41/16W1%

402MF-LF

R84011

2 402

60.4

MF-LF1/16W1%

R84021

2

10%6.3VCERM-X5R

1UF

402

C84061

2402

1UF

CERM-X5R6.3V10%

C84071

26.3V

1UF10%

CERM-X5R402

C84081

2402

10%

CERM-X5R6.3V

1UFC84091

2

1UF6.3VCERM-X5R402

10%

C84101

2402

1UF

CERM-X5R6.3V10%

C84111

2402CERM-X5R6.3V10%1UFC84121

2402

1UF10%6.3VCERM-X5R

C84131

2

10%1UF

CERM-X5R6.3V

402

C84141

2 CERM-X5R402

10%1UF6.3V

C84151

210%

201

0.1UF6.3VX5R

C84161

2 X5R6.3V10%0.1UF

201

C84171

2

201

10%

X5R6.3V

0.1UFC84181

2 X5R6.3V

0.1UF10%

201

C84191

2 X5R

10%0.1UF6.3V

201

C84201

2 X5R6.3V10%0.1UF

201

C84211

2

0.1UF

X5R6.3V10%

201

C84221

2 X5R6.3V10%0.1UF

201

C84231

2 X5R6.3V

0.1UF10%

201

C84241

2 X5R

10%

201

0.1UF6.3V

C84251

2

402

1UF

CERM-X5R6.3V10%

C84301

2

402

6.3V10%

CERM-X5R

1UFC84311

2

402

1/16WMF-LF

2.37K1%

R84301

2

402

5.49K1%1/16WMF-LF

R84311

2

402

10%1UF6.3VCERM-X5R

C84321

2

402

6.3VCERM-X5R

1UF10%

C84331

2

402

2.37K1%1/16WMF-LF

R84321

2

402

5.49K1%1/16WMF-LF

R84331

2

402

10%1UF

CERM-X5R6.3V

C84341

2

402

6.3VCERM-X5R

10%1UFC84351

2

402

2.37K1%1/16WMF-LF

R84341

2

402

1%1/16WMF-LF

5.49KR84351

2

6 75 97

6 75 97

6 75 97

6 75 97

75 97

75 97

75 97

75 97

75 97

402MF-LF

60.41%1/16W

R84521

2

60.4

MF-LF402

1%1/16W

R84511

2

75 97

75 97

75 76 77 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97


OMIT

H5GQ1H24AFR-T2C

U8450

C5

C10

L14

P11

R5

R10

D11

G1

G4

G11

G14

L1

L4

L11

B1

B3

F1

F3

F12

F14

G2

G13

H3

H12

K3

K12

B12

L2

L13

M1

M3

M12

M14

N5

N10

P1

P3

B14

P12

P14

T1

T3

T12

T14

D1

D3

D12

D14

E5

E10

J14

A10

U10

B5

B10

L10

P10

T5

T10

D10

G5

G10

H1

H14

K1

K14

L5

A1

A3

E1

E3

E12

E14

F5

F10

H2

H13

K2

K13

A12

M5

M10

N1

N3

N12

N14

R1

R3

R4

R11

A14

R12

R14

U1

U3

U12

U14

C1

C3

C4

C11

C12

C14

402

1UF

CERM-X5R6.3V10%

C84591

2

402

6.3V10%

CERM-X5R

1UFC84631

2

402

6.3V10%

CERM-X5R

1UFC84581

2

402

6.3VCERM-X5R

10%1UFC84621

2

X5R6.3V10%0.1UF

201

C84671

2X5R6.3V

0.1UF10%

201

C84661

2

402

10%1UF

CERM-X5R6.3V

C84571

2

6.3VCERM-X5R

10%

402

1UFC84611

2

CERM-X5R

1UF10%6.3V

402

C84561

2

10%1UF6.3V

402CERM-X5R

C84601

2

10%1UF

CERM-X5R6.3V

402

C84651

2CERM-X5R402

6.3V

1UF10%

C84641

2

6.3V10%

X5R201

0.1UFC84711

2

X5R6.3V

0.1UF10%

201

C84751

2

6.3V10%0.1UF

X5R201

C84701

2

X5R6.3V10%0.1UF

201

C84741

2

6.3V

0.1UF10%

X5R201

C84691

2

X5R6.3V

0.1UF10%

201

C84731

2

6.3VX5R

0.1UF10%

201

C84681

2

X5R6.3V10%0.1UF

201

C84721

2

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

402

10%1UF6.3VCERM-X5R

C84801

2

1%1/16WMF-LF402

2.37KR84801

2

6.3V

402

10%1UF

CERM-X5R

C84811

2MF-LF1/16W

402

1%5.49KR84811

2

6.3V10%

402

1UF

CERM-X5R

C84821

2402

1/16WMF-LF

1%2.37KR84821

2

6.3V

1UF10%

402CERM-X5R

C84831

2

5.49K1%1/16WMF-LF402

R84831

2

GDDR5 Frame Buffer ASYNC_MASTER=K92_MLB SYNC_DATE=08/19/2010

FB_A0_A<6>

FB_A0_DQ<16>

FB_A0_VREFC

PP1V5_S0GPU_ISNS

FB_A0_VREFD1

FB_A0_VREFD2

FB_A1_CLK_NFB_A1_CLK_P

FB_RESET_L

FB_A0_DQ<22>

FB_A0_DQ<1>

FB_A0_EDC<3>FB_A0_EDC<1>

FB_A0_A<5>

FB_A0_EDC<2>

FB_A0_MF

FB_A0_A<4>

FB_A1_MFFB_A1_ZQ

FB_A1_SEN

FB_A1_WCLK_P<0>FB_A1_DQ<31>

FB_A1_DQ<26>

FB_A1_A<8>

FB_A1_DQ<14>

FB_A1_DBI_L<0>

FB_A1_DQ<29>

FB_A1_DQ<15>

FB_A1_DQ<13>

FB_A1_RAS_L

FB_A1_EDC<3>

FB_A1_EDC<0>


FB_A1_DQ<16>FB_A1_DQ<17>FB_A1_DQ<19>FB_A1_DQ<18>FB_A1_DQ<20>FB_A1_DQ<23>FB_A1_DQ<22>FB_A1_DQ<21>

FB_A1_DQ<12>

FB_A1_DQ<7>


FB_A1_DBI_L<3>

FB_A1_DBI_L<1>

FB_A1_CS_L

FB_A1_ABI_L

FB_A1_DQ<24>


FB_A1_DBI_L<2>

FB_A1_WE_L




FB_A1_A<2>

FB_A1_CKE_L

FB_A1_A<0>

FB_A1_DQ<25>

FB_A1_EDC<2>

FB_RESET_L

FB_A1_WCLK_N<1>FB_A1_WCLK_P<1>

FB_A1_WCLK_N<0>

FB_A1_DQ<27>

FB_A1_A<5>

FB_A1_A<6>

FB_A1_CAS_LFB_A0_CAS_L

FB_A0_DQ<9>


FB_A0_WCLK_P<0>

FB_A0_WE_L

PP1V5_S0GPU_ISNS

FB_A1_VREFC

FB_A1_VREFD2

FB_A0_A<0>

PP1V5_S0GPU_ISNS

FB_A0_CS_L

FB_A0_A<7>

FB_A0_ABI_L

FB_A0_WCLK_P<1>

FB_A0_VREFC

FB_A0_A<8>

FB_A0_DBI_L<2>FB_A0_DBI_L<3>FB_A0_DBI_L<1>FB_A0_DBI_L<0>

FB_A0_DQ<19>


FB_A0_DQ<21>FB_A0_DQ<23>FB_A0_DQ<20>FB_A0_DQ<25>FB_A0_DQ<24>


FB_A0_DQ<8>FB_A0_DQ<7>FB_A0_DQ<6>FB_A0_DQ<5>FB_A0_DQ<4>FB_A0_DQ<3>FB_A0_DQ<2>

FB_A0_DQ<0>

FB_A0_A<3>

PP1V5_S0GPU_ISNS

FB_A0_VREFD2FB_A0_VREFD1

FB_A1_VREFD1

FB_A0_DQ<29>

FB_A0_DQ<10>

FB_A0_A<2>

FB_A0_DQ<31>

FB_A0_DQ<27>

FB_A0_EDC<0>


FB_A0_WCLK_N<0>

FB_A0_WCLK_N<1>

FB_A0_DQ<30>

FB_A0_RAS_L

PP1V5_S0GPU_ISNS

FB_A0_SEN

FB_A0_ZQ

FB_A0_CLK_P

FB_A0_A<1>

FB_A0_CLK_N

PP1V5_S0GPU_ISNS

FB_A1_VREFD1

PP1V5_S0GPU_ISNS

PP1V5_S0GPU_ISNS

FB_A0_CKE_L

FB_A1_VREFD2

FB_A1_EDC<1>

FB_A1_VREFC

PP1V5_S0GPU_ISNS

PP1V5_S0GPU_ISNS

84 OF 132

76 OF 101

76

7 74 75 76 77 100

76

76

7 74 75 76 77 100

76

76

7 74 75 76 77 100

76

7 74 75 76 77 100

76

76 76

7 74 75 76 77 100

7 74 75 76

77 100

76

7 74 75 76 77 100

7 74 75 76 77 100

76 76

7 74 75 76 77 100

7 74 75 76 77 100

IN

BI

WCK01

DQ24

DQ31

NC

DQ14

DBI0*

DQ27

DQ15

DQ13

RAS*

EDC3

EDC0

DQ26

DQ25

DQ23

DQ22

DQ21

DQ20

DQ19

DQ18

DQ17

DQ16

DQ12

DQ7

DQ2

DQ1

DQ0

DBI3*

DBI1*

CS*

CK

ABI*

DQ30

CK*

A8/A7

A9/A1

DBI2*

WE*

BA2/A4

BA3/A3

DQ11

DQ10

DQ9

DQ8

DQ6

DQ5

DQ4

DQ3

BA0/A2

CKE*

A10/A0

DQ28

EDC2

EDC1

RESET*

WCK23*

WCK23

WCK01*

DQ29

BA1/A5

A11/A6

CAS*

SEN

MF

ZQ

(MF=0)

(1 OF 2)

VSSQ

VSS

VREFD

VREFC

VDDQ

VDD

(2 OF 2)

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

NC

NC

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

IN

IN

IN

IN

VSSQ

VSS

VREFD

VREFC

VDDQ

VDD

(2 OF 2)

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

NC

NC

WCK01

DQ24

DQ31

NC

DQ14

DBI0*

DQ27

DQ15

DQ13

RAS*

EDC3

EDC0

DQ26

DQ25

DQ23

DQ22

DQ21

DQ20

DQ19

DQ18

DQ17

DQ16

DQ12

DQ7

DQ2

DQ1

DQ0

DBI3*

DBI1*

CS*

CK

ABI*

DQ30

CK*

A8/A7

A9/A1

DBI2*

WE*

BA2/A4

BA3/A3

DQ11

DQ10

DQ9

DQ8

DQ6

DQ5

DQ4

DQ3

BA0/A2

CKE*

A10/A0

DQ28

EDC2

EDC1

RESET*

WCK23*

WCK23

WCK01*

DQ29

BA1/A5

A11/A6

CAS*

SEN

MF

ZQ

(MF=0)

(1 OF 2)




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1


(NONE)

Page Notes

- =PP1V5R1V35_S0_FB_VDD

(NONE)



10%

402

1UF

CERM-X5R6.3V

C85841

2402

1%2.37K1/16WMF-LF

R85841

2

10%1UF

CERM-X5R6.3V

402

C85851

2402

1/16WMF-LF

1%5.49KR85851

2

6 75 97

6 75 97

402

6.3VCERM-X5R

1UF10%

C85331

2

402CERM-X5R6.3V

1UF10%

C85071

2402CERM-X5R6.3V10%1UFC85061

2

402

4.7UF20%6.3VX5R

C85001

2 X5R6.3V20%4.7UF

402

C85011

2 X5R6.3V20%4.7UF

402

C85021

2

X5R6.3V20%4.7UF

402

C85051

2X5R6.3V20%4.7UF

402

C85041

2X5R6.3V20%4.7UF

402

C85031

2

402

4.7UF20%6.3VX5R

C85501

2402

4.7UF20%6.3VX5R

C85511

2402

4.7UF20%6.3VX5R

C85521

2

402

4.7UF20%6.3VX5R

C85531

2402

4.7UF20%6.3VX5R

C85541

2402

4.7UF20%6.3VX5R

C85551

2

MF1/20W

1%120

201

R85041

2 201

1201%

1/20WMF

R85031

2

120

201

1%1/20W

MF

R85531

2

120

MF1/20W

1%

201

R85541

2

120

201

1%1/20W

MF

R85501

2

OMIT

BGA32MX32-1.25GHZ-MFL

H5GQ1H24AFR-T2C

U8500

H4

K5

K4

H5

J4

H11

K10

K11

H10

L3

J12

J11

J3

G12

D2

D13

P13

P2

A4

A2

B11

B13

E11

E13

F11

F13

U11

U13

T11

T13

B4

N11

N13

M11

M13

U4

U2

T4

T2

N4

N2

B2

M4

M2

E4

E2

F4

F2

A11

A13

C2

C13

R13

R2

J1

A5

J5

U5

G3

J2

J10

D4

D5

P4

P5

L12

J13

32MX32-1.25GHZ-MFL

OMIT

BGAH5GQ1H24AFR-T2C

U8500

C5

C10

L14

P11

R5

R10

D11

G1

G4

G11

G14

L1

L4

L11

B1

B3

F1

F3

F12

F14

G2

G13

H3

H12

K3

K12

B12

L2

L13

M1

M3

M12

M14

N5

N10

P1

P3

B14

P12

P14

T1

T3

T12

T14

D1

D3

D12

D14

E5

E10

J14

A10

U10

B5

B10

L10

P10

T5

T10

D10

G5

G10

H1

H14

K1

K14

L5

A1

A3

E1

E3

E12

E14

F5

F10

H2

H13

K2

K13

A12

M5

M10

N1

N3

N12

N14

R1

R3

R4

R11

A14

R12

R14

U1

U3

U12

U14

C1

C3

C4

C11

C12

C14

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

75 97

75 97

75 97

6 75 97

6 75 97

6 75 97

6 75 97

75 97

75 97

75 97

75 97

75 76 77 97

201

1201%

1/20WMF

R85001

26 75 97

6 75 97

6 75 97

6 75 97

6 75 97

402

1/16W

60.41%

MF-LF

R85011

2MF-LF402

1/16W1%60.4R85021

2

402CERM-X5R6.3V10%1UFC85081

2402

10%1UF

CERM-X5R6.3V

C85091

2

10%1UF

402

6.3VCERM-X5R

C85101

26.3V

1UF10%

402CERM-X5R

C85111

210%1UF

402

6.3VCERM-X5R

C85121

2402

10%6.3VCERM-X5R

1UFC85131

2

402

6.3V

1UF10%

CERM-X5R

C85141

2402

6.3V

1UF10%

CERM-X5R

C85151

2201

0.1UF10%6.3VX5R

C85161

2201

0.1UF10%6.3VX5R

C85171

2

201

0.1UF10%6.3VX5R

C85181

2201

0.1UF10%6.3VX5R

C85191

2201

0.1UF10%6.3VX5R

C85201

2201

0.1UF10%6.3VX5R

C85211

2

201

0.1UF10%6.3VX5R

C85221

2201

0.1UF10%6.3VX5R

C85231

2201

0.1UF10%6.3VX5R

C85241

2201

0.1UF10%6.3VX5R

C85251

2

402

10%1UF

CERM-X5R6.3V

C85301

2

402

6.3VCERM-X5R

1UF10%

C85311

2

1%

402

2.37K1/16WMF-LF

R85301

2

1%

402

5.49K1/16WMF-LF

R85311

2

402

10%1UF

CERM-X5R6.3V

C85321

2

1%

402

2.37K1/16WMF-LF

R85321

2

1%

402

5.49K1/16WMF-LF

R85331

2

402

10%1UF

CERM-X5R6.3V

C85341

2

402

6.3VCERM-X5R

1UF10%

C85351

2

1%

402

2.37K1/16WMF-LF

R85341

2

1%

402

5.49K1/16WMF-LF

R85351

2

6 75 97

6 75 97

6 75 97

6 75 97

75 97

75 97

75 97

75 97

75 97

402MF-LF1/16W1%60.4R85521

2402MF-LF1/16W1%60.4R85511

2

75 97

75 97

75 76 77 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

32MX32-1.25GHZ-MFL

OMIT

BGAH5GQ1H24AFR-T2C

U8550

C5

C10

L14

P11

R5

R10

D11

G1

G4

G11

G14

L1

L4

L11

B1

B3

F1

F3

F12

F14

G2

G13

H3

H12

K3

K12

B12

L2

L13

M1

M3

M12

M14

N5

N10

P1

P3

B14

P12

P14

T1

T3

T12

T14

D1

D3

D12

D14

E5

E10

J14

A10

U10

B5

B10

L10

P10

T5

T10

D10

G5

G10

H1

H14

K1

K14

L5

A1

A3

E1

E3

E12

E14

F5

F10

H2

H13

K2

K13

A12

M5

M10

N1

N3

N12

N14

R1

R3

R4

R11

A14

R12

R14

U1

U3

U12

U14

C1

C3

C4

C11

C12

C14

402CERM-X5R

10%1UF6.3V

C85591

2

10%

402

6.3V

1UF

CERM-X5R

C85631

2

402CERM-X5R6.3V

1UF10%

C85581

2

10%

402

6.3VCERM-X5R

1UFC85621

2

201

0.1UF10%6.3VX5R

C85671

2201

10%0.1UF6.3VX5R

C85661

2

402CERM-X5R6.3V

1UF10%

C85571

2

402

10%1UF

CERM-X5R6.3V

C85611

2

402CERM-X5R6.3V

1UF10%

C85561

2

10%

402

6.3VCERM-X5R

1UFC85601

2

402

6.3VCERM-X5R

1UF10%

C85651

2402

6.3V

1UF10%

CERM-X5R

C85641

2

201

10%0.1UF6.3VX5R

C85711

2

201

0.1UF10%6.3VX5R

C85751

2

201

10%0.1UF6.3VX5R

C85701

2

201

0.1UF10%6.3VX5R

C85741

2

201

10%0.1UF6.3VX5R

C85691

2

201

0.1UF10%6.3VX5R

C85731

2

201

0.1UF10%6.3VX5R

C85681

2

201

10%0.1UF6.3VX5R

C85721

2

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6 75 97

6.3V

1UF10%

402CERM-X5R

C85801

2MF-LF1/16W1%2.37K

402

R85801

2

402

6.3V10%1UF

CERM-X5R

C85811

2402

1/16WMF-LF

1%5.49KR85811

2

32MX32-1.25GHZ-MFL

OMIT

BGAH5GQ1H24AFR-T2C

U8550

H4

K5

K4

H5

J4

H11

K10

K11

H10

L3

J12

J11

J3

G12

D2

D13

P13

P2

A4

A2

B11

B13

E11

E13

F11

F13

U11

U13

T11

T13

B4

N11

N13

M11

M13

U4

U2

T4

T2

N4

N2

B2

M4

M2

E4

E2

F4

F2

A11

A13

C2

C13

R13

R2

J1

A5

J5

U5

G3

J2

J10

D4

D5

P4

P5

L12

J13

6.3V

402

10%1UF

CERM-X5R

C85821

2MF-LF1/16W

402

1%2.37KR85821

2

1UF6.3V

402

10%

CERM-X5R

C85831

2

1%5.49K

402

1/16WMF-LF

R85831

2

SYNC_MASTER=K92_MLB

GDDR5 Frame Buffer BSYNC_DATE=08/19/2010

FB_B0_ZQFB_B0_MFFB_B0_SEN

PP1V5_S0GPU_ISNS

FB_B0_EDC<0>

FB_B0_WE_L

FB_B0_CLK_N

FB_B0_A<4>

FB_B0_DQ<29>

FB_B0_CLK_P

FB_RESET_L

FB_B1_ZQFB_B1_ZQFB_B1_MFFB_B1_SEN

FB_B0_CAS_L

FB_B0_DQ<15>

FB_B1_ABI_L

FB_B0_DQ<14>


FB_B0_VREFC

FB_B0_VREFD2FB_B0_VREFD1

FB_B0_VREFD2

PP1V5_S0GPU_ISNS

FB_B0_VREFD1

PP1V5_S0GPU_ISNS



FB_B0_VREFC

PP1V5_S0GPU_ISNS


FB_B0_CS_L


FB_B0_A<5>

FB_B0_A<8>

FB_B0_DBI_L<2>FB_B0_DBI_L<3>FB_B0_DBI_L<1>

FB_B0_DQ<17>FB_B0_DQ<18>FB_B0_DQ<20>FB_B0_DQ<21>FB_B0_DQ<19>FB_B0_DQ<22>FB_B0_DQ<23>FB_B0_DQ<24>FB_B0_DQ<27>FB_B0_DQ<26>FB_B0_DQ<25>

FB_B0_DQ<13>

FB_B0_DQ<9>

FB_B0_DQ<4>FB_B0_DQ<3>FB_B0_DQ<2>FB_B0_DQ<1>FB_B0_DQ<0>

FB_B1_VREFC

FB_B1_VREFD2FB_B1_VREFD1

FB_B1_VREFD1

PP1V5_S0GPU_ISNS

FB_B1_EDC<3>


FB_RESET_L



FB_B1_VREFC

PP1V5_S0GPU_ISNS

PP1V5_S0GPU_ISNS

FB_B1_CLK_N

FB_B1_RAS_LFB_B1_CAS_LFB_B1_WE_LFB_B1_CS_L

FB_B1_CKE_LFB_B1_A<6>FB_B1_A<0>FB_B1_A<1>FB_B1_A<7>

FB_B1_A<3>FB_B1_A<4>FB_B1_A<5>FB_B1_A<2>

FB_B1_A<8>

FB_B1_DBI_L<3>FB_B1_DBI_L<2>FB_B1_DBI_L<1>FB_B1_DBI_L<0>

FB_B1_DQ<25>FB_B1_DQ<24>FB_B1_DQ<28>FB_B1_DQ<27>FB_B1_DQ<29>FB_B1_DQ<30>FB_B1_DQ<26>FB_B1_DQ<31>FB_B1_DQ<17>FB_B1_DQ<16>FB_B1_DQ<18>FB_B1_DQ<19>FB_B1_DQ<20>FB_B1_DQ<21>FB_B1_DQ<22>FB_B1_DQ<23>FB_B1_DQ<15>FB_B1_DQ<14>FB_B1_DQ<13>FB_B1_DQ<12>FB_B1_DQ<11>FB_B1_DQ<10>FB_B1_DQ<9>FB_B1_DQ<8>FB_B1_DQ<4>FB_B1_DQ<7>FB_B1_DQ<5>FB_B1_DQ<6>FB_B1_DQ<2>FB_B1_DQ<1>FB_B1_DQ<3>FB_B1_DQ<0>

FB_B1_VREFD2


FB_B1_EDC<2>

FB_B1_CLK_P

FB_B0_DBI_L<0>


FB_B0_DQ<10>

FB_B0_CKE_L

FB_B0_DQ<16>

FB_B0_A<3>

FB_B0_A<2>

PP1V5_S0GPU_ISNS

FB_B0_DQ<8>

FB_B0_DQ<5>

FB_B0_EDC<2>

FB_B0_ABI_L

FB_B0_RAS_L

FB_B0_EDC<1>FB_B0_DQ<28>

FB_B0_EDC<3>


85 OF 132

77 OF 101

7 74 75 76

77 100

77 77

77

77

77

77

7 74 75 76 77 100

77

7 74 75 76 77 100

77

7 74 75 76 77 100

77

77

77

77

7 74 75 76 77 100

77

7 74 75 76 77 100

7 74 75 76 77 100

77

7 74 75 76 77 100 7 74 75 76 77 100

7 74 75 76 77 100

B*

R

R*

G

B

G*

Y/NC

B2/NC

C/NC

B2*/NC

G2*/NC

COMP/NC

G2/NC

R2/NC

VDD1DI

VSS1DI

AVDD

AVSSQ

RSET

VSYNC

R2*/NC

HSYNC

DDC2DATA

AUX2P

AUX1N

DDC2CLK

AUX1P

DDC1DATA

DDC1CLK

A2VSSQ/TSVSSQ

H2SYNC/GENLK_CLK

V2SYNC/GENLK_VSYNC

VDD2DI/NC

A2VDD/NC

VSS2DI/NC

A2VDDQ/NC

R2SET/NC

DDC6DATA

DDC6CLK

AUX2N

DDCCLK_AUX3P

DDCCLK_AUX4P

DDCDATA_AUX3N

DDCCLK_AUX5P

DDCDATA_AUX4N

DDCDATA_AUX5N

DDCCLK_AUX7P

DDCDATA_AUX7N

TX1P_DPA1P

TX0P_DPA2P

TX0M_DPA2N

TXCAP_DPA3P

TXCAM_DPA3N

TX1M_DPA1N

TX1M_DPC1N

TX1P_DPC1P

TX0M_DPC2N

TX0P_DPC2P

TXCCP_DPC3P

TXCCM_DPC3N

TX5M_DPB0N

TX5P_DPB0P

TX4M_DPB1N

TX4P_DPB1P

TX3M_DPB2N

TX3P_DPB2P

TX2M_DPA0N

TX2P_DPA0P

TXCBM_DPB3N

TXCBP_DPB3P

TXCDM_DPD3N

TXCDP_DPD3P

TX2P_DPC0P

TX2M_DPC0N

TX3P_DPD2P

TX4P_DPD1P

TX3M_DPD2N

TX5P_DPD0P

TX4M_DPD1N

TX5M_DPD0N

GPIO_13

GPIO_9_ROMSI

GPIO_8_ROMSO

GPIO_7_BLON

GPIO_11

GPIO_12

GPIO_6

GPIO_2

GPIO_0

GPIO_1

GPIO_14_HPD2

GENERICD

GENERICC

GENERICB

JTAG_TDO

GENERICA

JTAG_TDI

JTAG_TMS

JTAG_TCK

JTAG_TRST*

GPIO_19_CTF

GPIO_18_HPD3

GPIO_16

GENERICE_HPD4

GPIO_23_CLKREQ*

GPIO_17_THERMAL_INT

GPIO_21_BB_EN

GPIO_22_ROMCS*

GPIO_15_PWRCNTL_0

GPIO_20_PWRCNTL_1

GPIO_10_ROMSCK

GPIO_5_AC_BATT

GPIO_4_SMBCLK

GPIO_3_SMBDATA

HPD1

VREFG

DPLL_PVDD

DPLL_PVSS

XTALIN

XTALOUT

XO_IN

XO_IN2

DPLUS

DMINUS

DPLL_VDDC

TS_FDO

TSVDD

TSVSS

TSA/NC

GENERICF_HPD5

GENERICG_HPD6

DVPDATA_3

DVPDATA_2

DVPCNTL_2

DVPCNTL_1

DVPCNTL_0

DVPDATA_0

DVPDATA_1

DVPCLK

DVPDATA_8

DVPDATA_10

DVPDATA_6

DVPDATA_7

DVPDATA_5

DVPDATA_4

DVPDATA_9

DVPDATA_11

DVPDATA_12

DVPDATA_13

DVPDATA_14

DVPDATA_23

DVPDATA_21

DVPDATA_22

DVPDATA_15

DVPDATA_20

DVPDATA_19

DVPCNTL_MVP_1

DVPCNTL_MVP_0

SWAPLOCKB

SWAPLOCKA

SDA

SCL

DVPDATA_16

DVPDATA_17

DVPDATA_18

(2 OF 9)

MULTI GFX

I2C

GPIO

PLL/CLK

THERMAL

DPA

DPB

DPC

DPD

DAC1

DAC2

DDC/AUX

(3 OF 9)

LVTMDP

LVDS CNTL

VARY_BL

DIGON

TXCLK_UP_DPF3P

TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P

TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P

TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P

TXOUT_U2N_DPF0N

TXOUT_U3P

TXOUT_U3N

TXCLK_LP_DPE3P

TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

TXOUT_L3P

TXOUT_L3N

NCNC

NCNC

NCNC

NC

NCNC

NCNC

NCNC

NCNC

NCNC

NC

NC

NC

NC

NCNC

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

NCNC

BI

NCNC

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

NCNC

NCNC

IN

IN

IN

OUT

NC

NC

NCNC

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

NCNC

NCNC

NCNC

NCNC

BI

BI

OUT

NCNC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Straps for audio on DP and HDMI

125mA

20mA

(GND_GPU_DPLL)

(GND_GPU_TSVSS)

75mA

K91FHynix 512M - NOSTUFF R8613, STUFF R8612, NOSTUFF R8611

K92 Hynix 1G - STUFF R8613, NOSTUFF R8612, STUFF R8611

AMD STRAPS FOR IDENTIFYING VRAM VENDOR & SIZE FOR WHISTLER

Page Notes

- =PP1V8_GPU_DPLL

- =PP1V0_GPU_DPLL

- =PP1V0_GPU_TS




(NONE)

- =PP3V3_GPU_I2C

- =PP1V8_GPU_VREFG

(NONE)

NOTE:

VRAM_DVP2(STUFF R8611?)

VRAM_DVP1

NO

NO

NO

NO

YES

NO

NO

NO

YES

NO

YES

YES

NO

NO

YES

NO

K92 Samsung 1G - NOSTUFF R8613, NOSTUFF R8612, STUFF R8611

K91FSamsung 512M - NOSTUFF R8613, NOSTUFF R8612, NOSTUFF R8611

K91FHynix 1G - STUFF R8613, STUFF R8612, NOSTUFF R8611

NO STRAP CHANGES ARE REQUIRED FOR SEYMOUR BASED SYSTEMS

K91FSamsung 1G - STUFF R8613, NOSTUFF R8612, NOSTUFF R8611

YESK91F HYNIX 1G

K91F SAMSUNG 1G

K91F HYNIX 512M

K92 HYNIX 1G

K91F SAMSUNG 512M

K92 SAMSUNG 1G

(STUFF R8612?)(STUFF R8613?)VRAM_DVP0

VRAM BOM OPTION TABLE

YES

AR8

AD32

AU34

AV33

AW35

AW34

AC38

AG32

AC34

AH13

AG31

AC33

AU20

AT19

AU14

AV13

AR30

AT29

AU24

AV23

AT23

AT33

AR22

AU32

AU22

AR32

AV21

AT31

AT21

AV31

AR20

AU30

AT17

AT27

AR16

AR26

AU16

AU26

AV15

AV25

AT15

AT25

AR14

AR24

AF33

AJ33

AJ32

AL31

AK32

AK21

AJ21

AJ26

AK26

AB34

AA29

AC30

AC31

AD37

AD39

AM23

AL24

AM24

AN23

AK23

AC36

AK24

AH15

AJ13

AK17

AJ17

AH17

AJ23

AH23

AN13

AK13

AJ14

AL13

AN16

AM17

AN14

AG30

AK14

AM13

AM14

AM16

AL16

AK16

AJ16

AH18

AH20

AC29

AD29

AH24

AH26

AJ24

AK20

AJ20

AK19

AJ19

AD30

AD31

AD35

AE36

AT7

AU6

AW6

AR6

AU5

AW5

AP6

AP12

AU12

AW12

AR12

AT11

AV11

AP10

AU10

AW10

AR10

AT9

AV9

AN7

AV7

AW8

AP8

AF29

AN31

AN32

AM32

AG29

AK29

AM21

AM29

AM30

AK30

AN21

AL29

AL30

AJ31

AJ30

AL19

AM19

AN26

AM26

AF32

AC32

AF30

AF31

AE38

AF37

AE34

AD34

AN20

AM20

AM27

AL27

AD33

AG33

U8000WHISTLER

FCBGA

OMIT

40NM-ES

AU8

AW3

AU3

AU1

AR1

AR3

AK27

AF35

AG36

AG38

AH37

AH35

AJ36

AJ38

AK37

AN36

AP37

AP35

AR35

AR37

AU39

AW37

AU35

AK35

AL36

AP34

AR34

AJ27U8000

OMIT

40NM-ES

FCBGA

WHISTLER

XW860221

SM

84 97

84 97

84 97

84 97

84 97

84 97

84 97

84 97

79 83

79 83

8 83 97

8 83 97

83

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

79 87

2

1R8600

402

4.7K5%

1/16WMF-LF

2

1R86015%1/16WMF-LF402

4.7K

79 97

79 97

50 98

50 98

470OHM-1A-150MOHM

0603

21

L8600CRITICAL

2

1 C860120%10UF

X5R10V

6032

1 C8602

X5R25V

1UF10%

4022

1 C8603

402-1

10%

X5R16V

0.1UF

2

1R86021%

402

499

MF-LF1/16W

2

1R8603249

1%1/16WMF-LF

402

2

1 C8606

402-1

16VX5R

10%0.1UF

2

1 C8605

402X5R25V10%1UF

470OHM-1A-150MOHM

CRITICAL

21

L8601

0603

2

1 C860420%10UF

X5R10V

603

21

XW8600SM

21

XW8601SM

120OHM-0.3A

CRITICAL

0402

21

L8602

20%10V

2

1 C8607

603

10UF

X5R 2

1 C8608

402

25VX5R

1UF10%

2

1 C8609

402-1

0.1UF10%

X5R16V

2

1C8600

402-1

0.1UF10%

X5R16V

2

1R860510K5%1/16W

402MF-LF

2

1R86045%

MF-LF1/16W

10K

402

2

1R8606

402MF-LF1/16W5%10K

10KR86101

402 2

1/16W5%

MF-LF

NOSTUFF VRAM_DVP2

2

1R8611

MF-LF1/16W

5%10K

402

VRAM_DVP1

MF-LF

10K1/16W

402

5%

R86121

2

VRAM_DVP0

1

2

5%

402MF-LF1/16W

10KR8613

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

83

Whistler LVDS/DP/GPIOSYNC_DATE=12/01/2010SYNC_MASTER=K92_MLB

TP_DVPDATA<17>TP_DVPDATA<18>

TP_DVPCLK

PP1V8_S0GPU_ISNS

DVPDATA<2>

DVPDATA<0>

TP_DVPCNTL<2>

TP_DVPCNTL<0>

TP_DVPDATA<5>

GND_GPU_TSVSS

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.25 mm VOLTAGE=0V

TP_DVPCNTL<1>

TP_DVPCNTL_M<1>

PP3V3_S0GPU

LVDS_EG_DDC_CLKLVDS_EG_DDC_DATA

DP_EG_DDC_DATA


DP_T29SNK0_AUXCH_C_NDP_T29SNK0_AUXCH_C_P


DP_EG_AUXCH_NDP_EG_AUXCH_P

GPU_ROM_SCLK

TP_DVPCNTL_M<0>

GPU_AUD_1GPU_AUD_0

DP_EXTA_ML_C_P<3>

GPU_VREFG

PP1V8_S0GPU_ISNS

GND_GPU_DPLLMIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=0V

GPU_I2C_SDA

GPU_SMB_CLKGPU_SMB_DAT

EG_BKLT_EN

GPU_PCIE_GEN2GPU_GPIO_TX_DEEMPGPU_PCIE_TX_PWR

GPU_I2C_SCL

GPU_CONFIG_2

GPU_VCORE_VID1

LVDS_EG_A_DATA_P<0>

LVDS_EG_A_DATA_N<1>

LVDS_EG_A_DATA_P<2>LVDS_EG_A_DATA_N<2>

GPU_TDIODE_P


MIN_LINE_WIDTH=0.25 mmPP1V8_GPU_TSVDD

SMC_GFX_OVERTEMP_R_L

GPU_CONFIG_0GPU_CONFIG_1

SMC_GFX_THROTTLE_R_LDP_T29SNK1_HPD_GPU

GPU_VCORE_VID2

GPU_AC_BATTGPU_VCORE_VID0

GPU_ROM_SOGPU_ROM_SI

GPU_ROM_CS_L

TP_DVPDATA<8>TP_DVPDATA<7>TP_DVPDATA<6>

PP1V0_GPU_DPLL



PP1V8_GPU_DPLL

VOLTAGE=1.8V

PP1V8_S0GPU_ISNSVOLTAGE=1.8V

PP3V3_S0GPU

NC_LVDS_EG_A_DATA_N<3>NC_LVDS_EG_A_DATA_P<3>

LVDS_EG_A_DATA_P<1>

LVDS_EG_A_DATA_N<0>

LVDS_EG_A_CLK_NLVDS_EG_A_CLK_P

NC_LVDS_EG_B_DATA_N<3>NC_LVDS_EG_B_DATA_P<3>

LVDS_EG_B_DATA_N<2>LVDS_EG_B_DATA_P<2>


LVDS_EG_B_DATA_P<0>

NC_LVDS_EG_B_CLK_NNC_LVDS_EG_B_CLK_P

EG_LCD_PWR_ENLVDS_EG_BLK_PWM

DP_EXTA_ML_C_N<3>

DP_EXTA_ML_C_N<2>DP_EXTA_ML_C_P<2>

NC_GPU_GENERICGNC_GPU_GENERICFNC_GPU_GENERICEDP_CA_DET_EG_RNC_GPU_GENERICCNC_GPU_GENERICBNC_GPU_GENERICA

TP_GPU_JTAG_TDOTP_GPU_JTAG_TMS

TP_GPU_JTAG_TRST_L

FBVDD_ALTVOGPU_VCORE_VID3

TP_GPU_JTAG_TDI

PP1V8_S0GPU_ISNS

TP_DVPDATA<11>



DP_EG_HPD

PP1V8_S0GPU_ISNS

GPU_TDIODE_N

GPU_CLK27M

GPU_CLK100M

TP_DVPDATA<10>

TP_DVPDATA<12>

TP_DVPDATA<19>

TP_DVPDATA<16>

PP1V0_S0GPU_ISNS


TP_DVPDATA<9>

TP_DVPDATA<4>

DP_T29SNK0_HPD_GPU

TP_GPU_JTAG_TCK

MIN_LINE_WIDTH=0.25 mmGND_GPU_TVSSQ


PEX_CLKREQ_L_R

TP_DVPDATA<15>




DP_EG_DDC_CLK

LVDS_EG_B_DATA_N<0>

DP_T29SNK0_ML_C_N<1>DP_T29SNK0_ML_C_P<1>


DP_T29SNK0_ML_C_N<2>DP_T29SNK0_ML_C_P<2>


DP_T29SNK0_ML_C_P<0>DP_T29SNK0_ML_C_N<0>





DVPDATA<1>

DVPDATA<3>

86 OF 132

78 OF 101

7 74 78 80 100

6 7 71 74 78 79 81 83

79

7 74 78 80 100

79

79

79 87

79

79

79

79

79 81

79

79

79

79

79

79 81

79

79 81

79

79

79

7 74 78 80

100

6 7 71 74 78 79 81 83

79 97

79 97

79 97

79 97

79

79

79

79

79

79

79

79

79

79

79

79

79 86

79 81

79

7 74 78 80 100

79 83

7 74 78 80

100

7 73 74 80

100

79

79

79

IN

IN

BI

BIOUT

IN

OUT

OUT

OUT

THM

VDD2

VDD1

XOUT

SSCLK

REFCLK

SSEL0

SSEL1

VSS2

VSS1

XIN/CLKIN

PAD

OUT

OUT

OUT

HOLD*

S*

D

C

Q

THRM

W*

VCC

PADVSS

IN

Y

A

B 08

Y

A

B 08




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Unused signalsT29 HPD GPU isolation

GP

GP

GP

GP

GP

GP

ISOLATION R’s for GPU Int Temp Sense

Native Func

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GP

GPIOs

GP

GPIOsNative Func

GP

GPU Reference Clocks

Config Straps

2

1R8705NOSTUFF

10K1/16W

1%

MF-LF402

2

1R87525%

MF-LF1/16W

402

4.7K

2

1R8753

MF-LF1/16W

5%

402

4.7K

78 83

8 17 83

78 83

8 17 83

21R87985% 402MF-LF

01/16W

21R8799MF-LF1/16W5%

0402

44

44

2

1R8797

1/16W

402

5%2.2K

MF-LF

2

1

2.2K

MF-LF402

5%1/16W

R8796NO STUFF

78 87

78 79 87

78 79 86

R8792

2

1

402MF-LF

5%1/16W

10K

2

1R8793

1/16W

10K

MF-LF402

5%

2

1R8794

402

10K5%

MF-LF1/16W

2

1R8750

1/16W5%

MF-LF402

2.2K

NO STUFF

2

1R8751NO STUFF

5%1/16WMF-LF

2.2K

402

31

42

27MHZ-15PPM-18PFSM-2.5X2.0MM

CRITICAL

Y8700

2

1C8700

402

50VCERM

30PF5%

2

1 C8701

402

50VCERM

30PF5%

2

1 C8702

X5R16V

0.1UF10%

402-12

1C870310%

X5R16V

402-1

0.1UF

21

0402

120OHM-0.3AL8702

21

0402

L8703120OHM-0.3A

10

1

26

84

11

3

7

5

9

U8700TDFN

SL16010DC

CRITICAL

78 97

78 97 21

R8731

5%

MF-LF

0

1/16W

402

R873021

5%

0

MF-LF402

1/16W

8 87 21R8795 05% 1/16W MF-LF 402

2

1R8704NOSTUFF

1%

402MF-LF1/16W

10K

2

1R8703

402

10K

NOSTUFF

1%

MF-LF1/16W

2

1NOSTUFF

402

R870010K1%

1/16WMF-LF

2

1R8702

MF-LF402

1/16W1%

10K

2

1R8701

MF-LF

NOSTUFF

1%

402

1/16W

10K

2

1R870810K

1/16WMF-LF

402

NOSTUFF

1%

2

1

10K1%

402

R8707

MF-LF

NOSTUFF

1/16W

2

NOSTUFF

1%10K

1

MF-LF1/16W

R8706

402

1R871110K1%

402

1/16W

2MF-LF

NOSTUFF

2

1

1%

MF-LF1/16W

402

10KR8710

2

1R870910K1%

402MF-LF1/16W

NOSTUFF

2

1

1/16WMF-LF

402

1%10K

R8714NOSTUFF

2

R871310K

1/16WMF-LF

402

1%

NOSTUFF1

2402MF-LF

1%10K

R8712

GPU_ROM:YES1

1/16W

3

4

8

9

1

2

7

5

6

OMIT_TABLE

UFDFPN8

U8701M25P10A

CRITICAL

33

5%1/16W

402

21

R8726

GPU_ROM:YES

MF-LF

1

R8723

402

1/16W5%

MF-LFGPU_ROM:YES

332

21

R8724

402

33

1/16WMF-LF

5%GPU_ROM:YES

21

R8725

5%

402

33

1/16WMF-LF

GPU_ROM:YES

2

1 C872120%

402CERM

0.1UF

GPU_ROM:YES

10V

2

1

1/16W

402MF-LF

5%0

GPU_ROM:YES

R8721

2

1R8722

MF-LF

NO STUFF

5%1/16W

0

402

GPU_ROM:YES

MF-LF1/16W

10K5%

402

R87201

2

87 21R8791402MF-LF1/16W5%

0

1 2

1/16WMF-LF

5%

0

402

R8781

NOSTUFF

NOSTUFF

1/16W

21

R8780

MF-LF

5%

0

402

CERM10V

1

402220%0.1UFC8741

U8741

74LVC2G08GT1 SOT833

4

8

2

7

CRITICAL

6U8741

74LVC2G08GT

3

58

4

SOT833

4022

1

05%1/16WMF-LF

R8741


Whistler GPIOs & STRAPs

PP3V3_S0GPU

EG_BKLT_EN

MAKE_BASE=TRUEDP_T29SNK0_HPD_GPU

GPU_CONFIG_1

DP_T29SNK0_HPD_GPU

GPU_ROM_SO

GPU_ROM_SI

DP_IG_DDC_DATA

GPU_PCIE_TX_PWR

GPU_GPIO_TX_DEEMPMAKE_BASE=TRUE

GPU_CONFIG_0MAKE_BASE=TRUEGPU_CONFIG_1MAKE_BASE=TRUE

NC_GPU_GENERICG

NC_GPU_GENERICF


DP_T29SNK1_HPD_GPUTP_GPU_JTAG_TRST_LMAKE_BASE=TRUE

SMBUS_SMC_0_S0_SDA

TP_GPU_JTAG_TDIMAKE_BASE=TRUETP_GPU_JTAG_TDI

DP_T29SNK1_HPD_GPU

NC_LVDS_EG_B_CLK_N

GPU_OSC_27M_XTALIN

DP_T29SNK0_HPD_GPU

GPU_ROM_SO

PP3V3_S0GPU

GPU_ROM_SCLKMAKE_BASE=TRUE

GPU_PCIE_TX_PWRMAKE_BASE=TRUE

SMC_GFX_THROTTLE_R_L

MAKE_BASE=TRUEGPU_ROM_SO

GPU_ROM_CS_LPP3V3_GPU_VDD33_R

NC_GPU_GENERICC

PP3V3_S0

MAKE_BASE=TRUE NO_TEST=TRUENC_GPU_GENERICF

NC_GPU_GENERICB

MAKE_BASE=TRUEDP_EG_HPD

PP3V3_S0GPU

NC_GPU_GENERICCNO_TEST=TRUEMAKE_BASE=TRUE

NO_TEST=TRUENC_GPU_GENERICB

MAKE_BASE=TRUE

DP_CA_DET_EG_R

NC_GPU_GENERICE NC_GPU_GENERICENO_TEST=TRUEMAKE_BASE=TRUE

MAKE_BASE=TRUE NO_TEST=TRUENC_GPU_GENERICG

GPU_PCIE_GEN2MAKE_BASE=TRUE

GPU_CONFIG_0

GPU_ROM_SO

GPU_SMB_DATGPU_ROM_CS_L_R

GPU_OSC_27M_XTALOUT

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.25 mmPP3V3_GPU_OSC_27M

MAKE_BASE=TRUE NO_TEST=TRUENC_LVDS_EG_B_CLK_N

GPU_ROM_CS_L

GPU_ROM_SI_R

PP3V3_S0

GPU_GPIO_TX_DEEMP

GPU_ROM_WP_L

MAKE_BASE=TRUENC_LVDS_EG_B_DATA_N<3>

NO_TEST=TRUE

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.25 mmPP3V3_GPU_OSC_100M

TP_GPU_JTAG_TCKMAKE_BASE=TRUE

TP_GPU_JTAG_TDOMAKE_BASE=TRUETP_GPU_JTAG_TMSMAKE_BASE=TRUE

MAKE_BASE=TRUE NO_TEST=TRUENC_LVDS_EG_B_CLK_P

MAKE_BASE=TRUENC_LVDS_EG_A_DATA_P<3>

NO_TEST=TRUE

MAKE_BASE=TRUENC_LVDS_EG_B_DATA_P<3>

NO_TEST=TRUE

GPU_ROM_SO_R

GPU_ROM_SCLK_RGPU_ROM_SCLK

GPU_ROM_SI

GPU_CONFIG_2

GPU_CONFIG_1

NC_LVDS_EG_B_CLK_P

TP_GPU_JTAG_TDO

SMC_GFX_OVERTEMP_L

EG_BKLT_EN

SMC_GFX_THROTTLE_LSMC_GFX_THROTTLE_R_L

FBVDD_ALTVO

GPU_CLK27M

GPU_CLK100M_R

GPU_CLK27M_R

GPU_CLK100M

EG_LCD_PWR_EN

PP3V3_S0GPU

TP_GPU_JTAG_TCK

TP_GPU_JTAG_TMS

TP_GPU_JTAG_TRST_L

NC_LVDS_EG_A_DATA_P<3>

NC_LVDS_EG_B_DATA_P<3>

NC_LVDS_EG_A_DATA_N<3>

NC_LVDS_EG_B_DATA_N<3>


PEX_CLKREQ_L_R PEX_CLKREQ_L

DP_CA_DET_EG_R DP_CA_DET_EG

GPU_PCIE_TX_PWR

GPU_CONFIG_0

PEX_CLKREQ_L_R

GPU_ROM_SCLK

DP_EG_DDC_CLK

DP_EG_DDC_DATA

DP_IG_DDC_CLK

PP3V3_S0GPU

FBVDD_ALTVO

GPU_CONFIG_2

GPU_SMB_DAT

GPU_SMB_CLK SMBUS_SMC_0_S0_SCL

GPU_SMB_CLKMAKE_BASE=TRUE

NC_LVDS_EG_A_DATA_N<3>MAKE_BASE=TRUE NO_TEST=TRUE

DP_EG_HPD

DP_CA_DET_EG_RMAKE_BASE=TRUE

NC_GPU_GENERICANO_TEST=TRUEMAKE_BASE=TRUE

PEX_CLKREQ_L_R

MAKE_BASE=TRUEGPU_ROM_SI

GPU_AC_BATT

GPU_VCORE_VID0

GPU_ROM_SI

MAKE_BASE=TRUEGPU_VCORE_VID1GPU_VCORE_VID1

GPU_ROM_SCLK

MAKE_BASE=TRUEGPU_CONFIG_2

EG_BKLT_EN

GPU_PCIE_GEN2

MAKE_BASE=TRUEGPU_VCORE_VID0

GPU_SMB_DATMAKE_BASE=TRUE MAKE_BASE=TRUE

SMC_GFX_OVERTEMP_R_LDP_T29SNK0_HPD

PEX_CLKREQ_L_RMAKE_BASE=TRUE

MAKE_BASE=TRUEGPU_ROM_CS_L

FBVDD_ALTVOMAKE_BASE=TRUE

GPU_VCORE_VID3MAKE_BASE=TRUE

PP3V3_S0MAKE_BASE=TRUEGPU_VCORE_VID2

FBVDD_ALTVO

DP_T29SNK1_HPD

MAKE_BASE=TRUEDP_T29SNK1_HPD_GPUMAKE_BASE=TRUESMC_GFX_THROTTLE_R_L

GPU_VCORE_VID3

GPU_VCORE_VID2

PP3V3_S0GPU

NC_GPU_GENERICAMAKE_BASE=TRUEEG_BKLT_EN

GPU_AC_BATTMAKE_BASE=TRUE

GPU_SMB_CLK

GPU_SMB_DAT

GPU_PCIE_GEN2

GPU_GPIO_TX_DEEMP

GPU_AC_BATT

GPU_SMB_CLK

87 OF 132

79 OF 101

6 7 71 74 78 79 81 83

78 79 87

78 79

78 79

78 79

78 79

78 79

78 79

78 79

78 79

78 79

78 79

78 79

78 79

78 79

78 79

6 31 44 47 50 96

78 79 78 79

78 79

78 79 78 79

78 79

6 7 71 74 78 79 81 83

78 79

78 79

78 79

78 79

78 79

78 79

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

78 79

78 79

78 79 83

6 7 71 74 78 79 81 83

78 79

78 79

78 79

78 79 78 79

78 79

78 79

78 79

78 79

78 79

78 79

78 79

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89

98

78 79

78 79 97

78 79

78 79

78 79

78 79

78 79 97

78 79 97

78 79

78 79

78 79

78 79

78 79

78 79

78 79

6 7 71 74 78 79 81 83

78 79

78 79

78 79

78 79

97

78 79

97

78 79

97

78 79

97

78 79

78 79

78 79

78 79

78 79

78 79

78 79

6 7 71 74 78 79 81 83

78 79 86

78 79

78 79

78 79 6 31 44 47 50 96

78 79

78 79 97

78 79 83

78 79

78 79

78 79

78 79

78 79

78 79 81

78 79

78 79 81 78 79 81

78 79

78 79

78 79 87

78 79

78 79 81

78 79 78 79

33 83

78 79

78 79

78 79 86

78 79 81

6 7 12 16 17 18 19 20 22 23 25 26 28 32

35 36 39 40 41 45 47 48

49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89

98

78 79 81

78 79 86

33 83

78 79

78 79

78 79 81

78 79 81

6 7 71 74 78 79 81 83

78 79

78 79 87

78 79

78 79

78 79

78 79

78 79

78 79

78 79

DPEF_CALR

DP/DPF_VSSR_AM34

DP/DPF_VSSR_AL34

DP/DPF_VSSR_AK39

DPEF/DPF_VDD18_AF34

DP/DPE_VSSR_AU37

DP/DPE_VSSR_AR39

DPEF/DPF_VDD18_AG34

DPEF/DPF_VDD10_AK33

DPEF/DPF_VDD10_AK34

DP/DPF_VSSR_AF39

DP/DPF_VSSR_AH39

DPCD_CALR

DPEF/DPE_VDD10_AM33

DP/DPE_VSSR_AN34

DP/DPE_VSSR_AP39

DP/DPD_VSSR_AW22

DPCD/DPD_VDD10_AP14

DPCD/DPD_VDD18_AP23

DP/DPD_VSSR_AN19

DP/DPD_VSSR_AP19

DPCD/DPC_VDD18_AP21

DPCD/DPC_VDD10_AP13

DPCD/DPC_VDD18_AP20

DPEF/DPE_VDD10_AL33

DPEF/DPE_VDD18_AJ34

DPEF/DPE_VDD18_AH34

DP/DPD_VSSR_AW20

DP/DPD_VSSR_AP18

DP/DPC_VSSR_AW16

DP/DPC_VSSR_AN17

DP/DPC_VSSR_AP16

DP/DPC_VSSR_AP17

DPCD/DPC_VDD10_AT13

DPCD/DPD_VDD10_AP15

DPAB/DPA_VDD18_AN24

DPAB/DPA_VDD18_AP24

DPAB/DPA_VDD10_AP31

DPAB/DPA_VDD10_AP32

DP/DPA_VSSR_AN27

DP/DPA_VSSR_AP27

DP/DPA_VSSR_AW26

DP/DPA_VSSR_AW24

DP/DPA_VSSR_AP28

DPAB/DPB_VDD18_AP25

DPAB/DPB_VDD18_AP26

DPAB/DPB_VDD10_AN33

DPAB/DPB_VDD10_AP33

DP/DPB_VSSR_AP29

DP/DPB_VSSR_AN29

DP/DPB_VSSR_AP30

DP/DPB_VSSR_AW30

DPAB_CALR

DP/DPB_VSSR_AW32

DPAB_VDD18/DPA_PVDD_AU28

DP_VSSR/DPA_PVSS_AV27

DPAB_VDD18/DPB_PVDD_AV29

DP_VSSR/DPB_PVSS_AR28

DPCD_VDD18/DPC_PVDD_AU18

DP_VSSR/DPC_PVSS_AV17

DPEF_VDD18/DPE_PVDD_AM37

DP_VSSR/DPE_PVSS_AN38

DPEF_VDD18/DPF_PVDD_AL38

DPCD/DPD_VDD18_AP22

DP_VSSR/DPF_PVSS_AM35

DPCD_VDD18/DPD_PVDD_AV19

DP_VSSR/DPD_PVSS_AR18

DP/DPC_VSSR_AW14

DP C/D PWR

DP A/B PWR

(6 OF 9)

DP OLL POWER

DP E/F PWR

GND_AF18

GND_AF16

GND_AF10

GND_AD27

GND_AD24

GND_AD22

GND_AD20

GND_AC28

GND_AD15

GND_AD17

GND_AC26

GND_AC23

GND_AC21

GND_AC18

GND_AC16

GND_AB24

GND_AA18

GND_AA16

GND_AA2

GND_A37

GND_A3

GND_AA6

GND_AC2

GND_AD9

GND_AE2

GND_AE6

PCIE_VSS_E39

PCIE_VSS_F34

PCIE_VSS_F39

PCIE_VSS_G34

PCIE_VSS_H31

PCIE_VSS_H34

PCIE_VSS_H39

PCIE_VSS_J31

PCIE_VSS_N34

PCIE_VSS_N31

PCIE_VSS_M39

PCIE_VSS_J34

PCIE_VSS_K31

PCIE_VSS_K34

PCIE_VSS_K39

PCIE_VSS_L31

PCIE_VSS_L34

PCIE_VSS_M34

PCIE_VSS_V34

PCIE_VSS_U34

PCIE_VSS_U31

PCIE_VSS_T39

PCIE_VSS_T34

PCIE_VSS_T31

PCIE_VSS_P31

PCIE_VSS_V39

VSS_MECH_AW39

VSS_MECH_AW1

VSS_MECH_A39

PCIE_VSS_Y39

PCIE_VSS_Y34

PCIE_VSS_W34

PCIE_VSS_W31

PCIE_VSS_R34

PCIE_VSS_P34

PCIE_VSS_P39

GND_AC13

GND_AC11

GND_AC6

GND_AB27

GND_AB22

GND_AB20

GND_AB17

GND_AB15

GND_AA26

GND_AA28

GND_AB12

PCIE_VSS_AB39

PCIE_VSS_G33

GND_AA21

GND_AA23

(8 OF 9)

GND_U17

GND_U20

GND_U22

GND_U15

GND_U24

GND_V21

GND_V18

GND_V16

GND_V11

GND_U27

NC/GND

GND/PX_EN

GND_Y27

GND_Y24

GND_Y22

GND_Y17

GND_Y20

GND_H9

GND_G6

GND_G2

GND_F33

GND_F31

GND_J2

GND_J6

GND_M17

GND_K7

GND_L6

GND_L17

GND_L11

GND_L24

GND_L22

GND_M22

GND_M24

GND_N6

GND_N21

GND_N2

GND_N18

GND_N16

GND_N23

GND_N26

GND_R2

GND_R6

GND_T18

GND_T13

GND_T16

GND_R15

GND_R17

GND_R27

GND_R24

GND_R22

GND_R20

GND_T11

GND_U6

GND_T26

GND_U2

NC/GND

GND_T23

GND_T21

GND_AG2

GND_AG6

GND_AG9

GND_AJ2

GND_AJ6

GND_AF21

GND_AG17

GND_AG20

GND_AG22

GND_AH21

GND_AK7

GND_AL8

GND_AL6

GND_AL2

GND_AL11

GND_AJ10

GND_AJ11

GND_AJ28

GND_AK11

GND_AK31

GND_AM9

GND_AL32

GND_AL26

GND_AL23

GND_AL20

GND_AL17

GND_AL14

GND_AM11

GND_AM31

GND_AN11

GND_AN30

GND_AP11

GND_AR5

GND_AP9

GND_AN8

GND_AP7

GND_AN6

GND_AN2

GND_B7

GND_B23

GND_B25

GND_B27

GND_B13

GND_B15

GND_B17

GND_B19

GND_B21

GND_B11

GND_B9

GND_F11

GND_F7

GND_F9

GND_B33

GND_C1

GND_C39

GND_E35

GND_E5

GND_B29

GND_B31

GND_F29

GND_F27

GND_F17

GND_F19

GND_F21

GND_F23

GND_F25

GND_F13

GND_F15

GND_V23

GND_W6

GND_Y15

GND_W2

GND_V26

GND_L2

GND_K14

GND_J8

GND_J27

(9 OF 9)

NC




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

220mA300mA



Page Notes

- =PP1V0_GPU_DP_CD

- =PP1V0_GPU_DP_AB

- =PP1V8_GPU_DP_EF

- =PP1V8_GPU_DP_CD

- =PP1V0_GPU_DP_EF


(NONE)

- =PP1V8_GPU_DP_AB

(NONE)

300mA220mA

220mA300mA

WHISTLERFCBGA

OMIT

40NM-ES

U8000

AF39

AH39

AK39

AL34

AM34

AM35

AN17

AN19

AN27

AN29

AN34

AN38

AP16

AP17

AP18

AP19

AP27

AP28

AP29

AP30

AP39

AR18

AR28

AR39

AU37

AV17

AV27

AW14

AW16

AW20

AW22

AW24

AW26

AW30

AW32

AW28

AN33

AP31

AP32

AP33

AN24

AP24

AP25

AP26

AU28

AV29

AW18

AP13

AP14

AP15

AT13

AP20

AP21

AP22

AP23

AU18

AV19

AM39

AK33

AK34

AL33

AM33

AF34

AG34

AH34

AJ34

AL38

AM37

20%10UF

X5R10V

603

C88001

2

470OHM-1A-150MOHM

0603

L8800

1 2

X5R25V

1UF10%

402

C88011

2

0.1UF

402-1

10%

X5R16V

C88021

2

0.1UF16V10%

X5R402-1

C88051

2402

10%1UF25VX5R

C88041

2603

10VX5R

20%10UFC88031

2

470OHM-1A-150MOHM

0603

L8801

1 2

FCBGA

OMIT

WHISTLER

40NM-ES

U8000

A3

A37

AA16

AA18

AA2

AA21

AA23

AA26

AA28

AA6

AB12

AB15

AB17

AB20

AB22

AB24

AB27

AC11

AC13

AC16

AC18

AC2

AC21

AC23

AC26

AC28

AC6

AD15

AD17

AD20

AD22

AD24

AD27

AD9

AE2

AE6

AF10

AF16

AF18

AB39

E39

F34

F39

G33

G34

H31

H34

H39

J31

J34

K31

K34

K39

L31

L34

M34

M39

N31

N34

P31

P34

P39

R34

T31

T34

T39

U31

U34

V34

V39

W31

W34

Y34

Y39

A39

AW1

AW39

0.1UF16VX5R

10%

402-1

C88081

2402

10%1UF25VX5R

C88071

2603

10VX5R

10UF20%

C88061

2

470OHM-1A-150MOHM

0603

L8802

1 2

16VX5R

10%0.1UF

402-1

C88111

2402

10%1UF25VX5R

C88101

2603

10VX5R

10UF20%

C88091

2

470OHM-1A-150MOHM

0603

L8803

1 2

FCBGA

OMIT

40NM-ES

WHISTLER

U8000AF21

AG17

AG2

AG20

AG22

AG6

AG9

AH21

AJ10

AJ11

AJ2

AJ28

AJ6

AK11

AK31

AK7

AL11

AL14

AL17

AL2

AL20

AL23

AL26

AL32

AL6

AL8

AM11

AM31

AM9

AN11

AN2

AN30

AN6

AN8

AP11

AP7

AP9

AR5

B11

B13

B15

B17

B19

B21

B23

B25

B27

B29

B31

B33

B7

B9

C1

C39

E35

E5

F11

F13

F15

F17

F19

F21

F23

F25

F27

F29

F31

F33

F7

F9

G2

G6

H9

J2

J27

J6

J8

K14

K7

L11

L17

L2

L22

L24

L6

M17

M22

M24

N16

N18

N2

N21

N23

N26

N6

R15

R17

R2

R20

R22

R24

R27

R6

T11

T13

T16

T18

T21

T23

T26

U15

U17

U2

U20

U22

U24

U27

U6

V11

V16

V18

V21

V23

V26

W2

W6

Y15

Y17

Y20

Y22

Y24

Y27

U13

V13

AL21

402

1%1/16W

150

MF-LF

R88011 2

402MF-LF1/16W

150

1%

R88001 2

402

1%1/16W

150

MF-LF

R88021 2

402-1X5R16V10%0.1UFC88171

2X5R25V

1UF10%

402

C88161

2

10UF20%

X5R10V

603

C88151

2

0603


1 2

16VX5R

10%

402-1

0.1UFC88141

2402

10%1UF25VX5R

C88131

2603

10VX5R

10UF20%

C88121

2

0603


1 2

SYNC_DATE=06/15/2010SYNC_MASTER=K92_SUMA

Whistler DP PWR/GNDs

PP1V8_GPU_DP_CDMIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=1.8V

PP1V0_GPU_DP_CD

MIN_NECK_WIDTH=0.2 mmVOLTAGE=1V




PP1V0_GPU_DP_AB

VOLTAGE=1.8VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmPP1V8_GPU_DP_AB

VOLTAGE=1.8VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmPP1V8_GPU_DP_EF



PP1V0_GPU_DP_EF



GPU_DP_EF_CALR

GPU_DP_CD_CALR

PP1V8_GPU_DP_CD

PP1V8_GPU_DP_EF

PP1V8_GPU_DP_EF

PP1V8_GPU_DP_CD

PP1V8_GPU_DP_AB

PP1V8_GPU_DP_AB

GPU_DP_AB_CALR

PP1V0_GPU_DP_EF

PP1V8_GPU_DP_EF

PP1V0_GPU_DP_EF

PP1V8_GPU_DP_EF

PP1V0_GPU_DP_CD

PP1V8_GPU_DP_CD

PP1V0_GPU_DP_CD

PP1V8_GPU_DP_CD

PP1V0_GPU_DP_AB

PP1V8_GPU_DP_AB

PP1V0_GPU_DP_AB

PP1V8_GPU_DP_AB

PP1V8_S0GPU_ISNS PP1V0_S0GPU_ISNS

88 OF 132

80 OF 101

80 80

80 80

80 80

7 74 78 80 100

7 73 74 78 80 100

7 73 74 78 80 100 7 74 78 80 100

80

80

80

80

80

80

80

80

80

80

80

80

80

80

80

80

80

80

7 74 78 80 100

7 73 74 78 80 100

PVCC

THRM_PAD

FDE

PGOOD

AF_EN

VR_ON

IMON

VID4

VID3

VID2

VID1

VID0

LGATE

PGND

PHASE

UGATE

BOOT

VSS

VIN

ISP

VO

ISN

ICOMP

RTN

VSEN

VDIFF

FB

COMP

VW

OCSET

SOFT

VDD

RBIAS

OUT

IN

IN

IN

IN

OUT

G

D

S

IN

G

D

S




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

TABLE_BOMGROUP_ITEM


VIMON = 31 x Io x Rsns x (1 + Ris2/Ris1)

VIMON = 31x Io x 1mOhm x 2.074 = Io x 64.29 mV/AVIMON = 31 x Io x R8940 x (1+ R8902/R8901)In K9x, the equation will be:

K91F Default Vcore Setpoints

(GFXIMVP6_AGND)

(PPVCORE_GPU_REG)

353S2289

0001

11

Vout = 0.75V - 0.90V

0.82400V

0.90125V

0.74675V01

K18

K18

K18

GPU VCore Regulator

30A max output

-

Max perfBalanced

-

-

Max Batt

-

1

VID1 VID0VID3VID4

1

10 1

0

1 -

VoltageVID2

(L8920 limit)

GPU VCore Setpoints not up-to-date!

GPU VCore Setpoints

402

1%

MF-LF1/16W

150R89511

2

1/16W

402

1%

MF-LF

150KR89501

2

402


20

MF-LF

5%1/16W

R89081 2


1/16W5%

402MF-LF

20R89201 2

10K

MF-LF402

5%1/16W

R89071

2MF-LF1/16W

10K

402

5%

R89101

2

402

10%

CERM25V

0.0068UFC89511 2

MF-LF

1%1/16W

402

3.01KR89531

2

330PF10%

CERM50V

402

C89521

2

50V

330PF

10%

402CERM

C895012

50VCERM402

10%0.001UFC89201

2

CRITICAL

QFN

ISL6263C

U8900

30

17

5

6

32

10

28

11

13

21

3

20

31

19

22

1

2

33

18

16

7

23

24

25

26

27

14

12

29

8

15

4

9


SMXW89001 2

402

50V10%

CERM

680pFC89531

2

1%

MF-LF1/16W

402

7.15KR89091

2

50V10%

402X7R

0.001UFC89221

2

402

50V10%0.001UF

CERM

C89231

2

8 73 86 87 89

0.001UF50V10%

402CERM

1

2

C8921

10

1/16W1%

MF-LF402

R89041 2

1/16W1%

402MF-LF

150KR89052 1

0.033UF

16V10%

402X5R

C890412

X5R10V10%

402

1uFC89011

2

1

5%

402

1/16WMF-LF

R89111 2

X5R-CERM402

20%2.2UF

10V

C8902 1

2 CERM402

0.01uF16V10%

C89031

2

10%

CERM50V

1

2402

0.001UFC89725%

68PF

50V

402-1CERM

1 2

C8971MF-LF402

1/16W

1

2

1%9.76K

R8902

1/16W

9.09K1%

MF-LF

R89011

2402

X7R603

0.22UF10%16V

C8956 1

2

CRITICAL

10UF6.3V20%

603X5R

C89651

2

CRITICAL

10UF6.3V20%

603X5R

C8966 1

2

2 POLY-TANT2.0V

330UFC894320%

D2T-SM2

CRITICAL1

3

402

1/16W5%1K

MF-LF

R89301

2

POLY-TANTD3L

68UF16V20%

CRITICALC8930 1

225V10%

603-1X5R

1UFC89321

2

603-1

25V10%

X5R

1UFC8933 1

2

MF-LF402

1%1/16W

1K

1

2

R8903

5%

402COG

330PF50V

C8906 1

2

2.0V20%

POLY-TANT

330UF

CRITICAL

D2T-SM2

C8942 1

2 3

CRITICAL

6.3V

603X5R

20%10UF

C8968 1

2

10%4.7UF

X5R-CERM6.3V

603

C89671

2

0

1/16WMF-LF402

5%

R89941 2

GPUVID2_0

1/16W5%

402MF-LF

2.2KR89831

2

1/16W

GPUVID2_1

5%2.2K

402MF-LF

R89821

2

GPUVID1_1

2.2K

402

5%1/16WMF-LF

R89841

2

GPUVID1_0

402MF-LF

2.2K5%

1/16W

R89851

2

78 79

MF-LF1/16W5%

402

0R89901 278 79

87 89

10%

402

50VX7R

0.001UFC89341

2

X7R

0.001UF50V10%

402

C8969 1

2

GPUVID0_1

402MF-LF

5%2.2K1/16W

R89871

2

1001%

1/16WMF-LF

402

R89241

2

MF-LF

1001%

1/16W

402

R8925

12

78 79

0

402MF-LF1/16W5%

R89981 2

402

0

1/16WMF-LF

5%

R899321

2.2K

GPUVID4_1

1/16WMF-LF

5%

402

R89911

2

GPUVID4_0

5%2.2K

402MF-LF

1

2

R8992

1/16W

2.2K

402

5%1/16WMF-LF

GPUVID0_0R89881

2

48

CRITICAL

1%0.001

1WMF-10612

R8940

12

34

1/16W

402

7.32K

1%

1 2

R8900

MF-LF

CRITICAL

0.56UH-31A

FDU1040D-SM

L8920

1 2

CRITICAL

RJK0365DPA-02WPAK

Q8950

5

4

1 2 3


CRITICAL

20%16V

68UFC89311

2

78 79

MF-LF402

GPUVID3_1

1/16W5%

2.2KR89951

2

GPUVID3_0

402

1/16W5%

2.2KR89961

2MF-LF

CRITICAL

RJK0208DPAWPAK

Q8951

5

4

1 2 3

GPUVID4_0,GPUVID3_0,GPUVID2_1,GPUVID1_1,GPUVID0_1GPUVID_1P11V


GPU (Whistler) CORE SUPPLY

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MMGFXIMVP6_VIN

PP5V_S3

PPVCORE_GPU

PP3V3_S0GPU

GPU_VCORE_VID1

GPU_VCORE_VID2

GFXIMVP6_VDIFFMIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MM

GPU_VCORE_VID0

GPU_VCORE_VID3

MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MMVOLTAGE=5V

PP5V_S3_GFXIMVP6_VDD

MIN_LINE_WIDTH=0.3MMGFXIMVP6_FBMIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MMGFXIMVP6_DFBMIN_NECK_WIDTH=0.2MM

GFXIMVP6_VID2

GPU_VDD_SENSE

VOLTAGE=1.25VMIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.10 mm


GFXIMVP6_RBIAS

GFXIMVP6_VID0GFXIMVP6_VID1

GFXIMVP6_SOFTMIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MM

PPVCORE_GPUGFXIMVP6_VID3

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MMGFXIMVP6_DROOP

PM_ALL_GPU_PGOOD

GFXIMVP6_VID4

GPU_GND_SENSEMIN_LINE_WIDTH=0.25 mmVOLTAGE=0V



GFXIMVP6_VDIFF_RC

GFXIMVP6_IMON

PPVCORE_GPU_REG_RMIN_LINE_WIDTH=0.6MM


MIN_LINE_WIDTH=0.3MMGFXIMVP6_OCSETMIN_NECK_WIDTH=0.2MM

GFXIMVP6_FDEGFXIMVP6_AF_EN

PP3V3_S0GPU

GFXIMVP6_VSEN_P

MIN_LINE_WIDTH=0.3MMGFXIMVP6_VWMIN_NECK_WIDTH=0.2MM

MIN_NECK_WIDTH=0.3MMMIN_LINE_WIDTH=0.3MMGFXIMVP6_COMP_RC

MIN_NECK_WIDTH=0.2MMDIDT=TRUE

MIN_LINE_WIDTH=0.3MMGFXIMVP6_BOOT

GFXIMVP6_PHASE_VSUM


GATE_NODE=TRUE DIDT=TRUEMIN_NECK_WIDTH=0.2MM

GFXIMVP6_UGATE

GFXIMVP6_VSEN_N

MIN_LINE_WIDTH=0.3MMGFXIMVP6_COMPMIN_NECK_WIDTH=0.2MM

GFXIMVP6_VID2GFXIMVP6_VID3GFXIMVP6_VID4

GFXIMVP6_VID0

GPUVCORE_EN



GFXIMVP6_PHASEMIN_NECK_WIDTH=0.2MM

MIN_NECK_WIDTH=0.2MMGATE_NODE=TRUEDIDT=TRUE

MIN_LINE_WIDTH=0.6MMGFXIMVP6_LGATE

MIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.3MMGFXIMVP6_VO

GFXIMVP6_VID1

VOLTAGE=0V

MIN_LINE_WIDTH=0.6MMGND_GFXIMVP6_AGNDMIN_NECK_WIDTH=0.2MM

MIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.3MMGFXIMVP6_VSUM

PP5V_S3_GFXIMVP6_PVCCMIN_LINE_WIDTH=0.3MM

VOLTAGE=5VMIN_NECK_WIDTH=0.2MM


89 OF 132

81 OF 101

6 7 29 31 41 42

43 45 65

66 71

100

6 7 48 74 81

6 7 71 74 78 79 81 83

81

74

81

81

6 7 48 74 81 81

81

74

6 7 71 74 78 79 81

83

81

81

81

81

81

7 49 86

IN

SYM_VER-1

SYM_VER-1

NC

NC

GND THRM

ON

VIN_1

VIN_2

VOUT_1

VOUT_2

PAD




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Place close to the connector

Panel has 2K pull-ups

Place close to the connector

518S0651

LCD (LVDS) INTERFACE

no-panel case (development).

100K pull-ups are for

10%50VX7R402

0.001UF

2

1C9010

0.1UF10%

402-1X5R16V

C9001 1

2

CRITICAL

FERR-250-OHM

SM

L9000

1 2

402

10K5%

1/16WMF-LF

R90941

2

2

1R9011

402

1/16W5%

MF-LF

100K

2

1R9010

402MF-LF

5%1/16W

100K

87

DLP11S90-OHM-100MA

CRITICALL9010

1 2

34

CRITICAL

DLP11S90-OHM-100MA

L9011

1 2

34

20474-040E-11F-RT-SM

CRITICAL

J9000

1

10

11

12

13

14

15

16

17

18

19

2

20

21

22

23

24

25

26

27

28

29

3

30

31

32

33

34

35

36

37

38

39

4

40

41

42

43

44

5

6

7

8

9

0.001UF50V10%

402X7R

C9002 1

210%0.1UF

402-1X5R16V

C90091

2

MFET-2X2FPF1009

CRITICALU9000

6

1

7

2

3

4

5

10%0.1UF

402-1X5R16V

C90111

2 X5R603

6.3V20%10UFC90121

2

10%

402

0.001UF

CERM50V

C9000 1

2

LVDS Display ConnectorSYNC_DATE=04/27/2010SYNC_MASTER=K18_MLB

PP3V3_S0

LVDS_DDC_CLKLVDS_DDC_DATA


PP3V3_SW_LCD_UFMIN_LINE_WIDTH=0.5 mm

LVDS_CONN_A_DATA_N<0>LVDS_CONN_A_DATA_P<0>

LVDS_CONN_A_CLK_F_P


VOLTAGE=3.3V

PP3V3_SW_LCD

LED_RETURN_1LED_RETURN_2LED_RETURN_3LED_RETURN_4LED_RETURN_5LED_RETURN_6

LVDS_CONN_B_CLK_F_P

LVDS_CONN_A_DATA_P<1>

LVDS_CONN_A_DATA_N<2>

LVDS_CONN_B_DATA_P<0>




LVDS_CONN_B_DATA_N<0>

LVDS_CONN_B_DATA_P<2>LVDS_CONN_B_DATA_N<2>


LVDS_CONN_B_CLK_P

LVDS_CONN_B_CLK_NLVDS_CONN_B_CLK_F_N

LCD_PWR_EN

PPVOUT_S0_LCDBKLT

LVDS_CONN_A_CLK_NLVDS_CONN_A_CLK_F_N

LVDS_CONN_A_CLK_P

PP3V3_S5

90 OF 132

82 OF 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 83 84 87 88 89 98

6 83

6 83

6 83 97

6 83 97

6 97

6

6 88

6 88

6 88

6 88

6 88

6 88

6 97

6 83 97

6 83 97

6 83 97

6 83 97

6 83 97

6 83 97

6 83 97

6 83 97

6 83 97

6 83 97

83 97

83 97

6 97

6 8 88 100

83 97

6 97

83 97

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 85 89 98

VCC

C1

C2

C3

C4

A1B1

A2B2

A3B3

A4B4

GND THRM

IN

IN

OUT

IN

IN

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

HPD_2

DAUX2-

DAUX2+

DDC_CLK1

DDC_DAT1

DDC_CLK2

DDC_DAT2

HPD_1

GPU_SEL

XSD*

AUX-

AUX+DAUX1-

DAUX1+

DDC_CLK

DDC_DAT

GND

HPDIN

VDD

BI

OUT

BI

BI

IN

BI

BI

IN

BI

BI

BI

BI

IN

OUT

OUT

IN

D

GS

OUT

IN

IN

Y

B

A

Y

B

A




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

DP AUX, DDC, & HPD muxing to IG/EGAll emulated LVDS outputs require this termination

LVDS Transmitter Termination

LVDS DDC MUX

(DP_EXTA_HPD)

T29/DP HOT PLUG IN(DP_EXTA_HPD)

CRITICAL

14

157

6

13

10

9

3

2

11

8

4

1U9270

SN74LV4066A

QFN1

12

5

87

87

6 82

78

18

78

18

6 82

2

1C92700.1UF

402

10VCERM

20% 5%

2

1R9273

402

1/16WMF-LF

20K

2

1R9272

402MF-LF

5%1/16W

20K

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

87 97

21

R9257357

PLACE_NEAR=U9600.A5:7mm1%

MF1/20W

201

21

R9252357


1%

MF1/20W

201

21

R9255357

PLACE_NEAR=U9600.C5:7mm1%

MF1/20W

201

21

R9250

PLACE_NEAR=U9600.A1:7mm1%

357

MF1/20W

201

21

PLACE_NEAR=U9600.A3:7mm R9247357

1%

MF1/20W

201

21

R9242357

PLACE_NEAR=U9600.C9:7mm

1%

MF1/20W

201

2

1%1/20W

201MF

1

R9245357

PLACE_NEAR=U9600.A2:7mm

21

1%


357

MF1/20W

201

R9240


21

R9237357

1%

MF1/20W

201


21

R9232357

1%

MF1/20W

201


1

R9235

1%1/20W

201MF

2357

PLACE_NEAR=U9600.A9:7mmMF201

21

R9230357

1%1/20W

R922721

357

1%

MF1/20W

201


87 97

87 97

87 97

21

R9222PLACE_NEAR=U9600.A7:7mm

357

1%

MF1/20W

201


357

201

21

R9225

1%

MF1/20W


21

R9220357

1%

MF1/20W

201

82 97

82 97

6 82 97

6 82 97

6 82 97

6 82 97

6 82 97

6 82 97

82 97

82 97

6 82 97

6 82 97

6 82 97

6 82 97

6 82 97

6 82 97

R9205100K

2

1

402MF-LF1/16W

5%

15

CRITICAL

4

CBTL03062BGA

1

2016

17

13

14

2

12

93

11

8

5

7

6 18

U9220

10

19

84

84

84 97

84 97

402CERM10V20%0.1UFC92301

2

C9220

402

10V20%

CERM

0.1UF

2

1

8 17 79

8 17 79

78 79

78 79

8 17 92

8 17 92

8 78 97

8 78 97

87

R9204

1/16WMF-LF

5%

402

1

2

100K

8 17

78 79

87

MF-LF402

10K5%

R92021

2

1/16W

12

402

0R9206

T29_DP_HPD:MUX_GMUX

5%

MF-LF1/16W

1

2 402MF-LF

T29_DP_HPD:MCU_GMUXR9281100K5%1/16W

T29_DP_HPD:MCU_GMUX


1

Q9280

3 2

10V20%

CERM

0.1UF

2402

1C9210T29_DP_HPD:ALL_OR

87

45 84

84

T29_DP_HPD:ALL_OR74LVC2G32GTSOT833

CRITICAL

U9210

8

6

4

3

5

74LVC2G32GTSOT833

4

7

1

2

8

U9210

T29_DP_HPD:ALL_OR

2

1R9271

402

1/16W5%20K

MF-LF2

1R92705%

402MF-LF1/16W

20K


Muxed Graphics SupportSYNC_MASTER=K92_MLB

PP3V3_S0

DP_T29SNK0_HPD

DP_EXTA_DDC_CLK

DP_EXTA_AUXCH_C_N

DP_EXTA_DDC_DATA

DP_A_EXT_HPD

DP_IG_DDC_DATADP_IG_DDC_CLK

LVDS_IG_DDC_DATA

LVDS_EG_DDC_DATA

LVDS_IG_DDC_CLK

LVDS_EG_DDC_CLK

LVDS_DDC_SEL_IG

LVDS_DDC_SEL_EG

PP3V3_S0

LVDS_DDC_DATA

LVDS_DDC_CLK

PP3V3_S0GPU

LVDS_A_CLK_P

LVDS_A_CLK_N


LVDS_A_DATA_N<0>

LVDS_B_DATA_P<1>

LVDS_B_DATA_N<1>

LVDS_B_DATA_P<2>

LVDS_B_DATA_N<2>

LVDS_B_CLK_N



LVDS_CONN_B_CLK_N


LVDS_A_DATA_N<2>

LVDS_A_DATA_P<2>


LVDS_CONN_B_CLK_P

LVDS_B_DATA_P<0>

DP_EG_AUXCH_P

DP_IG_AUX_CH_P


DP_EG_AUXCH_N

LVDS_B_DATA_N<0> LVDS_CONN_B_DATA_N<0>




LVDS_B_CLK_P

LVDS_A_DATA_N<1>

LVDS_A_DATA_P<1>

LVDS_A_DATA_P<0>

LVDS_CONN_A_CLK_N



LVDS_CONN_A_CLK_P

PP3V3_S0

DP_IG_AUX_CH_N

DP_T29SNK1_HPD

DP_MUX_SEL_EG

DP_IG_HPD

DP_EG_DDC_CLKDP_EG_DDC_DATA

DP_MUX_EN

DP_EG_HPD

PP3V3_S0

DP_HOTPLUG_DET

T29_HOTPLUG_DET_OR

DP_EXTA_HPD

DP_EXTA_AUXCH_C_P

92 OF 132

83 OF 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89

98

33 79

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 71 74 78 79 81

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

33 79

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39

40 41 45 47 48 49 50 51

53 56 60 61 71 72 79 82

83 84 87 88 89 98

OUT

OUT

BI

OUT

OUT

IN

IN

IN

IN

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

NC

IN

BI

THMPADGND

VDD

OUT_D0P

OUT_D0N

OUT_D1P

OUT_D2P

OUT_D1N

OUT_D3P

OUT_D2N

OUT_D3N

AC_AUXP

AC_AUXN

OUT_HPD

CEXT

IN_D0P

IN_D0N

IN_D1N

IN_D2N

IN_D3P

IN_SDA

IN_AUXP

IN_AUXN

IN_HPD

I2C_CTL_EN

I2C_ADDR0

I2C_ADDR1

SCL_CTL

SDA_CTL

REXT

AUXDDC_OFF

PD

CA_DET

IN_SCL

IN_D3N

IN_D2P

IN_D1P

OUT_AUXN_SDA

OUT_AUXP_SCL

BI

BI

IN

BI

OUT

IN

OUT

OUT

OUT

VDD

PIO1_8/CT16B1_CAP0

PIO1_7/TXD

XTALIN

PIO1_4/AD5/WAKEUP

PIO1_6/RXD

SWDIO/PIO1_3/AD4

R/PIO1_2/AD3

R/PIO1_1/AD2

R/PIO1_0/AD1RESET#/PIO0_0

PIO0_1/CLKOUT

SWCLK/PIO0_10/SCK/CT16B0_MAT2

PIO0_9/MOSI/CT16B0_MAT1

PIO0_8/MISO/CT16B0_MAT0

PIO0_2/SSEL/CT16B0_CAP0

R/PIO0_11/AD0

PIO0_7/CTS#

PIO0_6/SCK

PIO0_4/SCL

PIO0_5/SDA

VSSTHRMPAD

BI

OUT

OUT

IN

IN

IN

IN

IN

IN

AUX-

AUX+

DOUT_1+

DOUT_1-

NC

GNDTHMPAD

GPU_SEL

HPD_2

AUX2-

AUX2+

DIN2_1-

DIN2_1+

DIN2_0-

HPD_1

AUX1-

AUX1+

DIN1_1-

DOUT_0-

DIN1_0+

DIN1_0-

DIN1_1+

HPD_IN

DOUT_0+

DIN2_0+

VDD

AUX_SEL

OUT

IN

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

IN

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

(Both L’s)

(C9370/C9371)

(C9373.2)

Biasing

(D9382/D9383)

(D9360/D9361)

DP Path Biasing

R2P = Receptacle to Plug

DP/T29 A Low-Speed MUX

(All 4 D’s)

Must be 3.3V DP A port power

T29: RX_1 Bias Sink

because 100-ohm pull-downs would defeat DP Sink’s pull-ups on ML<3>. U9390 AUX defaults to DP mode

Note: U9390 ML/HPD defaults to T29 mode so that DP/T29 Display can detect host T29 support using I2C

10 for ML and HPD, Pericom uses

P2R = Plug to Receptacle

IC supports input

DP A Super-Driver

T29 PathD9372/D9373:

(D9360.2)

(D9382/D9383)(D9361.2)

D9364/D9365:

(C9372.2)

Must be 3.3V DP A port power

(DP_SDRVA_AUXCH_P)

during training.

(OD)

(D9372/D9373)

(T29_A_LSX_R2P)(T29_A_LSX_P2R)

0 0 0x96/0x97

(D9365.2)

(IPD)

1 1 0xB4/0xB5

so only 94/B4 aredevices use 96/B6,Note: Other Parade

0 1 0xB6/0xB7

used for this part.

A1 A0 Addr (W/R)

PS8301 I2C Addresses:

PS8301 has internal~150K pull-down on PD

(IPD)

(IPD)

(IPU)

(IPD)

PI3vEDP212 (353S3055) areCBTL04DP081 (353S3151) and

footprint-compatible parts with

pin 10 for ML and pin 11 for HPD.

similar pinouts. NXP uses pin

HI=Port B

T29: LSX_A_R2P/P2R (P/N)

(OD)

(OD)

(OD)

(IPU)

0x26/0x27 (Wr/Rd)

detection of DP Source.

SWCLK

SWDIO

=T29_WAKE_L:

I2C Addr:

(D9364.2)

T29: TX_0

and DDC, alias nets together at GPU.If GPU uses common pins for AUX_CH

T29: TX_1

LO=Port A

T29 A High-Speed Signals

Parade (pin is 5V-tolerant).pin even when VCC=0V perpin. Okay to drive this

R9308/R9309 maintain bias on C9308/C9309

T29 signals areP/N-swapped after ACcaps to improve layout.

(All 4 D’s)

(C9383.2)

(C9383.2)

T29: Unused

transitions from high to low.

to prevent spikes when U9310 AUXDDC_OFF

(IPD)

used by PS8301AUXCH Snoop Port,

(DP_SDRVA_AUXCH_N)

(DP_SDRVA_HPD)

(Both L’s)

Inductor values TBD

Port A MCU

1 0 0x94/0x95

high while Vcc = 0V.

(C9380/C9381)

If project has space for 10-pin programming header it should be used.R9330 provides pads for programming/debug of MCU, please make accessible.

use PCIe WAKE#

6 33 95

6 33 95

6 85 95

6 85 95 2

1R9312

402

5%1K1/16WMF-LF

2

1R93194.99K1/16W1%

402MF-LF

83

R9311

1/16W

2

1NO STUFF

1K

402

5%

MF-LF2

1R93101K1/16WMF-LF402

5%

0.1UF

2

1 C9311

402CERM

20%10V 2

1 C9312

CERM402

10V20%0.1UF

2

1C93192.2UF

402-LFCERM6.3V20%


6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

6 33 95

21C930610%X5R 402

16V0.1uF21C930710%X5R 402

16V0.1uF

78 97

78 97

C9304 21

16VX5R 40210%0.1uF

78 97

402

21C93050.1uF X5R

16V10%78 97

21C930216V402

10%0.1uF X5R

78 97

21C93030.1uF 10% 16V

402X5R

78 97

C9300 21

10%0.1uF X5R 40216V

78 97

21C930110%X5R 4020.1uF 16V

78 97

47

47

21

10%40216V0.1uF X5R

C9308

2

4020.1uF 16V10%1C9309

X5R

83 97

83 97

5%

MF-LF

R9399100K1

1/16W

4022

2

1

5%

MF-LF402

1/16W

100KR9398

83

83

QFN

5

32

40

21

41

37

38

12

34

31

23

22

24

28

27

30

29

18

17

13

14

3

9

10

7

8

4

1

2

16

15

26

35

36

336

11

39

20

19

U9310PS8301TQFN40GTR-A2

25

CRITICAL

2

1C931020%

CERM402-LF

6.3V

2.2UF

85 95

85 95

C9363 1

402

2

0.1uF X5R10% 16V

21

0.1uF 10%X5R

16V402

C9362

C9367 21

X5R 40210%0.1uF 16V

1 2

0.1uF X5R10%

40216V

C9366

84 87

6 85 95

6 85 95

45 83 84

X5R 40210% 16V0.1uF21C9369

21

402X5R10% 16V0.1uF

C9368

18

6 17 25 31

33

OMIT_TABLECRITICAL

4

213

225

25

19

14

1

18

17

16

15

6

24

23

20

13

12

11

10

9

8

7

2

U9330LPC1112AHVQFN25

33 47 95

84 85

33

33 47 95

33

2

1R9335

1/16W5%1K

MF-LF402 2

1R93365%10K1/16WMF-LF402

2

1 C9330

402

0.1UF20%10VCERM

33

85

85

2

1

402CERM10V20%

C93310.1UF

2

1/16W

1

1K

402

5%

MF-LF

R9397

1

2R93961K

402

1/16WMF-LF

5%

2

1R93395%

MF-LF1/16W

402

1M

2

1R93385%

MF-LF1/16W

402

10K

85

2

1R93300

OMIT

402

1/16WMF-LF

5%

2

1R9393

MF-LF402

1/16W5%51

R9392

2

5%1/16W

402

51

MF-LF

1

OMIT_TABLE

U939031

3

18

19

CRITICAL

CKPLUS_WAIVE=NdifPr_badTerm

29

20

16

12

9

33

11

13

17

10

28

21

4

5

1

2

23

22

25

24

26

30

32

6

7

15

14

HVQFNCBTL04DP081

SIGNAL_MODEL=T29DP_MUX

8

27

35 85 21

R9334

MF-LF1/16W5%

402

10K

16 23

1

2R9318

402

SDRV_PD

05%

1/16WMF-LF

R9308 21

1M 1/16W402

5%MF-LF

21R93091/16W

MF-LF5%

4021M

6 85 95

6 85 95

85 95

85 95

6 85 95

6 85 95

21

CRITICAL

BAR90-02LRH TSLP-2-7D9364

SIGNAL_MODEL=EMPTY

GND_VOID=TRUE

SIGNAL_MODEL=T29PIN

21D9373

CRITICAL

TSLP-2-7GND_VOID=TRUE

BAR90-02LRH

21D9372

SIGNAL_MODEL=T29PIN

CRITICAL

BAR90-02LRH

GND_VOID=TRUE

TSLP-2-7

D9365BAR90-02LRH

21

CRITICAL

GND_VOID=TRUETSLP-2-7

SIGNAL_MODEL=EMPTY

CRITICAL

SIGNAL_MODEL=EMPTY

D9360BAR90-02LRH

2TSLP-2-7

GND_VOID=TRUE1

TSLP-2-721

CRITICAL

D9382BAR90-02LRH

GND_VOID=TRUE

SIGNAL_MODEL=T29PIN

1 2

CRITICAL

TSLP-2-7GND_VOID=TRUE

SIGNAL_MODEL=T29PIN

D9383BAR90-02LRH

21

CRITICAL

SIGNAL_MODEL=EMPTY

TSLP-2-7D9361BAR90-02LRH

GND_VOID=TRUE

4V

2C9370

201CERM-X5R-120%0.47UF

1GND_VOID=TRUE

2

GND_VOID=TRUE5%

2011/20W

MF11.5K R9372

GND_VOID=TRUE

1 2

402

10%0.47UFC9373

6.3VCERM-X5R

2

10%1

GND_VOID=TRUE

6.3V

402CERM-X5R0.47UF

C9372

4V

21

GND_VOID=TRUE

201CERM-X5R-1

C93710.47UF 20%

0.47UF

GND_VOID=TRUE

CERM-X5R

1

10%2

6.3V

402

C9382

C9383 2

10%1

6.3V

402GND_VOID=TRUECERM-X5R0.47UF

1 2

0201X5R0.22UF 20% 6.3VC9364

85 95

85 95

GND_VOID=TRUE

5%R9374 1 21.5K

2011/20W

MF

0201-11.0NH+/-0.1NH

OVERSIZE_PAD=0.875 mm^2

L9383 1 2

0201-11.0NH+/-0.1NH


1 2L9382


0201-11.0NH+/-0.1NHL9372 21

1.0NH+/-0.1NH 0201-1L9373 21


30R9354 1 25%MF 201

1/20W

C9390

2

1

20%10VCERM

0.1UF

4022

1 C939120%10V

0.1UF

CERM402

R9360 1.5K201

21

MF5% 1/20W

U9359

SC70

2

CRITICAL

74LVC1G04DBDCK5

3

4

C93590.1UF

16VX5R402

1

210%

1 2

02016.3V0.22UF X5R

C936520%

0.22UF1 2

0201X5R6.3V

C936020%

1 2

020120%X5R

C93610.22UF 6.3V

4VCERM-X5R-120%

C9380 1

201

GND_VOID=TRUE

0.47UF

2GND_VOID=TRUE

C9381 21

4V20%

201CERM-X5R-10.47UF

MF

R9352

2

1/20W

1

5%

201

270

R9353

1/20W

1

270

MF

5%

2012

1/20W 201MF5%2130R9355

R93505%

1 2

MF 2011/20W

30

301/20W201MF

215%R9351

MF1/20W

201 2

515%

1R9363


1/20W

R936251

2MF

1

201

5%


8

8

8

8

R9361 2

201

1

MF5% 1/20W

1.5K

11.5K201

2

MF5% 1/20W

R9365R9364 1.5K

201

21

MF5% 1/20W

R9373 1/20W2

5%201MF11.5K

GND_VOID=TRUE

MF1/20W201

1.5K 215%

GND_VOID=TRUER9375

GND_VOID=TRUE

5%1 21.5K

2011/20W

MF

R9384

MF1/20W201

1.5K 215%

GND_VOID=TRUER9385

1.5K 1 2015%

GND_VOID=TRUE

2R9382 MF

1/20W

1.5K 1 MF1/20W2012

GND_VOID=TRUE

R9383 5%


DisplayPort/T29 A MUXing

T29_A_UC_ADDR

DP_EXTA_ML_C_N<0>

DP_EXTA_ML_P<3>

DP_EXTA_ML_N<3>PP3V3_S0

DP_SDRVA_ML_N<2>

PP3V3_S0

DP_SDRVA_ML_N<0>

T29_D2R_P<1>

T29_R2D_C_F_P<1>

DP_SDRVA_ML_R_N<2>

DP_SDRVA_ML_R_N<0>DP_SDRVA_ML_R_P<0>

DP_A_BIAS

PP3V3_S0

DPSDRVA_I2C_ADDR1

DP_EXTA_ML_N<1>

DP_EXTA_ML_N<2>

DP_EXTA_ML_N<3>

DP_EXTA_DDC_CLK

T29_R2D_C_P<0>T29_R2D_C_N<0>

T29_A_HV_EN

I2C_T29_SCL

T29_LSEO<0>DP_A_PWRDWN

DP_A_CA_DET

DP_A_CA_DET

DP_SDRVA_ML_C_P<3>

DP_SDRVA_ML_C_N<0>

DP_SDRVA_ML_C_P<1>

DPSDRVA_REXT

T29_R2D_C_F_N<1>

DP_EXTA_ML_P<2>

T29_R2D_C_N<1>

T29_A_UC_ADDR

DPSDRVA_I2C_ADDR0

DPSDRVA_I2C_CTL_EN

DP_EXTA_ML_N<0>

DP_A_EXT_HPD

DP_EXTA_AUXCH_P

DP_EXTA_DDC_DATA

DP_EXTA_ML_P<1>

DP_EXTA_AUXCH_C_P

DP_EXTA_ML_C_N<3>

DP_EXTA_ML_C_P<3>

DP_EXTA_ML_C_N<2>

DP_EXTA_ML_C_P<2>

DP_EXTA_ML_C_N<1>

DP_EXTA_ML_C_P<1>

DP_EXTA_ML_P<2>

DP_EXTA_ML_N<2>

DP_EXTA_ML_P<0>

DP_EXTA_AUXCH_N

DP_SDRVA_ML_C_N<3>

T29_LSEO<1>

T29DPA_CONFIG2_RCT29DPA_CONFIG1_RC

PCIE_WAKE_L

I2C_T29_SDA

T29_LSOE<0>

DPSDRVA_CEXT

DP_EXTA_ML_P<0>

DP_EXTA_AUXCH_N

DP_EXTA_ML_P<1>

DP_EXTA_HPD

DP_AUXCH_ISOL

I2C_DPSDRVA_SCL

DP_A_PWRDWN_R

DP_EXTA_ML_N<0>

T29_MCU_INT_L

T29_LSOE<1>

T29DPA_HPDT29_A_BIAS

DP_EXTA_AUXCH_P

DP_EXTA_AUXCH_C_N

DP_A_PWRDWN

I2C_DPSDRVA_SDA

DP_EXTA_ML_N<1>

DP_EXTA_ML_P<3>

DP_SDRVA_AUXCH_C_PDP_SDRVA_AUXCH_C_N

PP3V3_SW_DPAPWR

DP_SDRVA_ML_R_P<2>

T29_A_HV_EN_R

T29_A_BIAS_R2D_P0

T29_D2R_C_P<0>

VOLTAGE=3.3VDP_A_BIAS0

VOLTAGE=3.3VDP_A_BIAS2

DP_SDRVA_ML_P<2>

T29_A_BIAS_R2D_N0

T29DPA_ML_C_P<0>T29DPA_ML_C_N<0>

T29DPA_ML_C_P<2>T29DPA_ML_C_N<2>

T29_D2R_C_N<0>

T29_R2D_N<1>

T29_A_BIAS_R2D_N1

T29_R2D_P<0>

T29_D2R_C_N<1>

T29_A_BIAS_R2D_P1

T29_R2D_N<0>

DP_EXTA_ML_C_P<0>

DP_SDRVA_ML_C_N<2>DP_SDRVA_ML_C_P<2>

DP_SDRVA_ML_C_N<1>

T29_A_BIAS

T29_A_RSVD_N

T29DPA_ML_N<3>

DP_A_EXT_HPD

DP_SDRVA_ML_N<1>

DP_SDRVA_ML_P<3>DP_SDRVA_ML_N<3>

T29DPA_ML_P<3>DP_SDRVA_ML_P<1>

DP_SDRVA_AUXCH_PDP_SDRVA_AUXCH_N

DP_SDRVA_HPD

T29_A_RSVD_P

T29_A_LSX_P2RT29_A_LSX_R2P

T29_D2R1_BIASPT29_D2R1_BIASN

DP_A_PWRDWN

T29DPA_ML_P<1>T29DPA_ML_N<1>

DP_A_EXT_AUXCH_PDP_A_EXT_AUXCH_N

DP_SDRVA_ML_P<0>

PP3V3_SW_DPAPWR

T29_R2D_P<1>

T29_D2R_C_P<1>

DP_SDRVA_ML_C_P<0>

T29_R2D_C_P<1>

T29_R2D_C_F_P<0>T29_R2D_C_F_N<0>

T29_D2R_P<0>

T29_D2R_N<1>

T29_D2R_N<0>

93 OF 132

84 OF 101

84

84

84 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53

56 60 61 71 72 79 82 83 84 87

88 89 98

6 95

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 95

95

95

95

95

6 7 12 16 17 18 19 20

22 23 25 26

28 32 35 36

39 40 41 45

47 48 49 50

51 53 56 60

61 71 72 79

82 83 84 87

88 89 98

84

84

84

84

84 87

95

95

95

84

84

84

45 83 84

84

84

84

84

84

84

95

84

84

84

84

84

84

84

84

95

95

84 85

95

8

8

6 95

6 95

6 95

6 95

95

84 85

95

95

95

95

95

95

84

6 95

84 85

6 95

95

95

OUT

OUT

IN

IN

BI

IN

OUT

OUT

BI

BI

BI

GND

GND

ML_LANE0N

ML_LANE0P

ML_LANE1P

GND

ML_LANE1N

GND

GND

DP_PWR

ML_LANE2PAUX_CHP

RETURN

HOT_PLUG_DETECT

AUX_CHN

ML_LANE3P

ML_LANE3N

ML_LANE2N

CONFIG1

CONFIG2

BOT ROW TOP ROWTH PINS SM PINS

SHIELD PINS

IN

OC*

OUT

EN

GNDIN

D

SG

D

S G

G

D

S

D

G S

OUT

OUT

OUT

BI

IN

GND PGND

OUT

FB

IN

S

G

D

GNDPGND

OUT

FB

IN

IN

IN

IN

OUT

IN

IN

CT

EN*

RTRY*

VIN

THRMGND

IFLT

ILIM

FLT*

VOUT

PAD





36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

SI8409DB:Vds(max): -30VVgs(max): +/-12VVgs(th): -1.4V

or HV_EN high.

T29: TX_0

Circuit threshold range: 2.877-2.941V (2.903V nominal)

T29 Dir

For J9400 T29 SMT pads

Circuit threshold range: 3.363-3.439V (3.395V nominal)

HIGH and T29_A_HV_EN DPAPWRSW_HV_DET isNote: Bleeder active when

TSD = CCT * 100000

470k R’s for ESD protection

(Both C’s)

3.3V/HV Power MUX

P = ~27mW2.5V / 249 ohm = 10mABleeder Resistor

when Source >3.4V

3.3V Always

is LOW.

High: 2.0 - 5.0V

to 100K (DPv1.1a).greater than or equaldown HPD input with

TFLT 18.3ms 13.4ms 26.7ms

DP_PWR must be S4 to support

T29: TX_1

on AC-coupled signals.

wake from T29 devices.

DP DirT29 Dir

Low: 0 - 0.8V

Sink HPD range:

DP Source must pull

(Both L’s)

(Both C’s)

T29: Unused

Blocking FET, off

3.3V/HV MUXed

Port A 3.3V Power Switch

<RLIM><RFLT>

(3, 5, 17 & 19):

ZXRE060A REF range: 0.595-0.605V (0.600V nominal)

DP Dir

T29: LSX_R2P/P2R (P/N)

ILIM 935mA 925mA 944mA (*)IFLT 885mA 876mA 894mA (*) Nominal Min Max

TSD 470ms 235ms 724ms

Port A HV Power Switch

<CT>

TFLT = CCT * 38900

IFLT = 200k / RFLT = 885mA

(IPU-Weak!)

ILIM = 201k / RLIM = 935mA


(*) U9410 tolerance unknown

Rds(on): 65mOhm @ 2.5V VgsId(max): 3.7A @ 70C

20V Max

2

1C940010%50VX7R402

0.01UF

6 84 95

6 84 95

84 95

84 95

6 84 95

6 84 95

GND_VOID=TRUE

402

2112

5%1/16W

R9403

MF-LF

R9404

1/16W

GND_VOID=TRUE21

402MF-LF

5%

12

5%

12

201

1/20WMF

1

R94052

OMIT_TABLEGND_VOID=TRUE

2

1

0.01UF10%50VX7R402

C9402

L9408

0603

21

FERR-120-OHM-3A

1221

R9402

MF-LF

5%

402

1/16W

21

5%

MF-LF1/16W

402

R940112

2

1 C9401

50VX7R402

10%0.01UF

SIGNAL_MODEL=EMPTY

R9494GND_VOID=TRUE

1

2201MF

1/20W5%1K

1/20W

SIGNAL_MODEL=EMPTY

R94951

2201MF

5%1K

GND_VOID=TRUE

2

1C9498

CERM402

5%50V

30PF

2402

30PFC94991

CERM50V5%

100K

2

1

402

1/16WMF-LF

5%

R9441

GND_VOID=TRUE2 1

L9498CRITICAL

0603SIGNAL_MODEL=EMPTY

650NH-5%-0.430MA-0.052OHM

2 1

L9499CRITICAL

0603SIGNAL_MODEL=EMPTY

650NH-5%-0.430MA-0.052OHM

GND_VOID=TRUE

6 84 95

6 84 95

84 95

84 95

6 84 95

2

5%

402MF-LF

1

1/16W

4.7KR9425

19

10

12

15

17

9

11

3

5

21

2

14 13

7

20

6

4

16

18

GND_VOID=TRUEGND_VOID=TRUE

F-RT-THSM

GND_VOID=TRUE

8

22

1

DSPLYPRT-M97-1J9400CRITICAL

GND_VOID=TRUE

1

603X5R

20%26.3V

10UFC9486

1

3

5

2

4

SOT23

CRITICAL

TPS2051BU9480

1

402

0.1UF20%

2

C9485

CERM10V

CERM402

0.1UF10V20%

1

2

C9481 1

X5R-CERM-1603

CRITICALC948022UF20%6.3V2 2

1

20%100UF

CRITICAL

POLY-TANTCASE-B2-SM

6.3V

C9487

1 36

52

Q9426

4

SOT363MMDT3946XG

2

1/16W

402

5%

1R94304.7K

MF-LF2

1R94265%

402

1/16W

1K

MF-LF

R94321

MF-LF

10K

4022

1/16W5%

MF-LF2

5%

1

402

1/16W

4.7KR9429

402 2

1

100K

MF-LF

1%1/16W

R9427

1

2

1%

MF-LF402

1/16W

21.5KR9428

44 45 72

5

3Q9430SOT563

SSM6N37FEAPE

4 1 2

6

SOT563

Q9430SSM6N37FEAPE

2

1

1M5%

1/16WMF-LF

R9452

402 2

1R9451

402

1/16W

1M

MF-LF

5%

2

1C9494330PF

402CERM

10%50V

2

1 C949510%

CERM

330PF50V

402

GND_VOID=TRUE201MF

1R94982.2K1/20W

5%

2 GND_VOID=TRUE

2.2KR94991

2201MF1/20W5%

1/16W

R94161

2402

470K5%

MF-LF

Q9419SOT-563

4

3 DMB53D0UV

5 211K

1/16W

402MF-LF

5%

R9418

Q9419

2

6

SOT-563DMB53D0UV

1

Q9415

21

3SSM3K15FVSOD-VESM-HF

R9419249

2

MF-LF

1

1%1/16W

402

21

FERR-120-OHM-3A

0603

L9400

84

84

84

6 84 95

35 84 85

12

3

4

5

U9426ZXRE060A

CRITICAL

SOT353

1

324

CRITICAL

BGASI8409DBQ9425

210V20%

CERM402

1

0.1UFC9429NO STUFF

C9426

402

1

210V

CERM

0.1UF20%

4

1 2

3

5

CRITICAL

SOT353ZXRE060AU9435

84 85

2

1

402

0.1UFC943520%

CERM10V

402

1%

MF-LF2

1/16W

100K

1R9435T29_2V9_ENABLE

1

1/16W

402

1%

2MF-LF

R943624.9K

10V

402

C9436 1

210%1UF

X5R

R94331

1/16W

402 2MF-LF

2205%

402

C94120.47UF

CERM-X5R2

1

6.3V10%

OMIT_TABLE1

100K5%

1/16WMF-LF

4022

R9410210K1%

MF-LF2402

1

1/16W

R9411

2

1

50V

C94100.1UF

10%

X7R603-1

10%50VX7R603-1

2

0.1UF1 C9411

21TSLP-2-7

SIGNAL_MODEL=T29PINGND_VOID=TRUECRITICAL

BAR90-02LRHD9499

21TSLP-2-7

CRITICALSIGNAL_MODEL=T29PIN

GND_VOID=TRUE

BAR90-02LRHD9498

5%470KR94701

2201MF1/20W

GND_VOID=TRUE

84 95

84 95

4V1 2

201

20%

GND_VOID=TRUE

0.47UF CERM-X5R-1

C9472

2

1

470K5%

MF1/20W

R9471GND_VOID=TRUE

201

MF1/20W

201

5%470K

2

1R9472GND_VOID=TRUE

R9473

2

1GND_VOID=TRUE

201

1/20WMF

5%470K

1 2

201

20% 4V

GND_VOID=TRUE

0.47UFC9473

CERM-X5R-1

1 2

201

20% 4VCERM-X5R-10.47UF

GND_VOID=TRUE

C9470

1 2

20% 4VCERM-X5R-1

201

C94710.47UF

GND_VOID=TRUE

201MF

1/20W

121

5%

2

OMIT_TABLER9406GND_VOID=TRUE

R9407

1/20WMF201

121

5%

2

GND_VOID=TRUE

2

R9408

5%

112

201

1/20WMF

R9490PLACE_NEAR=C9490.1:2mm

1

2012MF

511/20W5%

6.3V

1 20.1UF

10%

X5R

C9490

201

8

8

8

1/16W

402

5%

MF-LF

1

2

R942422

CRITICAL

SM2

STPS2L30AF

1

D9410

82

MF-LF2

5%

402

1

1/16W

R9437

0.47UF10%

26.3V

402

1C9424

CERM-X5R

CRITICAL

DFLS1100

12POWERDI-123D9425

CRITICAL

U9410SN1010017

QFN

10

12

15

7

8

5

13

17

14

1

2

3

4

6

16

9

11

SYNC_DATE=10/16/2010SYNC_MASTER=T29_REF


RES,0 OHM,5,1/16W,0402,SMD,LF1116S0004 C9412

CAP,CER,0.1UF,10%,6.3V,X5R,0201,SMD R9405132S0121 1

R94061132S0121 CAP,CER,0.1UF,10%,6.3V,X5R,0201,SMD

DPAPWRSW_VREF DPAPWRSW_P3V3_ON_L

DPAPWRSW_HV_DET

DPAPWRSW_HV_DET_LDPAPWRSW_ON_L_C

VOLTAGE=3.3VMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.38 MMPP3V3_SW_DPAPWR

VOLTAGE=18V


PP3V3RHV_SW_DPAPWR

DPAPWRSW_ON_C

PPHV_SW_DPAPWR

T29DPA_ML_C_P<0>

PP15V_T29

DPAPWRSW_CT

DPAPWRSW_HVEN_L_R

DPAPWRSW_IFLT

DPAPWRSW_ILIM

TP_DPAPWRSW_FLT_L

T29DPA_D2R1_AUXCH_N

T29DPA_HPD_R

T29DPA_HPD

GND_DPACONN_19MIN_LINE_WIDTH=0.38 MMMIN_NECK_WIDTH=0.20 MMVOLTAGE=0V

T29DPA_ML_N<0>

T29DPA_ML_P<3>T29DPA_ML_N<3>


VOLTAGE=0V

GND_DPACONN_14

DPAPWR_BLDR_B

DPAPWRSW_HV_DET_R_L

T29_D2R_C_N<1>

T29_A_BIAS_D2R_N1

T29_D2R_C_P<1>

VOLTAGE=3.3VT29_A_BIAS_R

T29DPA_CONFIG1_RC

DP_A_EXT_AUXCH_N

T29DPA_D2R1_AUXCH_PT29DPA_ML_C_P<2>T29DPA_ML_C_N<2>

T29DPA_ML_C_N<0>

DPAPWR_BLDR_EMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.20 MM


DPACONN_20_RCMIN_LINE_WIDTH=0.38 MM

VOLTAGE=18V

SMC_S4_WAKESRC_ENT29_A_HV_EN

T29DPA_ML_P<2>

VOLTAGE=0V

GND_DPACONN_7MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.38 MM

GND_DPACONN_13


PP3V3_S5

T29DPA_ML_N<2>

T29_A_BIAS_D2R_P1

T29_A_BIAS

T29DPA_CONFIG2_RC

MIN_NECK_WIDTH=0.20 MMVOLTAGE=0V

GND_DPACONN_8MIN_LINE_WIDTH=0.38 MM

VOLTAGE=18VMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.38 MMPP3V3RHV_SW_DPAPWR_UF

T29DPA_ML_N<1>T29DPA_ML_P<1>

T29_A_HV_EN

T29_D2R_C_P<0>T29_D2R_C_N<0>

DP_A_EXT_AUXCH_P

T29DPA_ML_P<0>

DPAPWRSW_NPN_E

MIN_LINE_WIDTH=0.38 MMGND_DPACONN_1

VOLTAGE=0VMIN_NECK_WIDTH=0.20 MM

T29_A_BIAS

DPAPWRSW_P3V3_ON

T29_A_HV_EN

DPAPWR_FB_DIV

94 OF 132

85 OF 101

84

7 8 35

6 95

6 95

6 95

35 84 85

6 95

6 7 17 19 20 22 23 24 25 29 39

45 55 65 70 71

72 82 89 98

6 95

6 95

84 85

35 84

85

OUT

IN

THRM_PAD

POK1

REF

TON

EN_LDO

VREF3

VIN

LDO

LDOREFIN

BYP

FB1

ILIM1

EN1

PVCC

SECFB

GND PGND

LGATE2

BOOT2

PHASE2

UGATE2

EN2

POK2

SKIP*

OUT2

ILIM2

REFIN2

VCC

OUT1

LGATE1

PHASE1

UGATE1

BOOT1

NC

D

GS

IN

G

D

S

G

D

S

OUT

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

F = 500 KHZ8A MAX OUTPUTVout = 1.503V

(Internal 10-ohm path

from PVCC to VCC)

<Ra>

<Rb>

f = 400 kHz

Vout = 1.003V

3.5A MAX OUTPUT

(Q9510 limit?)

Vout = 0.7V * (1 + Ra / Rb)

(Rb should be between 10K and 100K)

353S2312<Rb>

(SGND)

(=PP1V5FB_S0_REG)

<Ra>

Vout = 2(Req/(Ra+Req))

1.503V

1.35V

GPIO7

0

1

FBVDDQ

20.0K

402

1/16WMF-LF

1%

R95211

2

8 73 81 86 87 89

87 89

MF-LF1/16W

402

1%75KR95351

2

2.2UH-8.0A

CRITICAL

PCMB065T-SM

L9510

1 2

CRITICAL

20%16V

POLY-TANT

68UF

CASE-D2E-SM

C9540 1

2

C9545

X5R

1UF

603-1

25V10%

1

2

0.1UF

X7R50V10%

603-1

C9530 1

2

SIZ700DT

CRITICAL

POWERPAIR-6X3.7

Q9510

1

6

45

237

8

8.66K

MF-LF402

1%1/16W

R95201

2

402

5%

4.7

1/16WMF-LF

R950012

SMXW9500

1 2 10V20%

402CERM

0.1UFC95851

2 35.7K

402

1/16W1%

MF-LF

R95641

2

10%0.001UF

402CERM50V

C95611

2

CRITICAL

QFN2

ISL6236

U950017 24

9

14 27

4

11

21

12 31

7

8

18 23

10 30

22

16 25

13

28

19

1

32

20

29

33

2

15 26

3

6

5

CRITICAL

805

25V10%

X5R

10UFC9500 1

2 10%

X5R402-1

1UF

10V

C9501 1

2

NO STUFF

5%100PF

402CERM50V

C9520 1

2

130K1%

1/16W

402MF-LF

R95851

2

10VX5R

1UF10%

402-1

C9504 1

2

11.8K

1/16WMF-LF

1%

402

R9563 1

2

10%

402-1

10V

1UF

X5R

C9503 1

2

78.7K

MF-LF402

1%1/16W

R95621

2 CRITICAL


Q95653

12

78 79

X7R603-1

10%0.1UF

50V

C95801

2

CRITICAL

20%16V

POLY-TANT

68UF

CASE-D2E-SM

C9590 1

2

603-1X5R

1UF10%25V

C95951

2

CRITICAL

PWRPK-12128

SIS426DNQ9561

5

4

1 2 3

SM


XW9565

12

CRITICAL

1.0UH-13A-5.6MOHM

PCMB065T-SM

L9560

1 2

PWRPK-12128

CRITICAL

SIS426DN

Q9560

5

4

1 2 3

CRITICAL

603

20%10UF

X5R6.3V

C95651

2


SMXW9515

1 2

CRITICAL

POLY-TANTCASE-B2-SM2

20%2.5V

220UFC9560 1

2

C9546

402

25V5%1000PF

NP0-C0G

1

2

NP0-C0G402

1000PF5%25V

C95961

2

402NP0-C0G

1000PF5%

25V

C9516 1

2

402NP0-C0G

1000PF5%25V

C95661

2

CRITICAL

10UF20%

6.3V

603X5R

C9515 1

2

CRITICAL

20%

B2-SM

2.0V

330UF

POLY-TANT

C95101

2

8 73 81 86 87 89

89

1V0 GPU / 1V5 FB Power Supply


GND_P1V0P1V5_SGND


VOLTAGE=0V

P1V5FB_LL

DIDT=TRUE

MIN_NECK_WIDTH=0.2MMSWITCH_NODE=TRUE



PP5V_S0

DIDT=TRUEMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMP1V5FB_VBST

P1V5FB_DRVH

DIDT=TRUE

MIN_NECK_WIDTH=0.2MMGATE_NODE=TRUE


FBVDD_ALTVO

GPUFB_VID_L



P1V5FB_DRVL

GPU_P1V5_REFIN

P1V5_GPU_VSNS

PP2V_S0GPU_P1V5_REFMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MMVOLTAGE=2V

P1V5FB_TRIP

PVIN_S0GPU_P1V0

P1V5FB_EN

P1V0GPU_EN

PM_ALL_GPU_PGOOD

PM_ALL_GPU_PGOOD

P1V0GPU_DRVL

DIDT=TRUE

MIN_NECK_WIDTH=0.2MMGATE_NODE=TRUE


P1V0GPU_DRVH

DIDT=TRUEGATE_NODE=TRUEMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

P1V0GPU_VBSTMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MMDIDT=TRUEP1V0GPU_LL

SWITCH_NODE=TRUE


DIDT=TRUE

P1V0GPU_TRIP

P1V0GPU_VFB


PP5V_S0GPU_VREF


PP5V_S0GPU_P1V0P1V5_VCC

P1V0S0_VSNS

PP1V0_S0GPU

PP1V5_GPU_REG

95 OF 132

86 OF 101

7 49 81

6 7 8 22 41 46 51 53 64 67 68 69 71 72 88 101

7 100

7 100

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

OUT

D

SG

D

SG

IN

IN

IN

D

SG

D

SG

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

PB14B

PB15A

PB15B

PB16A

PB17A

PT19A

PT16A

PB18B

PT7A

PR11B

PR24A

PR24B

PR14A

PR14B

PR12B

PR12A

PR11A

PR10B

PR10A

PR6A

PR6B

PR7A

PR7B

PR8A

PR9A

PR9B

PR8B

PT28A

PT8B

PT8A

PT7B

PT9A

PT9B

PL25A

PL25B

PL15A

PL14B

PL14A

PL12B

PL11B

PL12A

PL9A

PL8A

PL8B

PL6B

PL7B

PL7A

PL6A

PB28B

PB27A

PB28A

PB27B

PB26A

PB7B

PB7A

VCCIO2

PT17B

PT17A

PT16B

PT15A

PT14B

PT20B

PT19B

CFG0

GND GNDIO0

GNDIO1

GNDIO2

GNDIO3

GNDIO4

GNDIO5

GNDIO6

GNDIO7

LRC_GNDPLL

LRC_VCCPLL

PB18A

PB19A

PB19B

PB20A

PB20B

PL2A

PL2B

PR2A

PR2B

PT14A

PT15B

PT18B

PT20A

TCK

TDI

TDO

TMS

TOE

ULC_GNDPLL

ULC_VCCPLLVCCAUX

VCCIO0

VCCIO1

VCCIO3

VCCIO4

VCCIO5

VCCIO6

VCCIO7 VCCJ

PT18A

VCC

PT28B

PB26B

PL11A

PL10B

PL10A

PL9B

PB16B

PL15B

PB14A

PB17B

BANK6

BANK2

BANK0

BANK5

BANK7

BANK4

BANK3

BANK1

(OD)

(OD)

IN

IN

OUT

IN

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Required Pulldowns

(Tie/strap low if EGPU doesn’t provide CLKREQ_L output, provide pullup to GPU rail if using CLKREQ_L output from EGPU)

(Use open-drain PGOOD output to hold off the start of the GPU PWRSEQ until the first GPU rail’s source is valid)

GMUX CPLD

Required Pullups

LVDS Receiver Termination

78 87 97

83

84

83 97

83 97

83 97

83 97

83 97

83 97

83 97

2

1C9600

402

4V20%4.7UF

X5R-1

83 97

83 97

83 97

87

87

83 97

83 97

83 97

83 97

83 97

1/20WMF

1%

NO STUFF

201

10KR96701

2

83 97

5%100K

MF1/20W 201R9693 1 2

100KNO STUFF

5% MF1/20W 201R9691 1 2

5%10K

MF1/20W 201R9683 1 2

5%10K

MF1/20W 2011 2R9682

8 73 81 86 89

10K5% MF1/20W 201

R9681 1 2

5%1K

MF1/20W 201R9680 1 2

10V20%

402

0.1UF

CERM

C96301

2

20%

402

10VCERM

0.1UFC96311

2

SIGNAL_MODEL=EMPTY

2011/20W MF100 PLACE_NEAR=U9600.H12:5mm

1%R9666 1 2

2011/20W MFPLACE_NEAR=U9600.G13:5mm1001%

SIGNAL_MODEL=EMPTY

R9665 1 22011/20W MF

PLACE_NEAR=U9600.G14:5mm1001%

SIGNAL_MODEL=EMPTY

R9664 1 2

2011/20W MFPLACE_NEAR=U9600.F12:5mm1001%

SIGNAL_MODEL=EMPTY

R9663 1 2

8 79

2011/20W MFPLACE_NEAR=U9600.B2:5mm1001%

SIGNAL_MODEL=EMPTY

R9656 1 2

2011/20W MFPLACE_NEAR=U9600.E14:5mm1001%

SIGNAL_MODEL=EMPTY

R9662 1 22011/20W MF1%

PLACE_NEAR=U9600.D13:5mm100

SIGNAL_MODEL=EMPTY

R9661 1 22011/20W MF

PLACE_NEAR=U9600.J12:5mm1%

100

SIGNAL_MODEL=EMPTY

R9660 1 2


SIGNAL_MODEL=EMPTY

R9655 1 2

2011/20W MF100 PLACE_NEAR=U9600.E1:5mm

1%

SIGNAL_MODEL=EMPTY

R9651 1 2

2011/20W MF100 PLACE_NEAR=U9600.E3:5mm

1%

SIGNAL_MODEL=EMPTY

R9652 1 2


SIGNAL_MODEL=EMPTY

R9653 1 2


100

SIGNAL_MODEL=EMPTY

R9654 1 2

2011/20W MFPLACE_NEAR=U9600.H3:5mm1001%

SIGNAL_MODEL=EMPTY

R9650 1 2

SILK_PART=GMUX_RST

NO STUFF

10K

402MF-LF1/16W

1%

R96791

2

25

18 87 92

MF1/20W

201

5%4.7KR96711

2

FERR-220-OHM

0402

L9621

1 2

FERR-220-OHM

0402

L9620

1 2

8

SSM6N15FEAPESOT563

Q9607 6

2 1

SSM6N15FEAPESOT563

Q9607 3

5 41/20W

201MF

100K5%

R96761

2

NO STUFF

MF-LF1/16W

402

05%

R96751

2

18 87 92 201

1/20WMF

5%4.7KR96781

2

23 44 72 89

CRITICAL

1909782M-RT-SM

GMUX_JTAG_CONN

J9600

7

8

1

2

3

4

5

6

1/16W5%

0

402MF-LF

R96001 2

MF-LF402

1/16W5%

0R96101 2

5%1K

MF1/20W 201R9684 1 2

18 87 92

4.7K

MF1/20W

201

5%

R96721

2

MF1/20W

201

5%4.7KR96731

2

4.7K5%

201

1/20WMF

R96741

2

SSM6N15FEAPESOT563

Q9605 6

21

SOT563SSM6N15FEAPE

Q9605 3

54

2015%10K

MF1/20WR9685 1 2

2015%10K

MF1/20WR9686 1 2

18 87 92

MF

5%

201

1/20W

1KR96051 2

18 87 92

18 87 92

18 87 92

18 87 92

18 87 92

18 87 92

18 87 92

18 87 92

18 87 92

CRITICAL

U9600K1

J1

B8

C6

C12

C13

E13

M14

N10

N6

P3

M2

C1

E2

M11

P11

P4

N4

N3

M4

P5

M5

P6

M6

P7

M7

N7

N8

P9

N9

P10

M10

P12

P13

N12

P14

P2

N2

F3

G2

H2

G3

H1

H3

L1

L3

K3

L2

N1

P1

B1

B2

C2

D3

D1

E1

D2

E3

F1

G1

G12

G13

H13

H12

H14

J12

L14

M13

N14

N13

A14

B14

D12

D13

D14

E14

E12

F12

F14

G14

B6

C7

A6

A7

C8

C9

A8

B9

A9

C10

B10

A10

A11

B12

B13

A13

A2

A3

A1

B3

C5

A5

K14

L13

K13

L12

K2

B4

A4

B11

C4

J3

J13

N11

P8

C11

J2

J14

M8

B5

B7

A12

C14

F13

M12

M9

M3

N5

M1

C3

F2

K12

OMIT

CSBGA

XP25-5

18 87 92

25

19

6 25 46 93

6 16 44 46 93

6 16 44 46 93

6 16 44 46 93

6 16 44 46 93

201

1/20W

NO STUFF

10K1%

MF

R96471

2

6 16 44 46 93

82 87

79

8 16

87 89

86 87 89

81 87 89

71 87 89

8 73 87

83 87

83

0.1UF20%

402

10VCERM

C96041

2 10V

402CERM

20%0.1UFC96051

2

83 87

83 87

6 87 88

8 88

201

10K

NO STUFF

1/20WMF

1%

R9641 1

2

402

20%10V

0.1UF

CERM

C96061

2 10V20%

CERM402

C96071

2

0.1UF10V20%

402CERM

0.1UFC96081

2402CERM10V20%0.1UFC96091

2

0.1UF20%10VCERM402

C96101

2

CERM10V20%0.1UF

402

C96111

2

20%0.1UF10VCERM402

C96211

2

0.1UF

402

10V20%

CERM

C96221

2

10V20%0.1UF

402CERM

C96121

220%10V

402

0.1UF

CERM

C96131

2

10K1%

1/20WMF

201

NO STUFF

R96461

2

0.1UF10VCERM

20%

402

C96231

2 CERM

0.1UF10V

402

20%

C96241

2

402

10V20%

CERM

0.1UFC96141

2

402CERM

0.1UF10V20%

C96251

2

402

10VCERM

20%0.1UFC96151

2 CERM402

10V20%0.1UFC96161

2

10V20%0.1UF

CERM402

C96261

2 10V

0.1UF

402CERM

20%

C96271

2

10V20%

402CERM

0.1UFC96171

2

201

1/20WMF

1%10K

R9640 1

2

10V20%0.1UF

402CERM

C96281

2 CERM

0.1UF20%10V

402

C96291

2

78 79

8 18

78 79

8 18

78 87 97

78 87 97

78 87 97

201

10K1/20W

MF

1%

R96451

2

78 87 97

78 87 97

78 87 97

78 87 97

78 87 97

78 87 97

78 87 97

78 87 97

78 87 97

78 87 97

SYNC_DATE=08/03/2010SYNC_MASTER=K91_MARY

Graphics MUX (GMUX)

LVDS_EG_A_DATA_N<1>

LVDS_EG_A_CLK_N

LVDS_IG_A_DATA_N<1>LVDS_IG_A_DATA_N<0>

P1V0GPU_EN

DP_CA_DET_EGLCD_PWR_EN

PEG_CLKREQ_L

PP3V3_S0

GPUVCORE_EN

LVDS_EG_A_DATA_N<2>

LVDS_EG_B_DATA_N<0>

LVDS_EG_A_DATA_P<2>

LVDS_EG_B_DATA_P<0>

LVDS_DDC_SEL_EG

LVDS_IG_B_DATA_P<1>

LVDS_IG_A_DATA_N<2>

LVDS_IG_B_DATA_N<0>

LVDS_IG_B_DATA_P<2>

LVDS_EG_A_CLK_P

LVDS_EG_B_DATA_N<1>

LVDS_IG_A_CLK_N

LVDS_EG_A_DATA_P<1>LVDS_EG_A_DATA_P<0>

EG_LCD_PWR_EN

LVDS_EG_B_DATA_N<0>

GND

LVDS_IG_A_DATA_P<2>LVDS_IG_A_DATA_N<1>

LCD_BKLT_PWM

GND

EG_PWRSEQ_EN

GND

LVDS_IG_A_DATA_N<2>

JTAG_GMUX_TDI

JTAG_ISP_TCK

LVDS_A_DATA_P<0>

LVDS_EG_B_DATA_P<1>

EG_RESET_L

LVDS_B_DATA_N<0>

LVDS_A_DATA_N<0>

PP1V8_S0

LPCPLUS_RESET_L

LPC_AD<3>LPC_AD<2>

LVDS_EG_A_CLK_NTP_LVDS_MUX_SEL_EG

LPC_AD<1>

TP_GMUX_PL14B

LVDS_IG_B_DATA_N<1>

LVDS_IG_B_DATA_P<0>

JTAG_GMUX_TDO

LVDS_EG_A_DATA_P<2>

LVDS_EG_B_DATA_N<1>

LVDS_IG_PANEL_PWR

LVDS_B_DATA_P<1>

LVDS_B_DATA_P<0>

LVDS_B_DATA_P<2>LVDS_B_DATA_N<2>

PP3V3_S0

LVDS_EG_A_DATA_N<0>

LVDS_IG_BKL_ON

LVDS_IG_B_DATA_P<0>

LVDS_IG_A_DATA_P<1>LVDS_IG_A_DATA_P<0>LVDS_IG_A_CLK_P

LVDS_IG_A_DATA_P<2>

LVDS_EG_A_DATA_N<2>

LVDS_EG_B_DATA_N<2>

LVDS_EG_A_DATA_P<1>P3V3GPU_EN

GPUVCORE_EN

ALL_SYS_PWRGD

JTAG_GMUX_TMS

P1V5FB1V8GPU_R_EN

GMUX_S3_PD_GND


DP_HOTPLUG_DETLVDS_EG_A_DATA_P<0>LVDS_EG_A_DATA_N<0>

LVDS_EG_A_CLK_P

GMUX_S3_PD_EN

PP3V3_S3

LVDS_B_CLK_P

P3V3GPU_EN

DP_A_CA_DET

LCD_PWR_EN

P1V0GPU_EN

LVDS_A_DATA_N<1>

LVDS_A_DATA_N<2>

LVDS_B_DATA_N<1>

LVDS_IG_B_DATA_P<2>

GMUX_INT

PP3V3_S0

JTAG_GMUX_TDI

JTAG_GMUX_TDI JTAG_GMUX_TDO

LVDS_EG_A_DATA_N<1>

GND

LVDS_A_DATA_P<2>

LVDS_A_DATA_P<1>

LVDS_B_CLK_N

LVDS_A_CLK_NLVDS_A_CLK_PGMUX_DEBUG_RESET_L

LVDS_IG_B_DATA_N<2>LVDS_IG_B_DATA_N<1>

EG_PWRSEQ_EN

PP3V3_S0

GMUX_DEBUG_RESET_L

LVDS_DDC_SEL_EG

EG_RESET_L

JTAG_ISP_TCK

JTAG_GMUX_TDO

LPC_AD<0>

LPC_FRAME_L

LVDS_IG_A_DATA_P<1>

LVDS_IG_B_DATA_N<0>LVDS_IG_B_DATA_P<1>

TP_GMUX_PL6B

JTAG_GMUX_TMS

LVDS_IG_A_DATA_P<0>LVDS_IG_A_DATA_N<0>

LVDS_IG_B_DATA_N<2>

PM_ALL_GPU_PGOODGMUX_VSYNC

GMUX_VSYNC

PEX_CLKREQ_L



PP3V3_S0_GMUX_ULC_VCCPLL


PP3V3_S0_GMUX_LRC_VCCPLLLVDS_EG_B_DATA_P<0>LVDS_EG_B_DATA_P<1>LVDS_EG_B_DATA_P<2>

JTAG_GMUX_TDI

GMUX_TOE

LVDS_IG_A_CLK_P

GMUX_RESET_LEG_BKLT_EN

GMUX_PL6A

GMUX_CFG0

JTAG_ISP_TDO

PP3V3_T29

JTAG_GMUX_TDO

LCD_BKLT_PWM

LPC_CLK33M_GMUX

P1V5FB1V8GPU_R_EN

DP_MUX_SEL_EGDP_MUX_EN

LCD_BKLT_EN


VOLTAGE=3.3V

PP3V3_S0_GMUX_R


MIN_LINE_WIDTH=0.4 mmPP1V8_S0_GMUX_R

LVDS_IG_A_CLK_N

T29_JTAG_FET

JTAG_ISP_TDI

PP3V3_S0

LVDS_DDC_SEL_IG

DP_MUX_SEL_EGLVDS_DDC_SEL_IG

PP1V2_S0

96 OF 132

87 OF 101

78 87 97

78 87 97

18 87 92

18 87 92

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

78 87 97

78 87 97

18 87 92

18 87 92

18 87 92

18 87 92

78 87 97

78 87 97

18 87 92

78 87 97

78 87 97

87

8 19 23 33 87

6 7 14 17 20 22

25 70

71

6 7 12 16 17 18 19 20 22

23 25 26 28

32 35 36 39

40 41 45 47

48 49 50 51

53 56 60 61

71 72 79 82

83 84 87 88

89 98

78 87 97

18 87 92

18 87 92

18 87 92

18 87 92

18 87 92

78 87 97

78 87 97

71 87 89

81 87 89

18 87

87 89

6 7 8 18 19 24 25 29 30 31 32 47 48 49

53 54 71 72

82 87

86 87 89

6 7 12 16 17 18

19 20 22

23 25 26

28 32 35

36 39 40

41 45 47

48 49 50

51 53 56

60 61 71

72 79 82

83 84 87

88 89 98

87

87 87

18 87 92

18 87 92

87

87

83 87

8 73 87

8 19 23 33 87

87

6

18 87

8 87 88

8 87 88

78 87 97

78 87 97

78 87 97

87

8 19 33

7 16 19 25 33 34 35

87

6 87 88

8 19 33

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

83 87

83 87

6 7 70

INVDDIO VINVLDO

SW_0

SW_1

FB

OUT3

OUT2

OUT1

OUT4

OUT5

OUT6

GND_SW

GND_S

GND_L

GND_SW

VSYNC

ISET

FILTER

FSET

SCLK

PWM

SDA

FAULT

EN

IN

IN

D

SG

D

SG

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

BI





36

BRANCH

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DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

LOADING

*LCD_BKLT_PWM SHOULD BE AWAY FROM BOOST CIRCUIT

*PPBUS_SW_LCDBKLT_PWR_SW SHOULD BE KEPT AS SHORT AS POSSIBLE.

*C9797 AND C9799 SHOULD BE PLACED IN T-BONE FOR ACOUSTICS

ON THE SENSOR PAGE

AND PPBUS_SW_BKL

PPBUS_SW_LCDBKLT_PWR

CHANNEL

MOSFET

measurement on LED strings.10.2 ohm resistors for current

(EEPROM should set EN_I_RES=1)

Addr: 0x58(Wr)/0x59(Rd)

PPBUS S0 LCDBkLT FET

RDS(ON)

I_LED=22.7mA

see spec for othersFpwm=9.62kHz

FDC638APZ

P-TYPE

I_LED=369/Riset

THERE IS A SENSE RESISTOR BETWEEN

0.715 A (EDP)

43 mOhm @4.5V

5%MF-LF4021/16W10KR97551

2

10K

402MF-LF1/16W5%

R97411 2

10UF10%X5R50V1210-1

CRITICAL

PLACE_NEAR=D9701.2:5mm

C97991

210%10UF

CRITICAL

PLACE_NEAR=D9701.2:3mm

1210-1X5R50V

C97971

2

402X5R10%6.3V

1UF

NO STUFFC9741

1 2

1217AS-2SM

33UH-1.8A-110MOHM

CRITICALL97011 2

603X5R6.3V20%

10UFNO STUFFC9740

1 2

335%

4021/16WMF-LF

R97041 2

8 87

CRITICAL

LP8550

25-BUMP-MICROU9701

A3

C3

A5

C2

B4

E4

B5

A1A2

B3

E5D5C5E3E2E1

A4

D3D4

B1B2

C4

C1

D1

D2

25

8 87

SSM6N15FEAPESOT563

Q9707 3

5 4

1%1/16WMF-LF402

147KR97891

2

SSM6N15FEAPESOT563

Q9707 6

2 1

603-HF

BOTTOM

3AMP-32V-467F9700

1 2

1%

MF-LF402

1/16W

301KR97881

2402

10%0.1UF

X5R16V

C9782 1

2

SSOT6-HF

CRITICAL

FDC638APZ_SBMS001Q9706

12

56

3

4

SM


XW97201 2

402MF-LF

05%

1/16W

R97571 2

25V10%X5R805

10UF


CRITICALC97121

2 25V402X5R10%0.1UF


C97131

2 50V10%X7R-CERM

220PF

402


C97961

2

SOD-123

CRITICALPLACE_NEAR=L9701.2:3mm

RB160M-60G

D97011 2

5%MF-LF

0

4021/16W

BOTTOM


BKLT:PRODR97221 2

5%MF-LF1/16W

0PLACE_NEAR=U9701.E2:10mm

BKLT:PROD

402BOTTOM

R97211 2

1/16WMF-LF5%

402

0

BOTTOM


BKLT:PRODR97201 2

6 82

6 82

4021/16W5%

MF-LF

0R97531 2

6 82

6 82

6 82

6 82

402MF-LF5%

0

1/16WBOTTOM

BKLT:PROD

PLACE_NEAR=U9701.D5:10mmR97181 2

5%

402MF-LF1/16W

0

BOTTOM

BKLT:PROD

PLACE_NEAR=U9701.C5:10mmR97191 2

402

0

MF-LF1/16W5%

BOTTOM

BKLT:PROD

PLACE_NEAR=U9701.E5:10mmR97171 2

100K1%1/16WMF-LF402

R97152

1

1%1/16WMF-LF402

301KR97311 2

X5R25V1UF10%

603-1

PLACE_NEAR=U9701.D1:5mm

C97101

2

10%16V0.1UF

X5R402


C97111

2

SM

PLACEMENT_NOTE=Keep away from noise nodes(E4, A1, A2, B1, B2 pins)

XW97101 2

16VCERM10%

PLACE_NEAR=U9701.D1:3mm

402

0.01UFC97141

2

6 87

50V402

5%CERM

33PFC97041

2

402

16.2K1/16WMF-LF1%

R97141

2

16 23 26 28 30 41 47 61 93

16 23 26 28 30 41 47 61 93

47.0K1%

MF-LF

NO STUFF

4021/16W

R97401 2

90.9KMF-LF

4021/16W

1%

R97161

2

402

05%

NO STUFF

1/16WMF-LF

R97541

2

LCD Backlight DriverSYNC_MASTER=K90I_KIRANSYNC_DATE=06/25/2010

103S0198 R9720,R9721,R97223RES,THIN FLIM,1/16W,10.2 OHM,0.1,0402,SM BKLT:ENG103S0198 RES,THIN FLIM,1/16W,10.2 OHM,0.1,0402,SMR9717,R9718,R97193 BKLT:ENG

PPBUS_SW_LCDBKLT_PWR_SWMIN_NECK_WIDTH=0.2 MM

DIDT=TRUESWITCH_NODE=TRUEVOLTAGE=50V

MIN_LINE_WIDTH=0.5 MMPPBUS_SW_BKL

PP5V_S0


GND_BKL_SGND

MIN_NECK_WIDTH=0.075 mmBKL_VSYNC_R

BKL_FLTR_R

MIN_NECK_WIDTH=0.075 mmBKL_FSETSMBUS_PCH_CLK

LCD_BKLT_PWM

SMBUS_PCH_DATA

GMUX_VSYNC

LCDBKLT_EN_L

LCDBKLT_DISABLE

BKLT_PLT_RST_L

LCD_BKLT_EN


BKL_ISEN1


MIN_NECK_WIDTH=0.20 mmMIN_LINE_WIDTH=0.5 mmLED_RETURN_5

MIN_LINE_WIDTH=0.5 mmLED_RETURN_4MIN_NECK_WIDTH=0.20 mm

LED_RETURN_1MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.20 mm


LED_RETURN_2MIN_LINE_WIDTH=0.5 mm

TP_BKL_FAULTPLACE_SIDE=BOTTOM

BKL_ISEN2


VOLTAGE=12.6VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.4 mmPPBUS_S0_LCDBKLT_FUSEDPPBUS_G3H

PPBUS_SW_LCDBKLT_PWRMIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=12.6V


BKL_FLTR

BKL_PWMBKL_SDAMIN_NECK_WIDTH=0.075 mm

BKL_ISEN4


BKL_ISEN5



PPVOUT_S0_LCDBKLT


BKL_ISEN3

MIN_NECK_WIDTH=0.20 mmMIN_LINE_WIDTH=0.5 mmLED_RETURN_6

MIN_LINE_WIDTH=0.5 mmLED_RETURN_3MIN_NECK_WIDTH=0.20 mm

PP3V3_S0

BKL_ISETMIN_NECK_WIDTH=0.075 mm

BKL_SCLMIN_NECK_WIDTH=0.075 mm

BKL_EN

VOLTAGE=50VPPVOUT_SW_LCDBKLT_FB

BKL_ISEN6


LCDBKLT_EN_DIV

97 OF 132

88 OF 101

7 100

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 101

88 100

6 7 8 35 39 48 49 62 63

88 100

6 8 82 100

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 89 98

IN

IN

OUTIN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

Y

A

B 08

Y

A

B 08OUT

OUT

OUT




36

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REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

Unused PGOOD signal

GPU Rail SequencingWhistler GPU requires rails to comeup in the following order:

1) GPU_3.3V

2) GPUVcore

3) GPU_1.0V

4) GPU_1.8V;GDDR5 1.5/1.35V

EXT GPU PWRGD Pullup

PCH S0 PWRGD

402

1/16WMF-LF

5%1K

R99501

2

23 44 72 87

67

5%

402MF-LF1/16W

0


R99311 2

10%

402

6.3VCERM-X5R

0.47UF

NO STUFF

C99311

2

0.47UF

402CERM-X5R

10%6.3V

NO STUFF

C99321

2

0

5%1/16WMF-LF402


R99321 2

8 73 81 86 87 89 67

66 89

402MF-LF1/16W

5%100K

PLACE_NEAR=U8000.AH16:7mm

R99901

2

8 73 81 86 87 89

8 73 81 86 87 89

8 73 81 86 87 89

86 89

86 87 89

81 87 89

71 87 89

71 89

PLACE_NEAR=U1800.p12:7mm

74LVC2G08GTSOT833

U99501

2

4

8

7

74LVC2G08GTSOT833

U99505

6

4

8

371 89

1/16WMF-LF

5%

402

NO STUFF

10KR99911

2

MF-LF

0

NO STUFF

5%1/16W

402

R99631 2

17 23

17 19 89

NO STUFF

MF-LF1/16W

PLACE_NEAR=U1800.L22:5.54mm

402

5%0R99611

2

1K

1/16WMF-LF

5%

402

R99621 2

0

402MF-LF1/16W5%

R99601 2

402

10VCERM

20%0.1UFC99501

2

Power Sequencing EG/PCH S0SYNC_DATE=08/03/2010SYNC_MASTER=K91_MARY

P1V8GPU_ENMAKE_BASE=TRUE

P1V8GPU_EN

GPUVCORE_EN

P1V0GPU_ENMAKE_BASE=TRUE

P1V5FB_EN

MAKE_BASE=TRUE

P3V3GPU_EN

MAKE_BASE=TRUE

P1V5FB1V8GPU_R_EN

P3V3GPU_EN

P1V0GPU_EN

MAKE_BASE=TRUEPM_PCH_PWROK

PM_S0_PGOOD

SMC_DELAYED_PWRGD

PM_PCH_PWROK

SYS_PWROK_R

ALL_SYS_PWRGD

PP3V3_S0

MAKE_BASE=TRUE

PM_ALL_GPU_PGOOD

PM_ALL_GPU_PGOOD

PM_ALL_GPU_PGOOD

PM_ALL_GPU_PGOOD

CPUIMVP_PGOOD

MAKE_BASE=TRUE

GPUVCORE_EN

PM_PCH_SYS_PWROK

PP3V3_S5PP3V3_S0

P3V3GPU_EN

GPUVCORE_EN

P1V5FB1V8GPU_R_EN

MAKE_BASE=TRUE

P1V5FB_EN

P1V0GPU_EN

TP_P1V5S3RS0_RAMP_DONE

TP_DDRREG_PGOODTP_DDRREG_PGOODMAKE_BASE=TRUE

TP_P1V5S3RS0_RAMP_DONEMAKE_BASE=TRUE

CPUIMVP_AXG_PGOOD

PP3V3_S0

99 OF 132

89 OF 101

71 89

86 87 89

71 87 89

87 89

35 44

17 19 89

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56

60 61 71 72 79 82 83 84 87

88 89 98

81 87 89

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

71 87 89

81 87 89

87 89

86 89

86 87 89

66 89

71 89

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89

98

TABLE_PHYSICAL_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM


MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_SPACING_RULE_ITEMTABLE_SPACING_RULE_ITEM



















36

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DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

SOURCE: Calpella SFF DG (DG-407364_v1.5), Section 2.8

PCI-Express

CPU Signal ConstraintsNET_TYPE

PHYSICAL SPACINGELECTRICAL_CONSTRAINT_SET

(FSB_CPURST_L)

Some signals require 27.4-ohm single-ended impedance.Most CPU signals with impedance requirements are 50-ohm single-ended.

CPU Net Properties

NOTE: 7 mil gap is for VCCSense pair, which Intel says to route with 7 mil spacing without specifying a target impedance.

I115

I120

I121

I122

I123

I124

I125

I126


CPU Constraints

=27P4_OHM_SE=27P4_OHM_SECPU_27P4S * 7 MIL=27P4_OHM_SE =27P4_OHM_SE 7 MIL

* ?CPU_COMP 20 MIL

CPU_ITP * ?=2:1_SPACING

?CPU_AGTL TOP,BOTTOM =2x_DIELECTRIC

?*CPU_VID 0.457 MM

CPU_VCCSENSE * ?25 MIL

=85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF*PCIE_85D =85_OHM_DIFF=85_OHM_DIFF

CLK_PCIE 20 MIL ?*

=50_OHM_SE=50_OHM_SE =STANDARD=STANDARD* =50_OHM_SE =50_OHM_SECPU_50S

=55_OHM_SE=55_OHM_SE*CPU_55S =55_OHM_SE =55_OHM_SE =STANDARD=STANDARD

=3X_DIELECTRICPCIE ?* PCIE ?=4X_DIELECTRICTOP,BOTTOM

CPU_8MIL * ?8 MIL

CPU_AGTL * =STANDARD ?

=90_OHM_DIFF=90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF*CLK_PCIE_90D =90_OHM_DIFF

XDP_CPU_TCKXDP_TCK CPU_50S CPU_ITP

XDP_BPM XDP_BPM_L<3..0>CPU_50S CPU_ITP

XDP_CPU_CLK100M_PCLK_PCIECLK_PCIE_90DXDP_CLK_ITP

CLK_PCIE_90D CLK_PCIE XDP_CPU_CLK100M_NXDP_CLK_ITPCPU_PSI_LCPU_8MILCPU_55S

PM_DPRSLPVR PM_DPRSLPVRCPU_AGTLCPU_50SCPU_PEG_COMPCPU_27P4S CPU_COMP

ITPCPU_CLK100M_NCLK_PCIE_90DXDP_CLK_CPU CLK_PCIE

CLK_PCIE_90DXDP_CLK_PCH ITPXDP_CLK100M_PCLK_PCIE

CLK_PCIE_90D ITPXDP_CLK100M_NCLK_PCIEXDP_CLK_PCH

XDP_CPU_TDICPU_50SXDP_TDI CPU_ITP

CPU_VCCSENSE CPU_VCCSENSECPU_27P4S CPU_VCCSENSE_N

CPU_AXG_SENSE_PCPU_VCCSENSECPU_27P4SCPU_VCCSENSE

CPU_VCCSENSECPU_27P4SCPU_VCCSENSE CPU_AXG_SENSE_N

CPU_27P4S CPU_VCCSENSE CPU_AXG_VALSENSE_P

GFX_DPRSLPVRCPU_AGTLCPU_50SPM_DPRSLPVR

CPU_AGTL GFX_VR_ENCPU_50S

CPU_55S GFX_VID<6..0>CPU_8MIL

CPU_VCCSENSECPU_27P4S CPU_VCC_VALSENSE_NCPU_27P4S CPU_VCCSENSE CPU_VCC_VALSENSE_P

XDP_CPU_TRST_LXDP_TRST_L CPU_50S CPU_ITP

XDP_CPU_TDOCPU_50SXDP_TDO CPU_ITP

CPU_COMP1CPU_27P4SCPU_COMP CPU_COMP

ITPCPU_CLK100M_PCLK_PCIE_90DXDP_CLK_CPU CLK_PCIE

CPU_8MILPM_THRMTRIP_L CPU_50S PM_THRMTRIP_LCPU_PWRGD CPU_AGTL CPU_PWRGDCPU_50S

CPU_50S CPU_AGTLCPU_PROCHOT_L CPU_PROCHOT_L

CPU_CATERR_LCPU_50SCPU_CATERR_L CPU_AGTL

DMI_CLK100M_CPU_NCLK_PCIE_90D CLK_PCIE

PCIE_85DFDI_DATA PCIE FDI_DATA_P<7:0>

DMI_CLK100M CLK_PCIE_90D CLK_PCIE DMI_CLK100M_CPU_P

CPU_50S XDP_CPU_PRDY_LXDP_PRDY_L CPU_ITP

CPU_50S XDP_CPU_PREQ_LXDP_PREQ_l CPU_ITP

XDP_DBRESET_LCPU_ITPXDP_BDRESET_L CPU_50S

CPU_ITPXDP_CPU_PWRGOOD XDP_CPU_PWRGDCPU_50S

PM_MEM_PWRGDCPU_AGTLPM_MEM_PWRGD CPU_50S

PM_SYNCPM_SYNC CPU_AGTLCPU_50S

CPU_50S CPU_PECIPCIECPU_PECI

CPU_50S CPU_AGTL FDI_INT

CPU_AGTLCPU_50S TP_CPU_VTT_SELECTCPU_AGTLCPU_50S CPU_PROC_SEL_L

DMI_N2S PCIE_85D PCIE DMI_N2S_N<3:0>

XDP_BPM_L<7..4>XDP_BPM_L CPU_ITPCPU_50SXDP_CPURST_LCPU_ITPCPU_50S

CPU_VID<6..0>CPU_8MILCPU_55S

CPU_COMP0CPU_27P4SCPU_COMP CPU_COMP

CPU_CFG<11..0>CPU_50S CPU_ITPCPU_CFG

CPU_SM_RCOMP2CPU_COMPCPU_SM_RCOMP CPU_27P4S

XDP_CPU_TMSCPU_50SXDP_TMS CPU_ITP

FDI_LSYNC<1..0>CPU_AGTLCPU_50S

FDI_FSYNC<1..0>CPU_AGTLCPU_50S

PCIE_85DDMI_N2S PCIE DMI_N2S_P<3:0>

FDI_DATA PCIE_85D FDI_DATA_N<7:0>PCIE

DMI_S2N DMI_S2N_N<3:0>PCIEPCIE_85D

DMI_S2N PCIE_85D PCIE DMI_S2N_P<3:0>

CPUIMVP_IMONCPU_AGTLCPU_50S

GFXIMVP_IMONCPU_AGTLCPU_50S

PEG_R2D_P<7..0>PCIEPCIE_85DPEG_R2D_N<7..0>PCIEPCIE_85DPEG_R2D_C_P<7..0>PCIEPEG_R2D PCIE_85D

PEG_D2R PEG_D2R_P<7..0>PCIE_85D PCIE

PEG_R2D_C_N<7..0>PCIE_85D PCIE

PEG_D2R_N<7..0>PCIE_85D PCIEPEG_D2R_C_P<7..0>PCIE_85D PCIE

PCIEPCIE_85D PEG_D2R_C_N<7..0>CPU_50S CPU_VIDSOUTCPU_VID

CPU_50S CPU_VID CPU_VIDSCLK

CPU_50S CPU_VIDALERT_LCPU_VID

CPU_PEG_RBIASCPU_COMPCPU_27P4S

CPU_COMPCPU_COMP CPU_27P4S CPU_COMP3

CPU_VCCSENSE CPU_VCCSENSE_PCPU_VCCSENSECPU_27P4S

CPU_VCCSENSE CPU_VCCIOSENSE_PCPU_27P4S CPU_VCCSENSE

CPU_VCCSENSE CPU_VCCSENSECPU_27P4S CPU_VCCIOSENSE_N

CPU_AXG_VALSENSE_NCPU_VCCSENSECPU_27P4S

CPU_27P4SCPU_COMP CPU_COMP2CPU_COMP

CPU_SM_RCOMP CPU_SM_RCOMP1CPU_COMPCPU_27P4S

CPU_SM_RCOMP0CPU_27P4SCPU_SM_RCOMP CPU_COMP

CPU_CFG<17..16>CPU_50S CPU_ITPCPU_CFG

100 OF 132

90 OF 101

10 23

10 23

23

23

9

10 16

16 23

16 23

10 23

12 67

12 67

12 67

12

8

12

12

10 23

10 23

10 16

10 19

10 19 23

10 45 67

10

10 16

6 9 17

10 16

10 23

10 23

10 23 25

23

10 17 29

10 17

10 19 44

6 9 17

8

10 17

9 17

10 23

23

8

9 23

10 23

6 9 17

6 9 17

9 17

6 9 17

6 9 17

6 9 17

73

73

8 73

8 73

8 73

8 73

73

73

12 67

12 67

12 67

12 67

12 69

12 69

12

9 23



TABLE_SPACING_ASSIGNMENT_ITEM


AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD




















































36

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345678

D

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8 7 5 4 2 1

Memory Bus Constraints Memory Net PropertiesELECTRICAL_CONSTRAINT_SET

DDR3:DQ/DM signals should be matched within 0.508mm of associated DQS pair.

Memory Bus Spacing Group Assignments

DQS intra-pair matching should be within 0.127mm, no inter-pair matching requirement.

CONTROL signals should be matched within [CLK-12.7mm] to [CLK+0.0mm] of CLK pairs.

DQS to clock matching should be within [CLK-12.7mm] and [CLK+25.4mm].

DQ/DQS/A/BA/cmd signal spacing is 4x dielectric, CLK is 5x dielectric.A/BA/CMD signals should be matched within [CLK-12.7mm] to [CLK+12.7mm] of CLK pairs.

SOURCE: Calpella SFF Platform DG, Rev 1.5 (#407364), Section 2.2

Need to support MEM_*-style wildcards!

Maximum length of any signal from die pad to SODIMM pad is 139.7mm, from procesor ball to SODIMM pad is 114.3mm.

PHYSICAL SPACING

NET_TYPE

CLK intra-pair matching should be within 0.127mm, inter-pair matching should be within 0.508mm.

Memory ConstraintsSYNC_MASTER=K18_MLB SYNC_DATE=04/27/2010

MEM_DATA2MEMMEM_DATA MEM_CLK *

MEM_CMD2MEMMEM_CMD *MEM_DQS

* =72_OHM_DIFF =72_OHM_DIFF =72_OHM_DIFF =72_OHM_DIFF =72_OHM_DIFF =72_OHM_DIFFMEM_72D

=4:1_SPACINGMEM_CLK2MEM ?*

* ?MEM_CTRL2MEM =2.5:1_SPACING

?* =3:1_SPACINGMEM_CTRL2CTRL

MEM_CMD *MEM_CLK MEM_CMD2MEM

* MEM_CMD2MEMMEM_CTRLMEM_CMD

*MEM_CMD MEM_CMD2CMDMEM_CMD

* MEM_CMD2MEMMEM_DATAMEM_CMD

MEM_DATA *MEM_CTRL MEM_DATA2MEM

MEM_DATA *MEM_CMD MEM_DATA2MEM

MEM_2OTHERMEM_CLK **

MEM_2OTHER* *MEM_CTRL

MEM_2OTHERMEM_DQS **

MEM_2OTHER* *MEM_DATA

MEM_2OTHERMEM_CMD **

MEM_CMD2CMD * =1.5:1_SPACING ?

?*MEM_DQS2MEM =3:1_SPACING

MEM_CLK2MEMMEM_CLK *MEM_CLK

MEM_CLK2MEMMEM_CLK *MEM_CTRL

MEM_CLK2MEMMEM_CLK *MEM_DQS

*MEM_CLK MEM_DATA MEM_CLK2MEM

MEM_CLK2MEMMEM_CLK *MEM_CMD

MEM_CTRL *MEM_CLK MEM_CTRL2MEM

MEM_CTRL2CTRL*MEM_CTRL MEM_CTRL

MEM_CTRL2MEM*MEM_CTRL MEM_CMD

MEM_CTRL2MEM*MEM_CTRL MEM_DATA

MEM_CTRL *MEM_DQS MEM_CTRL2MEM

MEM_CLK MEM_DQS2MEMMEM_DQS *

MEM_DQS2MEMMEM_DQS MEM_CTRL *

MEM_DQS MEM_CMD MEM_DQS2MEM*

MEM_DQS2MEMMEM_DQS *MEM_DQS

MEM_DQS2MEMMEM_DATA *MEM_DQS

?MEM_2OTHER * 25 MILS

MEM_DATA2MEM * ?=3:1_SPACING

MEM_DATA2DATA ?* =1.5:1_SPACING

* ?=3:1_SPACINGMEM_CMD2MEM

=37_OHM_SE =37_OHM_SE =37_OHM_SE=37_OHM_SEMEM_37S =STANDARD=STANDARD*

=85_OHM_DIFFMEM_85D =85_OHM_DIFF* =85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF

MEM_DATA2MEMMEM_DATA *MEM_DQS

MEM_DATA MEM_DATA2DATA*MEM_DATA

=50_OHM_SE =STANDARD* =STANDARD=50_OHM_SE =50_OHM_SE =50_OHM_SEMEM_50S

=40_OHM_SE=40_OHM_SE =40_OHM_SE=40_OHM_SE =STANDARD* =STANDARDMEM_40S

MEM_CMD MEM_A_CAS_LMEM_A_CMD MEM_40S

MEM_A_DQS_N<5>MEM_DQSMEM_A_DQS5 MEM_85D

MEM_A_DQS_P<5>MEM_A_DQS5 MEM_DQSMEM_85D


MEM_A_DQS_P<4>MEM_DQSMEM_A_DQS4 MEM_85D


MEM_A_DQS_P<2>MEM_A_DQS2 MEM_DQSMEM_85D

MEM_DQS MEM_A_DQS_N<0>MEM_A_DQS0 MEM_85D


MEM_A_DQ<63..56>MEM_A_DQ_BYTE7 MEM_50S MEM_DATA



MEM_A_DQS_P<1>MEM_DQSMEM_A_DQS1 MEM_85DMEM_A_DQS_N<1>MEM_DQSMEM_A_DQS1 MEM_85D

MEM_A_DQS_P<3>MEM_DQSMEM_A_DQS3 MEM_85DMEM_A_DQS_N<3>MEM_DQSMEM_A_DQS3 MEM_85D

MEM_B_CLK_N<5..0>MEM_B_CLK MEM_72D MEM_CLK

MEM_B_CS_L<3..0>MEM_37S MEM_CTRLMEM_B_CNTL

MEM_B_CKE<3..0>MEM_B_CNTL MEM_37S MEM_CTRL

MEM_B_CLK MEM_72D MEM_CLK MEM_B_CLK_P<5..0>

MEM_B_RAS_LMEM_40S MEM_CMDMEM_B_CMDMEM_B_CAS_LMEM_40S MEM_CMDMEM_B_CMDMEM_B_WE_LMEM_40S MEM_CMDMEM_B_CMD

MEM_B_DQ<7..0>MEM_DATAMEM_B_DQ_BYTE0 MEM_50SMEM_B_DQ<15..8>MEM_DATAMEM_B_DQ_BYTE1 MEM_50SMEM_B_DQ<23..16>MEM_DATAMEM_B_DQ_BYTE2 MEM_50SMEM_B_DQ<31..24>MEM_DATAMEM_B_DQ_BYTE3 MEM_50S

MEM_B_DQ<47..40>MEM_DATAMEM_B_DQ_BYTE5 MEM_50S


MEM_DQS MEM_B_DQS_N<1>MEM_B_DQS1 MEM_85D

MEM_DQSMEM_85D MEM_B_DQS_P<2>MEM_B_DQS2


MEM_DQS MEM_B_DQS_P<3>MEM_B_DQS3 MEM_85D

MEM_DQSMEM_85D MEM_B_DQS_N<3>MEM_B_DQS3

MEM_B_DQS5 MEM_DQS MEM_B_DQS_P<5>MEM_85D


MEM_A_CNTL MEM_37S MEM_A_ODT<3..0>MEM_CTRL

MEM_CMDMEM_40SMEM_A_CMD MEM_A_BA<2..0>

MEM_A_DQ<15..8>MEM_A_DQ_BYTE1 MEM_DATAMEM_50S

MEM_A_DQS6 MEM_A_DQS_P<6>MEM_DQSMEM_85D

MEM_DQS MEM_A_DQS_N<6>MEM_A_DQS6 MEM_85D


MEM_B_DQS_N<0>MEM_DQSMEM_B_DQS0 MEM_85D

MEM_B_DQS_P<0>MEM_DQSMEM_B_DQS0 MEM_85D




MEM_B_DQS5 MEM_DQS MEM_B_DQS_N<5>MEM_85D




MEM_B_DQS6 MEM_DQS MEM_B_DQS_N<6>MEM_85D

MEM_72D MEM_CLKMEM_A_CLK MEM_A_CLK_N<5..0>MEM_72D MEM_CLKMEM_A_CLK MEM_A_CLK_P<5..0>

MEM_DQSMEM_B_DQS7 MEM_B_DQS_N<7>MEM_85D


MEM_B_A<15..0>MEM_40S MEM_CMDMEM_B_CMDMEM_B_BA<2..0>MEM_CMDMEM_40SMEM_B_CMD

MEM_B_ODT<3..0>MEM_37S MEM_CTRLMEM_B_CNTL

MEM_DATA MEM_A_DQ<7..0>MEM_A_DQ_BYTE0 MEM_50S




MEM_CMD MEM_A_WE_LMEM_A_CMD MEM_40S

MEM_CMDMEM_A_CMD MEM_A_RAS_LMEM_40S

MEM_40S MEM_CMD MEM_A_A<15..0>MEM_A_CMD

MEM_37S MEM_A_CS_L<3..0>MEM_CTRLMEM_A_CNTL

MEM_37S MEM_CTRL MEM_A_CKE<3..0>MEM_A_CNTL

101 OF 132

91 OF 101

6 11 26

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 26 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 28

6 11 28

6 11 28

6 11 28

6 11 28

6 11 28

6 11 28

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 26

6 11 26

6 11 27

6 11 26 27

6 11 26 27

6 11 27

6 11 27

6 11 27

6 11 27

6 11 27 28

6 11 27

6 11 27

6 11 27

6 11 27 28

6 11 27

6 11 27 28

6 11 26

6 11 26

6 11 27

6 11 27

6 11 28

6 11 28

6 11 28

6 11 27

6 11 27

6 11 27

6 11 27

6 11 26

6 11 26

6 11 26

6 11 26

6 11 26

































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SOURCE: HR PLATFORM DESIGN GUIDE, TABLES 191,193

ELECTRICAL_CONSTRAINT_SET PHYSICAL

PCH Net PropertiesNET_TYPE


SATA Interface Constraints

USB 2.0 Interface Constraints


SPACING

Digital Video Signal Constraints

I213

I214

I215

I218

I219

PCH Constraints 1SYNC_MASTER=K92_MLB SYNC_DATE=08/09/2010

=90_OHM_DIFFDP_85D * =90_OHM_DIFF =90_OHM_DIFF=90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF

=50_OHM_SE =50_OHM_SESATA_50SE * =50_OHM_SE =50_OHM_SE =50_OHM_SE=50_OHM_SE

15 MIL ?*USB_RBIAS

=4:1_SPACING ?USB ISL3,ISL4,ISL9,ISL10

=85_OHM_DIFF =85_OHM_DIFF=85_OHM_DIFF=85_OHM_DIFFUSB_85D * =85_OHM_DIFF=85_OHM_DIFF

=STANDARD* =STANDARD =STANDARD =STANDARD=STANDARDPCH_USB_RBIAS =STANDARD

?SATA ISL3,ISL4,ISL9,ISL10 =5:1_SPACING

=4:1_SPACINGUSB TOP,BOTTOM ?

15 MIL* ?SATA_ICOMP

ISL3,ISL4,ISL9,ISL10LVDS ?=4:1_SPACING

=37_OHM_SE =37_OHM_SE*SATA_37SE =37_OHM_SE=37_OHM_SE =37_OHM_SE=37_OHM_SE

SATA =5:1_SPACINGTOP,BOTTOM ?

=90_OHM_DIFF =90_OHM_DIFF=90_OHM_DIFFSATA_90D =90_OHM_DIFF* =90_OHM_DIFF =90_OHM_DIFF

?TOP,BOTTOMDISPLAYPORT =4:1_SPACING

LVDS ?=4:1_SPACINGTOP,BOTTOM

=90_OHM_DIFFLVDS_85D =90_OHM_DIFF=90_OHM_DIFF =90_OHM_DIFF* =90_OHM_DIFF =90_OHM_DIFF

ISL3,ISL4,ISL9,ISL10 =4:1_SPACING ?DISPLAYPORT

SATA_50SE SATA_ICOMP PCH_SATA3COMPPCH_SATA3_ICOMP

USB_HUB2_UP USB USB_HUB2_UP_PUSB_85DUSB_HUB2_UP_NUSB_85D USB

LVDSLVDS_85D LVDS_IG_B_DATA_P<2..0>LVDS_IG_B_DATA

LVDSLVDS_85D LVDS_IG_B_DATA_N<2..0>LVDS_IG_B_DATA

SATASATA_90D SATA_HDD_R2D_C_NSATA_90D SATA SATA_HDD_R2D_PSATA_HDD_R2D

SATA_HDD_R2D_C_PSATA_90D SATASATA_HDD_R2D

SATASATA_90D SATA_HDD_R2D_UF_PSATA_HDD_R2D

SATA_90DSATA_HDD_D2R SATA_HDD_D2R_C_PSATA

SATA_ODD_D2R_NSATASATA_90DSATA_ODD_D2R_UF_PSATASATA_90DSATA_ODD_D2R

SATASATA_90DSATA_ODD_D2R SATA_ODD_D2R_PSATA_ODD_R2D_NSATASATA_90D

SATA_ODD_R2D_PSATASATA_90DSATA_ODD_R2D

SATA_ODD_R2D_C_NSATASATA_90D

SATA_ODD_R2D_C_PSATASATA_90DSATA_ODD_R2D

SATA_90D SATA_HDD_D2R_NSATA

SATA SATA_HDD_R2D_UF_NSATA_90D

SATA_90D SATA SATA_HDD_R2D_N

SATA_HDD_D2R SATA SATA_HDD_D2R_PSATA_90D

SATASATA_90D SATA_HDD_D2R_C_N

SATA_ODD_D2R_UF_NSATASATA_90D

DP_85DDP_AUX_CH DISPLAYPORT DP_IG_AUX_CH_N

LVDS_85D LVDSLVDS_IG_A_DATA LVDS_IG_A_DATA_P<2..0>

NC_LVDS_IG_A_DATAP<3>LVDSLVDS_85DLVDS_IG_A_DATA3

DP_85DDP_AUX_CH DISPLAYPORT DP_IG_AUX_CH_P

LVDS_85D LVDSLVDS_IG_A_CLK LVDS_IG_A_CLK_PLVDS_85D LVDSLVDS_IG_A_CLK LVDS_IG_A_CLK_N

LVDSLVDS_85DLVDS_IG_A_DATA3 NC_LVDS_IG_A_DATAN<3>

LVDS_85D LVDSLVDS_IG_A_DATA LVDS_IG_A_DATA_N<2..0>

USB USB_TPAD_PUSB_85DUSB_TPAD

USB_EXTC_NUSBUSB_85D

USB_EXTB_PUSBUSB_85DUSB_EXTB

USB_CAMERA_CONN_PUSBUSB_85DUSB_CAMERAUSB_CAMERA_CONN_NUSBUSB_85D

SATA_37SEPCH_SATA_ICOMP SATA_ICOMP PCH_SATAICOMPUSB_HUB1_UP_PUSB_85D USBUSB_HUB1_UP

USBUSB_85D USB_HUB1_UP_N

USB_85D USB_EXTA_PUSB_EXTA USBUSB_EXTA_NUSBUSB_85D

USB_EXTB_NUSBUSB_85D

USB USB_EXTC_PUSB_85DUSB_EXTC

USB USB_BT_PUSB_85DUSB_BT

USB USB_BT_NUSB_85D

USBUSB_85D USB_TPAD_NUSB_IR USB USB_IR_PUSB_85D

USB_85D USB USB_IR_NUSB_RBIAS PCH_USB_RBIASPCH_USB_RBIASPCH_USB_RBIAS

USBUSB_85D USB_T29A_NUSBUSB_T29A USB_85D USB_T29A_P

102 OF 132

92 OF 101

16

18 24

18 24

18 87

18 87

16 41

6 41

16 41

41

6 41

16 41

6 41

16 41

6 41

6 41

16 41

16 41

16 41

41

6 41

16 41

6 41

6 41

8 17 83

18 87

8 18

8 17 83

18 87

18 87

8 18

18 87

24 52

8 24

24 42

6 31

6 31

16

18 24

18 24

24 42

24 42

24 42

8 24

24 31

24 31

24 52

24 43

24 43

18

8 24

8 24









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SIO Signal Constraints

SMBus Interface Constraints

NET_TYPE

SPACINGPHYSICAL

PCH Net PropertiesELECTRICAL_CONSTRAINT_SET

SPI Interface Constraints

HD Audio Interface Constraints

LPC Bus Constraints

I253

I254

I255

I256

I257

I258

I259

I260

I261

I262

I263

I264

I265

I266

I267

I268

I269

I270

* ?LPC 6 MIL

CLK_LPC_50S =50_OHM_SE =STANDARD* =STANDARD=50_OHM_SE =50_OHM_SE=50_OHM_SE

CLK_SLOW_55S =55_OHM_SE* =STANDARD=55_OHM_SE=55_OHM_SE=55_OHM_SE =STANDARD

=STANDARDLPC_50S =50_OHM_SE=50_OHM_SE =STANDARD=50_OHM_SE* =50_OHM_SE

*SMB =2x_DIELECTRIC ?

?=2x_DIELECTRICHDA *

?CLK_SLOW * 8 MIL

=55_OHM_SE =55_OHM_SE =55_OHM_SESPI_55S =55_OHM_SE* =STANDARD =STANDARD

=50_OHM_SE=50_OHM_SE =50_OHM_SESMB_50S =STANDARD=STANDARD* =50_OHM_SE

*SPI ?8 MIL


PCH Constraints 2

=50_OHM_SE =50_OHM_SE =50_OHM_SE =STANDARDHDA_50S =50_OHM_SE* =STANDARD

8 MILCLK_LPC ?*

PCIE_T29_D2R PCIEPCIE_85D PCIE_T29_D2R_C_N<3..0>

PCIE_T29_D2R PCIEPCIE_85D PCIE_T29_D2R_N<3..0>

PCIE_T29_R2D PCIEPCIE_85D PCIE_T29_R2D_C_N<3..0>

PCIE_ENET_D2R_C_PPCIEPCIE_85D

PCIE_ENET_D2R_PPCIE_85D PCIEPCIE_ENET_D2R

PCIE_ENET_R2D_C_NPCIE_85D PCIE

SPI_CS0_R_LSPI_55S SPISPI_CS0SPI_CS0_LSPISPI_55S

PCIE_85D PCIE_ENET_D2R_NPCIE

CLK_PCIECLK_PCIE_90D NC_PCIE_CLK100M_EXCARD_PPCIE_CLK100M_EXCARD

PCIE_ENET_R2D_C_PPCIE_85D PCIEPCIE_ENET_R2D

PCIE_ENET_R2D_NPCIE_85D PCIE

PCIE_AP_D2R PCIEPCIE_85D PCIE_AP_D2R_P

HDA_SDIN0 HDA_SDIN0HDAHDA_50S

HDA_50S HDA AUD_SDI_R

HDA_RST_LHDAHDA_50S

SPI SPI_MOSISPI_55S

SPISPI_55S SPI_MOSI_RSPI_MOSI

SPI_CLK SPISPI_55S SPI_CLK_R

HDA_SDOUT_RHDAHDA_50S

HDAHDA_RST_L HDA_RST_R_LHDA_50S

HDA_SYNC_RHDA_50S HDA

SPI SPI_CLKSPI_55S

HDA_SDOUTHDA_SDOUT HDAHDA_50S

LPCPLUS_RESET_LLPC_50S LPCLPC_RESET_L

LPC_AD LPC_AD<3..0>LPCLPC_50S

CLK_LPC LPC_CLK33M_SMCCLK_LPC_50S

CLK_LPC_50S CLK_LPC LPC_CLK33M_LPCPLUS

SMBUS_PCH_CLK SMBSMB_50S SMBUS_PCH_CLK

SMBUS_PCH_0_CLK SML_PCH_0_CLKSMBSMB_50S

SMBUS_PCH_1_CLK SMBSMB_50S SML_PCH_1_CLK

HDA_50S HDA HDA_SYNCHDA_SYNC

LPC_FRAME_LLPCLPC_50SLPC_FRAME_L

CLK_LPC LPC_CLK33M_SMC_RCLK_LPC_50SPCH_LPC_CLK0

PCIE_ENET_D2R_C_NPCIE_85D PCIE

SPI_MISOSPISPI_55SSPI_MISO

PCIE_ENET_R2D_PPCIE_85D PCIE

SML_PCH_1_DATASMBUS_PCH_1_DATA SMBSMB_50S

SMBUS_PCH_0_DATA SMB_50S SML_PCH_0_DATASMB

SMBUS_PCH_DATA SMBSMB_50S SMBUS_PCH_DATA

HDA_BIT_CLK HDA_BIT_CLKHDAHDA_50SHDA_BIT_CLK_RHDA_50S HDA

PCIE_T29_D2R PCIEPCIE_85D PCIE_T29_D2R_C_P<3..0>

PCIE_T29_R2D PCIEPCIE_85D PCIE_T29_R2D_P<3..0>

PCIE_T29_R2D PCIE PCIE_T29_R2D_C_P<3..0>PCIE_85D

PCIE_FW_D2R_C_NPCIE_85D PCIE

PCIEPCIE_85D PCIE_FW_D2R_N

PCIE_CLK100M_PCH_PCLK_PCIE_90D CLK_PCIE

PCIE_CLK100M_T29_PCLK_PCIEPCIE_CLK100M_T29_ CLK_PCIE_90D

CLK_PCIE PCIE_CLK100M_PCH_NCLK_PCIE_90D

CLK_PCIE_90D CLK_PCIE PCH_CLK100M_SATA_N

PCIE_CLK100M_ENET_NCLK_PCIE_90D CLK_PCIE

CLK_PCIE_90D CLK_PCIE PCIE_CLK100M_AP_PPCIE_CLK100M_AP

CLK_PCIE_90D CLK_PCIE PCIE_CLK100M_AP_N

CLK_PCIECLK_PCIE_90D PCH_CLK96M_DOT_N

PCIEPCIE_85D PCIE_FW_R2D_C_NPCIEPCIE_FW_R2D PCIE_85D PCIE_FW_R2D_C_P

PCIE_AP_R2D_C_PPCIE_AP_R2D PCIEPCIE_85DPCIE_AP_R2D_C_NPCIEPCIE_85D

CLK_PCIE_90D CLK_PCIEPCIE_CLK100M PEG_CLK100M_P

PCIEPCIE_85D PCIE_FW_R2D_N

PCIEPCIE_85D PCIE_AP_D2R_N

PCIE_AP_R2D_NPCIE_85D PCIE

PCIE_AP_R2D_PPCIE_85D PCIE

CLK_PCIE_90D CLK_PCIE PCIE_CLK100M_T29_N

CLK_PCIE_90D CLK_PCIE PEG_CLK100M_N

CPU_50S CLK_PCIE PCH_CLK33M_PCIIN

CLK_PCIE_90D PCH_CLK100M_SATA_PCLK_PCIE

CLK_PCIECLK_PCIE_90D PCIE_CLK100M_FW_N

CLK_PCIECPU_50S PCH_CLK14P3M_REFCLK

CLK_PCIE PCIE_CLK100M_ENET_PPCIE_CLK100M_ENET CLK_PCIE_90D

CLK_PCIECLK_PCIE_90D NC_PCIE_CLK100M_EXCARD_N

PCIE_T29_R2D PCIE_85D PCIE PCIE_T29_R2D_N<3..0>PCIE_T29_D2R PCIEPCIE_85D PCIE_T29_D2R_P<3..0>

CLK_PCIE_90D CLK_PCIE PCIE_CLK100M_FW_PPCIE_CLK100M_FW

PCIE PCIE_FW_R2D_PPCIE_85D

PCIEPCIE_85DPCIE_FW_D2R PCIE_FW_D2R_P

PCIEPCIE_85D PCIE_FW_D2R_C_P

PCH_CLK96M_DOT_PCLK_PCIE_90D CLK_PCIE

103 OF 132

93 OF 101

33

8 9 33

8 9 33

36

16 36

16 36

16 46

46

16 36

8 16

16 36

36

6 16 31

16 56

56

16 56

46

16 46

16 46

16

16

16

46

16 56

6 25 46 87

6 16 44 46 87

25 44

6 25 46

16 23 26 28 30 41 47 61 88

16 47

16 47

16 56

6 16 44 46 87

18 25

36

16 46

36

16 47

16 47

16 23 26 28 30 41 47 61 88

16 56

16

33

33

8 9 33

38

16 38

16

16 33

16

16

16 36

16 31

16 31

16

16 38

16 38

16 31

16 31

16 73

38

6 16 31

6 31

6 31

16 33

16 73

16 25

16

16 38

16

16 36

8 16

33

8 9 33

16 38

38

16 38

38

16




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PAGE TITLE

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A

D

2 1


Apple Inc.

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8 7 5 4 2 1


















Ethernet Net Properties

ELECTRICAL_CONSTRAINT_SET

CAESAR IV (Ethernet) Constraints

FireWire Interface Constraints

CAESAR IV (Ethernet PHY) ConstraintsSOURCE: Attila Farkas Email - 8/2/10

FireWire Net Properties

SOURCE: Broadcom 5764-DS04-RDS Page 38

SOURCE: Broadcom 5764-DS04-RDS Page 38

SPACINGPHYSICAL

NET_TYPE

SPACING

NET_TYPE

PHYSICAL

Port 2 Not Used


I158

I159

I160

I161

I162

I163

I164

I165

I166

I167

I168

I169

I170

I171

I172

=110_OHM_DIFF* =110_OHM_DIFF =110_OHM_DIFF =110_OHM_DIFF=110_OHM_DIFF =110_OHM_DIFFFW_110D

0.6 MM ?*ENET_MDI

* =3:1_SPACING ?ENET_3X

=3X_DIELECTRICENET_CR * ?

=100_OHM_DIFF=100_OHM_DIFF =100_OHM_DIFF* =100_OHM_DIFF =100_OHM_DIFFENET_100D =100_OHM_DIFF

?=3:1_SPACING*FW_TP

=50_OHM_SE =50_OHM_SE* =STANDARD=STANDARD=50_OHM_SEENET_50S =50_OHM_SE


Ethernet/FW Constraints

FW_PORT1_TPB_NFW_110D FW_TPFW_P1_TPB

FW_110D FW_TP NC_FW0_TPBNFW_P0_TPB

FW_110D FW_TP NC_FW0_TPBPFW_P0_TPB

FW_TPFW_110D NC_FW0_TPAPFW_P0_TPA

FW_PORT1_TPA_PFW_110D FW_TPFW_P1_TPA

ENET_RESET_LENET_3XENET_50S

FW_PORT1_TPB_PFW_110D FW_TPFW_P1_TPB

FW_PORT1_TPA_NFW_110D FW_TPFW_P1_TPA

FW_110D FW_TP NC_FW0_TPANFW_P0_TPA

BCM5764_CLK25M_XTALIENET_50S ENET_3X

SDCONN_DATA<7..0>ENET_CRENET_50SCR_DATA_A0

ENET_MDI_P<3..0>ENET_MDIENET_100DENET_MDI

ENET_50S ENET_CRCR_CLK SDCONN_CLKENET_CRENET_50SCR_DATA_A0 SDCONN_CMD

ENET_CR SDCONN_CLK_R_LENET_50SCR_CLK

CR_CLK SDCONN_CLK_RENET_50S ENET_CR

SDCONN_CMD_RENET_50S ENET_CRCR_DATA_A0

ENET_CR SDCONN_DATA_R<7..0>ENET_50SCR_DATA_A0

ENET_MDI_N<3..0>ENET_MDIENET_100D

BCM5764_CLK25M_XTALOENET_3XENET_50S

104 OF 132

94 OF 101

38 40

6 38 40

6 38 40

6 38 40

38 40

32 36

38 40

38 40

38 40

32 36

36 37

32 36

32 36

32

32

32

36 37




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C

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D

2 1


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PAGE


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B

C

345678

D

B

8 7 5 4 2 1



















NOTE: DisplayPort Physical/Spacing Constraints provided by Chipset or GPU page.

T29 I2C Signal Constraints

Only used on hosts supporting T29 video-in

PHYSICAL

T29/DP Net PropertiesSPACINGELECTRICAL_CONSTRAINT_SET

Only used on dual-port hosts.

NET_TYPE


NET_TYPE

SPACING

T29 IC Net Properties

DisplayPort Signal Constraints

T29 SPI Signal Constraints

SOURCE: Bill Cornelius’s T29 Routing Notes

T29/DP Connector Signal Constraints

?*T29_SPI =2x_DIELECTRIC

* =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF =100_OHM_DIFFT29DP_100D

=80_OHM_DIFFT29DP_80D =80_OHM_DIFF=80_OHM_DIFF =80_OHM_DIFF =80_OHM_DIFF=80_OHM_DIFF*

=5x_DIELECTRIC ?T29DP *

=STANDARD=55_OHM_SE=55_OHM_SE=55_OHM_SE =STANDARD* =55_OHM_SET29_I2C_55S

?*T29_I2C =2x_DIELECTRIC

=55_OHM_SE =STANDARD=STANDARD* =55_OHM_SE =55_OHM_SET29_SPI_55S =55_OHM_SE

TOP,BOTTOM =7x_DIELECTRIC ?T29DP


T29 Constraints

T29_D2R2 T29_D2R_C_N<2>T29DP_100D T29DP

T29DPB_ML_P<3..0>T29DP_80D T29DP

T29DP_80D T29DPB_ML_C_P<3..0>T29DP

T29DP_80D T29DP DP_B_EXT_AUXCH_N

T29DP_80D T29DPB_ML_C_N<3..0>T29DP

T29DP_80D T29DPB_ML_N<3..0>T29DP

T29DP_80D T29DP DP_B_EXT_AUXCH_P

DP_T29SNK0_ML_C_P<3..0>DP_85D DISPLAYPORT

DP_T29SNK0_AUXCH_C_NDP_85D DISPLAYPORTDP_T29SNK0_AUXCH_PDP_T29SNK0_AUXCH DP_85D DISPLAYPORT

DP_T29SNK0_AUXCH DP_85D DISPLAYPORT DP_T29SNK0_AUXCH_N

DP_85D DISPLAYPORT DP_T29SNK1_ML_C_P<3..0>DP_85D DISPLAYPORT DP_T29SNK1_ML_C_N<3..0>

DP_T29SNK1_ML DP_85D DISPLAYPORT DP_T29SNK1_ML_N<3..0>

DP_T29SNK1_AUXCH DP_85D DISPLAYPORT DP_T29SNK1_AUXCH_PDISPLAYPORTDP_85DDP_T29SNK1_AUXCH DP_T29SNK1_AUXCH_N

T29DP_80D T29DP DP_SDRVB_ML_C_P<3..0>

DP_SDRVB_ML_ODD T29DP DP_SDRVB_ML_P<3..1:2>T29DP_80D

DP_SDRVB_ML_EVEN T29DP DP_SDRVB_ML_N<2..0:2>T29DP_80D

DP_SDRVB_ML_EVEN T29DPT29DP_80D DP_SDRVB_ML_P<2..0:2>

T29DPT29DP_80D DP_SDRVB_ML_C_N<3..0>

DP_SDRVB_ML_R_N<3..0>T29DP_80D T29DP

DP_SDRVB_ML_ODD T29DP_80D T29DP DP_SDRVB_ML_N<3..1:2>DP_SDRVB_AUXCH_PT29DPDP_SDRVB_AUXCH T29DP_80DDP_SDRVB_AUXCH_NT29DPT29DP_80DDP_SDRVB_AUXCHDP_SDRVB_AUXCH_C_PT29DPT29DP_80DDP_SDRVB_AUXCH_C_NT29DPT29DP_80D

DP_T29SNK1_ML DP_85D DISPLAYPORT DP_T29SNK1_ML_P<3..0>

DP_85D DISPLAYPORT DP_T29SRC_AUXCH_C_N

T29DPA_ML_N<3..0>T29DPT29DP_80D

T29_R2D_C_F_P<1..0>T29DP_80D T29DPT29_R2D_C_F_N<1..0>T29DP_80D T29DP

T29_R2D0 T29_R2D_P<0>T29DPT29DP_80D

T29_R2D0 T29DP T29_R2D_N<0>T29DP_80D

T29_R2D1 T29DP T29_R2D_P<1>T29DP_80D

T29_R2D1 T29_R2D_N<1>T29DPT29DP_80D

T29_D2R0 T29_D2R_C_P<0>T29DP_100D T29DP

T29_D2R0 T29_D2R_C_N<0>T29DP_100D T29DP

T29DP_100DT29_D2R1 T29_D2R_C_P<1>T29DP

DP_SDRVA_ML_EVEN T29DP DP_SDRVA_ML_N<2..0:2>T29DP_80D

DP_SDRVA_ML_ODD T29DP DP_SDRVA_ML_N<3..1:2>T29DP_80D

DP_SDRVA_AUXCH T29DP DP_SDRVA_AUXCH_NT29DP_80D

T29DP_80D DP_SDRVA_AUXCH_C_PT29DP

T29DP_80D DP_SDRVA_AUXCH_C_NT29DP

T29DP T29DPA_ML_P<3..0>T29DP_80D

T29DPA_ML_C_P<3..0>T29DP_80D T29DPT29DPA_ML_C_N<3..0>T29DP_80D T29DPDP_A_EXT_AUXCH_PT29DP_80D T29DPDP_A_EXT_AUXCH_NT29DP_80D T29DP

T29_R2D_P<2>T29DPT29DP_80DT29_R2D2

T29_R2D2 T29DP_80D T29_R2D_N<2>T29DP

T29_R2D3 T29DP_80D T29_R2D_P<3>T29DP

T29DP_80D T29_R2D_N<3>T29DPT29_R2D3

DP_SDRVA_AUXCH T29DP DP_SDRVA_AUXCH_PT29DP_80D

DP_SDRVA_ML_EVEN T29DP DP_SDRVA_ML_P<2..0:2>T29DP_80D

T29_D2R1 T29_D2R_C_N<1>T29DPT29DP_100D

T29DP T29DPA_D2R1_AUXCH_PT29DP_100D

T29DP T29DPA_D2R1_AUXCH_NT29DP_100D

T29DP DP_SDRVA_ML_C_P<3..0>T29DP_80D

T29DP DP_SDRVA_ML_C_N<3..0>T29DP_80D

T29DP DP_SDRVA_ML_R_P<3..0>T29DP_80D

T29DP DP_SDRVA_ML_R_N<3..0>T29DP_80D

DP_SDRVA_ML_ODD T29DP DP_SDRVA_ML_P<3..1:2>T29DP_80D

T29_R2D_C_F_P<3..2>T29DPT29DP_80D

T29_D2R2 T29_D2R_C_P<2>T29DPT29DP_100D

T29_D2R_C_P<3>T29_D2R3 T29DP_100D T29DP

T29DPT29_D2R3 T29_D2R_C_N<3>T29DP_100D

T29DP T29DPB_D2R3_AUXCH_NT29DP_100D

T29_I2C_55S T29_I2C I2C_T29_SDAT29_I2C_55S T29_I2C I2C_T29_SCL

DISPLAYPORTDP_85D DP_T29SRC_AUXCH_C_PDP_85D DP_T29SRC_ML_C_N<3..0>DISPLAYPORT

DISPLAYPORT DP_T29SRC_ML_C_P<3..0>DP_85D

T29DP_80D T29_R2D_C_F_N<3..2>T29DP

T29DPB_D2R3_AUXCH_PT29DP_100D T29DP

T29DP_80D T29DP DP_SDRVB_ML_R_P<3..0>

DP_85D DP_T29SNK0_ML_N<3..0>DP_T29SNK0_ML DISPLAYPORT

DP_85D DP_T29SNK0_AUXCH_C_PDISPLAYPORT

DISPLAYPORT DP_T29SNK0_ML_P<3..0>DP_T29SNK0_ML DP_85D

DP_T29SNK0_ML_C_N<3..0>DP_85D DISPLAYPORT

DP_85D DISPLAYPORT DP_T29SNK1_AUXCH_C_NDP_85D DISPLAYPORT DP_T29SNK1_AUXCH_C_P

T29_SPI_CLKT29_SPIT29_SPI_55ST29_SPI_CLK

T29_SPI T29_SPI_MISOT29_SPI_55ST29_SPI_MISO

T29_D2R_N<3..0>T29DPT29DP_100D

T29_D2R_P<3..0>T29DPT29DP_100D

T29_R2D_C_N<3..0>T29DPT29DP_80D

T29_R2D_C_P<3..0>T29DPT29DP_80D

T29_SPI_CS_LT29_SPIT29_SPI_55ST29_SPI_CS_L

T29_SPI_MOSI T29_SPI_MOSIT29_SPIT29_SPI_55S

105 OF 132

95 OF 101

6 33 78

6 33 78

6 33

6 33

6 33 78

6 33 78

6 33

6 33

6 33

95

95

6 33

6 84 85

84

84

6 84

6 84

6 84

6 84

6 84 85

6 84 85

6 84 85

6 84 95

84

84

84

84

6 84 85

84 85

84 85

84 85

84 85

84

6 84 95

6 84 85

6 85

6 85

6 84

6 84

84

84

84

33 47 84

33 47 84

6 33

6 33 78

6 33

6 33 78

6 33 78

6 33 78

33

33

6 8 33 84

6 8 33 84

6 8 33 84

6 8 33 84

33

33




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8 7 5 4 2 1





NET_TYPE

PHYSICAL SPACING

SMC SMBus Net Properties

SPACINGPHYSICAL

NET_TYPE


SMBus Charger Net Properties

=STANDARD =STANDARD 0.1 MM 0.1 MM* =STANDARD=STANDARD1TO1_DIFFPAIR

SMC ConstraintsSYNC_MASTER=K18_MLB SYNC_DATE=04/27/2010

SMBUS_SMC_A_S3_SCLSMBSMBUS_SMC_A_S3_SCL SMB_50SSMBUS_SMC_A_S3_SDASMBUS_SMC_A_S3_SDA SMBSMB_50S

SMBSMBUS_SMC_B_S0_SCL SMBUS_SMC_B_S0_SCLSMB_50S

CHGR_CSO_N1TO1_DIFFPAIR

CHGR_CSO_P1TO1_DIFFPAIRCHGR_CSO

CHGR_CSI_P1TO1_DIFFPAIRCHGR_CSICHGR_CSI_N1TO1_DIFFPAIR

SMBUS_SMC_BSA_SDASMBUS_SMC_BSA_SDA SMBSMB_50S

SMBSMBUS_SMC_MGMT_SDA SMBUS_SMC_MGMT_SDASMB_50S

SMB SMBUS_SMC_MGMT_SCLSMBUS_SMC_MGMT_SCL SMB_50S

SMBSMBUS_SMC_BSA_SCL SMBUS_SMC_BSA_SCLSMB_50S

SMBUS_SMC_0_S0_SDASMBUS_SMC_0_S0_SDA SMBSMB_50S

SMBUS_SMC_0_S0_SCL SMBUS_SMC_0_S0_SCLSMBSMB_50S

SMBSMBUS_SMC_B_S0_SDA SMBUS_SMC_B_S0_SDASMB_50S

106 OF 132

96 OF 101

6 31 44 47 53 54

6 31 44 47 53 54

44 47 50

63

63

63

63

6 44 47 62 63

44 47 100

44 47 100

6 44 47 62 63

6 31 44 47 50 79

6 31 44 47 50 79

44 47 50
























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D

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Apple Inc.

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B

C

345678

D

B

8 7 5 4 2 1

SPACING

Digital Video Signal Constraints

DIsplayPort AUX CH intra-pair matching should be 0.127mm. Max length 330.2mm.


GDDR5 FB B Net Properties


NET_TYPE

SPACINGSPACING

NET_TYPE

PHYSICAL

Max length of LVDS/DisplayPort/TMDS traces: 13 inches.

SOURCE: Calpella SFF DG Rev 1.5 (407364) and Family GPU DG-04202-001-v04.

GDDR5 FB A Net Properties

DisplayPort/TMDS intra-pair matching should be 0.127mm. Inter-pair matching should be within 2.54cm. Max Length 241.3mm.

LVDS intra-pair matching should be 0.127 mm. Pairs should be within 0.508mm of entire channel.

PHYSICALSPACING

NET_TYPE

PHYSICAL

MUXGFX Net Properties


NET_TYPE


Whistler Net Properties

GDDR5 Frame Buffer Signal Constraints

I293

I294

I295

I296

I297

I298

I299

I300

I301

I302

I303

I304

I305

I306

I307

I308

I309

I310

I311

I312

I313

I314

I315

I316


GPU (Whistler) CONSTRAINTSSYNC_MASTER=K92_MLB

DP_85D =85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF* =85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF

=7x_DIELECTRICGDDR5_EDC * ?

* ?GDDR5_CMD =2x_DIELECTRIC

=45_OHM_SE =45_OHM_SE=45_OHM_SE* =STANDARD =STANDARDGDDR5_45SE =45_OHM_SE

DISPLAYPORT =4x_DIELECTRICTOP,BOTTOM ?

=50_OHM_SE=50_OHM_SE =STANDARDGDDR5_45R50SE 12.7 MM* =STANDARD=50_OHM_SE

=4x_DIELECTRICTOP,BOTTOMLVDS ?

=3x_DIELECTRIC*DISPLAYPORT ?

*LVDS ?=3x_DIELECTRIC

=80_OHM_DIFF=80_OHM_DIFF =80_OHM_DIFFGDDR5_80D =80_OHM_DIFF* =80_OHM_DIFF =80_OHM_DIFF

LVDS_85D * =85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF=85_OHM_DIFF=85_OHM_DIFF

=3x_DIELECTRIC* ?GDDR5_DATA

?=5x_DIELECTRICGDDR5_CLK *

LVDS_CONN_A_DATA_P<2..0>LVDSLVDS_85D

DP_85D DISPLAYPORT DP_EG_AUXCH_N

LVDS_A_CLK_NLVDS_85DLVDS_A_CLK LVDS

LVDS_B_CLK LVDS_85D LVDS LVDS_B_CLK_N

LVDS_B_DATA_N<2..0>LVDSLVDS_85DLVDS_B_DATA

LVDSLVDS_85D LVDS_CONN_B_CLK_F_P LVDS_EG_B_DATA3 LVDS_85D LVDS NC_LVDS_EG_B_DATA_P<3>

LVDS_EG_B_DATA LVDS_85D LVDS LVDS_EG_B_DATA_P<2..0>LVDS_CONN_A_CLK_F_PLVDSLVDS_85DLVDS_CONN_A_CLK_F_NLVDSLVDS_85D

LVDS_A_DATA_P<2..0>LVDS_A_DATA LVDS_85D LVDSLVDS_A_DATA_N<2..0>LVDS_A_DATA LVDS_85D LVDSLVDS_B_CLK_PLVDS_85D LVDSLVDS_B_CLK

CLK_SLOW GPU_CLK100MGPU_CLK100M CLK_SLOW_55S

LVDS_85DLVDS_EG_A_DATA3 LVDS NC_LVDS_EG_A_DATA_N<3>

LVDS_EG_B_DATA3 LVDS_85D LVDS NC_LVDS_EG_B_DATA_N<3>

LVDSLVDS_85D LVDS_CONN_B_CLK_P

DP_EXTA_ML_C_P<3..0>DP_ML DP_85D DISPLAYPORT

LVDS LVDS_EG_A_CLK_PLVDS_85DLVDS_EG_A_CLK

LVDS LVDS_EG_A_DATA_P<2..0>LVDS_EG_A_DATA LVDS_85D

FB_B1_DQ<31..24>FB_B1_DQ_BYTE3 GDDR5_DATAGDDR5_45SE

FB_B0_DQ<7..0>FB_B0_DQ_BYTE0 GDDR5_DATAGDDR5_45SE

LVDS_CONN_B_DATA_N<2..0>LVDS_85D LVDS

LVDSLVDS_85D LVDS_CONN_B_DATA_P<2..0>LVDSLVDS_85D LVDS_CONN_B_CLK_N

LVDSLVDS_85D LVDS_CONN_A_DATA_N<2..0>

LVDSLVDS_85D LVDS_CONN_A_CLK_NLVDSLVDS_85D LVDS_CONN_A_CLK_PLVDSLVDS_85D LVDS_CONN_B_CLK_F_N

LVDS_B_DATA_P<2..0>LVDS_85D LVDSLVDS_B_DATA

LVDS_85D LVDSLVDS_A_CLK LVDS_A_CLK_P

DP_EXTA_AUXCH_C_PDP_AUX_CH DISPLAYPORTDP_85D

LVDS_85DLVDS_EG_B_DATA LVDS LVDS_EG_B_DATA_N<2..0>

LVDS_EG_A_DATA LVDS_85D LVDS LVDS_EG_A_DATA_N<2..0>

LVDS_85D LVDS LVDS_EG_A_CLK_NLVDS_EG_A_CLK

FB_B0_WCLK1 FB_B0_WCLK_P<1>GDDR5_CMDGDDR5_80D

FB_B0_WCLK0 GDDR5_CMD FB_B0_WCLK_P<0>GDDR5_80D

FB_B1_DBI_L<2>FB_B1_DBI_L2 GDDR5_45SE GDDR5_DATA




FB_B1_EDC<0>FB_B1_EDC0 GDDR5_45SE GDDR5_EDC

FB_B0_CMD FB_B0_CAS_LGDDR5_CMDGDDR5_45R50SE

FB_B1_CMD FB_B1_RAS_LGDDR5_CMDGDDR5_45R50SE

FB_A0_CMD GDDR5_45R50SE FB_A0_RAS_LGDDR5_CMD

GDDR5_45SE FB_B1_DQ<23..16>GDDR5_DATAFB_B1_DQ_BYTE2

FB_B1_DQ_BYTE0 FB_B1_DQ<7..0>GDDR5_DATAGDDR5_45SE


GDDR5_CMDFB_B1_WCLK0 FB_B1_WCLK_N<0>GDDR5_80D

FB_B1_DBI_L<3>FB_B1_DBI_L3 GDDR5_DATAGDDR5_45SE

FB_B1_DBI_L<0>FB_B1_DBI_L0 GDDR5_DATAGDDR5_45SEFB_B1_DBI_L<1>FB_B1_DBI_L1 GDDR5_DATAGDDR5_45SE

FB_B0_EDC<1>FB_B0_EDC1 GDDR5_EDCGDDR5_45SE


FB_A1_CMD GDDR5_CMD FB_A1_CAS_LGDDR5_45R50SE

FB_A0_CMD GDDR5_CMD FB_A0_WE_LGDDR5_45R50SE




FB_A1_CMD GDDR5_CMD FB_A1_WE_LGDDR5_45R50SE




GDDR5_45SE FB_B1_DQ<15..8>FB_B1_DQ_BYTE1 GDDR5_DATA


FB_B0_DQ_BYTE2 GDDR5_DATAGDDR5_45SE FB_B0_DQ<23..16>

FB_B1_WCLK1 FB_B1_WCLK_N<1>GDDR5_CMDGDDR5_80D

GDDR5_CMDFB_B1_WCLK1 GDDR5_80D FB_B1_WCLK_P<1>

FB_B1_WCLK0 FB_B1_WCLK_P<0>GDDR5_CMDGDDR5_80D

FB_B0_WCLK1 FB_B0_WCLK_N<1>GDDR5_CMDGDDR5_80D

GDDR5_CMD FB_RESET_LFB_AB_RESET GDDR5_45R50SE

FB_A1_DQ<31..24>GDDR5_45SE GDDR5_DATAFB_A1_DQ_BYTE3



GDDR5_45SE GDDR5_DATA FB_A1_DQ<7..0>FB_A1_DQ_BYTE0

GDDR5_45SE FB_A0_DQ<31..24>GDDR5_DATAFB_A0_DQ_BYTE3


FB_A0_DQ_BYTE1 GDDR5_45SE FB_A0_DQ<15..8>GDDR5_DATA


FB_A1_WCLK1 GDDR5_80D GDDR5_CMD FB_A1_WCLK_N<1>FB_A1_WCLK1 GDDR5_80D GDDR5_CMD FB_A1_WCLK_P<1>FB_A1_WCLK0 GDDR5_80D GDDR5_CMD FB_A1_WCLK_N<0>FB_A1_WCLK0 GDDR5_80D GDDR5_CMD FB_A1_WCLK_P<0>FB_A0_WCLK1 GDDR5_80D GDDR5_CMD FB_A0_WCLK_N<1>FB_A0_WCLK1 GDDR5_80D GDDR5_CMD FB_A0_WCLK_P<1>FB_A0_WCLK0 FB_A0_WCLK_N<0>GDDR5_80D GDDR5_CMD

FB_A1_DBI_L<1>FB_A1_DBI_L1 GDDR5_45SE GDDR5_DATA


FB_A0_DBI_L<2>FB_A0_DBI_L2 GDDR5_DATAGDDR5_45SEFB_A0_DBI_L<3>FB_A0_DBI_L3 GDDR5_DATAGDDR5_45SE

FB_A0_DBI_L<1>FB_A0_DBI_L1 GDDR5_DATAGDDR5_45SE


FB_A0_EDC0 FB_A0_EDC<0>GDDR5_45SE GDDR5_EDC

FB_A1_EDC3 GDDR5_EDCGDDR5_45SE FB_A1_EDC<3>FB_A1_EDC<2>FB_A1_EDC2 GDDR5_EDCGDDR5_45SE

FB_A1_EDC<1>FB_A1_EDC1 GDDR5_EDCGDDR5_45SE

FB_A1_EDC0 FB_A1_EDC<0>GDDR5_EDCGDDR5_45SE


FB_A0_EDC2 FB_A0_EDC<2>GDDR5_45SE GDDR5_EDC


FB_A0_CMD FB_A0_A<8..0>GDDR5_45R50SE GDDR5_CMD

FB_A1_CMD FB_A1_A<8..0>GDDR5_CMDGDDR5_45R50SE

FB_A0_CMD GDDR5_45R50SE GDDR5_CMD FB_A0_ABI_L

FB_B0_CMD FB_B0_RAS_LGDDR5_CMDGDDR5_45R50SE

FB_B0_CMD FB_B0_WE_LGDDR5_CMDGDDR5_45R50SE

FB_A1_CLK GDDR5_CLKGDDR5_80D FB_A1_CLK_PFB_A1_CLK GDDR5_CLKGDDR5_80D FB_A1_CLK_N

FB_A1_CMD GDDR5_45R50SE GDDR5_CMD FB_A1_CS_L

FB_A0_CMD FB_A0_CKE_LGDDR5_45R50SE GDDR5_CMD

FB_A0_CMD GDDR5_45R50SE FB_A0_CS_LGDDR5_CMD

FB_B0_CLK GDDR5_CLKGDDR5_80D FB_B0_CLK_PFB_B0_CLK FB_B0_CLK_NGDDR5_CLKGDDR5_80D

FB_B1_CLK FB_B1_CLK_PGDDR5_CLKGDDR5_80D

FB_B1_CLK FB_B1_CLK_NGDDR5_CLKGDDR5_80D

FB_B1_CMD GDDR5_CMDGDDR5_45R50SE FB_B1_A<8..0>FB_B0_CMD FB_B0_A<8..0>GDDR5_CMDGDDR5_45R50SE

FB_B1_CMD FB_B1_CS_LGDDR5_CMDGDDR5_45R50SE

FB_B1_CMD FB_B1_WE_LGDDR5_CMDGDDR5_45R50SE

FB_B0_CMD FB_B0_CS_LGDDR5_CMDGDDR5_45R50SE

FB_B1_CAS_LGDDR5_CMDGDDR5_45R50SEFB_B1_CMD

FB_B0_CMD FB_B0_ABI_LGDDR5_CMDGDDR5_45R50SE

FB_B1_CMD FB_B1_ABI_LGDDR5_CMDGDDR5_45R50SE

FB_A0_CLK GDDR5_80D GDDR5_CLK FB_A0_CLK_NFB_A0_CLK GDDR5_80D GDDR5_CLK FB_A0_CLK_P

FB_B0_CMD FB_B0_CKE_LGDDR5_CMDGDDR5_45R50SE

FB_B1_CMD FB_B1_CKE_LGDDR5_CMDGDDR5_45R50SEFB_A1_CMD GDDR5_45R50SE GDDR5_CMD FB_A1_CKE_L

FB_A0_CMD GDDR5_CMD FB_A0_CAS_LGDDR5_45R50SE

FB_A1_CMD GDDR5_45R50SE GDDR5_CMD FB_A1_RAS_L

FB_A1_CMD GDDR5_45R50SE GDDR5_CMD FB_A1_ABI_L

FB_B0_WCLK0 GDDR5_CMD FB_B0_WCLK_N<0>GDDR5_80D

GDDR5_45SE FB_A1_DBI_L<2>FB_A1_DBI_L2 GDDR5_DATA

GDDR5_45SE GDDR5_DATAFB_A1_DBI_L3 FB_A1_DBI_L<3>FB_A0_WCLK0 GDDR5_80D FB_A0_WCLK_P<0>GDDR5_CMD

DP_85D DISPLAYPORT DP_EXTA_AUXCH_C_N

LVDS NC_LVDS_EG_A_DATA_P<3>LVDS_EG_A_DATA3 LVDS_85D

CLK_SLOWCLK_SLOW_55S GPU_CLK27MGPU_CLK27M

DISPLAYPORTDP_85D DP_EG_AUXCH_PDP_AUX_CH

DP_EXTA_ML_C_N<3..0>DP_85D DISPLAYPORT

107 OF 132

97 OF 101

6 82 83

8 78 83

83 87

83 87

83 87

6 82 78 79

78 87 6 82

6 82

83 87

83 87

83 87

78 79

78 79

78 79

82 83

78 84

78 87

78 87

6 75 77

6 75 77

6 82 83

6 82 83

82 83

6 82 83

82 83

82 83

6 82

83 87

83 87

83 84

78 87

78 87

78 87

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

75 77

75 77

75 76

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

75 76

75 76

6 75 77

6 75 77

6 75 77

75 76

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

6 75 77

75 76 77

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

6 75 76

75 77

75 77

75 76

75 76

75 76

75 76

75 76

75 77

75 77

75 77

75 77

6 75 77

6 75 77

75 77

75 77

75 77

75 77

6 75 77

6 75 77

75 76

75 76

75 77

75 77 75 76

75 76

75 76

6 75 76

6 75 77

6 75 76

6 75 76

6 75 76

83 84

78 79

78 79

8 78 83

78 84




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1






OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE















































PHYSICAL_RULE_SETAREA_TYPENET_PHYSICAL_TYPETABLE_PHYSICAL_ASSIGNMENT_HEAD

TABLE_PHYSICAL_ASSIGNMENT_ITEM







(USB_EXTA)

(USB_EXTA)

Graphics ,SATA Constraint Relaxations

PHYSICAL

NET_TYPE

K91 Specific Net Properties

Alternate diffpair width/gap through BGA fanout areas (95-ohm diff)

Allow 0.127 mm necks for >0.127 mm lines for ARD fanout.

(USB_EXTA)

PHYSICAL

NET_TYPE

SPACINGELECTRICAL_CONSTRAINT_SET

K91 Specific Net Properties

SPACING

(USB_EXTA)

Memory Constraint Relaxations

I249

I250

I251

I252

I255

I256

I281

I282

I283

I284

I285

I286

I287

I288

I291

I292

I299

I300

I301

I302

I303

I304

I305

I306

I307

I308

I311

I312

I313

I314

I315

I316

I317

I318

I319

I320

I321

I322

I323

I324

I325

I326

I327

I328

I329

I330

I331

I332

I333

I334

I335

I336

I337

I338

I341

I342

USB GND_P2MM*GND

*SATA GND GND_P2MM

CLK_PCIE_90D 100_DIFF_BGABGA

SATA_90D BGA 100_DIFF_BGA

BGA 100_DIFF_BGADP_85D

LVDS_85DLVDS_85D BGA

GND_P2MMMEM_CLK GND *

GND_P2MM*MEM_DQS GND

ENETCONN ?25 MILS*

1000* 0.20 MMPWR_P2MM

1000GND_P2MM 0.20 MM*

?GND * =STANDARD

GND_P2MMGND *MEM_CMD

GND_P2MM*GNDMEM_CTRL

CPU_COMP * GND_P2MMGND

PCIE GND_P2MM*GND

GNDENET_MDI * GND_P2MM

0.1 MMTOPMEM_85D 6.35 MM

MEM_72D 6.35 MM0.127 MMBOTTOM

GND_P2MM*GNDCPU_VCCSENSE

PWR_P2MMSB_POWER *USB

SB_POWER * PWR_P2MMSATA

CLK_PCIE * PWR_P2MMSB_POWER

LVDS GND_P2MM*GND

CLK_PCIE GND_P2MM*GND

THERM * =2:1_SPACING ?

?*AUDIO =2:1_SPACING

* ?SENSE =2:1_SPACING

0.1 MM*AUDIODIFF 0.1 MM 10 MM 0.1 MM 0.1 MM=1:1_DIFFPAIR

*DIFFPAIR =1:1_DIFFPAIR=1:1_DIFFPAIR =1:1_DIFFPAIR=1:1_DIFFPAIR

=55_OHM_SE =1:1_DIFFPAIR* =1:1_DIFFPAIRTHERM_1TO1_55S =1:1_DIFFPAIR =55_OHM_SE=55_OHM_SE

SENSE_1TO1_55S * =55_OHM_SE =55_OHM_SE =1:1_DIFFPAIR=55_OHM_SE =1:1_DIFFPAIR=1:1_DIFFPAIR

0.09 MM 100 MILMEM_72D *

* 0.09 MM 10 mmPCIE_85D

0.23 MM 100 MILCPU_27P4S BOTTOM

500 MILUSB_85D TOP 0.1 MM

0.09 MM*MEM_40S 100 MIL

*MEM_DATA GND GND_P2MM


Project Specific Constraints

PP3V3_S0SB_POWER

SPKRCONN_R_OUT_PAUDIOSPK_OUT DIFFPAIR

SSM2375R_NAUDIOAUDIODIFF

CHGR_CSI_R_P1TO1_DIFFPAIR

USB USB2_EXTA_MUXED_PUSB_85D

AUDIO SSM2375L_PAUDIODIFFAUDIO_DIFFPAIR

CHGR_CSO_R_N1TO1_DIFFPAIR

USB_85D USB USB2_EXTA_MUXED_N

USB_85D USB2_LT1_PUSB

PCIE_CLK100M_AP PCIE_CLK100M_AP_CONN_PCLK_PCIECLK_PCIE_90D

CHGR_CSO_R_P1TO1_DIFFPAIR

CHGR_CSI_R_N1TO1_DIFFPAIR

PCIE_CLK100M_AP_CONN_NCLK_PCIECLK_PCIE_90D

SSM2375S_NAUDIOAUDIODIFF

SB_POWER PP1V5_S3RS0

USB_85D USB USB2_LT1_N

USBUSB_85D USB_LT2_P

AUDIODIFF AUDIO SSM2375L_N

AUDIO SSM2375R_PAUDIO_DIFFPAIR AUDIODIFF

SSM2375S_PAUDIO_DIFFPAIR AUDIODIFF AUDIO

SPKRCONN_R_OUT_NAUDIODIFFPAIR

SPKRCONN_S_OUT_NAUDIODIFFPAIR

SPKRCONN_S_OUT_PDIFFPAIR AUDIOSPK_OUT

USB_85D USB USB_TPAD_R_N

SB_POWER PP3V3_S5

USB_85D USB_TPAD_R_PUSB

SPKRCONN_L_OUT_PSPK_OUT AUDIODIFFPAIRSPKRCONN_L_OUT_NAUDIODIFFPAIR

AUDIO AUD_SPKRAMP_LIN_PAUDIO_DIFFPAIR AUDIODIFF

AUDIOAUDIO_DIFFPAIR AUDIODIFF AUD_SPKRAMP_RIN_P

AUDIODIFF AUDIOAUDIO_DIFFPAIR AUD_LO1_R_P

AUDIODIFF AUDIO AUD_LO1_R_N

AUDIODIFF AUD_LO2_L_PAUDIOAUDIO_DIFFPAIR

AUD_LO2_L_NAUDIODIFF AUDIO

AUD_SPKRAMP_LIN_NAUDIOAUDIODIFF

AUD_SPKRAMP_SUBIN_NAUDIOAUDIODIFF

AUDIOAUDIODIFFAUDIO_DIFFPAIR AUD_SPKRAMP_SUBIN_P

AUD_SPKRAMP_RIN_NAUDIOAUDIODIFF

AUD_LO2_R_NAUDIODIFF AUDIO

AUDIODIFF AUD_LO2_R_PAUDIOAUDIO_DIFFPAIR

CONN_USB2_BT_PUSBUSB_85D

USB_85D CONN_USB2_BT_NUSB

USBUSB_85D USB_LT2_N

ENET_100D ENETCONN ENETCONN_N<3..0>ENETCONNENET_100D ENETCONN_P<3..0>

THERM_1TO1_55S THERM CPUTHMSNS_D2_PSENSE_DIFFPAIR

THERM_1TO1_55S CPUTHMSNS_D2_NTHERM

THERM_1TO1_55S THERM CPU_THERMD_NSENSE_DIFFPAIR THERM_1TO1_55S THERM CPU_THERMD_P

THERM_1TO1_55S THERM GPUTHMSNS_D_NTHERM_1TO1_55S THERM GPUTHMSNS_D_PSENSE_DIFFPAIR

THERM_1TO1_55S THERM GPU_TDIODE_PSENSE_DIFFPAIR

SENSE_DIFFPAIR SENSE_1TO1_55S SENSE VCCSAS0_CS_PTHERM_1TO1_55S GPU_TDIODE_NTHERM

SENSE_DIFFPAIR SENSESENSE_1TO1_55S VCCSAISNS_R_PSENSE VCCSAS0_CS_NSENSE_1TO1_55S

SENSE_1TO1_55S SENSE VCCSAISNS_R_N

SENSE_DIFFPAIR SENSE_1TO1_55S SENSE ISNS_1V5_S3_R_P

SENSESENSE_1TO1_55S ISNS_1V5_S3_R_N

SENSE_1TO1_55SSENSE_DIFFPAIR SENSE CPUVCCIOS0_CS_P

SENSE_1TO1_55SSENSE_DIFFPAIR CPUVCCIOISNS_R_PSENSE

SENSE_1TO1_55S SENSE CPUVCCIOS0_CS_N

GPUISENS_NSENSE_DIFFPAIR SENSESENSE_1TO1_55S

SENSESENSE_1TO1_55S CPUVCCIOISNS_R_N

GPUISENS_PSENSESENSE_1TO1_55S

ISNS_1V5_S3_PSENSE_1TO1_55S SENSE

ISNS_1V5_S3_NSENSE_1TO1_55SSENSE_DIFFPAIR SENSE

ISNS_AIRPORT_NSENSE_1TO1_55S SENSESENSE_DIFFPAIR

ISNS_AIRPORT_NSENSE_1TO1_55S SENSE

ISNS_AIRPORT_PSENSESENSE_1TO1_55SSENSE_DIFFPAIR

ISNS_AIRPORT_PSENSESENSE_1TO1_55S

ISNS_AIRPORT_R_PSENSESENSE_1TO1_55S

ISNS_AIRPORT_R_NSENSE_1TO1_55SSENSE_DIFFPAIR SENSE

SENSE_DIFFPAIR SENSE_1TO1_55S SENSE ISNS_HDD_N

ISNS_HDD_PSENSE_1TO1_55S SENSE

ISNS_HDD_R_PSENSE_1TO1_55S SENSE

ISNS_HDD_R_NSENSE_DIFFPAIR SENSE_1TO1_55S SENSE

ISNS_LCDBKLT_PSENSE_1TO1_55S SENSE

SENSE_DIFFPAIR SENSE_1TO1_55S SENSE ISNS_LCDBKLT_N

SENSE_DIFFPAIR ISNS_ODD_NSENSE_1TO1_55S SENSE

SENSE_1TO1_55S SENSE ISNS_ODD_P

ISNS_ODD_R_NSENSE_DIFFPAIR SENSESENSE_1TO1_55S

ISNS_ODD_R_PSENSE_1TO1_55S SENSE

SENSE_DIFFPAIR ISNS_PP1V0_S0GPU_PSENSE_1TO1_55S SENSE

ISNS_PP1V0_S0GPU_NSENSE_1TO1_55S SENSE

ISNS_PP1V0_S0GPU_R_NSENSE_1TO1_55S SENSE

SENSE_DIFFPAIR ISNS_PP1V0_S0GPU_R_PSENSE_1TO1_55S SENSE

SENSE_DIFFPAIR PP1V8_S0GPU_PSENSE_1TO1_55S SENSE

SENSE_DIFFPAIR PP1V8_S0GPU_R_PSENSESENSE_1TO1_55S

SENSE PP1V8_S0GPU_NSENSE_1TO1_55S

SENSE_1TO1_55S PP1V5_S0GPU_PSENSE_DIFFPAIR SENSE

SENSE_1TO1_55S PP1V8_S0GPU_R_NSENSE

PP1V5_S0GPU_NSENSE_1TO1_55S SENSE

SENSE_1TO1_55S PP1V5_S0GPU_R_PSENSESENSE_DIFFPAIR

SENSE_1TO1_55S PP1V5_S0GPU_R_NSENSE

SENSE CPUIMVP_ISNS1G_NSENSE_1TO1_55S

CPUIMVP_ISNS1G_PSENSE_1TO1_55S SENSESENSE_DIFFPAIR

CPUIMVP_ISNS1G_R_PSENSESENSE_1TO1_55SSENSE_DIFFPAIR

CPUIMVP_ISNS1G_R_NSENSESENSE_1TO1_55S

ISNS_HS_OTHER_PSENSE_1TO1_55S SENSESENSE_DIFFPAIR

ISNS_HS_OTHER_NSENSE_1TO1_55S SENSE

ISNS_HS_COMPUTING_PSENSE_DIFFPAIR SENSE_1TO1_55S SENSE

ISNS_HS_COMPUTING_NSENSESENSE_1TO1_55S

CPUIMVP_ISNS_PSENSE_DIFFPAIR SENSESENSE_1TO1_55S

CPUIMVP_ISNS_NSENSESENSE_1TO1_55S

ISNS_HS_GPU_NSENSE_1TO1_55S SENSE

ISNS_HS_GPU_PSENSE_1TO1_55S SENSESENSE_DIFFPAIR

GNDGND

108 OF 132

98 OF 101

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89

6 59 60

59

63

42

59

49 63

42

6 42

6 31

49 63

63

6 31

59

6

6 42

6 42

59

59

59

6 59 60

6 59 60

6 59 60

52

6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

52

6 59 60

6 59 60

59

59

56 59

56 59

56 59

56 59

59

59

59

59

56 59

56 59

6

6

6 42

37

37

50

50

9 50

9 50

50

50

50 78

48 64

50 78

48

48 64

48

48

48

48 69

48

48 69

48

48

48

48 66

48 66

98

98

98

98

100

100

100

100

100

100

100

100

100

100

100

100

49 68

49 68

49

49

49

49

49

49

49

49

49

49

TABLE_BOARD_INFO

VERSIONALLEGRO

(MIL or MM)BOARD UNITSBOARD LAYERS BOARD AREAS



TABLE_PHYSICAL_RULE_ITEM TABLE_SPACING_RULE_ITEM























36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1







































































K91 Board-Specific Spacing & Physical Constraints

NOTE: 100_DIFF_BGA is 100-ohms differential impedance on outer layers and 95-ohms on inner layers.

0.13 MM 0.13 MMY45_OHM_SE TOP,BOTTOM

* =STANDARDY 0.1 MM0.1 MM=STANDARD=STANDARD1:1_DIFFPAIR

=STANDARD =STANDARD0.090 MM =STANDARD*50_OHM_SE Y 0.090 MM

50_OHM_SE 0.110 MMTOP,BOTTOM Y 0.095 MM

0.076 MM55_OHM_SE =STANDARD0.076 MM =STANDARDY =STANDARD*

=STANDARD=STANDARD0.099 MM 0.099 MM =STANDARDY*45_OHM_SE

TOP,BOTTOM Y 0.185 MM 0.095 MM37_OHM_SE

0.155 MM =STANDARD =STANDARD37_OHM_SE * =STANDARDY 0.090 MM

=STANDARD* 0.250 MM27P4_OHM_SE =STANDARD0.1 MMY =STANDARD

*72_OHM_DIFF =STANDARD =STANDARD=STANDARD =STANDARDN =STANDARD

0.200 MMISL3,ISL4,ISL9,ISL1072_OHM_DIFF 0.154 MMY 0.200 MM0.154 MM

ISL2,ISL1172_OHM_DIFF 0.154 MM 0.200 MM0.154 MMY 0.200 MM

TOP,BOTTOM Y72_OHM_DIFF 0.175 MM 0.200 MM0.175 MM 0.200 MM

=STANDARD* =STANDARD80_OHM_DIFF =STANDARD=STANDARD =STANDARDN

ISL3,ISL4,ISL9,ISL10 0.120 MMY 0.120 MM80_OHM_DIFF 0.105 MM 0.105 MM

0.105 MMISL2,ISL11 0.105 MM 0.120 MMY80_OHM_DIFF 0.120 MM

=STANDARDN =STANDARD* =STANDARD85_OHM_DIFF =STANDARD=STANDARD

0.110 MM 0.180 MMISL3,ISL4,ISL9,ISL10 0.180 MM0.090 MMY85_OHM_DIFF

TOP,BOTTOM85_OHM_DIFF 0.090 MM 0.190 MM0.125 MM 0.190 MMY

=STANDARD90_OHM_DIFF N* =STANDARD=STANDARD=STANDARD=STANDARD

ISL3,ISL4,ISL9,ISL10 0.220 MM90_OHM_DIFF 0.220 MMY 0.090 MM0.102 MM

ISL2,ISL1185_OHM_DIFF 0.180 MM0.180 MMY 0.110 MM 0.090 MM

ISL2,ISL11 0.090 MM 0.220 MM90_OHM_DIFF Y 0.220 MM0.102 MM

0.135 MMTOP,BOTTOM 0.135 MMY 0.160 MM0.160 MM80_OHM_DIFF

ISL3,ISL4 0.075 MM 0.125 MM 0.125 MMY 0.075 MM100_DIFF_BGA

ISL9,ISL10 0.075 MM100_DIFF_BGA 0.125 MM 0.125 MMY 0.075 MM

0.200 MMISL2,ISL11 0.080 MM100_OHM_DIFF Y 0.200 MM0.080 MM

0.220 MMTOP,BOTTOM 0.089 MM 0.089 MM 0.220 MMY100_OHM_DIFF

=STANDARD=STANDARD =STANDARD=STANDARD* N110_OHM_DIFF =STANDARD

0.2 MMYISL3,ISL4,ISL9,ISL10 0.2 MM0.065 MM0.065 MM110_OHM_DIFF

0.080 MMISL3,ISL4,ISL9,ISL10100_OHM_DIFF 0.200 MMY 0.200 MM0.080 MM

TOP,BOTTOM 0.230 MM 0.230 MM0.090 MM90_OHM_DIFF Y 0.115 MM

40_OHM_SE TOP,BOTTOM Y 0.095 MM0.165 MM

TOP,BOTTOM 0.330 MM0.330 MMY 0.075 MM0.075 MM110_OHM_DIFF

ISL2,ISL11 0.2 MM0.2 MM0.065 MM0.065 MM110_OHM_DIFF Y

=STANDARD100_OHM_DIFF N =STANDARD =STANDARD* =STANDARD =STANDARD

0.095 MM0.310 MMTOP,BOTTOM27P4_OHM_SE Y

=STANDARD40_OHM_SE 0.135 MM =STANDARD0.090 MM =STANDARD* Y

=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF* =100_OHM_DIFF100_DIFF_BGA

0.350 MM* ?5X_DIELECTRIC

5:1_SPACING ?0.5 MM*

0.2 MM* ?2:1_SPACING

* 0.4 MM4:1_SPACING ?

0.25 MM2.5:1_SPACING * ?

* P072_SPACEBGA*

=DEFAULT10 MM =DEFAULTY* =DEFAULT=DEFAULTSTANDARD


PCB Rule Definitions

TOP,BOTTOM 0.090 MM 0.090 MM55_OHM_SE Y

3:1_SPACING 0.3 MM ?*

1.5:1_SPACING ?* 0.15 MM

7X_DIELECTRIC 0.490 MM* ?

4X_DIELECTRIC 0.280 MM ?*

?* 0.210 MM3X_DIELECTRIC

2X_DIELECTRIC 0.140 MM* ?

STANDARD * =DEFAULT ?

* =DEFAULTBGA_P2MM ?

0.071 MMP072_SPACE * ?

BGA_P1MM =DEFAULT* ?

DEFAULT 0.1 MM ?*10 MM=50_OHM_SE 0 MM 0 MMDEFAULT Y =50_OHM_SE*

MM 15.5.1TOP,ISL2,ISL3,ISL4,ISL5,ISL6,ISL7,ISL8,ISL9,ISL10,ISL11,BOTTOM NO_TYPE,BGA

109 OF 132

99 OF 101

BI

V+

V-THRM

V+

V-THRM

IN

OUT

OUTV+

V-THRM

IN

OUT

V+

V-THRM

V+

V-THRM

OUTV+

V-THRM

IN

OUT

OUTIN-

IN+ REF

V+

GND

OUT

IN

IN

IN

IN

IN

ININ

COM

GNDTHRM

DVDDAVDD

AD0

AD1

SDA

SCL

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

VREF

REFCOMP

PAD

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

EDP Current: 7.8A

GPU 1.8V Current Sense

EDP Current: 1.06A

EDP Current: 2.846A

Sense Resistor 0.005 Ohm

EDP Current: 2.4065A

GPU 1.0V Current Sense

AIRPORT Current Sense

EDP Current: 1.2ASense Resistor 0.005 Ohm

ODD Current Sense

EDP Current: 0.715A

LCD BKLT Voltage Sense

I2C ADDRESS: 0X10 / 0X11

DIVIDER: ~ 1/22

GAIN: 100X

ADC RANGE: 0V TO 4.096V

GAIN: 383X

1.5V FB Current Sense

EDP Current: 1.8A

GAIN: 226X

LSB: 0.001V

Sense Resistor 0.005 Ohm

GAIN: 340X

HDD Current Sense

GAIN: 237X

Gain: 130x

LCD BKLT Current Sense

2

DEBUG_ADC

RD1302.61K

1%1/16WMF-LF402

1

44 47 96

DEBUG_ADC

10

402MF-LF

5%1/16W

RD1041 2

MF-LF402

1/16W5%

10

DEBUG_ADCRD1031 2

DEBUG_ADC

DFN

OPA2333UD130

3

2

1

9

4

8

PLACE_NEAR=UD100.2:8mm

DEBUG_ADC

402

1%1/16W

226K

MF-LF

RD1441 2

1 CD142

X5R

2.2UF10%

402

6.3V DEBUG_ADC


2

DFN

OPA2333UD130

5

6

7

94

8

1%

SIGNAL_MODEL=EMPTY

1M

1/16WMF-LF402

RD1421DEBUG_ADC

2

402

4.22K

1%1/16WMF-LF

DEBUG_ADC

RD1401 2

DEBUG_ADC

402

4.22K

1%1/16WMF-LF

1 2

RD141

7 86

7 73 74 78 80

100


0.22UF

X5R

402

6.3V

20%DEBUG_ADC

CD1811

2

1/16W


DEBUG_ADC

1%

402

MF-LF

4.53K

RD185

1 2

4

DFN

OPA2333UD180

3

2

1

9

8

DEBUG_ADC

MF-LF402

1%

SIGNAL_MODEL=EMPTY

1/16W

1M

RD184

1 2

402

DEBUG_ADC

1/16W1%

MF-LF

7.68K

RD181

1 2

RD182

DEBUG_ADC

7.68K

402

1%1/16WMF-LF

1 2

SIGNAL_MODEL=EMPTY

DEBUG_ADC

402MF-LF

1%1M

1/16W

RD1831

2

7 86

7 74 75 76 77

DEBUG_ADC

OPA2333DFN

UD140

3

2

1

94

8

DFN

OPA2333UD140

5

6

7

94

8

100

DEBUG_ADC

PLACE_NEAR=UD.23:5mm

X5R

6.3V

20%

0.22UF

402

CD1821

2

402

1%

4.53K

DEBUG_ADC

MF-LF

1/16W

PLACE_NEAR=UD.23:5mm

RD191

1 2

DFN

OPA2333

DEBUG_ADCUD180

5

6

7

94

8

SIGNAL_MODEL=EMPTY

402

1%1/16WMF-LF

1M

DEBUG_ADCRD190

1 2DEBUG_ADC 1/16WMF-LF402

1M

SIGNAL_MODEL=EMPTY

1%

RD1891

2

11.8K

1/16WMF-LF402

1%

1 2

RD187DEBUG_ADC

DEBUG_ADC

11.8K

402MF-LF1/16W1%

RD188

1 2

6 7 71

7 74 78 80


2.2UF

402

6.3VX5R

10%

DEBUG_ADC

CD1521

2

DEBUG_ADC


1%

402MF-LF

226K

1/16W

RD1581 2

21

XWD150SM

DEBUG_ADC

MF-LF

1%

402

1M

1/16W

RD1561

2

DEBUG_ADC

46.4K

1/16WMF-LF

1%

402

RD1571

2

1%1/16WMF-LF

4.53K

DEBUG_ADC

402


RD1501 2

X5R

DEBUG_ADC

PLACE_NEAR=UD100.22:5mm0.22UF20%6.3V

402

CD1451

2

20%

402

DEBUG_ADC

10VCERM

0.1UFCD1441

2

20%

0.1UFDEBUG_ADC

402

CERM

10V

CD1801

2

INA214

DEBUG_ADC

SC70

UD120

2

5

4

6

1

3

RD143SIGNAL_MODEL=EMPTY

MF-LF1/16W

402

1%

1M

DEBUG_ADC

1 2

RD133

402MF-LF

SIGNAL_MODEL=EMPTY

1/16W

1M

1%

DEBUG_ADC

1 2

7 88

88

SMXWD145

2

1

XWD180SM

1

2

SM

1

2

XWD159

XWD186SM

2

1

DEBUG_ADC

1M

SIGNAL_MODEL=EMPTY

MF-LF

1%1/16W

402

RD1321

2

DEBUG_ADC

10VCERM

0.1UF

402

20%

2

CD1301


1/16W

226K

1%

402MF-LF

DEBUG_ADC

RD1341 2

X5R402

6.3V10%


2.2UF

DEBUG_ADC

CD1311

2

DEBUG_ADC

2.94K

1%1/16WMF-LF402

RD1611 2

DEBUG_ADC

402

1%

2.94K

1/16WMF-LF

RD1601 2

402

4.42K

1/16W1%

MF-LF

RD1511 2

DEBUG_ADC

402

4.42K

1%

MF-LF1/16W

RD1521 2

DEBUG_ADC

1%1/16W

SIGNAL_MODEL=EMPTY

1M

DEBUG_ADC

402MF-LF

RD1621

2

1%

DEBUG_ADC

SIGNAL_MODEL=EMPTY

MF-LF1/16W

1M

402

RD1631 2

1%1/16WMF-LF402

RD1531

2

SIGNAL_MODEL=EMPTY

1M

DEBUG_ADCDEBUG_ADC

1/16W1%

MF-LF

SIGNAL_MODEL=EMPTY1M

402

RD1541 2

MF-LF

DEBUG_ADCPLACE_NEAR=UD100.3:5mm

402

1%1/16W

226KRD1641 2

DEBUG_ADC

CERM402

10V20%0.1UFCD1511

2

226K


MF-LF

1%1/16W

402

NOSTUFF

RD1551 2

CERM10V20%

402

0.1UF

DEBUG_ADC

CD1001

2

QFN

DEBUG_ADC

LTC2309

UD100

14

15

12

13

22

23

24

1

2

3

4

5

6

21

9

10

11

18

19

20

8

16

17

25

7

10UF

6.3V20%

603X5R

DEBUG_ADC

CD1011

2

DEBUG_ADC

20%

402

0.1UF

10VCERM

CD1041

2

DEBUG_ADC

33

5%

MF-LF1/16W

402

PLACE_NEAR=U4900.F1:10mmRD1011 2

2

RD131

DEBUG_ADC

1%

MF-LF402

1

1/16W

2.61K

DEBUG_ADC

0.1UF

CERM402

20%10V

CD1021

2

X5R603

DEBUG_ADC

6.3V20%10UFCD1051

2

DEBUG_ADC

MF-LF402


1/16W5%

33RD1021 2

DEBUG_ADC

10UF

6.3V20%

603X5R

CD1031

2


DEBUG_ADC

10%

X5R6.3V

402

2.2UFCD1401

2


2.2UF

X5R

10%6.3V

402

NOSTUFF

CD1501

2

402-LFCERM6.3V20%

DEBUG_ADC

2.2UFCD1061

2

44 47 96


DEBUG SENSORS AND ADC

LCDBKLT_IOUT

PP1V5_S0GPU_R_N

P1V8_S0GPU_IOUT

P1V5_S0GPU_IOUT

ISNS_HDD_R_N

ISNS_ODD_R_N

ADC_CH6

ADC_CH5

ISNS_ODD_R_P

TP_ISNS_HDD_N

ISNS_ODD_IOUT

PP1V5_S0GPU_R_P

PP1V8_S0GPU_R_N

ISNS_HDD_IOUT

PP1V8_S0GPU_R_P

ADC_CH0

ADC_CH7VOUT_S0_LCDBKLT_DIV

ADC_CH1

ADC_CH2

ADC_CH3

ADC_CH4

ADC_REFCOMP

ADC_CH1

ADC_CH7

ADC_CH4

ADC_CH5

ADC_SDA

PP5V_S5_DEBUG_ADC_DVDD_FILT

MIN_NECK_WIDTH=0.25MMVOLTAGE=5V


SMBUS_SMC_MGMT_SDA

SMBUS_SMC_MGMT_SCL

ADC_VREF

ADC_SCL

PPVOUT_S0_LCDBKLT

PP5V_S3PP5V_S5_DEBUG_ADC_AVDD_FILTMIN_LINE_WIDTH=0.3MM

VOLTAGE=5VMIN_NECK_WIDTH=0.25MM

VOUT_S0_LCDBKLT_XW

PP5V_S3

ADC_CH2

ADC_CH0

PP5V_S3

ADC_CH3

TP_ISNS_LCDBKLT_N

PP5V_S3

ISNS_HDD_R_P

TP_ISNS_ODD_P

TP_ISNS_ODD_N

TP_ISNS_HDD_P

PP5V_S3

ISNS_AIRPORT_R_N

PP1V0_S0GPU

ISNS_AIRPORT_IOUT

ADC_CH6

TP_PP1V5_S0GPU_P

TP_PP1V5_S0GPU_N

1V0_GPU_IOUT

ISNS_PP1V0_S0GPU_R_N

ISNS_PP1V0_S0GPU_R_PTP_ISNS_PP1V0_S0GPU_P

ISNS_AIRPORT_R_P

PP5V_S3

TP_ISNS_PP1V0_S0GPU_N

TP_ISNS_LCDBKLT_P

PP1V0_S0GPU_ISNS

TP_PP1V8_S0GPU_N


TP_ISNS_AIRPORT_P

TP_ISNS_AIRPORT_N

PPBUS_SW_BKL

PP1V8_S0GPU_ISNS

PP1V8_GPUIFPX

TP_PP1V8_S0GPU_P

PP1V5_GPU_REG

PP1V5_S0GPU_ISNS

130 OF 132

100 OF 101

98

98

98

100

100

98

98

98

98

100

100

100

100

100 101

100

100

100

100

6 8 82 88

6 7 29 31 41 42 43 45 65 66 71 81 100

6 7 29 31 41 42 43 45 65 66 71 81 100

100

100

6 7 29 31 41 42 43 45 65 66 71 81 100

100 101

6 7 29 31 41 42 43 45 65 66 71 81 100

98

6 7 29 31 41 42 43 45 65 66 71 81 100

98

98

98

6 7 29 31 41 42 43 45 65 66 71 81 100

OUTV-

V+

V-

V+

IN




36

BRANCH

REVISION

DRAWING NUMBER SIZE

DR


SHEET

PAGE TITLE

C

A

D

2 1


Apple Inc.

PAGE


A

B

C

345678

D

B

8 7 5 4 2 1

CPURIPPLE_ENG

MF

11K0.1%1/16W

402

RD3021

210%

402-1X5R16V

0.1UF

CPURIPPLE_ENG

CD305 1

2

CERM-X5R

10UF

0402

6.3V

CPURIPPLE_ENG

20%

CD304 1

2

CPURIPPLE_ENG

402

10VCERM

0.22UF10%

CD3201

2

CPURIPPLE_ENG

1%

MF-LF1/16W

4.53K

402

RD3201 2

100

5%

MF-LF402

CPURIPPLE_ENG

1/16W

RD3001 2

CPURIPPLE_ENG

1%

1K

1/16WMF-LF402

RD3081 2

CPURIPPLE_ENGPLACE_NEAR=RD305.1:5MM

10

5%

MF-LF402

1/16W

RD3071 2

402-1

0.1UF10%16VX5R

CPURIPPLE_ENG

CD3011

2

CPURIPPLE_ENG

0402

10UF20%

CERM-X5R6.3V

CD3001

2

CPURIPPLE_ENG

0402

FERR-120-OHM-0.3ALD300

1 2

CPURIPPLE_ENG

BAT54XV2T1

SOD-523DD3001 2

100

402

1UF

10%

X5R16V

PLACE_NEAR=RD305.1:5MMCPURIPPLE_ENG

CD3101 2

OPA2365SO-8

CPURIPPLE_ENG

UD3003

2

1

4

8CPURIPPLE_ENG

SO-8OPA2365UD300

5

6

7

4

8

PLACE_NEAR=CD310.1:2MM

SMXWD300

126 7 12 14 48 68

CPURIPPLE_ENG

1.0K0.1%1/16WTF402

RD3031

2CPURIPPLE_ENG

SOD-523

BAT54XV2T1

DD3011 2

CPURIPPLE_ENG

1.0K0.1%1/16WTF402

RD3041

2

1/16WTF402

10.2

CPURIPPLE_ENG

0.1%

RD3051 2

CPURIPPLE_ENG

TF

0.1%

402

1/16W

10.2RD3061 2

402

1/16WMF

CPURIPPLE_ENG

0.1%11K

RD3011

2


Power Supplies BIST

SYNC_MASTER=K91_DINESH

NO_TEST=TRUECPU_VCORE_RMC_N

VSNS_CPU_VCORE_RMC_OUTNO_TEST=TRUE

CPU_VCORE_C

CPU_VCORE_RMC_DIVNO_TEST=TRUE

NO_TEST=TRUE1V05_S0_RMC_DIV

PP5V_S0

CPU_VCORE_RMC_P

PP5V_S0_RMC_FLTMIN_LINE_WIDTH=0.6 MM

VOLTAGE=5VMIN_NECK_WIDTH=0.2 MM

PP1V05_S0_RMC_RMIN_LINE_WIDTH=0.4 MM


PPVCORE_S0_RMC


PP1V05_S0

NO_TEST=TRUECOMP_CPU_VCORE_RMC

PPVCORE_S0_CPU

ADC_CH3

132 OF 132

101 OF 101

6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88

6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72

Documents

K91F-MLB 051-8620 820-2915 Rev: B820-2915 1 PCBF,MLB,K91 PCB CRITICAL 051-8620 1 SCHEM,MLB,K91 SCH CRITICAL 51 46 K18_MLB 1 1 MASTER LPC+SPI Debug Connector 04/27/2010 Table …