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Silicon epitaxy using tetrasilane at low temperatures in ultra-high vacuum chemical vapor deposition Ramsey Hazbun a,n , John Hart a , Ryan Hickey a , Ayana Ghosh b , Nalin Fernando b , Stefan Zollner b , Thomas N Adam c , James Kolodzey a a Department of Electrical and Computer Engineering, University of Delaware,140 Evans Hall, Newark, DE 19716, United States b Department of Physics, New Mexico State University, MSC 3D, P.O. Box 30001, Las Cruces, NM 88003-8001, United States c College of Nanoscale Science and Engineering, SUNY, NY 12203, United States article info Article history: Received 21 September 2015 Received in revised form 27 January 2016 Accepted 8 March 2016 Communicated by M. Tischler Available online 14 March 2016 Keywords: A1. Characterization A1. Crystal morphology A1. Crystal structure A1. X-ray diffraction A3. Chemical vapor deposition B2. Semiconducting silicon compounds abstract The deposition of silicon using tetrasilane as a vapor precursor is described for an ultra-high vacuum chemical vapor deposition tool. The growth rates and morphology of the Si epitaxial layers over a range of temperatures and pressures are presented. The layers were characterized using transmission electron microscopy, x-ray diffraction, spectroscopic ellipsometry, Atomic Force Microscopy, and secondary ion mass spectrometry. Based on this characterization, high quality single crystal silicon epitaxy was observed. Tetrasilane was found to produce higher growth rates relative to lower order silanes, with the ability to deposit crystalline Si at low temperatures (T ¼400 °C), with signicant amorphous growth and reactivity measured as low as 325 °C, indicating the suitability of tetrasilane for low temperature che- mical vapor deposition such as for SiGeSn alloys. & 2016 Published by Elsevier B.V. 1. Introduction 1.1. Silanes in ultra-high vacuum CVD The chemical vapor deposition (CVD) of silicon has been com- mon in the semiconductor industry for close to fty years, with the ultra-high vacuum variant (UHV-CVD) being realized in the last thirty years [1]. UHV-CVD allows for the low temperature epitaxy (LTE) of Si at temperatures typically between 450 °C and 650 °C [2,3], and is typically performed at pressures on the order of 10 4 mbar [4]. Through careful surface preparation to prevent oxide and hydrocarbon contamination of the substrate, and with growth chamber designs that limit background pressures to 10 9 mbar, it is possible to grow high quality Si epitaxial layers while preserving thermally sensitive materials and doping proles. The typical process gas used for Si growth by UHV-CVD is monosilane (SiH 4 ) [5,6]. More recent work, however, has exam- ined higher order silanes (Si x H 2x þ 2 , x 41) such as disilane, trisi- lane (Silcore), and neo-pentasilane [710] for use in reduced pressure (RP) and UHV-CVD systems. Higher order silanes are attractive for Si/SiGe epitaxy due to higher growth rates at lower temperatures compared to monosilane [11], which is why higher order silanes are an important avenue of research for the ever- shrinking thermal budgets of modern CMOS processes. Recently, tetrasilane (Si 4 H 10 , abbreviated as TS) has been mixed with deut- erated stannane, trigermane and tetragermane in a UHV-CVD system for the growth of SiGeSn alloys [12,13]. Similarly, TS has been mixed with Ge 4 H 10 and SnD 4 in a gas source molecular beam epitaxy system for the growth of SiGeSn alloys [14]. Due the lower deposition temperatures ( 300 °C) required for Sn alloys to pre- vent Sn segregation, the growth of SiGeSn alloys would not be practical with monosilane. The growth rate of monosilane drops off exponentially below 500 °C, with no signicant growth measured below 470 °C in UHV-CVD [2]. On the other hand, TS presents an appealing possibility for higher growth rates at lower temperatures compared to lower order silanes (Si x H 2x þ2 , x o3). To date, no data on the growth rate of intrinsic crystalline Si from TS has been reported, and in this work, a basic description of TS growth rates and behavior in UHV-CVD systems is presented. 1.2. Si 4 H 10 deposition and growth chemistry In the case of tetrasilane (TS), the Si 4 H 10 molecules typically occur as n-tetrasilane (linear Si chain) and iso-tetrasilane (one Si not on a linear chain) congurations. While the n-tetrasilane has Contents lists available at ScienceDirect journal homepage: www.elsevier.com/locate/jcrysgro Journal of Crystal Growth http://dx.doi.org/10.1016/j.jcrysgro.2016.03.018 0022-0248/& 2016 Published by Elsevier B.V. n Corresponding author. E-mail address: [email protected] (R. Hazbun). Journal of Crystal Growth 444 (2016) 2127

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Page 1: Journal of Crystal Growth - New Mexico State University...22 R. Hazbun et al. / Journal of Crystal Growth 444 (2016) 21–27 limit TS evaporation, while the TS cylinder valve was opened

Journal of Crystal Growth 444 (2016) 21–27

Contents lists available at ScienceDirect

Journal of Crystal Growth

http://d0022-02

n CorrE-m

journal homepage: www.elsevier.com/locate/jcrysgro

Silicon epitaxy using tetrasilane at low temperatures in ultra-highvacuum chemical vapor deposition

Ramsey Hazbun a,n, John Hart a, Ryan Hickey a, Ayana Ghosh b, Nalin Fernando b,Stefan Zollner b, Thomas N Adam c, James Kolodzey a

a Department of Electrical and Computer Engineering, University of Delaware, 140 Evans Hall, Newark, DE 19716, United Statesb Department of Physics, New Mexico State University, MSC 3D, P.O. Box 30001, Las Cruces, NM 88003-8001, United Statesc College of Nanoscale Science and Engineering, SUNY, NY 12203, United States

a r t i c l e i n f o

Article history:Received 21 September 2015Received in revised form27 January 2016Accepted 8 March 2016

Communicated by M. Tischler

mass spectrometry. Based on this characterization, high quality single crystal silicon epitaxy was

Available online 14 March 2016

Keywords:A1. CharacterizationA1. Crystal morphologyA1. Crystal structureA1. X-ray diffractionA3. Chemical vapor depositionB2. Semiconducting silicon compounds

x.doi.org/10.1016/j.jcrysgro.2016.03.01848/& 2016 Published by Elsevier B.V.

esponding author.ail address: [email protected] (R. Hazbun).

a b s t r a c t

The deposition of silicon using tetrasilane as a vapor precursor is described for an ultra-high vacuumchemical vapor deposition tool. The growth rates and morphology of the Si epitaxial layers over a rangeof temperatures and pressures are presented. The layers were characterized using transmission electronmicroscopy, x-ray diffraction, spectroscopic ellipsometry, Atomic Force Microscopy, and secondary ion

observed. Tetrasilane was found to produce higher growth rates relative to lower order silanes, with theability to deposit crystalline Si at low temperatures (T¼400 °C), with significant amorphous growth andreactivity measured as low as 325 °C, indicating the suitability of tetrasilane for low temperature che-mical vapor deposition such as for SiGeSn alloys.

& 2016 Published by Elsevier B.V.

1. Introduction

1.1. Silanes in ultra-high vacuum CVD

The chemical vapor deposition (CVD) of silicon has been com-mon in the semiconductor industry for close to fifty years, withthe ultra-high vacuum variant (UHV-CVD) being realized in thelast thirty years [1]. UHV-CVD allows for the low temperatureepitaxy (LTE) of Si at temperatures typically between 450 °C and650 °C [2,3], and is typically performed at pressures on the orderof 10�4 mbar [4]. Through careful surface preparation to preventoxide and hydrocarbon contamination of the substrate, and withgrowth chamber designs that limit background pressures to10�9 mbar, it is possible to grow high quality Si epitaxial layerswhile preserving thermally sensitive materials and dopingprofiles.

The typical process gas used for Si growth by UHV-CVD ismonosilane (SiH4) [5,6]. More recent work, however, has exam-ined higher order silanes (SixH2xþ2, x41) such as disilane, trisi-lane (Silcore™), and neo-pentasilane [7–10] for use in reducedpressure (RP) and UHV-CVD systems. Higher order silanes are

attractive for Si/SiGe epitaxy due to higher growth rates at lowertemperatures compared to monosilane [11], which is why higherorder silanes are an important avenue of research for the ever-shrinking thermal budgets of modern CMOS processes. Recently,tetrasilane (Si4H10, abbreviated as TS) has been mixed with deut-erated stannane, trigermane and tetragermane in a UHV-CVDsystem for the growth of SiGeSn alloys [12,13]. Similarly, TS hasbeen mixed with Ge4H10 and SnD4 in a gas source molecular beamepitaxy system for the growth of SiGeSn alloys [14]. Due the lowerdeposition temperatures (�300 °C) required for Sn alloys to pre-vent Sn segregation, the growth of SiGeSn alloys would not bepractical with monosilane. The growth rate of monosilane dropsoff exponentially below �500 °C, with no significant growthmeasured below 470 °C in UHV-CVD [2]. On the other hand, TSpresents an appealing possibility for higher growth rates at lowertemperatures compared to lower order silanes (SixH2xþ2, xo3). Todate, no data on the growth rate of intrinsic crystalline Si from TShas been reported, and in this work, a basic description of TSgrowth rates and behavior in UHV-CVD systems is presented.

1.2. Si4H10 deposition and growth chemistry

In the case of tetrasilane (TS), the Si4H10 molecules typicallyoccur as n-tetrasilane (linear Si chain) and iso-tetrasilane (one Sinot on a linear chain) configurations. While the n-tetrasilane has

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Fig. 1. Diagram of UHV-CVD system showing additional butterfly valve directly above the main chamber turbomolecular pump. Based on figure from Meyerson [5]. The Xsymbol represents high-vacuum gate valves.

R. Hazbun et al. / Journal of Crystal Growth 444 (2016) 21–2722

similar bond energies and breaks down into similar silane radicalsas other linear silanes, in the iso-tetrasilane molecule the breakingof Si–Si bonds leads to the creation of SiH3 or even Si2H4 radicals.The creation of a SiH2 radical from the iso-tetrasilane moleculewould require the breaking of both a Si–H and Si–Si bond, unlikein linear silanes where two Si–Si bonds can be broken to createSiH2. Since the stronger Si–H bond requires more energy(��380 kJ/mol) than a Si–Si bond (��310 kJ/mol) to be broken[15], there will be higher energy requirements for cracking iso-tetrasilane, making n-tetrasilane preferred over iso-tetrasilane forachieving high growth rates at low temperatures. In this work a3:1 ratio of n-tetrasilane to iso-tetrasilane ratio was specified bythe manufacturer (Voltaix/Air Liquide) and is similar to the ratioreported elsewhere [16].

Fig. 2. Vapor pressure of silanes SinH2nþ2(no5); water, H2O; and trichlorosilane,TCS [18]. Two references for TS vapor pressure are presented (black [19]; red [18]).Vapor pressure of H2O is shownwith yellow dashed line, and is similar to that of TS.(For interpretation of the references to color in this figure legend, the reader isreferred to the web version of this article).

2. Experimental details

2.1. CVD system description

Samples were grown in an Oerlikon/Leybold SIRIUS CVD-300,which is a quartz tube hot wall reactor as shown in Fig. 1, similarto UHV-CVD systems described elsewhere [2,5,17]. The growthand introduction chambers were evacuated by separate pumpstacks (growth: turbomolecular, rotary vane pumps and a rootsblower; intro chamber: turbomolecular and rotary vane pump).The growth chamber background pressure was typically10�9 mbar at 500 °C with pressures rising to �10�4 mbar withgas flow during growths. Minor deviations from the originalreactor design include the addition of an adaptively controlled 80 0

butterfly valve that can be used to limit pumping conductance andto control chamber pressure. A quartz boat for holding up totwenty-five of 125 mm diameter wafers was used, but boats forwafer diameters up to 200 mm can also be used with the tool. Thewafers to be used for the epitaxy experiments were placed in thecenter of the boat, with additional thermal dummy wafers oneither side of the experimental wafers, for temperature uniformity.

2.2. Tetrasilane vapor delivery system

In Fig. 2, it can be seen that TS has a lower vapor pressurecompared to lower order silanes, with a boiling point close to100 °C [18]. TS is a liquid at room temperature, much like neo-pentasilane (NPS), which typically requires a bubbler and carriergas for use in CVD systems due to its relatively low vapor pressure.Crucially, the vapor pressure of TS is high enough that vapor

delivery is possible in a vacuum system such as under UHV-CVDconditions without using a bubbler, or carrier gas, or liquid vapormass flow controller (MFC) that creates additional process vari-ables and adds complexity to the pre-cursor delivery system. Infact, the typical gas delivery systems for monosilane can be usedfor delivery of TS with only minor modifications, asdescribed below.

In this work, tetrasilane delivery is under high vacuum, whichallows the evaporation of the TS vapor without using a carrier gasor bubbler. Interestingly, the vapor pressure of TS versus tem-perature is similar to the vapor pressure of water, which allowscommodity heating cord and temperature controllers, designed forheating water vessels, to be used in a heated delivery system. Thetetrasilane was contained in a six liter (6 L) aluminum cylinderwith a 5 psi helium pad to prevent possible contamination and toaid in cylinder leak testing. Stainless steel tubes for gas deliverywere heated in three zones: the gas lines/manifold inside the gascabinet, the gas lines running between the cabinet and gas box onthe tool, and the gas manifold and mass flow controllers in theCVD tool assembly. Prior to the use of the TS precursor, the gaslines were purge-pumped twenty times while the lines wereheated to 100 °C for up to two weeks in order to remove residualmoisture from the gas line. After completing the purging andbake-out of all gas lines, all of the line heaters were turned off to

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R. Hazbun et al. / Journal of Crystal Growth 444 (2016) 21–27 23

limit TS evaporation, while the TS cylinder valve was opened tothe vacuum of the delivery lines, and the He pad was pumped outof the cylinder. The removal of helium was confirmed via readingson a residual gas analyzer (RGA). During growths, the zone tem-peratures of the TS gas line were set at incrementally highertemperatures, starting below 25 °C at the cylinder (room tem-perature) up to 40 °C at the MFC, which is below the MFC oper-ating temperature limit of 55 °C. To improve the TS gas line con-ductivity at high vacuum, all possible restrictive orifices such asgas filters were removed. The analog pressure gauge on the highpressure inlet side of the gas regulator was replaced with acapacitance manometer gauge to measure the cylinder supply/vapor pressure of 46.7 mbar at room temperature. In addition, acapacitance manometer gauge was installed directly upstream ofthe MFC to monitor the pressure drop over the length of thedelivery line, which was found to be 2.7 mbar, which was con-sidered to be negligible for a 7.6 m long delivery line. No measuredchange in growth rates or change in RGA measurements wasobserved for over 6 months at 25 °C suggesting the TS is nominallystable.

2.3. Growth conditions

Using careful wafer cleaning conditions including an HF-lastetch as detailed below, followed by rapid loading (o2 min) intothe sample introduction vacuum chamber, the surface bonds ofthe Si substrate will initially be terminated with H atoms. Giventime and thermal energy, however, these Si–H surface bonds willbreak and the H will desorb. The stability of this H passivation andthe conditions required for the H desorption to occur has beenexplored extensively [5,20,21], with the H ad-layer being relativelystable at room temperature but desorbing at substrate tempera-tures above 400 °C, leaving Si atoms which can be bonded to thecracked SiHx radicals. This H desorption rate is expected to be thelimiting factor for the deposition reaction at lower temperaturesfor mono-silane [1].

Wafers were cleaned using a standard RCA cleaning procedure[22] to remove organics and metal ions, which was concludedwith an oxide etch (1:100 HF:H2O, 5 min) and DI H2O displace-ment rinse (20 min) to stabilize the H passivation of the surface asdescribed elsewhere [21]. The duration between the completion ofthe displacement rinse and the placement into the introductionchamber with pump down was kept to less than 2 min. Waferswere transferred from the introduction chamber to the growthchamber under H2 ambient flow, followed immediately by growth,which was typically initiated within ten minutes of loading thewafer in the introduction chamber. Samples of pure Si were grownwith TS at tube temperatures from 400 °C to 550 °C. Higher tem-peratures were not possible due to CVD system constraints. Below400 °C, the crystalline silicon growth rates with tetrasilane werefound to be negligible. Two growth temperature series, with dif-ferent growth pressures (0.3 mbar, butterfly wide open; and70 mbar, butterfly partially closed) set by the butterfly valve, wereperformed to examine the effect of pressure and temperature ongrowth rate and material quality. The TS was delivered to thegrowth chamber at a flow of 7 standard cubic centimeters perminute (sccm) (calibrated to the MFC gas correction factor of SiH4).The partial pressure of TS in the CVD growth chamber at this flowrate was measured to be 0.3 mbar via a capacitance monometer(PCM), and was found to match the reading of a hot cathode gauge(PHCG) with a gas correction factor of 6.4, where PHCG¼GCF� PCM.Growth durations were typically one to two hours, but occasion-ally were longer for low temperature runs, which had very lowgrowth rates. Epitaxial layer thicknesses were typically on theorder of 20–50 nm. Epitaxial growth was found to occur

immediately after gas flow commenced, with no growth delay orincubation time observed.

2.4. Characterization techniques

A series of characterization techniques were used to observethe properties of the deposited Si films, and to understand therelation between growth parameters and sample quality andcrystallinity. X-ray diffraction (XRD) and reflectivity measure-ments were performed using a Philips/Panalytical X'Pert MRDequipped with a high-resolution goniometer and a CuKɑ1 x-raysource (λ¼ .154056 nm). For diffraction measurements (XRD), aBartels Ge (2 2 0) monochromator was inserted in the incidentbeam path (12 arc/s divergence), while a three-bounce Ge (2 2 0)analyzer was inserted in the diffracted beam path. Reflectivitymeasurements (XRR) were performed using a 1/32° divergence slitin the incident beam, and a parallel plate collimator and Soller slitin the diffracted beam path. XRD and XRR thickness measure-ments of pure Si epi-layers on Si substrates are not possible since ahigh quality Si layer will appear identical to the Si substrate.Therefore, to make XRD analysis possible, some samples had a thinSi1�xGex (xo0.10) buffer layer grown with tetrasilane and diger-mane prior to growing a pure Si cap layer. The film thickness ofamorphous Si layers on a crystalline Si substrate was also mea-sured via spectroscopic ellipsometry (SE). Data were acquiredusing a J.A. Woollam variable angle of incidence spectroscopicellipsometer (VASE) with a computer controlled Berek waveplatecompensator. The ellipsometric angles were fitted using a three-layer model consisting of the Si substrate, the amorphous Si layer,and native/surface SiO2. The optical constants for all layers weretaken from the literature [23] and the a-Si and SiO2 thicknesseswere the only two fitting parameters. Excellent agreementbetween data and models were found, indicating the measuredthicknesses were accurate.

Additionally to evaluate the overall quality of the deposited Sifilms, a dilute Secco defect decoration etch (1:2:16, 0.15 MK2Cr2O7:HF(49%):H2O) was performed to decorate any defects inthe Si epi-layers [17,24], and the revealed defects were imagedusing differential interference contrast microscopy (DIC orNomarski microscopy). Optimum etch times were determined bydoing a time series to maximize the number of defects decorated,and also to optimize etch pit visibility. To get a sense of quality onan atomic scale, cross sections of epitaxy samples for transmissionelectron microscopy (TEM) studies were prepared using a ZeissAuriga 60 SEM/FIB (scanning electron microscope with focused ionbeam), with accelerating voltage of 30 keV for imaging, and Ga ionbeam current of from 4 nA for milling down to 120 pA for pol-ishing. Milled samples were mounted on a copper TEM grid usingsputtered platinum handles. TEM imaging was performed using aJEOL-brand JEM-2010F TEM with an accelerating electron voltageof 200 keV using a zirconated tungsten emission source. The TEMsystem was also equipped with an EDAX-brand energy dispersivex-ray spectroscopy (XEDS) module for material identification.

Secondary ion mass spectrometry (SIMS) measurements per-formed on a quadrupole SIMS system was used to evaluate thecomposition of interfacial and epitaxy contamination. Depths werecalibrated using a stylus profilometer, and O and C concentrationswere calibrated using an ion implanted Si standard. Atomic ForceMicroscopy (AFM) measurements were performed to evaluate thesurface roughness and morphology of epitaxial films, using aVeeco/Bruker Dimension 3100 operating in tapping mode andcaptured with the Nanoscope V interface and software.

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Fig. 3. Arrhenius plot showing growth rate of Si vs. growth temperature at twogrowth pressures in comparison with prior work. Generally an increase in growthrate vs. temperature is seen. In the 0.3 mbar series (squares), the growth rate ishighly temperature dependent below 500 °C and has an activation energy of1.34 eV. At 500 °C and above, the growth rate is less dependent on temperature andinstead depends on the mass flow with an activation energy of .08 eV. A seriesgrown at higher pressure (70 mbar) is also shown (red disks), with amorphoussamples (hollow red circles). A series grown with mono-silane in the same modelUHV-CVD is also shown (triangles) for comparison [2]. To determine the growthrates, the thickness was measured by XRD and spectroscopic ellipsometry. (Forinterpretation of the references to color in this figure legend, the reader is referredto the web version of this article).

R. Hazbun et al. / Journal of Crystal Growth 444 (2016) 21–2724

3. Results and discussion

3.1. Growth rate

In general for CVD growth with silanes, at least two growthtemperature regimes are expected and are characterized by anactivation energy, EA, which relates the energy required to breaksilane bonds and form new bonds on the growth surface [1].Growth with TS fulfills this expectation, with two regimes readilyidentified at pressures of 0.3 mbar in Fig. 3; a mass flow limitedregime above 500 °C and a reaction rate limited regime below500 °C. Above 500 °C, there was almost no dependence of growthrate on temperature; however, there was a measureable depen-dence on mass-flow, or the partial pressure of TS molecules(GR¼�1.5 nm/min at 0.3 mbar). If the chamber pressure (andtherefore partial pressure of TS) was increased by using the but-terfly valve or by boosting the TS flow rate, the growth rate wasobserved to increase (GR¼�2.0 nm/min at 70 mbar set by but-terfly valve). Below 500 °C, the strong temperature dependenceand higher activation energy (EA¼1.34 eV) indicated that growthwas reaction rate limited, which perhaps could be attributed to ahydrogen desorption limitation [1]. In this reaction rate limitedregime, the rate limiting step of Si deposition may be a chemicalreaction such as the desorption of H atoms which is required foropen sites to be available on the growth surface. With decreasingtemperature, the growth rates decreased to as low as 0.1 nm/min(400 °C) as measured from film thickness via XRD. This tempera-ture dependence is not as strong as that seen in Arrhenius plots ofmonosilane (EA¼2.1 eV) reported in Hart et al. [2] or even fordisilane (EA¼2.3–2.5 eV) [8,25], but there is good agreementbetween the activations energies of TS and Si3H8 (EA¼1.34 eV) inthe reaction rate limited regime [2,8,26]. This dichotomy in reac-tion limited activation energies between the lower order silanes(mono- and di-) with high EA and the higher order silanes (tri-,tetra-, etc.) with lower EA is worth noting and may be related tothe fact that higher order silanes have lower energy requirementsto crack molecules into SiH2 radicals (Si–Si vs. Si–H bonds) [15]. Ithas also been theorized that higher order silanes provide analternative desorption mechanism for H on the substrate surface inthe form of highly reactive radicals that more readily replace H at

Si–H bond sites [27]. Indeed the fact that the growth rate of TS issignificantly higher compared to SiH4 in the reaction-rate limitedregime suggests that H coverage is not the only factor in deter-mining the reaction rate.

At growth pressures less than 1 mbar, the growth rate of TS isgenerally higher than that of lower order silanes. For mono-silanegrowths that were performed in a nearly identical reactor (SiriusCVD-300) with similar partial pressures as those used in thispaper, growth rates of less than 0.5 nm/min, or about 4 to 5 timeslower than tetrasilane have been reported [2]. By avoiding thereaction rate limited regime, the growth process control can besimplified because it removes substrate temperature as a processvariable affecting growth rate, leaving the gas partial pressure orflow rate as the only critical variables. The growth rate of mono-silane has been observed to be strongly temperature dependentbelow 530 °C, and other UHV-CVD work [26] has reported a strongdependence on substrate temperature as high as 670 °C. In thiswork, the temperature of regime transition for TS was observed tooccur at 500 °C, which is over 170 °C lower. The lower temperatureof transition from the mass-flow limited regime to the reactionlimited regime allows TS processes to be performed at even lowertemperatures while still being mass flow limited and thereforemaximizing source gas utilization. While growth rates slow con-siderably below 500 °C, crystalline Si was grown with TS at tem-peratures as low as 400 °C, whereas growth rates for mono-silaneare negligible below 470 °C. The increased growth rate of TS andthe lower temperature for transition between mass-flow andreaction-rate limited regimes is mirrored by similar work per-formed with higher order silanes at pressures (41 mTorr) typicalof RP-CVD systems [8,9,28,29].

Growth rates using TS at a higher pressure (70 mbar, red circles)yielded a significantly different activation energy for the mass-flow limited regime between 400 °C and 550 °C (EA¼0.20 eV at70 mbar vs. EA¼0.08 eV at 0.3 mbar). The reaction rate limitedregime between 325 °C and 375 °C also had a different activationenergy relative to the lower pressure series (EA¼0.76 eV at 70 mbarvs. EA¼1.34 at 0.3 mbar). Initially, high pressure growths per-formed at temperatures below 500 °C were amorphous, as con-firmed via spectroscopic ellipsometry and x-ray reflectivity. In thiswork, amorphous Si was grown at temperatures as high as 450 °C.The hot wall reactor used in this work is unable to perform an in-situ removal of any contaminants due to a lack of high tempera-ture (Tmax¼625 °C) capability nor rapid temperature ramping(ΔTo2 °C/min) which are practical requirements for desorptionof contaminants from the substrate. To confirm that substratesurface contamination or the native oxide caused the amorphousgrowth, a subsequent growth was performed at Tsub¼450 °C and70 mbar, using a new cleaning process (utilizing the displacementrinse detailed above) and yielded crystalline Si epitaxy with agrowth rate of 0.45 nm/min which is slightly higher than thegrowth rate of 0.37 nm/min for TS growths at 450 °C and 0.3 mbar.No growth was reported with mono-silane at 450 °C, and growthsperformed with Silcore (Si3H8) below 450 °C were reported to beamorphous [30]. The Si grown with TS at 325 °C was also amor-phous, but the reactivity of TS at such low temperatures indicatesit would be a suitable pre-cursor for SiGeSn CVD which typicallyoccurs at temperatures around 325 °C [13,31,32]. Similar workdone with Silcore (Si3H8) also noted a relatively high reactivity atlow temperatures (less than 500 °C) for Si3H8, with amorphous Sigrowth rates on the order of 0.19 nm/min at 430 °C withPSilcore¼14.7 mbar (11 mTorr) [30]. In this work, a growth rate of0.26 nm/min at 325 °C with PTS¼70 mbar, suggests that TS isreactive at even lower temperatures than Si3H8.

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Fig. 4. 1 μm�1 μm AFM area measurement of sample SGT098, 62 nm Si on Si (100)substrate, grown from TS at 550 °C. The rms surface roughness is Rrms¼0.38 nm,and the peak-to-peak roughness is Rmax¼3.04 nm.

Fig. 5. SIMS measurement of CVD sample SGT104 (T¼500 °C, P¼70 mbar) showingO (black) and C (red) concentration in the epi-layer and substrate. The O and Cdoses at the substrate/epitaxy interface are indicated. (For interpretation of thereferences to color in this figure legend, the reader is referred to the web version ofthis article).

Fig. 6. HRXRD ω�2θ symmetric (004) measurement showing diffracted intensityversus Bragg angle of sample SGT 122, a 10.2% Ge, 176 nm SiGe layer capped with26.5 nm of Si. Inset: ω rocking curve around SiGe layer peak showing ω-FWHMused to estimate defect density and coherence lengths.

R. Hazbun et al. / Journal of Crystal Growth 444 (2016) 21–27 25

3.2. Film quality

Atomic Force Microscopy (AFM) measurements of epitaxial Silayers grown directly on the Si substrates yielded RMS roughness,Rrms, measurements less than 0.5 nm, with a representative1�1 μm region of growth sample SGT 098 shown in Fig. 4(Rrms¼0.36 nm). Experiments with silane and germane on similarCVD equipment reported typical RMS roughness between 0.15 nmand 0.3 nm for 40 nm Si.68Ge.32 layers grown below 500 °C [2].Shinriki et al. reported particle free deposition with neo-pentasilane in an RP-CVD tool, with RMS roughness of 0.36 nm.In this work, no particles or associated signs of gas-phase reactionswere observed, such as has been observed with neo-pentasilane[28].

To understand the chemical purity of the TS layers, the clean-liness of the chamber, and to evaluate the effectiveness of the pre-epitaxy cleaning process, SIMS measurements were performed,with a representative measurement shown in Fig. 5. The doses ofcarbon and oxygen at the interface were 3�1012 atoms/cm2 and7.8�1013 atoms/cm2, respectively, and are very similar to dosesreported for silane and germane growths reported on similar hot-wall UHV-CVD equipment [17], suggesting that the pre-cleanprocess is relatively effective for these low temperature UHV-CVD tools. These doses are relatively high compared to work withRP-CVD and cold-wall systems which have an in-situ cleaningcapability for eliminating interfacial contamination [28,33]. Workwith UHV-CVD systems with in-situ cleaning capabilities demon-strated that the interfacial doses found in this work are lowenough for high-quality epitaxy to be grown, and that these dosesare typical for processes without an in-situ clean [17,33]. Thebackground levels of O and C in the substrate were 3�1018 cm�3

and 5�1017 cm�3, respectively, while the minimum O and Clevels in the epitaxial layer grown at 500 °C were 7�1018 cm�3

and 1�1018 cm�3, respectively. SIMS measurements of a layergrown at 450 °C had minimum O and C levels in the epitaxial layerof 2�1019 cm�3 and 2�1018 cm�3.

To evaluate the crystalline quality of the Si grown with tetra-silane, an effort was made to determine the density of threadingdislocations. Pure Si layers should be indistinguishable from Sisubstrates, but a SiGe layer will be seen as a separate peak fromthe substrate diffraction peak and can be further analyzed todetermine layer quality. Therefore A 176 nm Si.898Ge.102 markerlayer was grown with TS and Ge2H6 followed by a 26.5 nm Si cap

(SGT122, T¼500 °C, P¼70 μbar, GRSiGe¼3.9 nm/min,GRSi¼1.3 nm/min). An ω�2θ coupled scan aligned to the (004)diffraction peaks of the sample and an ω rocking curve (RC)measurement was performed on the Si1�xGex marker layer (bothin Fig. 6). Significant broadening of the Si1�xGex peak in the ω�2θmeasurement, beyond that expected for a finite thickness layerwould suggest a highly defective or relaxed layer but was notobserved for any of the crystalline samples in this work. A per-pendicular coherence length (relative to the growth plane)Dcoh?¼λ/(2*ω�2θFWHM*cosθ) [34] was calculated to be 196 nmfor SGT122, slightly higher than the film thickness determinedfrom interference fringes, suggesting a highly coherent, strained,and low defectivity layer. A theoretical formula based on thebroadening of the ω-FWHM (full width half-maximum) deter-mined from ω-RC measurements, caused by angular broadeningdue to threading dislocations (TD), was used to estimate the lateralcoherence length and the number of angular threading dislocationdefects. The defect density is given by NThrd¼(ωFWHM)2/(4.36*b2)where b is the length of Burgers vector calculated from the alloylattice constant [35,36]. Dislocation densities on the order of105 defects/cm2 were calculated using this equation and are closeto the detection floor for this technique and equipment config-uration due to the inherent FWHM of the x-ray beam [37]. How-ever, further analysis on pure Si epi-layers by direct counts ofdefects that were revealed via a dilute Secco etch [24] also yieldeddefect densities on the order of 105 TDD/cm2, showing good

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Fig. 7. HRTEM micrograph of SGT104, 90 nm Si on Si (100) substrate, grown at500 °C (5 nm scale) taken at the substrate-epi interface. The horizontal line denotesthe position of the interface with the substrate indicated as the top half of theimage. Inset: transmission electron diffraction pattern of the crystalline Si epi-layershowing highly ordered single crystal.

R. Hazbun et al. / Journal of Crystal Growth 444 (2016) 21–2726

agreement between etch pit densities and the ω-FWHM estimateddefect density. These defects are believed to originate from con-tamination at the growth interface and not from the layer itself[33]. The good agreement between XRD defect estimates on theSiGe layer and direct etch pit densities on the Si cap also suggeststhat the observed defects were nucleated at the initial growthinterface or in the SiGe layer and not the Si layer grown only withTS. Given the levels of interfacial oxygen (7.8�1015 O atoms/cm2)measured from SIMS (Fig. 5) these observed values of defectdensities were expected due to the increased number of defectnucleation sites from O atoms at the initial growth interface [33]and were comparable to those reported previously for samplesgrown under similar conditions with SiH4 and 5% GeH4 in He [17].Additional growth parameters and material characterization forSiGe epitaxial layers grown with TS can be found elsewhere [38].

Cross sections imaged via (HR)-TEM showed a crystalline Siepitaxial layer with no clear defects or inhomogeneity (Fig. 7) andwith no clear interfacial defects at the substrate epitaxy interface.Additionally, electron diffraction patterns (Fig. 7, inset) were fullysymmetric and sharp with minimal haze indicating high qualitysingle crystal material. The strain present in the Si and SiGe epi-taxy layers was measured using two axis reciprocal space maps(RSM) performed around the (224) diffraction peaks (not shown)and no horizontal difference (ΔQx) in the peak alignment wasseen, which confirmed that fully strained SiGe layers were grownon the Si substrates (relaxation, R¼(aJ–asub)/(a0–asub)o1%). Thecombination of reasonable defect density from XRD and chemicaletching, no relaxation as measured by XRD-RSM and the highquality electron microscopy all indicate that the Si and SiGe epi-taxial layers grown with TS were high quality and comparable tolayers grown with mono-silane.

4. Conclusion

Tetrasilane (TS) shows significant promise as a new precursorfor low temperature Si epitaxy in CVD systems. The higher ordertetrasilane allows for relatively high growth rates while main-taining quality and limiting incorporated impurities. In addition,crystalline Si was grown at temperatures as low as 400 °C usingtetrasilane, pushing the minimum temperature for crystalline Si

growth in UHVCVD roughly 70 °C lower than the 470 °C previouslydocumented with monosilane [2].

While the liquid phase of TS requires a heated delivery systemunlike lower order silanes, it is still readily vaporized and does notrequire a bubbler because of its higher vapor pressure relative tohigher silanes such as Si5H10. The ease of retooling from SiH4 to TScombined with ease of handling make TS very appealing for tra-ditional Group IV epitaxy. In addition, the extended growth tem-perature window down to 325 °C suggests that tetrasilane hasgreat potential for novel alloy growth with digermane, stannane,and other very low temperature group IV precursors.

Acknowledgments

The authors would like to acknowledge Matthew Coppinger forhis help recommissioning the UHV-CVD system used in this work;Kevin Hickey for his assistance with HF dip tank design; Fei Dengand Chaoying Ni for their assistance with TEM; and MichaelPikulin, Jay Song, German Shekk, Benjamin Jurcek, VenkateswaraPallem, and Bastien Lefevre for their helpful suggestions regardingtetrasilane vapor delivery.

This research was supported by gifts from IBM Corporation, AirLiquide, United States, and Thorlabs, and by AFOSR Grant FA9550-14-1-0207, FA9550-13-1-0022 Subaward Q01573 and ARO GrantW911NF1210380, All funding and correspondence was throughthe Delaware Research and Technology Center in Newark, DE,United States.

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