ITRS Emerging Technology Review, 12 July 2008 Contact: SJ Allen, [email protected] 1 Spin Torque Transfer Technology S. James Allen UC Santa Barbara

ITRS Emerging Technology Review, 12 July 2008 Contact: SJ Allen, [email protected]

Spin Torque Transfer Technology

S. James AllenUC Santa Barbara

• Science

• TechnologySpin Torque Transfer – RAM, STT-RAM

Spin Torque Transfer Nano-oscillators Spin logic devices



Mark Rodwell UC Santa BarbaraBob Buhrman CornellStu Wolf U. VirginiaH. Ohno Tohoku UniversityNick Rizzo Free ScaleYiming Huai GrandisBill Rippard NISTSteve Russek NISTEli Yablonovitch UC BerkeleyAjey Jacob Intel

With input from



• Science



From R. A. Buhrman, “Spin Torque Effects in Magnetic Nanostructures”, Spintech IV, 2007


Spin Torque Transfer: Science

• Heisenberg exchange

• Giant magneto resistance

• Spin transfer torque

J. C. Slonczewski, “Conductance and exchange coupling of two ferromagnets separated by a tunneling barrier”, Phys. Rev. B, 39 6995 (1989).






Ef , 1-band


Ferromagnet FerromagnetNo

n-m

agn

etic




Ef , 1-band


Anti-ferromagnetic Anti-ferromagnetic

Ferromagnetic

Ferromagnetic

Ferromagnet Ferromagnet




Ef , 1-band


2

0 2

1 cos/

(1 )I V G G

P

P

2

2

( (0)) 2

0 (1 )

R R

R

P

P

P = 1, ideal, perfect spin valve


H. Ohno, “Spintronics” Seminar, UCSB May, 2008



2

2

( (0)) 2

0 16

( )

R R

R

P

P


0.87P




0.6P

Fixed SyF

FreeM. Hosomi, et al., “A novel nonvolatile memory with spin torque transfer magnetization switching: spin-ram”, Electron Devices Meeting,2005. IEDM Technical Digest. IEEE International, pp. 459-462.





Fre

e

dm

dt

Effective field

Damping

o AHdm

mdt

dmm

dt





Fixed

Fre

e

-J

edm

dt

dm

dt

Slonczewski torque

Effect

Effective field

Damping

/

ive magnetic field/

o A

B

S

B

S

p

dmm H

dt

dmm

dt

J em m

t M

J em

t Mp

P

P





Fixed

Fre

e

-J

edm

dt

dm

dt

Slonczewski torque

Effecti

Effective field

Damping

/

ve magnetic fie d/

l

o A

B

S

B

S

p

dmm H

dt

dmm

dt

J em m

t M

J em

t Mp

P

P

dm

dtJ

• Precession• Switching• Damping



• Science



From R. A. Buhrman, “Spin Torque Effects in Magnetic Nanostructures”, Spintech IV, 2007


GMR and STT --- STT-RAM



Fixed

Fre

e

-J

edm

dt

dm

dt

Slonczewski torque

Effecti

Effective field

Damping

/

ve magnetic fie d/

l

o A

B

S

B

S

p

dmm H

dt

dmm

dt

J em m

t M

J em

t Mp

P

P

dm

dtJ




T. Kawahara, R. Takemura, K. Miura, J. Hayakawa, S. Ikeda, Y.M. Lee, R. Sasaki, Y. Gotot, K. Ito, T. Meguro, F. Matskura, H. Takahash, H. Matsuoka and H. Ohno, “2 Mb SPRAM (Spin-Transfer Torque RAM) with bit-by-bit bi-directional current write and parallelizing-direction current read”, IEEE J Solid-State Circuits, 43, 109 (2008).

~ 200 A


Conventional MRAM (toggle) and Spin Torque MRAM

H field produces torque to reverse free layer. Spin polarized current produces torque to reverse free layer.

•Need Isw ≈ 40 mA/bit for 0.4 um x 1.0 um.•Isw constant for smaller bits.

•Isw < 1 mA/bit for 0.06 m x 0.12 m bit.•Isw reduces as bit scales smaller.


STT-RAM 2005

M. Hosomi, H. Yamagishi, T. Yamamoto, K. Bessho, Y. Higo, K. Yamane, H. Yamada, M. Shoji, H. Hachino, C. Fukumoto, H. Nagao, H. Kano, “A novel nonvolatile memory with spin torque transfer magnetization switching: spin-ram”, Electron Devices Meeting,2005. IEDM Technical Digest. IEEE International, pp. 459-462.

Fixed SyF

Free


STT-RAM 2005


CMOS driver 100 100 nm

S. Ikeda, J.Hayakawa, Y.M. Lee, F. Matsukura, Y. Ohno, T. Hanyu and H. Ohno, “Magnetic tunnel junctions for spintronic memories and beyond”, IEEE Trans Elec. Dev. 54, 991 (2007).


STT-RAM 2005


CMOS sensing > 0.2 V


Read ~ 0.2 V < write!


STT-RAM 2005



Sony

4 kb


STT-RAM 2007


Y. Huai, Z. Diao, Y.Ding, A. Panchula, S. Wang, Z. Li, D. Apalkov, X. Luo, H. Nagai, A. Driskill-Smith, and E. Chen, “Spin Transfer Torque RAM (STT-RAM) Technology”, 2007 Inter. Conf. Solid State Devices and Materials, Tsukuba, 2007, pp. 742-743.

STT-RAM cell with integrated CMOS transistor. The area of a single-level STT-RAM cell can be as small as 6 F2.

Grandis, Inc.

Courtesy of Yiming Huai

115 x 180 nm2


STT-RAM 2007


Hitachi

Courtesy of Hideo Ohno






STT-RAM Projections vs State-of-the-art

A.Driskill-Smith, Y. Huai, “STT-RAM – A New Spin on Universal Memory”, Future Fab, 23, 28

Hitachi, 2007

Yes

1.6 x 1.6 m TMR 100 x 50 nm2 (60)

40 ns

100 ns

> 109

40 pJ/100ns

None

1.8 V



STT-RAMProjections vs State-of-the-art

Hitachi, 2007

Yes

1.6 x 1.6 m TMR 100 x 50 nm2 (60)

40 ns

100 ns

> 109

40 pJ


Toggle

MRAM (180 nm)

ToggleMRAM (90 nm)*

DRAM(90 nm)+

SRAM(90 nm)+

FLASH(90 nm)+

FLASH(32 nm)+

ST MRAM

(90 nm)*

STMRAM

(32 nm)*

cell size (m2)

1.25 0.25 0.05 1.3 0.06 0.01 0.06 0.01

Read time 35 ns 10 ns 10 ns 1.1 ns 10 - 50 ns 10 - 50 ns 10 ns 1 ns

Program time

5 ns 5 ns 10 ns 1.1 ns 0.1-100 ms 0.1-100 ms 10 ns 1 ns

Program energy/bit

150 pJ 120 pJ5 pJ

Needs refresh

5 pJ30 – 120

nJ10 nJ 0.4 pJ 0.04 pJ

Endurance > 1015 > 1015 > 1015 > 1015

> 1015 read,

> 106 write

> 1015 read,

> 106 write> 1015 >1015

Non-volatility

YES YES NO NO YES YES YES YES

* 90nm, 32nm MRAM values are projected+ These values are from the ITRS roadmap

Nick Rizzo, Freescale


Information Requested (2/2)

• Current state-of-the-art using the provided metrics as a guide (Appendix 2 of request for white papers)CMOS integrated STT-RAM demonstrated. 2Mb

• Key scientific and technological issues remaining to accept the technology for manufacture.Lower critical currents and larger TMR ratio. Quality of the tunnel junction is critical.

• Technology roadmap outlining a 5-15 year develop path leading to manufacture in 5-10 years.Replace MRAM. Embedded memory in logic applications. Longer term – universal memory.

STT - RAM


Spin Transfer Torque Nano-oscillator



Fixed

Fre

e

-J

edm

dt

dm

dt

Slonczewski torque

Effecti

Effective field

Damping

/

ve magnetic fie d/

l

o A

B

S

B

S

p

dmm H

dt

dmm

dt

J em m

t M

J em

t Mp

P

P

dm

dtJ




30 nmPt2 nm Cu/3 nm Co/10 nm Cu/40 nmCo/80 nm Cu/

S. I. Kiselev, J. C. Sankey, I. N. Krivorotov, N. C. Emley, R. J. Schoelkopf, R. A. Buhrman and D. C. Ralph, “Microwave oscillations of a nanomagnet driven by a spin-polarized current”, Nature, 425,380 (2003).“

~ 0.1 nW measured

130 x 70 nm2

H




S. I. Kiselev, J. C. Sankey, I. N. Krivorotov, N. C. Emley, R. J. Schoelkopf, R. A. Buhrman and D. C. Ralph, “Microwave oscillations of a nanomagnet driven by a spin-polarized current”, Nature, 425,380 (2003).“

~ 0.1 nW measured

130 x 70 nm2

H

Key element: A skew magnetic field !




2 2

max

1 1 50 1

2 2 50 50DCP I RR

~ 0.1 nW measured

~ 0.2 nW estimated max.

610 Efficiency

130 x 70 nm2

H

13

0.1

2.0DC

Cu junction

R

R

I mA


Spin Transfer Torque Nano-oscillator:

Injection Locking

1 nm Au1 nm Cu/5 nm NiFe/4 nm Cu/20 nm CoFe/50 nmCu/5 nm Ta/

W. H. Rippard, M. R. Pufall, S. Kaka, T. J. Silva, S. E. Russek, J. A. Katine, “Injection Locking and Phase Control of Spin Transfer Nano-oscillators”, Phys. Rev. Lett., 95, 067203 (2005).

50 x 50 nm2

0.56 Tesla

~ 30 pW



Frequency ModulationM. R. Pufall, W. H. Rippard, S. Kaka, T. J. Silva, and S. E. Russek“Frequency modulation of spin-transfer oscillators” Appl. Phys. Lett. 86, 082506 (2005).

~ 250 pW



Phase LockingS. Kaka, M.R. Pufall, W.H. Rippard, T.J. Silva, S.E. Russek and J.A. Katine, “Mutual phase-locking of microwave spin torque nano-oscillators” Nature, 437, 389 (2005).

~ 2 pW



B=0.0T. Devoldera, A. Meftah, K. Ito, J. A. Katine, P. Crozat and C. Chappert, “Spin transfer oscillators emitting microwave in zero applied magnetic field”, J. Appl. Phys. 101, 063916 2007.

Free

Effective field, shape, material

/Slonczewski torqu

/Effective magnetic fiel

e

Damp

d

ing

o

S

B

A

B

S

dmm H

dtJ e P

m p mt M

d

J e Pm

dt

t

m

pM

m

Fixed layer

0.05

< 1.0 pW



Power issues?

Some measures:Cell phone – 900 MHz, 1.8GHz, ~ 500 mWWireless access points – 2.4 GHz, 5.0 GHz, ~ 25 mWAutomotive radar 24 GHz, 100 GHz ~ 10 mW

State of the art STT nano-oscillatorsExternal magnetic field, ~ nW, efficiency 10-6




2 2

max

1 1 50 1

2 2 50 50DCP I RR

13

0.1

2.0DC

Cu junction

R

R

I mA

MgO tunnel barrier

100

100

1

DC

MgO tunnel barrier

R

R

I mA

~ 1 W estimated 210Efficiency



Power issues?

Some measures:Cell phone – 900 MHz, 1.8GHz, ~ 500 mWWireless access points – 2.4 GHz, 5.0 GHz, ~ 25 mWAutomotive radar 24 GHz, 100 GHz ~ 10 mW

State of the art STT nano-oscillatorsExternal magnetic field, ~ nW, efficiency ~ 10-6

ProjectionMTJ based STT nano-oscillators ~ W, efficiency ~ 10-2 ?Power combining ?

But touch base with the Cornell, NIST, UVa collaboration



• Current state-of-the-art using the provided metrics as a guide (Appendix 2 of request for white papers)Nano-oscillators at the nano-picowatt level with spin valve structures, in external magnetic fields. Existence proof of approach to external magnetic field free sustained oscillation. Phase locking, frequency modulation, injection locking demonstrated.

• Key scientific and technological issues remaining to accept the technology for manufacture.Increased power. Use of magnetic tunnel junctions. Power combining.

• Technology roadmap outlining a 5-15 year develop path leading to manufacture in 5-10 years.Needs to be guided by potential applications.

STT Nano-oscillators


“MRAM” --- Spin Logic Device

Mark Rodwell, UC Santa BarbaraHigh

I

R

Eli Yablonovitch, UC Berkeley

source

drain

I

I

R

“transpinnor”Si (001) Substrate

Ta 5nm

Ru 50nm

Ta 5nm

NiFe 5nm

Antiferromagnetic MnIr 8nm

CoFe 2nm

Ru 0.8nm

Ferromagnetic CoFeB 3nm

MgO 1.5nm Tunnel Barrier


Ta 5nm

Ru 15nm

Isignal

Magnetization

Drain

Source

InsulatorCurrent Gate

BField

BField

Device Area 1?m2

Gate

Ikeda et. al., Japanese Journal of Applied Physics, Vol. 44, No 48, pp. L1442-L1445

• Current controlled• Non-volatile• “Leaky” switch, ~ 6

R

R


Two views - Spin Logic

5μA output5μA input

500Ωor

2.275kΩ

2.275kΩor

500Ω

+V +3mV

-V -3mV

Output Power = 1.6*10-8 WTotal Power = 2.5*10-8 W

Efficiency=65%

•Problems: On/Off ratio is only about 5:1 Still takes too many Amps to switch

Eli Yablonovitch

Complementary Transpinnor logic

High

I

R

Iss

Iss

High

High

High

High

input

output

Mark Rodwell

Three state circuits• memory and logic• clocked logic• “0” static dissipation

Inverter

Iinput

Ioutput

Iss

Iss

Iinput

Ioutput


“MRAM” --- Spin Logic Device


I

R


source

drain

I

I

R

“transpinnor”Si (001) Substrate

Ta 5nm

Ru 50nm

Ta 5nm

NiFe 5nm

Antiferromagnetic MnIr 8nm

CoFe 2nm

Ru 0.8nm


MgO 1.5nm Tunnel Barrier


Ta 5nm

Ru 15nm

Isignal

Magnetization

Drain

Source

InsulatorCurrent Gate

BField

BField

Device Area 1?m2

Gate

Ikeda et. al., Japanese Journal of Applied Physics, Vol. 44, No 48, pp. L1442-L1445

• Current controlled• Non-volatile• “Leaky” switch, ~ 6

R

R


GMR and STT --- Spin Logic Device?


I

R


source

drain

I

I

R

“transpinnor”Fixed

Contact

Contact Contact

Contact

STT – “switch control”GMR – “switch”

Magnetostatically coupled free layers

Can we control GMR by Magnetostatically coupling to a STT switch ??



Fixed

Contact

Contact Contact

Contact

STT – “switch control”GMR – “switch”

Magnetostatically coupled free layers

Can we control GMR by Magnetostatically coupling to a STT switch ??

O. Ozatay,a_ N. C. Emley, P. M. Braganca, A. G. F. Garcia, G. D. Fuchs, I. N. Krivorotov,R. A. Buhrman, and D. C. Ralph, “Spin transfer by nonuniform current injection into a nanomagnet”, Appl. Phys. Lett., 88, 202502 (2006).



ISS

ISS

Input

Input

Output

Output

Current drivenClocked logicInherent memory, ISS → 0, no change in input of next stage

Iss

Iss

High

High

High

High

input

output

M. Rodwell Inverter



B Input

Input

O utput

O utput

IS S

IS S

A Input

Input

F

B Input

Input

O utput

O utput

IS S

IS S

A Input

Input

F

M. Rodwell NAND

Current controlledClocked logic3-state, nonvolatile

Cell 100F2

Energy per bit ~ 4* STT-RAMSwitching speed slower than STT-RAM



• Current state-of-the-art using the provided metrics as a guide (Appendix 2 of request for white papers)“Straw man” concepts, synergistic with STT-RAM developments

• Key scientific and technological issues remaining to accept the technology for manufacture.Demonstration of magneto-static proximity coupling of GMR device and STT switch

• Technology roadmap outlining a 5-15 year develop path leading to manufacture in 5-10 years.Premature

GMR-STT Spin logic devices



A perspective:

STT-RAM will be developed for memory embedded in logic applications.

STT Nano-oscillators development needs to guided by potential application.

Research on potential STT Logic will be leveraged by developments in STT-RAM

Documents

ITRS Emerging Technology Review, 12 July 2008 Contact: SJ Allen, [email protected] 1 Spin Torque Transfer Technology S. James Allen UC Santa Barbara