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ITEC 352 Lecture 12 ISA(3)

ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

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Page 1: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ITEC 352

Lecture 12ISA(3)

Page 2: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Review

• Buses• Memory• ALU• Registers• Process of compiling

Page 3: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Outline

• Fetch / Decode / Execute• Assembly Introduction

Page 4: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Fetch-Execute cycle

• The process by which machine code is executed by the control unit.

• Why is it important to a programmer? – Main reason: helps programmers program efficiently

(we will see this within the next 3 weeks)– Explains the link between an operating system and the

CPU. – Demonstrates how the Von-neumann architecture

influenced programming languages

Page 5: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Cycle

• The control unit always carries out these steps:

Step 1: Fetch the next instruction to be executed from memory.

(1) Remember: For a program to execute it must be loaded into memory.(2) How does the Control unit know which instruction of a program must

be executed?(1) The address of the next instruction in a program is stored in a register called

Program Counter (PC)

(3) The instruction to be executed is stored in another register: Instruction Registers (IR).

Summary of first step: Control Unit, looks at the memory address in the PC register and retrieves the instruction to be executed from that memory address. It stores the

instruction in IR register

Page 6: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Step 1

Using the PC register value, the Control unit fetches the instruction into IR register

Page 7: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

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Step 2

• Step 2: Decode the opcode.– Identify what the instruction wants to do.• E.g.,

– add A, B // here opcode is “add”. – jmp 0x888888 // Here the opcode states that the program

want to goto memory address 0x88888– move A, B // here opcode is “move” and asks to move data

from memory location B to memory location A.

• Some opcodes are arithmetic in nature. Some are not. • Arithmetic opcodes are processed by ALU.

Page 8: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Step 3

• Read operand(s) from main memory, if any.– E.g., if the instruction is:

• move 0xA , 0xB // operands are 0xA and 0xB– Here, the instruction is to move data from address in memory 0xB to

0xA. – The CPU must first copy the memory 0xB into a register (e.g., register

EAX) – It must then copy the address 0xA into another register file. (e.g.,

register EBX)– It must then copy the data in EAX into address in memory given by

EBX.– How many times is the memory bus being used?

» Twice: once to copy from location 0xB into register EAX, and the other to copy from EAX to location given by EBX.

Page 9: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Step 4

• If arithmetic instruction, send control to ALU. Else, send other appropriate controls

Page 10: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Summary

• The steps that the control unit carries out in executing a program are:

(1) Fetch the next instruction to be executed from memory.

(2) Decode the opcode.

(3) Read operand(s) from main memory, if any.

(4) Execute the instruction and store results.

(5) Go to step 1.

This is known as the fetch-execute cycle.

Page 11: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Significance

• All programming languages are based on this model.

• E.g., consider the humble “for loop” example: Assume that a[] is an array of strings. Suppose we wish to print out all the strings, in Java we use:

for (int i = 0; i < 10; i++) { System.out.println(a[i]); }Why have a for loop to do this?What other alternatives are better?

Page 12: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Data path

• The ARC datapath is made up of a collection of registers known as the register file and the arithmetic and logic unit (ALU).

Page 13: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Assembly language

• We write programs in high level languages such as Java, C++, C etc. – The same program is portable across multiple OSes

• Compiler compiles them into machine language.– This differs from one architecture to another.

• In Java, the JVM interprets the code so portability is achieved. However, the JVM itself differs from architecture to architecture.

• Assembly language is the english representation of a machine language• In this class we will study the ARC assembly language given in the

textbook.

• Why ARC? – ARC is a subset of SPARC (Scalable Processor Architecture)

• SPARC was developed by Sun Microsystems in the mid-1980s. – ARC stands for “A RISC computer”.

Page 14: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Preliminaries

• Download the ARCtools*.zip software from http://iiusatech.com/murdocca/CAO/Tools.html

• This software can execute on many OSes: Mac, Windows XP or Linux. – You do need Java SDK for this to execute.

• Some salient features of ARC:– Is a 32bit machine with byte addressable memory.– Supports several data types. – It is big-endian (highest order byte stored in lowest

address).

Page 15: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Assembly

• Warning! Assembly programming will be frustrating initially, but once you know how to program, you will really enjoy it !

• Let’s begin the adventure …

Page 16: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Java

class Itec352 { private String name;

private int score; private final int maxScore = 100; public int getScore() {

return score; } public void setScore(int y) {

score = y; }

public static void main() { Itec352 classList[10];for (int i, classList[i]) { classList.setScore(100); }

… }

Variables

Constants

Method invocations (or subroutines)

Control structures

How can we represent these high level constructs in Assembly?

Data Types

Page 17: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

In Assembly

• All our data is binary! – Forget data structures.

• We won’t have to deal with linked lists, stacks, queues etc… – On the other hand we will have to be careful in allocating

and using memory and registers. • In Assembly, the key aspects of the language are:– ISA (Instruction Set): the set of instructions available for

programming– Register set: The set of registers we can use to store

temporary data.– Memory: The amount of memory we can address

(depends on whether the bus is 32 bits, 64 bits etc..)

Page 18: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

InstructionBreakdown

Labels are optional. They help us write loops.

Mnemonic is a name that represents an instruction (also called opcode)

Source/destination operands can be registers (represented by % followed by register name, or memory locations or constants

Comment !

The easiest part of a piece of code.

All instructions in ARC are 32 bits in length.

Page 19: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

InstructionOverview

A subset of instructions (the ones which are most useful to us).

Page 20: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Moving

• Move data from register to memory: load instruction

• ld [x], %r1 // copy contents of memory location x into register r1

• ld [x], %r0, %r1 // add contents of memory location x with contents of register r0 and copy them into register r1

• ld %r0+x, %r1 // copy the contents of memory location x with contents of register r0 and load into register r1

• All three instructions are achieving the same purpose. Remember Register r0 will always contain a value of 0. So adding anything to it will yield 0.

Page 21: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Store instruction

• Move data from register to memoryst %r1, [x] st %r1, %r0, [x]

Page 22: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

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Constants / Conditional

• Allows us to store an integer constant into a register.sethi 0x304F15, %r1

• andcc instructionandcc %r1, %r2, %r3

Logically AND %r1 and %r2 and place the result in %r3

Page 23: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Other Instructions

• There are many other instructions. The textbook has a good description of the instructions from pages 110-113 and 117 to 120.– Examples: andcc, orcc

Page 24: ITEC 352 Lecture 12 ISA(3). Review Buses Memory ALU Registers Process of compiling

ISA(3)

Summary

• Fetch / Decode / Execute• Assembly