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Imperial Journal of Interdisciplinary Research (IJIR) Vol-2, Issue-11, 2016 ISSN: 2454-1362, http://www.onlinejournal.in Imperial Journal of Interdisciplinary Research (IJIR) Page 1061 Fuzzy Logic Based Dstatcom for the Reduction of Thd In Case Of Non- Linear Loads G.Satish 1 & Dr. G. Sambasiva Rao 2 1 PG Scholar, Dept of EEE, RVR & JC College of Engineering, Guntur, AP, India. 2 Associate Professor, Dept of EEE, RVR & JC College of Engineering, Guntur, AP, India. Abstract: This paper presents distribution static compensator (DSTATCOM) using a fuzzy logic controller (FLC) for harmonic elimination, load balancing and voltage regulation. The fuzzy logic controller is based on linguistic variables which eliminates the want of a mathematical model of the DSTATCOM. A three phase insulated gate bipolar transistors (IGBTs) based current controlled voltage source converter (CC-VSC) is employed as a DSTATCOM. Two FLCs are used in proposed control algorithm. The DC link voltage of a DSTATCOM and amplitude of phase voltages are used as an input signals for the FLC. The PWM current controller is used to generate switching signals for CCVSC. Results have been obtained in MATLAB simulink atmosphere to reveal the effectiveness of proposed control algorithm as a harmonic eliminator, a power factor corrector, a load balancer and as a voltage regulator. Keywords—DSTATCOM; Harmonic elimination; Load balancing; PWM Current Controller; Fuzzy Logic Controller; Voltage Regulation. 1. Introduction Improved proliferation of power electronic based equipments in industry and domestic applications such as a switched mode power supply, a DC arc furnace, electronic ballast and an adjustable speed drive system has produced power quality problems such as harmonic injection, poor power factor, poor voltage regulation and load unbalancing. In order to alleviate these power quality problems, the voltage source converter (VSC) based distribution static compensator (DSTATCOM) has been used in modern days. The performance of the DSTATCOM depends on the derived control algorithm to extract reference currents. For the DSTATCOM, control algorithm based on instantaneous reactive power theory, instantaneous symmetrical component theory, synchronous reference frame theory and power balance theory have been reported in the literature. Most of these control algorithms require a conventional proportional plus integral (PI) controller to derive three phase reference compensator currents. For PI controllers, the computations of gain parameters (kp and ki) are main concerns of worry as it requires precise linear mathematical model. In recent years, fuzzy logic controllers have gained much attention for various applications. The main advantage in use of FLCs is to allow designers to incorporate experimental knowledge in adjustment of controlling parameters. The mamdani type FLCs have been reported for the DSTATCOM but it requires large number of fuzzy sets. However this paper has dealt only for harmonic elimination and load balancing. This paper deals with FLC for the three phase shunt connected DSTATCOM for harmonic elimination, power factor correction, load balancing and voltage regulation. The FLCs are used for derivation of active and reactive power components of source currents. 2. System Design Fig.1 Basic configuration of the DG set with DSTATCOM The midpoint of each half bridge of DSTATCOM which is based on insulated gate bipolar transistor (IGBTs) is connected at the point of common coupling (PCC) through an interface inductor. Three phase loads are connected at the PCC. A three phase star connected RC filter is used at PCC to absorb voltage switching ripples.

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Page 1: ISSN: 2454-1362, Fuzzy Logic ... · PDF fileFuzzy Logic Based Dstatcom for the Reduction of Thd In Case Of Non-Linear Loads . ... (FLC) for harmonic elimination, load balancing and

Imperial Journal of Interdisciplinary Research (IJIR) Vol-2, Issue-11, 2016 ISSN: 2454-1362, http://www.onlinejournal.in

Imperial Journal of Interdisciplinary Research (IJIR) Page 1061

Fuzzy Logic Based Dstatcom for the Reduction of Thd In Case Of Non-

Linear Loads

G.Satish1 & Dr. G. Sambasiva Rao2 1PG Scholar, Dept of EEE, RVR & JC College of Engineering, Guntur, AP, India.

2Associate Professor, Dept of EEE, RVR & JC College of Engineering, Guntur, AP, India. Abstract: This paper presents distribution static compensator (DSTATCOM) using a fuzzy logic controller (FLC) for harmonic elimination, load balancing and voltage regulation. The fuzzy logic controller is based on linguistic variables which eliminates the want of a mathematical model of the DSTATCOM. A three phase insulated gate bipolar transistors (IGBTs) based current controlled voltage source converter (CC-VSC) is employed as a DSTATCOM. Two FLCs are used in proposed control algorithm. The DC link voltage of a DSTATCOM and amplitude of phase voltages are used as an input signals for the FLC. The PWM current controller is used to generate switching signals for CCVSC. Results have been obtained in MATLAB simulink atmosphere to reveal the effectiveness of proposed control algorithm as a harmonic eliminator, a power factor corrector, a load balancer and as a voltage regulator. Keywords—DSTATCOM; Harmonic elimination; Load balancing; PWM Current Controller; Fuzzy Logic Controller; Voltage Regulation.

1. Introduction Improved proliferation of power electronic

based equipments in industry and domestic applications such as a switched mode power supply, a DC arc furnace, electronic ballast and an adjustable speed drive system has produced power quality problems such as harmonic injection, poor power factor, poor voltage regulation and load unbalancing. In order to alleviate these power quality problems, the voltage source converter (VSC) based distribution static compensator (DSTATCOM) has been used in modern days. The performance of the DSTATCOM depends on the derived control algorithm to extract reference currents. For the DSTATCOM, control algorithm based on instantaneous reactive power theory, instantaneous symmetrical component theory, synchronous reference frame theory and power balance theory have been reported in the literature. Most of these control algorithms require a conventional

proportional plus integral (PI) controller to derive three phase reference compensator currents. For PI controllers, the computations of gain parameters (kp and ki) are main concerns of worry as it requires precise linear mathematical model. In recent years, fuzzy logic controllers have gained much attention for various applications. The main advantage in use of FLCs is to allow designers to incorporate experimental knowledge in adjustment of controlling parameters. The mamdani type FLCs have been reported for the DSTATCOM but it requires large number of fuzzy sets. However this paper has dealt only for harmonic elimination and load balancing. This paper deals with FLC for the three phase shunt connected DSTATCOM for harmonic elimination, power factor correction, load balancing and voltage regulation. The FLCs are used for derivation of active and reactive power components of source currents.

2. System Design

Fig.1 Basic configuration of the DG set with DSTATCOM

The midpoint of each half bridge of

DSTATCOM which is based on insulated gate bipolar transistor (IGBTs) is connected at the point of common coupling (PCC) through an interface inductor. Three phase loads are connected at the PCC. A three phase star connected RC filter is used at PCC to absorb voltage switching ripples.

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Imperial Journal of Interdisciplinary Research (IJIR) Vol-2, Issue-11, 2016 ISSN: 2454-1362, http://www.onlinejournal.in

Imperial Journal of Interdisciplinary Research (IJIR) Page 1062

The VSC converts the dc voltage across the storage device into a set of three-phase ac output voltages. These voltages are in phase and coupled with the ac system through the reactance of the coupling transformer. Suitable adjustment of the phase and magnitude of the D-STATCOM output voltages allows effective control of active and reactive power exchanges between the DSTATCOM and the ac system. Such configuration allows the device to absorb or generate controllable active and reactive power.

3. Design of VSC for DSTATCOM The DSTATCOM is designed to compensate

nonlinear loads. The selection of DC bus voltage, DC bus capacitor, AC inductor, ripple filter and VSC rating are given as follows.

A. DC Bus Voltage

The minimum DC bus voltage must be maintained for effective operation of the DSTATCOM as, Vdc ≥ 2√2VLL/√3ma ≥ 677.69 V (1)

Where ma is modulation index considered 1 in this case and VLL is the line voltage considered 415V.Thus Vdc is selected 700V, in this study.

B. DC Bus Capacitor

The DC bus capacitor Cdc should be large enough to limit the DC voltage ripples. The minimum value of Cdc is obtained as, Cdc = I0 /2ωVdc (pp)

(2) Where I0 is the rated VSC current, ω is angular

frequency i.e. 314rad/s, Vdc(pp) is ripple in capacitor voltage, and it is considered 2% of rated DC link voltage.

C. AC Interface Inductor AC interface inductor is connected between

mid-point of each half bridge and PCC. The selection is based on permissible current ripple and can be obtained as, Lf = (√3maVdc)/(12afsIf (pp)) (3)

Where ma is the modulation index considered 1 in this case, a is overload factor considered 2 in this case, fs is switching frequency and If(pp) is current ripple and it is considered 5%.

D. High Pass Ripple Filter

A High pass RC ripple filter is selected and tuned at half the switching frequency to remove the switching noise due to switching of a VSC. The switching frequency of a DSTATCOM is 20 kHz. The high pass ripple filter offers low impedance at high frequency and high impedance at fundamental frequency.

E. VSC Rating

The rating of VSC for the DSTATCOM is based on load specifications and it is obtained as,

(4) Where ‘THD’ is the total harmonic distortion of

the load currents, Ф(l) is the load power factor angle, SL is the rated load.

4. Control Algorithm

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Fig.2 Block Diagram of Control Algorithm for DSTATCOM

Fig.2 shows the block diagram of proposed control algorithm for a DSTATCOM. An amplitude of three phase AC terminal voltage (Vt) and DC bus voltage (Vdc) are required to estimate three phase reference source currents (i*

sabc). Three phase reference compensator currents (i*

cabc) is computed using these reference source currents (i*

sabc) and three phase sensed load currents (i*

Labc). An active power component (I*

sd) of source currents is estimated using DC bus voltage. The DC bus voltage (Vdc) is sensed and compared with reference DC voltage (V*

dc). A FLC is used to estimate reference active power component of source currents. The DC bus voltage error edc and change in DC voltage error (Δedc) are used as an input to FLC. The output of FLC is the amplitude of active power component (I*

sd) of reference source currents (i*

sabc). This amplitude (I*sd)

is multiplied by in phase unit voltage template (usad, usbd and uscd) to obtain three phase instantaneous active power components (i*

sad, i*sbd and i*

scd) of reference source currents (i*

sabc). The reactive power component (I*

sq) of reference source current (i*sabc) is

computed using amplitude of reference AC terminal voltage (V*

t) and sensed AC terminal voltage (Vt) at PCC. The terminal voltage error (et) is obtained by comparing reference terminal AC voltage (V*

t) with sensed AC terminal voltage (Vt).The terminal voltage error (et) and change in terminal voltage error (Δet) is processed using another FLC which gives the amplitude of reactive power component (I*

sq) of reference source currents (i*

sabc). This amplitude (I*sq)

is multiplied with quadrature unit voltage templates (usaq, usbq and uscq) to obtain three phase instantaneous reactive power components (i*

saq, i*sbq,

i*scq) of reference source currents (i*

sabc). The reference three phase source currents (i*

sa, i*sb and

i*sc) are computed by sum of three phase active

power components (i*sad, i*

sbd and i*scd) and three

phase reactive power components (i*saq, i*

sbq and i*scq)

individually for each phase. The three phase reference compensator currents (i*

ca, i*cb and i*

cc) are computed by taking the difference between three phase references source currents (i*

sa, i*sb and i*

sc) and sensed three phase load currents (i*

La, i*Lb and

i*Lc). Three phase reference compensator currents

(i*ca, i*

cb and i*cc) and sensed compensator currents

(ica, icb and icc) are compared to generate current errors. These currents errors are used to derive gating signals for the VSC of a DSTATCOM. The basic equations used in control algorithm of DSTATCOM are as follows,

A. Computation of Active Power Component of

Reference Source Currents The sensed DC bus voltage is filtered using a

low pass filter (LPF) with a cut off frequency of 16Hz to separate high frequency noise.

The reference DC voltage and sensed DC bus voltage are compared at nth sampling time as, edc(n) = V*

dc(n) – Vdc(n) (5) The change in error is the difference between

nth sample DC voltage error edc(n) and (n-1)th sample DC voltage error edc(n-1) as, Δedc(n) = edc(n) – edc(n-1) (6)

These DC voltage error (edc) and change in error (Δedc) are used as input variables for FLC. These input variables are equivalent to numerical variables for the real system. To convert numerical variables into linguistic variables two input fuzzy sets P (positive) and N (negative) are used. The membership function for positive set is

(7)

For the negative set

(8)

Fig.3 Membership functions for DC bus voltage error and change in DC bus voltage error

TABLE I. FUZZY RULES

Order Rules Consequent

R1 If x1 is P and x2 is P then z1= ax1+bx2

R2 If x1 is P and x2 is N then z2 = k1z1

R3 If x1 is N and x2 is P then z3= k2z1

R4 If x1 is N and x2 is N then z4= k3z1

These membership functions for input variables

are shown in Fig. 3. The value of M for DC bus voltage error and change in DC bus voltage error are 1 and 0.1 respectively. FLC does not depend on mathematical model but the design depends on past experience. Four simplified rules are selected for fuzzy logic controllers.

In above rules z1, z2, z3, and z4 represent the consequent of FLC. Implication and aggregation using ‘min’ and ‘max’ operator and conversion of

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fuzzy output to crisp output is done by using Center of Area (COA) method. The expression of COA method is

(9)

Where Z0 = crisp output, μi = degree of fulfillment of the rules, n = number of rules. The output of FLC is taken as amplitude of active power component of reference source currents. Three phase active power components of the reference source currents are computed using the in-phase voltage templates derived from the AC terminal voltages as, usad = vsa/Vt, usbd = vsb/Vt, uscd = vsc/Vt (10)

Where Vt is the amplitude of supply voltage and it is computed as,

(11)

Three phase instantaneous active power components of reference source currents are computed as, i*

sad = I*sd*usad, i*

sbd = I*sd*usbd, i*

scd = I*sd*uscd (12)

B. Computation of Reactive Power Component of

Reference Source Currents The amplitude of reactive power component of

reference source currents is computed using another FLC. The reference amplitude is compared with sensed amplitude of phase voltages as, et(n) = V*

t(n) – Vt(n) (13) Δet(n) = et(n) – et(n–1) (14)

The fuzzy controller uses similar rules and membership functions but the rules consequent adjustable parameters are different. The value of M for terminal voltage error and change in terminal voltage error are 1 and 0.05 respectively. The output of FLC is taken as amplitude of reactive power component of reference source currents. Three phase reactive power components of the reference source currents are computed using the quadrature templates derived from the in-phase templates as, usaq = (– usbd + uscd) /√3 (15) usbq = (3usad + usbd – uscd) /2√3 (16) usbq = (– 3usad + usbd – uscd) /2√3 (17)

Three phase instantaneous reactive power component of reference source current are computed as i*

saq = I*sq*usaq, i*

sbq = I*sq*usbq, i*

scq = I*sq*uscq (18)

C. Computation of Reference Source Currents

Three phase instantaneous reference source currents is computed by sum of three phase active power component and reactive power component of reference source current for each phase as, i*

sa = i*sad+i*

saq, i*sb = i*

sbd+i*sbq , i*

sc = i*scd+i*

scq (19)

D. Computation of Reference Compensation Currents

Three phase reference compensator currents are obtained for each phase using the difference between sensed load current and estimated reference source current for the same phase as, i*

ca = iLa–i*sa, i*

cb = iLb–i*sb, i*

cc = iLc–i*sc (20)

The DSTATCOM can operate either in power factor correction (PFC) mode or zero voltage regulation (ZVR) mode. For PFC mode, the reactive power component (I*

sq) of reference source current is kept at zero.

5. MATLAB Modeling

A. Modeling of DSTATCOM Figure.3.1 shows the complete MATLAB model of DSTATCOM along with control circuit. The power circuit as well as control system are modeled using Power System Block set and Simulink.

Fig.4 MATLAB/SIMULINK Model of DSTATCOM Power Circuit

The Diesel Generator set is represented by

synchronous generator. Three-phase AC loads are connected at the load end. DSTATCOM is connected in shunt and it consists of PWM voltage source inverter circuit and a DC capacitor connected at its DC bus. An IGBT-based PWM inverter is implemented using Universal bridge block from Power Electronics subset of PSB. Snubber circuits are connected in parallel with each IGBT for protection. Simulation of DSTATCOM system is carried out for linear and non-linear loads. The linear load on the system is modeled using the block three-phase parallel R-L load connected in delta configuration. The non-linear load on the system is modeled using linear and non-linear circuits connected at output of the diode rectifier. Provision is made to connect loads in parallel so that the effect of sudden load addition and removal is studied. The feeder connected from the synchronous generator to load is modeled using appropriate values of resistive and inductive components. B. Modeling of Control Circuit

The output of PI controller over the DC bus voltage (Ispdr) is considered as the amplitude of the in-phase component of supply reference currents and

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the output of PI controller over AC terminal voltage (Ispqr) is considered as the amplitude of the quadrature component of supply reference currents. The instantaneous reference currents (isar, isbr and iscr) are obtained by adding the in-phase supply reference currents (isadr, isbdr and iscdr) and quadrature supply reference currents (isaqr, isbqr and iscqr). Once the reference supply currents are generated, a carrier less hysteresis PWM controller is employed over the sensed supply currents (isa, isb and isc) and instantaneous reference currents (isar, isbr and iscr) to generate gating pulses to the IGBTs of DSTATCOM. The controller controls the DSTATCOM currents to maintain supply currents in a band around the desired reference current values. The hysteresis controller generates appropriate switching pulses for six IGBTs of the VSI working as DSTATCOM.

Fig.5 Fuzzy Control circuit of the DSTATCOM

6. Simulation Results Figures from 6 to 9 shows the performance of a

VSC based DSTATCOM with fuzzy controller under nonlinear loads. The performance is observed in terms of source voltages (vsabc), source currents (isabc), load currents (iLa, iLb and iLc), DSTATCOM currents (ica, icb and icc) and DC bus voltage (Vdc). Three phase diode rectifier feeding resistive inductive loads is used as a nonlinear load.

Figure 6 shows the transient responses of distribution system with DSTATCOM for supply voltages (vsabc), supply currents (isabc), load currents (iLabc), Figure 7 shows load currents (iLa, iLb and iLc), Figure 8 shows DSTATCOM currents (ica, icb and icc) and Figure 9 shows DC link voltage (Vdc) at rectifier nonlinear load.

At time t=0.12s additional load is connected with the help of a 3-phase circuit breaker, which causes the source currents to rise from the previous value.

At 0.18s, the load is unbalanced by opening of one phase (phase A) which can be clearly seen from the figure 7. It is observed that under unbalanced nonlinear loads, source currents are balanced and sinusoidal.

At t=0.36s phase A is restored and the compensator automatically adjusts its currents to make the supply currents balanced and sinusoidal, these can be seen from the figure 8.

At t=0.42s the additional load is reduced by opening the 3-phase circuit breaker. Figure 9 shows the DC Link voltage which is raised from 0 to 700v in 0.036s.

Fig.6 Simulation results of Voltage at PCC, Source Current, and Load Current for Non- Linear Load with fuzzy controller

Fig.7 Simulation results of Load Currents for Non- Linear Load with fuzzy controller

Fig.8 Simulation results of Compensator Currents for Non- Linear Load with fuzzy controller

Fig.9 Simulation result of DC Link Voltage for Non- Linear Load with fuzzy controller

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7. FFT Analysis

FFT analysis shows that the obtained THD of source voltage and current are 1.68% and 1.69% respectively when load current THD is 70.85%. Table 2 shows the THD of three phase source voltage, source current and load currents under these conditions. It is observed that the source currents are sinusoidal, balanced and in phase with supply voltage under unbalanced nonlinear loads.

Fig.10 FFT Analysis of voltage at PCC of Proposed DSTATCOM Using Intelligence Controller (fuzzy)

Fig.11 FFT Analysis of Source current of Proposed DSTATCOM Using fuzzy Controller

Fig.12 FFT Analysis of load Current of Proposed DSTATCOM Using Intelligence Controller (fuzzy)

8. Conclusion A three leg current controlled voltage source

converter (CC-VSC) has been used as a DSTATCOM. The FLC has been designed using only two membership functions and it has resulted in less computation burden. The devised control algorithm for DSTATCOM performs satisfactorily as a harmonic eliminator and load balancer.

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[5] B. Singh, A. Adya, A. P. Mittal, and J. R. P. Gupta, “Performance of DSTATCOM for isolated small alternator feeding non-linear loads,” in Proc. Int. Conf. Comput. Appl. Elect. Eng. Recent Adv., 2005, pp. 211–216.

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[13] L.T. Moran ,P.D Ziogas, and G.Joos , Analysis and Design Of Three Phase Current source solid State Var Compensator, IEEE Trans, on Indutry Applications. Volume 25, No.2, 1989, PP:356-65.