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CHAPTER 2 ISA Instructions (logical + procedure call)

ISA Instructions (logical + procedure call)

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ISA Instructions (logical + procedure call). Chapter 2. Logical operations. Shift left Example: sll $t2,$so,4 Reg t2 = $so > 4 Bit-wise AND Example: and $t0,$t1, $t2 Reg t0 = reg t1 & reg t2 Bit-wise OR - PowerPoint PPT Presentation

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Page 1: ISA Instructions (logical + procedure call)

CHAPTER 2

ISA Instructions (logical + procedure call)

Page 2: ISA Instructions (logical + procedure call)

Logical operations

Shift left Example: sll $t2,$so,4 Reg t2 = $so << 4

Shift right Example: srl $t2,$so,4 Reg t2 = $so >> 4

Bit-wise AND Example: and $t0,$t1, $t2 Reg t0 = reg t1 & reg t2

Bit-wise OR Example: or $t0,$t1,$t2 Reg $t0 = $t1 | $t2

Page 3: ISA Instructions (logical + procedure call)

Instructions for Selection (if..else)

If (i == j) then f = g + h; else f = g – h; bne $s3,$s4, else add $s0,$s1,$s2 j doneelse: sub $s0,$s1,$s2done:

Page 4: ISA Instructions (logical + procedure call)

Instructions for Iteration (while)

while (save[i] == k) i = i + 1;Let i be in reg $s3Let k be in reg $s5Let $t1 have the address of Save array elementLoop: sll $t1,$s3,2 add $t1,$t1$s6 lw $t0,0($t1) bne $t0,$s5,Exit addi $s3,$s3,1 j Loop

Page 5: ISA Instructions (logical + procedure call)

Compiling C procedures

int leaf_example (int g, int h, int i, int j){ int f; f = (g + h) – (i + j); return f;}

How do you pass the parameters? How does compiler transport the parameters?

Page 6: ISA Instructions (logical + procedure call)

Passing Parameters/arguments

Special registers for arguments: a0, a1, a2, a3Save temp register on the stackPerform operations And return valueRestore values stored on the stackJump back to return address

Page 7: ISA Instructions (logical + procedure call)

Steps in Execution of a Procedure

Place parameters in a place where procedures can access them

Transfer control to the procedureAcquire the storage resources needed for the

procedurePerform the desired taskPlace the result value in a place where the

calling program can access itReturn control to the point of origin, since a

procedure can be called from several points in a program

Page 8: ISA Instructions (logical + procedure call)

Register Mapping – Ahah!

R0 (r0) = 00000000R1 (at) = 00000000R2 (v0) = 00000000R3 (v1) = 00000000 R4 (a0) = 00000000R5 (a1) = 00000000R6 (a2) = 00000000R7 (a3) = 00000000R8 (t0) = 00000000R9 (t1) = 00000000R10 (t2) = 00000000R11 (t3) = 00000000R12 (t4) = 00000000R13 (t5) = 00000000R14 (t6) = 00000000R15 (t7) = 00000000

R16 (s0) = 00000000R17 (s1) = 00000000 R18 (s2) = 00000000 R19 (s3) = 00000000 R20 (s4) = 00000000R21 (s5) = 00000000 R22 (s6) = 00000000 R23 (s7) = 00000000 R24 (t8) = 00000000R25 (t9) = 00000000R26 (k0) = 00000000R27 (k1) = 00000000 R28 (gp) = 10008000R29 (sp) = 7fffeffcR30 (s8) = 00000000R31 (ra) = 00000000

Page 9: ISA Instructions (logical + procedure call)

Procedure Call Conventions

$a0-$a3 : four argument registers in which to pass parameters

$vo-$v1: two value registers in which to return values$ra: one return address register to return to point of

origin of the callMIPS assembly language also has a special instruction

jal (jump and link) that saves the return address in $ra before transferring control to the procedure. Eg: jal ProcedureAddress

Another instruction “jr” transfers control back to the called location. Eg. jr $ra

Page 10: ISA Instructions (logical + procedure call)

Using the Stack “automatic storage”

Automatic store for “workspace” and temporary registers.

Use the stack: Use the stack pointer to access stack; Remember stack operates on LIFOAlso note that $ZERO is a convenience

register that stores the value 0 (check your green sheet attached to your textbook)

Now we are ready to translate the procedure:

Page 11: ISA Instructions (logical + procedure call)

Translating the procedure

int leaf_example (int g, int h, int i, int j){ int f; f = (g + h) – (i + j); return f;}Parameters g, h, i, j will be stored in argument

registers: $a0,$a1,$a2,$a3 before the callOnce inside we plan to use $s0, $t0, $t1; so we

need save their values on the stack;Then use them to compute (g+h), (i+j) and f

Page 12: ISA Instructions (logical + procedure call)

MIPS code

addi $sp,$sp,-12 # make room on the stacksw $t1,8($sp) # save the temp registerssw $t0,4($sp)sw $so,o($sp)

add $to,$ao,$a1 # t0 g + hadd $t1,$a2,$a3 # t1 i + jsub $so,$t0,$t1 # f = t0 – t1

add $v0,$so,$zero # returns f ($vo = $s0 + 0)

lw $s0,0(sp) # restore saved values into temp registers from stacklw $t0,4(sp)lw $t1,8(sp)addi $sp,$sp,12jr $ra # jump back to the return address

Page 13: ISA Instructions (logical + procedure call)

Allocating Space on Stack

Stack is used to save and restore registers when calling a procedure

It may also be used to store return addressIt may be used to store argumentsIt may be used to store local arrays and data The segment of the stack containing a

procedure’s saved registers and local variables is called “procedure frame” or “activation record”

A frame pointer ($fp) points to first word of the frame of a procedure.

Page 14: ISA Instructions (logical + procedure call)

Stack and frame pointers

sp

fp

Saved arguments

Saved return addr

Saved regs.Locals

arrays& structures

fp

sp

beforeduring after

spfp

Page 15: ISA Instructions (logical + procedure call)

Delayed Branches

Inst Fetch Dcd & Op Fetch ExecuteBranch:

Inst Fetch Dcd & Op Fetch

Inst Fetch

Executeexecute successoreven if branch taken!

Then branch targetor continue Single delay slot

impacts the critical path

•Compiler can fill a single delay slot with a useful instruction 50% of the time.

• try to move down from above jump

•move up from target, if safe

add r3, r1, r2

sub r4, r4, 1

bz r4, LL

NOP

...

LL: add rd, ...

Page 16: ISA Instructions (logical + procedure call)

Delayed Branches

li r3, #7

sub r4, r4, 1

bz r4, LL

nop

LL: slt r1, r3, r5

subi r6, r6, 2

li r3, #7

sub r4, r4, 1

bz r4, LL

subi r6, r6, 2

LL: slt r1, r3, r5

compiler

Page 17: ISA Instructions (logical + procedure call)

Branch and Pipelines

By the end of Branch instruction, the CPU knows whether or not the branch will take place.

However, it will have fetched the next instruction by then, regardless of whether or not a branch will be taken.

Why not execute it?

ifetch

LL: slt r1, r3, r5

li r3, #7

sub r4, r4, 1

bz r4, LL

subi r6, r6, 2

Time

execute

Branch

Delay Slot

Branch Target

ifetch execute

ifetch execute

execute

ifetch execute

Page 18: ISA Instructions (logical + procedure call)

Putting it all together

Sort procedurevoid sort (int v[], int n){ int i, j; for (i = 0; i < n; i = i+1) { // outer loop for (j = i - 1; j >= 0 && v[j] > v[j+1]; j = j-1)

{ swap(v, j); }} }