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TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
An Introduction to the QorIQ™ Data Path Acceleration Architecture (DPAA)
June 23, 2010
Sam SiuSystems and Applications Engineer
FTF-NET-F0444
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 2
Agenda
►DPAA Overview
►QorIQ Implementation
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 3
What is the Datapath Acceleration Architecture (DPAA)?
The QorIQ DPAA is a comprehensive architecture which integrates all aspects of packet processing in the SoC, addressing issues and requirements resulting from the nature of QorIQ multicore SoCs.
►The DPAA includes:• Cores• Network and packet I/O• Hardware offload accelerators• The infrastructure required to facilitate the flow of packets between the above
The DPAA also addresses various performance related requirementsespecially those created by the high speed network I/O found on multicore SoCs such as the QorIQ P4080 multicore processor.
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 4
Multicore Datapath Issues and Requirements
►Multicore SoCs, like the P4080, have a number of new requirements related to packet processing when compared to single core SoCs:
• Load spreading of arriving packets across pools of cores for parallel processing
• Packet ordering issues after processing• Pipelined processing of packets using cores• Share network I/O between cores• “Virtualizes” hardware accelerators• Inter-core communication
CoreD$ I$
Network I/O
HardwareAccelerator
Network
CoreD$ I$
CoreD$ I$
CoreD$ I$
CoreD$ I$
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 5
More Multicore Datapath Requirements
►Addressing these requirements can lead to new requirements:• Hardware managed queues lead to the need for
hardware-supported active queue management• Network interfaces must be able to parse, classify,
and distribute frames
►High-bandwidth network I/O as found on the P4080 also drive datapath requirements:
• Queue congestion driven flow control • Resource depletion driven flow control• Hardware buffer management
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
QorIQ DPAA Components
► “Infrastructure” components• Queue Manager (QMan)• Buffer Manager (BMan)
►Network I/O• Frame Manager (FMan)
►Hardware accelerators• SEC – cryptographic accelerator• PME – Pattern matching engine
►Cores►CoreNet is not part of the DPAA but it
provides the interconnect between the cores and the DPAA infrastructure as well as access to memory (DRAM)
6
Frame Manager1GE 1GE
1GE 1GE10GE
D$ I$
D$ I$L2$ e500mc
CoreD$ I$
Multi-Lanes SERDES
CoreNet™Coherency Fabric
Sec 4.0 PME 2
BufferMgr
Frame Manager1GE 1GE
1GE 1GE10GE
D$ I$
D$ I$L2$ e500mc
CoreD$ I$
QueueManager
…
…
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
DPAA Versus Buffer Descriptor rings
DPAA infrastructure replaces descriptor rings:► Queueing is split from buffer management and from the passing of frames to/from cores
►Queues can be shared by multiple cores
►Data reception is not throttled by how fast software can service ring entries
►Data can be stashed into cache just before it is processed
7
CoreD$ I$
Eth
CoreD$ I$
CoreD$ I$
CoreD$ I$
CoreD$ I$
Network I/OEth Eth Eth
Queue Manager
BufferManager
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 8
1) DPAA Infrastructure: QMan
Queue Manager (QMan) supports:► Low latency, prioritized queuing of
descriptors between cores, network I/O and accelerators
► Lockless shared queues for load spreading and device “virtualization”
► Order restoration as well as order preservation through queue affinity
► Active queue management (WRED)
► Optimized core interface which can pre-position data/context/descriptors in core’s cache
► Delivery of per-queue accelerator specific commands and context information to offload accelerators along with dequeued descriptors
FQDCache
Queue Manager(QMan)
…
FMan
FMan
SEC
PME
……
……
…
FD Memory
QueuingEngines
Software Portals
…
CoreNetTo Cores
Hardw
are portals
Frame Descriptor
FrameDescriptor
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Queue “Building Blocks”
► Frame Queues (FQs) are the basic queuing structure supported by QMan
• FIFO lists of Frame Descriptors (FDs)• Each FD describes a frame which is a
delineated piece of data (e.g. a packet) in buffer(s) in memory
• Multi-buffer frames are described using Scatter/Gather Tables
• FQs are in turn enqueued on Work Queues (WQs)
► Channels are a collection of 8 WQs which have relative priority
• Class scheduling is performed at a channel• FQs are an ordered list of frames which need to
be processed in the same way• WQs are an ordered list of FQs which all have
the same priority
► Portal is a hardware interface used to access QMan facilities (e.g. Enqueue or Dequeue) possibly for multiple channels
9
Channel
Channel
Channel
WQ7
WQ0
WQ1
…
FQ
FQ FQ
FQ FQ
FDFD
SGT
Buffer
FD
User memoryQMan data structures
Buffer
Buffer
Portal
Context
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 10
2) DPAA Infrastructure: BMan
Buffer Manager (BMan) supports:► 64 pools of buffer pointers
• All buffers in a pool are expected to have “like” characteristics
• BMan places no restrictions on these characteristics
► Hardware (and software) acquire and release of buffer pointers from/to pools
• BMan is primarily intended to reduce the buffer management load on SW
► Pool depletion thresholds for pool replenishment and lossless flow control
• All thresholds have hysteresis
Buffer Manager(BMan)
FMan
FMan
SEC
PME
ListEngines
Software Portals
CoreNet
Internal stockpile
To Cores
Hardw
are portals
Buffer Descriptors
BufferDescriptors
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 11
10GE GE GE GE GE
Frame Manager(FMan)DMA
Policer Keygen(Distribution)
ParserClassifier
3) Network I/O: FMan
Frame Manager (FMan) supports:► One 10GE MAC and 4 GE MACs
• Max 12xGE parse+classify
► L2/L3/L4 protocol parse and validate• User defined protocols supported
► Hash based queue selection for load spreading
► Exact match classification queue selection
► IEEE 1588 timestamping► RMON/ifMIB stats► Color aware dual rate, 3 color policing► “right size” buffer acquisition from
BMan buffer pools► Per port egress rate limiting► TCP/UDP TX checksum calculation
CoreNet
ToBMan
To QMan
QMI
BMI
BufferMemory
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 12
4) Core Interface: QMan Software Portals
► Software portals provide the DPAA interface to cores and software
• Portal per core• Can be used by a core to access multiple
channels or queues directly
► Low latency lock free dequeue and enqueue of descriptors
► Portals can work closely with a core to (optionally) position:
• Descriptors• Packet data• Software defined per queue context or
state informationin L1 or L2 cache
► Queues can be “held” on a portal to ensure temporary affinity for order preservation
channel
WQ
0
WQ
1
WQ
2
WQ
3
WQ
4
WQ
5
WQ
6
WQ
7
channel
WQ
0
WQ
1
WQ
2
WQ
3
WQ
4
WQ
5
WQ
6
WQ
7
Power Architecture®Core
D-Cache I-Cache
L2 Cache
SW Portal
Dedicated channel
WQ
0
WQ
1
WQ
2
WQ
3
WQ
4
WQ
5
WQ
6
WQ
7
QMan
Held FQs
Power Architecture®Core
D-Cache I-Cache
L2 Cache
SW Portal
Pool channel
WQ
0
WQ
1
WQ
2
WQ
3
WQ
4
WQ
5
WQ
6
WQ
7
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
5) SEC 4.0
► Public Key Hardware Accelerators (PKHA)• RSA and Diffie-Hellman (to 4096b)• Elliptic curve cryptography (1023b)• Supports Run Time Equalization
► Data Encryption Standard Accelerators (DESA)• DES, 3DES (2K, 3K)• ECB, CBC, OFB modes
► Advanced Encryption Standard Accelerators (AESA)• Key lengths of 128-, 192-, and 256-bit• ECB, CBC, CTR, CCM, GCM, CMAC, • OFB, CFB, and XTS
► Message Digest Hardware Accelerators (MDHA)• SHA-1, SHA-2 256,384,512-bit digests• MD5 128-bit digest• HMAC with all algorithms
► ARC Four Hardware Accelerators (AFHA)• Compatible with RC4 algorithm
► Kasumi/F8 Hardware Accelerators (KFHA)• F8 , F9 as required for 3GPP• A5/3 for GSM and EDGE• GEA-3 for GPRS
► Snow 3G Hardware Accelerators (STHA)• Implements Snow 3.0
► CRC Unit• CRC32, CRC32C, 802.16e OFDMA CRC
► Random Number Generator, random IV generation► Header & Trailer off-load for the following Security Protocols:
• IPSec, 802.1ae, SSL/TLS, SRTP, 802.11i, 802.16e► Modular & Scalable with simplified device driver
13
On- ChipSystem
Interface
Queue ManagerInterface
Descriptor Controllers
Job Queue Controller
CHAs
-
Queue ManagerInterface
Descriptor Controllers
Job Queue Controller
RTIC
CoreNet
QMan/BMan
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 1414
6) Pattern Matching Engine (PME) 2.x
►Regex support plus significant extensions:
• Patterns can be split into 256 sets each of which can contain 16 subsets
• 32K patterns of up to 128B length• 9.6 Gbps raw performance
►Combined hash/NFA technology• No “explosion” in number of patterns
due to wildcards• Low system memory utilization• Fast pattern database compiles and
incremental updates
►Matching across “work units” finds patterns in streamed data
►The Pattern Matching Engine utilizes a pipeline of processing blocks to provide a complete pattern matching solution
On-ChipSystem
BusInterface
PatternMatcherFrameAgent
(PMFA)
DataExamination
Engine(DXE)
StatefulRule
Engine(SRE)
KeyElementScanningEngine(KES)
HashTables
Access to Pattern Descriptors and State
Pattern Matching Engine components
Cache Cache
User Definable Reports
Core
Net
BM
anQ
Man
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 1515
DPAA - Maximizing AccelerationFQ
FQ
FQFQ
…
priority
0 7
FQFQ
FQFQ
…
priority
0 7
Requestor
CoreInterface or Accelerator
Request Respon
se
• Datapath resources are effectively virtualized with extremely simple drivers. Minimal SW overhead for any packet, arriving on any port, to be processed by any CPU (
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 16
Agenda
►DPAA Overview
►QorIQ Implementation
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 17
QorIQ P4080 DPAA Components
RapidIOMessageUnit (RMU)
2x DMA
PCIe
18-Lane 5GHz SERDES
PCIe SRIOPCIe
CoreNet
1024KBFrontsideL3 Cache
64-bitDDR-2 / 3
Memory Controller
SRIO
WatchpointCross
Trigger
PerfMonitor
CoreNetTrace
Aurora
Sec 4.0 PME 2
BufferMgr
eLBC
TestPort/SAP Frame Manager
1GE 1GE
1GE 1GE10GE
1024KBFrontsideL3 Cache
64-bitDDR-2 / 3
Memory Controller
PAMU
Coherency FabricPAMUPAMUPAMU PAMU
Peripheral Access Mgmt Unit
eOpenPIC
Power Mgmt
2x USB 2.0/ULPI
SD/MMC
Clocks/Reset
2x DUART
4x I 2C
SPI
GPIO
PreBoot Loader
Security Monitor
Internal BootROM
CCSR
Power Architecturee500-mc Core
D-Cache I-Cache
128KBBacksideL2 Cache 32KB 32KB
Real Time Debug
Frame Manager1GE 1GE
1GE 1GE10GE
Queue Manager
QorIQP4080
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 1818
SRIOMessage
UnitDMA
PCIe
18-Lane 5GHz SERDES
PCIe SRIOPCIe
CoreNet
512-KbyteFrontsideL3 Cache
64-bitDDR-2 / 3
Memory ControllerP4040 Power Architecture
e500mc Core
D-Cache I-Cache
128-KbyteBacksideL2 Cache
SRIO
WatchpointCross
Trigger
PerfMonitor
CoreNetTrace
Aurora
Real Time DebugSecurity
4.0
PatternMatchEngine
2.0
Queue Mgr.
Buffer Mgr.
eLBIU
M2SB
TestPort/SAP
Frame Manager
1GE 1GE
1GE 1GE10GE
Parse, Classify,Distribute
Buffer
32-Kbyte 32-Kbyte 512-KbyteFrontsideL3 Cache
64-bitDDR-2 / 3
Memory Controller
P4040 Block Diagram
PAMU
Coherency FabricPAMUPAMUPAMU PAMU
1GE 1GE
1GE 1GE10GE
Parse, Classify,Distribute
Buffer
Frame Manager
Peripheral Access Mgmt Unit
eOpenPIC
Power Mgmt
2x USB 2.0/ULPI
SD/MMC
Clocks/Reset
DUART
2x I 2C
SPI
GPIO
PreBoot Loader
Security MonitorInternal BootROM
CCSR
Execution
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
QorIQ P3 Series P3041 Block Diagram
1919
►Quad e500mc cores, built on Power Architecture® technology
• 4 cores (up to 1.5 GHz)• Each with 128KB backside L2 cache• 1MB Shared L3 Cache w/ECC
►Memory Controller• DDR3/3L SDRAM up to 1.3 GHz• 32/64 bit data bus w/ECC
►High Speed Interconnect• 4 PCIe 2.0 Controllers• 2 SRIO 2.1 Controllers
Type 9 and 11 messaging• 2 SATA 2.0
►CoreNet Switch Fabric
►Ethernet• 5 x 10/100/1000 Ethernet Controllers
Or 4x 2.5Gb/s SGMII• 1 x 10GE Controllers• All w/ Classification, H/W Queueing,
policing, and Buffer Management, Checksum Offload, QoS, Lossless Flow Control, IEEE 1588
• Up to 1 XAUI, 4 SGMII or 2.5Gb/s SGMII, 2 RGMII
►Device• 45nm SOI Process• 1295-pin package, pin compat with P4040
37.5x37.5mm
CoreNet
PatternMatchEngine
2.0
1024 KBFrontsideL3 Cache
64-bitDDR3/3L
Memory Controller
Coherency FabricPAMU Peripheral Access Mgmt Unit
eOpenPIC
Power Mgmt
2x USB 2.0 PHY
SD/MMC
Clocks/Reset
2x DUART
4x I2C
SPI
GPIO
PreBoot Loader
Security Monitor
Internal BootROM
CCSR
Power Architecturee500mc Core
D-Cache I-Cache
128 KBBacksideL2 Cache 32 KB 32 KB
SEC4.0
Queue Mgr.
BufferMgr.
eLBC32b
Rapid IO
RMan
PAMU PAMU PAMU PAMU
Frame Manager
Parse, Classify,Distribute
Buffer
DMA x2
PCIe
18-Lane 5 GHz SerDes
PCIe
PCIe
PCIe
WatchpointCross
TriggerPerf
MonitorCoreNet
Trace
Aurora
1GE10GE
Real Time Debug
1GE
1GE
1GE
SATA
2.0
SATA
2.0
SRIO
SRIO
1GE
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
QorIQ P5 Series P5020 DPAA Components
2020
Frame Manager
Parse, Classify,Distribute
Buffer
DMA x2
PCIe
18-Lane 5 GHz SerDes
PCIe
PCIe
PCIe
CoreNet
WatchpointCross
TriggerPerf
MonitorCoreNet
Trace
Aurora
PatternMatchEngine
2
1GE10GE
1024 KBFrontsideL3 Cache
64-bitDDR-3
Memory Controller
Coherency FabricPAMU Peripheral Access Mgmt Unit
eOpenPIC
Power Mgmt
2x USB 2.0 PHY
SD/MMC
Clocks/Reset
DUART
4x I2C
SPI
GPIO
PreBoot Loader
Security Monitor
Internal BootROM
CCSR
Power Architecturee5500 Core
D-Cache I-Cache
512 KBBacksideL2 Cache 32 KB 32 KB
Real Time Debug
►Dual e5500 cores, built on Power Architecture® technology
• 2x 64-bit e5500 cores (up to 2.2 GHz)• Each with 512 KB backside L2 cache• Dual 1MB Shared L3 Cache w/ECC• Supports up to 64GB addressability (36 bit
physical addressing)►Memory Controller
• Dual DDR3, 3L up to 1.3 GHz• 32/64 bit data bus w/ECC
►High Speed Interconnect• 4 PCIe 2.0 Controllers• 2 SRIO 2.1 Controllers
Type 9 and 11 messaging• 2 SATA 3Gb/s• 2 USB 2.0 with PHY
►CoreNet Switch Fabric►Ethernet
• 5 x 10/100/1000 Ethernet Controllers • 1 x 10GE Controller (XAUI)• All w/ Classification/Policing, H/W Queuing,
policing, and Buffer Management, Checksum Offload, QoS, Lossless Flow Control, IEEE 1588v2, 4 SGMII, QSGMII
►Datapath Acceleration• SEC 4• PME 2• RapidIO Messaging
►Device• 45nm SOI Process• 1295-pin package
SEC4
Queue Mgr.
BufferMgr.
eLBC
1GE
1GE
1GE
PAMU PAMU PAMU
SATA
2.0
SATA
2.0
RAID 5/6
Engine
SRIO
SRIO
SRIOMgr.
1GE
P5020
TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 21
Summary
►The QorIQ Datapath Acceleration Architecture components include:• Queue Manager• Buffer Manager• Frame Manager• Hardware accelerators such as SEC and PME• Cores
►Together these components address multicore requirements including:
• Load spreading• Packet ordering• Device virtualization• Inter-core communication• HW buffer management
TM
An Introduction to the QorIQ™ Data Path Acceleration Architecture (DPAA)What is the Datapath Acceleration Architecture (DPAA)?Multicore Datapath Issues and RequirementsMore Multicore Datapath RequirementsQorIQ DPAA ComponentsDPAA Versus Buffer Descriptor rings1) DPAA Infrastructure: QManQueue “Building Blocks”2) DPAA Infrastructure: BMan3) Network I/O: FMan4) Core Interface: QMan Software Portals5) SEC 4.06) Pattern Matching Engine (PME) 2.xDPAA - Maximizing AccelerationQorIQ P4080 DPAA ComponentsP4040 Block Diagram�QorIQ P3 Series P3041 Block DiagramQorIQ P5 Series P5020 DPAA ComponentsSummary