INTRODUCTION TO DIGITAL SYSTEM DESIGNsite.iugaza.edu.ps/aaldali/files/2014/11/vhdl_ch_1.pdfECOM 4011 _ VHDL CH # 1 ENG. Ahmed K. Aldali Page 11 • Thus, for a large digital system,

ECOM 4011 _ VHDL

CH # 1

ENG. Ahmed K. Aldali CH # 1 Page 1

INTRODUCTION TO

DIGITAL SYSTEM DESIGN

ECOM 4011 _ VHDL


• This book provides in-depth coverage on the systematical development and synthesis of efficient, portable and scalable register-transfer-level (RT-level) digital circuits using the VHDL hardware description language.

• RT-level design uses intermediate-sized components, such as adders, comparators, multiplexers and registers, to construct a digital system. It is the level that is most suitable and effective for today’s synthesis software.

ECOM 4011 _ VHDL


• RT-level design and VHDL are two somewhat independent subjects. VHDL code is simply one of the methods to describe a hardware design. The same design can also be described by a schematic or code in other HDLs.

• VHDL and synthesis software will not lead automatically

to a better or worse design. However, they can shield designers from low-level details and allow them to

explore and research better architectures.

ECOM 4011 _ VHDL


• In the past, the major applications of digital hardware were computational systems. However, as the chip became smaller, faster, cheaper and more capable, many electronic, control, communication and even mechanical systems have been "digitized" internally, using digital circuits to store, process and transmit information.

• As applications become larger and more complex, the task of designing digital circuits becomes more difficult. The best way to handle the complexity is to view the circuit at a more abstract level and utilize software tools to derive the low-level implementation.

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• They cannot, and will not, do the design or convert a poor design to a good one. The ultimate efficiency still comes

from human ingenuity and experience.

• There is no single best technology, and we have to consider the trade-offs among various factors, including

chip area, speed, power and cost.

ECOM 4011 _ VHDL


• In certain technologies, all the layers of a device are

predetermined, and thus the device can be prefabricated and manufactured as a standard off-the-shelf part.

• some device technologies need one or more layers to be customized for a particular application. The customization involves the creation of tailored masks and fabrication of the patterned layers.

• This process is expensive and complex and can only be done in a fabrication plant (known as afoundry or afub).

• the term application-specific (ASIC) to represent device

technologies that require a fab to do customization.

Classification of device technologies

ECOM 4011 _ VHDL


• According to the complexity and structure of logic cells, complex field-programmable devices can be divided roughly into two broad categories:

complex programmable logic device (CPLD) field programmable gate array (FPGA).

• FPGA is better suited for large, high-capacity complex field-

programmable devices

Complex field-programmable device

ECOM 4011 _ VHDL


Simple field-programmable device

• as the name indicates, are programmable devices with simpler internal structure. Historically, these devices are generically called programmable logic devices (PLDs). We add the word simple to distinguish them from FPGA and CPLD devices.

• The devices include: programmable read only memory (PROM), in which the or plane can be

programmed. programmable array logic (PAL), in which the and plane can be

programmed. programmable logic array (PLA), in which both planes can be

programmed.

ECOM 4011 _ VHDL


• Unlike FPGA and CPLD devices, simple field-programmable logic devices do not have a general interconnect structure, and thus their

functionality is severely limited

ECOM 4011 _ VHDL


• Before the emergence of field-programmable devices, the only alternative to ASIC was to utilize the prefabricated off-the-shelf SSI/MSI components. These components are small parts with fixed, limited functionality.

One example is the 7400 series transistor transistor logic (TTL)family • none of today’s synthesis software can utilize off-the-shelf SSI/MSI

components, and thus automation is virtually impossible. As the programmable devices become more capable and less expensive, designing a large custom circuit using SSI/MSI components is no longer a feasible

option and should not be considered.

Off-the-shelf SSI/Msl components

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• Thus, for a large digital system, there are only three viable device technologies: standard-cell ASIC gate array ASIC CPLD/FPGA.

• we examine the trade-offs among these technologies .. we need to

choose from the three device technologie.

• The major criteria for selection are area, speed, power and cost.

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Area

• Chip area (or size) corresponds to the required silicon real estate to implement a particular application.

• The chip size depends on the architecture of the circuit and the device technology.

• In standard-cell technology : the cells and interconnects are customized to this particular application ,no silicon is wasted , chip is fully optimized and the area is minimal.

• In gate array technology: the circuit is predefined, silicon use is not optimal, The area of the resulting circuit is normally larger than that of a standard-cell chip.

• In FPGA technology: a significant portion of the silicon is dedicated to achieving programmability, which introduces a large overhead. A certain percentage of the capacity will be left unutilized. Because of the overhead and relatively low utilization, the area of the resulting FPGA chip is much larger than that of an ASIC chip.

ECOM 4011 _ VHDL


Speed

• At the architecture level, faster operation can be achieved by using a more sophisticated design, which requires a larger area.

• However, if the identical architecture is used, a chip with a larger area is normally slower, due to its large parasitic capacitance.

• Since a standard-cell chip has tailored interconnect and utilizes a minimal amount of silicon area, it has the smallest propagation delay and best speed.

• an FPGA chip has the worst propagation delay. In addition to its large size, the programmable interconnect has a relatively large resistance and capacitance, which introduces even more delay.

• As with chip area, the speed difference between standard-cell and gate array

technologies is much less significant than that between FPGA and ASIC.

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Power

• smaller chip, which consists of fewer transistors, usually consumes less power.

• a standard-cell chip consumes the least amount of power.

• an FPGA chip uses the most power.

ECOM 4011 _ VHDL


• Standard-cell technology is clearly the best choice from a technical perspective. • A chip constructed using standard-cell ASIC is small and fast, and consumes

less power. This should not come as a surprise since the chip is highly optimized and wastes no resources on unnecessary overhead.

• The price associated with customization is the complexity. Designing and fabricating a standard-cell chip is more involved and time consuming than for the other two technologies.

• The FPGA devices are used as prototypes and in initial shipments to cut the manufacturing lead time.

• When the ASIC devices become available later, they are used for volume production to reduce cost

ECOM 4011 _ VHDL


ECOM 4011 _ VHDL


Abbreviations and Definitions

HDL: Hardware Description Language

VHDL: Very High Speed Integrated Circuit (VHSIC)

Verilog: is another popular HDL

RTL: register transfer level

Fabrication Plant (Foundry - Fab) : the creation of tailored masks and fabrication of the

patterned layers (factory of IC)

ASIC : application-specific IC (ASIC) to represent device technologies that require a fab to do

customization.

CPLD: complex programmable logic device

FPGA: field programmable gate array

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PROM: programmable read only memory

PAL: programmable array logic

PLA: programmable logic array

IP (intellectual properties ) : The basic building blocks at this level, include

processors, memory modules, bus interfaces and so on.

EDA (electronic design automation) : Computer software is used to automate

some tasks.

Net: set of wires connected to the same node.

Netlist: collection of nets.

ECOM 4011 _ VHDL


Documents

INTRODUCTION TO DIGITAL SYSTEM DESIGNsite.iugaza.edu.ps/aaldali/files/2014/11/vhdl_ch_1.pdfECOM 4011 _ VHDL CH # 1 ENG. Ahmed K. Aldali Page 11 • Thus, for a large digital system,