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INTRODUCTION TO CAD TOOLS EE 4325 / 6325 VLSI DESIGN

INTRODUCTION TO CAD TOOLS - University of Texas at Dallashxh025000/index... · UNIX / Linux commands II Shortcuts • Ctrl+C – halts the current command • Ctrl+Z – stops the

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Page 1: INTRODUCTION TO CAD TOOLS - University of Texas at Dallashxh025000/index... · UNIX / Linux commands II Shortcuts • Ctrl+C – halts the current command • Ctrl+Z – stops the

INTRODUCTION TO CAD TOOLS

EE 4325 / 6325 VLSI DESIGN

Page 2: INTRODUCTION TO CAD TOOLS - University of Texas at Dallashxh025000/index... · UNIX / Linux commands II Shortcuts • Ctrl+C – halts the current command • Ctrl+Z – stops the

Outline

• VLSI design flow

• Basics of UNIX / Linux

• CADENCE

• HSPICE

– WAVEFORM VIEWER

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VLSI Design Flow

DESIGN

IMPLEMENTATION & SYNTHESIS

Verilog/Vhdl simulator

Synopsys DesignVision

STANDARD CELL LIBRARY DESIGN

Cadence/synopsys

AUTOMATIC PLACE AND ROUTE

Encounter

DESIGN VERIFICATION

Hspice/NCX/PrimeTime

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UNIX / Linux commands I

File Commands

• ls – list contents of the directory

• ls -al – formatted listing with hidden files

• cd <dir> - change directory to dir

• cd – change to home

• pwd – show current working directory

• mkdir <dir> – create a directory dir

• rm –f <filename> – delete file

• cp file1 file2 – copy file1 to file2

• cp -r dir1 dir2 – copy dir1 to dir2; create dir2 if it doesn't exist

• mv file1 file2 – rename or move file1 to file2 if file2 is an existing directory, moves file1 into directory file2

Process Management

• ps – display your currently active processes

• Kill %%-- Kills the current process

• kill pid – kill process id pid

• killall proc – kill all processes named proc *

• bg – lists stopped or background jobs; resume a stopped job in the background

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UNIX / Linux commands II

Shortcuts

• Ctrl+C – halts the current command

• Ctrl+Z – stops the current command, resume with

• fg in the foreground or bg in the background

• Ctrl+D – log out of current session, similar to exit

• Ctrl+W – erases one word in the current line

• Ctrl+U – erases the whole line

• Ctrl+R – type to bring up a recent command

• !! - repeats the last command

• exit – log out of current session

Help for all the commands can be obtained on the terminal using

• man <command name>

Servers you can use for VLSI – Apache, Jupiter

Please go to TA’s tutorial website for learning UNIX / Linux

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MOS Transistors

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Side View of Transistors

Image Source: Apple Computer www.apple.com

• What they really look like - a 130nm transistor from the IBM G5 processor:

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TOP View of Transistors

S

NMOS

D S

PMOS

D

N-well

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Cadence – Layer Selection Window (LSW)

Active layer

Instances / Pins selectable

Visibility & selection controls for all layers

AV: All layers visible & selectable

NV: All layers invisible & unselectable

AS: All visible layers selectable

NS: All visible layers unselectable

Note: invisible layers are always unselecable

Layer list

Click with LEFT mouse button to select the layer as

the ACTIVE layer

Click with MIDDLE mouse button to switch

VISIBILITY of the layer

Click with RIGHT mouse button to switch

SELECTABILITY of the layer

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IBM 130nm Design Rules

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Design Rule Check (DRC) Errors

Error showing that the minimum space between two adjacent M1 layers should be

>=0/16um

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Layout Versus Schematic (LVS) Errors I

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Layout Versus Schematic (LVS) Errors II

Alternatively, you can go to "View->LVS Error Report (Current Cell)" to bring up the net list of errors,

and then you can select the names to highlight the mismatches on both the schematics and layout.

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Pitch Size (IO Pin Spacing)

0.48um

For our project design, in the cell library design, the distance between pins should be

0.24×n (n=1, 2, 3…) um.

And the distance between the GRLogic and its adjacent pin should be

0.24+0.48*n (n=0, 1, 2, 3…) um.

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Cadence Shortcuts I

Key Function

Display/View/Zoom

z Zoom in (box)

Ctrl-z Zoom in by 2

Shift-z Zoom out by 2

f Fit in window

Ctrl-r Redraw

k Create ruler

Shift-k Delete all rulers

Create

r Create rectangle

p Create path

Shift-p Create polygon

l Create label

i Create instance

Ctrl-p Create pin

Key Function

Edit

F4 Switch selection mode

(Full/Partial)

u Undo

Shift-u Redo

m Move

s Stretch

c Copy

Shift-r Rotate

del Delete

q Properties

Ctrl-a Select all

Ctrl-d Select none

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Cadence Shortcuts II

Please go to TA’s tutorial website for learning Cadence Tools

• Inverter layout tutorial

• Layout tips for IBM 130nm technology

• DRC, LVS and PEX(parasitic extraction)

Hierarchy

Shift-x Descend into cell (new window)

x Descend into cell (edit in place)

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HSPICE

TO RUN HSPICE:

1. Source /home/cad/startup/cadprofile_new

2. Type: “hspice <spi file name.sp>”

3. If there are no errors then the outputs can be viewed by waveform viewers.

4. Type: “scope &” or “wv &” at the unix command prompt (without the quotes)

5. Once the window opens, go to File->Open->Plotfiles. Under the file types choose the one with “.tr” extension and select <spi file name.tr0> and say OK.

6. In the small window that shows the inputs and the outputs, double click the ones that are to be viewed.

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HSPICE Example I

* first line must be a commend or empty line

* Tansistor model file

.include“/home/cad/kits/IBM_CMRF8SFLM013/IBM_PDK/cmrf8sf/relLM/HSPICE/models/model013.lib_inc“

* HSPICE is case in-sensitive and will convert all to lower case and so

* inv.sp and INV.sp are the same to HSPICE. This file has the netlist for INV gate.

.include inv.sp

.OPTIONS POST = 1

*INV gate with input: in output: out (Please follow the port order in inv.sp)

Xinv in out / inv

* Parameter definitions

.param VDD = 1.2V

* Power supplies

vdd! vdd! gnd 1.2V

Vin in GND PWL (0ns VDD 4ns VDD 4.5ns 0 8ns 0 8.5n VDD )

* Run the simulations for 10ns with a step size of 0.05 ns

.tran 0.05ns 10ns

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HSPICE Example II

*===========================================================

* Propagation Delay Measurements

*===========================================================

.measure tran Tphl_out trig v(in) val='VDD/2' rise=1 + targ v(out) val='VDD/2' fall=1

.measure tran Tplh_out trig v(in) val='VDD/2' fall=1 + targ v(out) val='VDD/2' rise=1

*===========================================================

* Average Power Measurement

*===========================================================

.measure tran AvgPower avg p(VVdd)

.END

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HSPICE Vector Input Example I

* The vector file that has the inputs in a digital format. The file name is case in-sensitive.

.VEC Nand2.vec

; VECTOR PATTERN DEFINITIONS

; Radix -- specifies number of bits associated with each vector

; (e.g. 1 4 => one 1-bit and one 4-bit vectors

; Vname -- name of each vector

; IO -- determines inputs, outputs or bidirectional

; Tunit -- indicates time unit for the tabular data

; Period -- Used for periodic data to define period for one vector

; Trise -- Rise time for signals

; Tfall -- Fall time for signals

; Vih -- Logic "1" voltage (VDD is defined in the netlist)

; Vol -- Logic "0" voltage

;==============================================================

Radix 1 1

Vname NAND2_A NAND2_B

IO I I

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HSPICE Vector Input Example II

Tunit ns

Period 10

Trise 0.1

Tfall 0.1

Vih VDD

Vil 0.0

;===========================================================

; DEFINING TABULAR DATA

; Tabular data is provided in chronological order. In this example since "Period" is defined,

; the first column corresponding to "time“ is not needed. However, for non-periodic tabular

; data "time" is needed in the first column. If outputs are provided in the tabular data, then

; Hspice will compare the actual and expected outputs

;===========================================================

00

01

10

11

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HSPICE Waveform Viewers

Available viewers:

• WaveView

• CosmosScope

Please go to TA’s tutorial website for using Waveform Viewers