Introduction to 8086

Introduction to 8086

CS2200 Computer Architecture. Lecturer: Narong Wesnarat

Intel 8086 CPU: An Introduction8086 Features16-bit Arithmetic Logic Unit16-bit data bus 20-bit address bus - 220 = 1,048,576 = 1 meg16-bit registersSeparate units to fetch and execute instructions


8086 Architecture The 8086 has two parts, the Bus Interface Unit (BIU) and the Execution Unit (EU). The BIU fetches instructions, reads and writes data, and computes the 20-bit address. The EU decodes and executes the instructions using the 16-bit ALU. The BIU contains the following registers:

IP - the Instruction PointerCS - the Code Segment RegisterDS - the Data Segment RegisterSS - the Stack Segment RegisterES - the Extra Segment Register

The BIU fetches instructions using the CS and IP, written CS:IP, to construct the 20-bit address. Data is fetched using a segment register (usually the DS) and an effective address (EA) computed by the EU depending on the addressing mode.


8086 Block Diagram


8086 Architecture [2]

The EU contains the following 16-bit registers:

AX - the AccumulatorBX - the Base RegisterCX - the Count RegisterDX - the Data Register

SP - the Stack Pointer BP - the Base Pointer SI - the Source Index RegisterDI - the Destination RegisterThese are referred to as general-purpose registers, although, as seen by their names, they often have a special-purpose use for some instructions.The AX, BX, CX, and DX registers can be considered as two 8-bit registers, a High byte and a Low byte. This allows byte operations and compatibility with the previous generation of 8-bit processors, the 8080 and 8085. The 8-bit registers are:AX --> AH,ALBX --> BH,BLCX --> CH,CLDX --> DH,DL


8086 Architecture [3]

The EU also contains the Flag Register which is a collection of condition bits and control bits. The condition bits are set or cleared by the execution of an instruction. The control bits are set by instructions to control some operation of the CPU.

Bit 0 - CF Carry Flag - Set by carry out of msbBit 2 - PF Parity Flag - Set if result has even parityBit 4 - AF Auxiliary Flag - for BCD arithmeticBit 6 - ZF Zero Flag - Set if result is zeroBit 7 - SF Sign Flag = msb of resultBit 8 - TF Single Step Trap FlagBit 9 - IF Interrupt Enable FlagBit 10 - DF String Instruction Direction FlagBit 11 - OF Overflow Flag

Bits 1, 3, 5, 12-15 are undefined.


Condition flagsCF (carry flag) addition sets flag if carry out of MSB generate; subtraction sets flag if borrow needed.PF (parity flag) set to 1 if low-order 8 bits (low order byte) contain even number of 1s (that is, gives odd parity)AF (auxiliary carry flag) set if carry out of bit 3 during addition or borrow by bit 3 during subtraction. Used exclusively for BCD arithmetic.ZF (zero flag) set to 1 if result is 0; to 0 if result is nonzeroSF (sign flag) equal to MSB of resultOF (overflow flag) set if overflow occurs (that is, if carry in to MSB is not equal to carry out from MSB)


ExampleCF (carry flag) carry out of MSBPF (parity flag) set to 1 if low-order 8 bits (low order byte) contain even number of 1sAF (auxiliary carry flag) carry out of bit 3ZF (zero flag) set to 1 if result is 0; to 0 if result is nonzeroSF (sign flag) MSB of resultOF (overflow flag) set if carry in to MSB is not equal to carry out from MSB) 0011 0100 1101 1100+0000 0111 0010 1110 0011 1100 0000 1010CF = 0PF = 1AF = 1ZF = 0SF = 0OF = 0


Example 2CF (carry flag) carry out of MSBPF (parity flag) set to 1 if low-order 8 bits (low order byte) contain even number of 1sAF (auxiliary carry flag) carry out of bit 3ZF (zero flag) set to 1 if result is 0; to 0 if result is nonzeroSF (sign flag) MSB of resultOF (overflow flag) set if carry in to MSB is not equal to carry out from MSB) 1111 1111 1110 0101 +1111 1111 1011 00011 1111 1111 1001 0110CF = 1PF = 1AF = 0ZF = 0SF = 1OF = 0


Control flagsTF (trap flag) if set, a trap is executed after each instructionIF (interrupt enable flag) if set, a maskable interrupt can be recognized by the CPU; otherwise, these interrupts are ignored.DF (direction flag) used by string manipulation instructions; if clear to 0, then process string from low address to high; if set to 1, then process string from high address to low.


8086 Programmers Model16-bit Registers


8086-80286 extended 32bit Model The special uses of general-purpose registers EAXAccumulator for operands and results data. EBXPointer to data in the DS segment. ECXCounter for string and loop operations. EDXI/O pointer. ESIPointer to data in the segment pointed to by the DS register; source pointer for string operations. EDIPointer to data (or destination) in the segment pointed to by the ES register;destination pointer for string operations. ESPStack pointer (in the SS segment). EBPPointer to data on the stack (in the SS segment).


8086 internal registers 16 bits (2 bytes each)AX, BX, CX and DX are twobytes wide and each byte can be accessed separatelyThese registers are used as memory pointers.Segment registers are usedas base address for a segmentin the 1 M byte of memory


Segmented MemorySegmented memory addressing: absolute (linear) address is a combination of a 16-bit segment value added to a 16-bit offset linear addressesone segment


Memory Address GenerationThe BIU has a dedicated adder for determining physical memory addressesIntel


Example Address CalculationIf the data segment starts at location 1000h and a data reference contains the address 29h where is the actual data?Intel


SegmentsSegmentRegistersMEMORYAddress 000000H0FFFFFHSegments are < or = 64K,can overlap, start at an addressthat ends in 0H. CS:0Segment Starting address is segment register value shifted 4 place to the left.


8086 Memory TerminologyCODEDATASTACKEXTRA0100H0B200H0CF00H0FF00HDS:SS:ES:CS:001000H0B2000H0CF000H0FF000H10FFFH0C1FFFH0DEFFFH0FFFFFH 000000HSegment RegistersMemory SegmentsSegments are < or = 64K and can overlap.Note that the Code segment is < 64K since 0FFFFFH is the highest address.


The Code SegmentThe offset is the distance in bytes from the start of the segment.The offset is given by the IP for the Code Segment.Instructions are always fetched with using the CS register.The physical address is also called the absolute address


The Stack Segment

The offset is given by the SP register.The stack is always referenced with respect to the stack segment register.The stack grows toward decreasing memory locations.The SP points to the last or top item on the stack.

PUSH - pre-decrement the SPPOP - post-increment the SP


The Data SegmentData is usually fetched with respect to the DS register.The effective address (EA) is the offset.The EA depends on the addressing mode.


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Introduction to 8086