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SHAUNAKJANI101ESanFernandoSt,
Apt428,
SanJose,CA95112,US.
Tel:+1(408)8594549
Email:[email protected]
Website:shaunakjani.blogspot.com
OBJECTIVE
Seeking an internship opportunity in the field of ASIC / FPGA
design, testing, and verification which offers me
professionalgrowthandchallengeswhilefulfillingcorporateobjectivesofdeliveringasuccessfulproduct.
EDUCATION
MSElectricalEngineering(VLSIDesign) August2011 May2013(Expected)
GPA 3.3
SanJoseStateUniversity
B.E.ElectronicsandTelecommunicationsEngineering
August2006July2010
UniversityofMumbai India
TECHNICAL SKILLS
HandsonExperienceinRTLsynthesis,gatelevelsimulationaswellasSTA,usingvariousEDAtoolsets.
ExpertisewithDigitalCircuitDesign,DebugandformalVerification
usingVerilogHDL.
Good
basic
understanding
of
CMOS
transistor
circuit
design
fundamentals.
GoodinDesigning&Analyzingpower,performance,andareatradeoffsindigitalcircuits.
WorkedonFloorplanningandplace&routeusingCadenceEncounter.
GoodbasicunderstandingonASIC/ICdesignflowand,CMOSphysicaldesign.
Abilitytolearnnewtechnologies,teamplayer,goalorientedandhighlymotivated
Languages:VerilogHDL,C,C++,learningPerl.
Tools:SynopsysVCS,SynopsysDesignVision,Modelsim,TurboC,PCBExpress,CadenceEncounter,NCverilog,
IcarusVerilog.
Microprocessors&Microcontrollers:8085,8086,8051and80196Microcontrollers
Productivitysuite:MSOffice,AdobePhotoshop,Notepad++.
OperatingSystem:WindowsXP/Vista/Seven,MacOS,Fedora,Unix.
PERTINENTCOURSES
DigitalSystemDesignusingVerilogHDL ASICCMOSDesign
SemiconductorDevices
Probabilities,RandomVariables&StochastiProcesses
8051microcontroller8085&8086
Microprocessors
DigitalTimeSignalProcessing ComputerNetworking
EngineeringDevicesandCircuit LinearSystemTheory
ACADEMICPROJECTS
>>Designof TokenRinginterfaceforI2CBus (Ongoing)
May2012(Expected)
ImplementingTokenRinginterfaceforI2CBusworkingforvariousmodesofoperation.UsingconceptofFiniteStateMachine(FSM).
ImplementingFIFO.
>>Designtocalculatecirclecoordinates February2012
DesignedamultiplierandasquarerootcalculatorinordertocalculateYinthecircleequationY^2+X^2=R^2.
Implementedasynchronousdesignusingtheconceptofpipeliningandflags.Optimizedthecircuittoworkat200MHzand300MHz.ExploredconceptsofTimingclosure
SetupandHoldtimeviolation.
ImplementedFIFO.PlaceandRouteusingEncounter.
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ACADEMICPROJECTS (Continued)
>>DesignandAnalysisofAreaDelayandPowerDelayTradeoffsinAdditionCircuits
December2011
DesignedaddersusingVerilogHDLatRTL levelusedsimple
ripplecarryalgorithmandotherusedcarrylookedaheadalgorithm.
Performed testingandverification for16,32,48
and64bitadders.Simulated thedesigns
inSynopsysVCSandsynthesizedandoptimizedusingToshibaLibraryinSynopsysDesignVision.
Simulatednetlisttocheckforshortest,medium,andlongestdelaybypassingvariousdatainputsinthetestbenchand
generated
the
summation
and
carry
outputs.
Performedpostsynthesisonthedesignusingnetlist.Optimizedthedesignlogicuntiltheresultsensuredthattheslackwasnotviolated.
>>TouchscreenbasedElectronicVotingMachine May2010
Designed and implemented a novel touch screen based
votingmachine, as a proposal to improve the
currentelectoralvotingmechanisminIndia.Projectandimplementationwaschosenasthe3rdbestideaamongstatotalo
30classprojects.
Rectified the problems occurring in current voting mechanism by
exploring modern hardware circuit
designtechniquesandimplementingefficientanduserfriendlysoftware.
EnableddatasecurityandbackupofthevotesbybuildingafourdigitpasswordverificationandprotectionsystemImplemented
PC
interface
with
the
device
using
RS232
to
allow
timely
data
backups.
ProgrammedthemicrocontrollerusingEmbeddedC.ACHIEVEMENTS
Creative headof KJSIEIT student councils annual sports festival
SCORE2KX and KJSIEITIETE student counci2009.
Won2ndPriceatMVLUcollegeIntracollegiatequizcontestheldinAugust2004.
Won3rdPriceatRoyalcollegeIntercollegiatesciencequizQUEST2004.
MemberofchieforganizingcommitteeofKJSIEITstudentcouncilsandIEEEKJSIEITstudentchapter.
