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Uni-Heidelberg, KIP, V.Angelov 1 International Workshop TRDs – Present & Future 24-28 September, Romania Wafer Tester, Optical Link, GTU V. Angelov Kirchhoff Institute for Physics Chair of Computer Science University Heidelberg, Germany Phone: +49 6221 54 9812 Fax: +49 6221 54 9809 Email: [email protected].

International Workshop TRDs – Present & Future 24-28 September, Romania

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Wafer Tester, Optical Link, GTU. International Workshop TRDs – Present & Future 24-28 September, Romania. V. Angelov Kirchhoff Institute for Physics Chair of Computer Science University Heidelberg, Germany Phone: +49 6221 54 9812 Fax:+49 6221 54 9809 - PowerPoint PPT Presentation

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Page 1: International Workshop TRDs – Present & Future 24-28 September, Romania

Uni-Heidelberg, KIP, V.Angelov 1

International WorkshopTRDs – Present & Future

24-28 September, Romania

Wafer Tester,Optical Link,

GTU

V. AngelovKirchhoff Institute for PhysicsChair of Computer ScienceUniversity Heidelberg, GermanyPhone: +49 6221 54 9812Fax: +49 6221 54 9809Email:[email protected]: www.ti.uni-hd.de

Page 2: International Workshop TRDs – Present & Future 24-28 September, Romania

Uni-Heidelberg, KIP, V.Angelov 2

Wafer tester

Test automatically the TRAP on the wafer:

• The supply currents

• The serial links and pretrigger

• All internal parts using the CPUs

• The parallel output

• The half of the ADCs using a sin wave generator

400

450

500

550

600

650

0 10 20 30 40 50 60

AD

C o

utpu

t

ADC 13

-4 -2 0 2 4

0 10 20 30 40 50 60

RE

S

samples

Page 3: International Workshop TRDs – Present & Future 24-28 September, Romania

Uni-Heidelberg, KIP, V.Angelov 3

Wafer tester status

Contact problems with the needle card:• The termination resistors in the LVDS input cells normally are about 100 Ohm, but

with the contact resistance we get sometimes 150, 250, 500, even kiloohms.

• More frequently this happens with the SCSN inputs than with the clock and the pretrigger

• More overdrive doesn‘t help, disconnecting and connecting the chip again gives another resistance

• New needle card delivered last week

• Next steps: clean and align the needle card and try again, in case of problems mount the new needle card

The positioning precision of the wafer tester improved, which is important for the burning of the chip ID with the laser

Page 4: International Workshop TRDs – Present & Future 24-28 September, Romania

Uni-Heidelberg, KIP, V.Angelov 4

Optical Link

Transmitter board to be plugged on the ROB 8 Bit at 120 MHz DDR parallel to 16 bit SDR 120 MHz conversion using CPLD Commercial gigabit serializer from Texas Instruments TLK2501 Driver for the laser diode with programmable parameters via I2C interface

Receiver board for testing of the gigabit transmitter board Amplifier for the photodiode The same commercial gigabit deserializer from Texas Instruments

The link is stable at 2.4 GBits/s with pseudorandom data generated in the TI chip.To do: 1) send TRAP data; 2) store the received data via ACEX board in a PC

Page 5: International Workshop TRDs – Present & Future 24-28 September, Romania

Uni-Heidelberg, KIP, V.Angelov 5

GTU – Track Matching Unit (TMU)

850 nmSFP-Transceiver

850 nmSFP-Transceiver

850 nmSFP-Transceiver

850 nmSFP-Transceiver

850 nmSFP-Transceiver

850 nmSFP-Transceiver

850 nmSFP-Transceiver

850 nmSFP-Transceiver

850 nmSFP-Transceiver

850 nmSFP-Transceiver

850 nmSFP-Transceiver

850 nmSFP-Transceiver

FPGA(Xilinx

XC4VFX40 FF1152)

FPGA(Xilinx

XC4VFX40 FF1152)

Com

pact

PC

I B

us

Cust

om

LV

DS I/O

72

Pair

s

DDR2 SRAM

JTAG

4 MB4 MB

(6U Height, Single Width)

3 Parallel Links (120

MHz DDR, 8 Bit LVDS)

From Left TMU

To Right TMU

To SMU Board

12 Fibre Optical Serial

Links(2.5 GBit/s)

From 1 Detector

Stack

Virtex-4 FPGA:42k LCs, 448

I/Os,12 Internal

Multi-Gigabit Serializer/Deseri

alizer-Units

DDR2 SDRAM

128 MB128 MB

Config PROM

Config PROM

DDR2 SRAM:High Bandwidth

(28.8 GBit/s) Data Buffer

Jan de Cuveland

Page 6: International Workshop TRDs – Present & Future 24-28 September, Romania

Uni-Heidelberg, KIP, V.Angelov 6

DDL - Source Interface Unit (SIU)

Detector Control System (DCS)

Board

GTU – SMU Concentrator Board

TTCTTC

RJ45RJ45

850 nmSFP-Transceiver

Com

pact

PC

IC

ust

om

LV

DS I/O

JTAG

(6U Height, Double Width)

FPGA(Xilinx

XC4VFX40 FF1152)

FPGA(Xilinx

XC4VFX40 FF1152)

DDR2 SRAM

4 MB4 MB

DDR2 SDRAM

128 MB128 MB

Config PROM

Config PROM850 nm

SFP-Transceiver

5 Parallel Links (120

MHz DDR, 8 Bit LVDS)

Trigger OutFrom TMU 0From TMU 1From TMU 2From TMU 3From TMU 4

ALICE Detector Data Link (DDL)

ALICE Timing, Trigger &

Control Input (TTC)

Ethernet: System

Configuration and Control

Jan de Cuveland

Page 7: International Workshop TRDs – Present & Future 24-28 September, Romania

Uni-Heidelberg, KIP, V.Angelov 7

GTU – TMU Current Status

♦Final PCB layout steps in progress

♦Prototype FPGA design: complete and verified

♦Next steps: assemble and test...

TMU/SMUPCB Layout

Jan de Cuveland

Page 8: International Workshop TRDs – Present & Future 24-28 September, Romania

Uni-Heidelberg, KIP, V.Angelov 8

Open questions

♦ Wavelength: 850 nm or 1300 nm ?• Price comparison of the components (laser diode, SFP modules, cables)…• Reliability of the link over longer distances and many connections: 1300 nm is typically specified for 2000m while 850 nm for 150-300m

♦ Clock quality, PLL or low jitter quartz oscillator + resynchronization in the CPLD

• On the serializer side we need 1/20 of the serial bit rate with jitter < 40 ps

• On the receiver side we need 1/10 of the serial bit rate with jitter < 25 ps

♦ Test with FPGA Virtex II as receiver (board from Mannheim)

♦ Stability with longer optical cables and the patchpanels with both wavelenghts