Intel Speedstep Technology of the Pentium M Processorskadron/tacs/rotem_slides.pdf · Intel® Speedstep® Technology of the Pentium® M Processor Efi Rotem, Avi Mendelson, Alon Naveh,

Analysis of The Enhanced Analysis of The Enhanced IntelIntel®® SpeedstepSpeedstep®® Technology Technology of the Pentiumof the Pentium®® M Processor M Processor

Efi Rotem, Efi Rotem, AviAvi MendelsonMendelson, Alon , Alon NavehNaveh, , MichaMicha MoffieMoffie

June 2004June 2004

MOBILETECHNOLOGY

TACS June 2004 - 2 -

OverviewOverviewMobile computers challengesMobile computers challenges

Energy and Average powerEnergy and Average powerThermal Design PowerThermal Design Power

IntelIntel®® PentiumPentium®® M power management M power management The experimentsThe experimentsTest resultsTest resultsConclusionsConclusions



Energy and Average powerEnergy and Average powerThermal Design PowerThermal Design Power

Intel Pentium M power management Intel Pentium M power management The experimentsThe experimentsTest resultsTest resultsConclusionsConclusions


Power & Density increasesPower & Density increasesThink Watts/CmThink Watts/Cm22

Complex architecture at faster and smaller technologyComplex architecture at faster and smaller technologyDenser power is harder to coolDenser power is harder to cool

Wat

ts/c

m2

1

10

100

1000

1.5µ 1µ 0.7µ 0.5µ 0.35µ 0.25µ 0.18µ 0.13µ 0.1µ 0.07µ

i386i386i486i486

PentiumPentium®®PentiumPentium®® ProPro

PentiumPentium®® IIIIPentiumPentium®® IIIIIIHot plateHot plate

Nuclear ReactorNuclear ReactorNuclear ReactorRocketNozzleRocketRocketNozzleNozzle

* * ““New Microarchitecture Challenges in the Coming Generations of CMNew Microarchitecture Challenges in the Coming Generations of CMOS Process TechnologiesOS Process Technologies”” ––Fred Pollack, Intel Corp. Micro32 conference key note Fred Pollack, Intel Corp. Micro32 conference key note -- 1999.1999.

PentiumPentium®® 44

CentrinoCentrino®®


The Mobile EnvironmentThe Mobile EnvironmentMaximize performance & features within given Maximize performance & features within given constraintsconstraints

Power / ThermalPower / ThermalSize Size –– form factorform factorNoiseNoiseEnergy / Battery lifeEnergy / Battery lifeetc. etc.

Mobile platforms offer Tradeoff preferencesMobile platforms offer Tradeoff preferencesUser defined or builtUser defined or built--in schemein scheme

Compromise performance for longer battery life, lower acoustic noise, cool box etc.



Average powerAverage powerThermal Design PowerThermal Design Power

Intel Pentium M power management Intel Pentium M power management The experimentThe experimentTest resultsTest resultsConclusionsConclusions


Die Temperature measurementsDie Temperature measurementsTemperature based control mechanismsTemperature based control mechanismsA diode connected to an external A/D A diode connected to an external A/D -- reports temperaturereports temperatureFixed temperature sensorsFixed temperature sensors

Max spec junction temperatureMax spec junction temperatureCritical temperature detectorCritical temperature detector

Source currentSource currentMeasured Measured VVbebe

n: diode ideality factork: Boltzmann constantq: electron charge constantT: diode temperature (Kelvin)VBE: Voltage from base to emitterIc : Collector currentIs : Saturation currentN: Ratio of collector currents

Critical#Critical#

refref

refref

High#High#highhigh

CRCR

A/DA/D


Controlling TDP Controlling TDP -- LinearLinearP states and T statesP states and T states

ClockClock

PowerPower

Temp.Temp.

TriggerTrigger

P>TDP


Controlling TDP Controlling TDP -- LinearLinearSelf or S/W trigger Self or S/W trigger –– Stop clock asserted, Power and temperature Stop clock asserted, Power and temperature dropdrop

ClockClock

STOPCLKSTOPCLK

PowerPower

TriggerTrigger

Temp.Temp.

P>TDP

TACS June 2004 - 10 -

Controlling TDP Controlling TDP -- LinearLinearSTOPCLOCK continues toggling for a pre defined timeSTOPCLOCK continues toggling for a pre defined timeAverage power and temperature drop Average power and temperature drop –– performance dropsperformance drops

ClockClock

STOPCLKSTOPCLK

PowerPower

TriggerTrigger

Temp.Temp.

Thermal significant timeThermal significant timeAverage Average Temperature Temperature

Average Power Average Power ReducedReduced

P>TDP

TACS June 2004 - 11 -


ClockClock

STOPCLKSTOPCLK

PowerPower

TriggerTrigger

Temp.Temp.

Thermal significant timeThermal significant timeAverage Average Temperature Temperature

Average Power Average Power ReducedReduced

P>TDP

Linear dependency (<1:1)Linear dependency (<1:1)Power to PerformancePower to PerformanceEnergy = P*t Energy = P*t no gainno gainLeakage impacts energyLeakage impacts energy

Full PowerFull Power

LeakageLeakage

TACS June 2004 - 12 -

Dynamic Voltage Scaling (DVS)Dynamic Voltage Scaling (DVS)One One µ µ ARCH implementation ARCH implementation –– Power and energy controlPower and energy control

ClockClock

VccVcc

PowerPower

SwitchSwitchThermal orThermal orUtilization Utilization

TACS June 2004 - 13 -

Dynamic Voltage Scaling (DVS)Dynamic Voltage Scaling (DVS)PLL relock at lower frequency at same VccPLL relock at lower frequency at same VccFast change Fast change –– no user experience impactno user experience impact

ClockClock

VccVcc

PowerPower

Short timeShort timeO.K with S/WO.K with S/W

TACS June 2004 - 14 -

Dynamic Voltage Scaling (DVS)Dynamic Voltage Scaling (DVS)Vcc drops gradually while CPU activeVcc drops gradually while CPU activePower savings changes from linear to FPower savings changes from linear to F33

ClockClock

VccVcc

PowerPower CPU power drops byCPU power drops byP=C*VP=C*V22*F *F function of Ffunction of F33

Performance drops byPerformance drops byFunction of F (Frequency)Function of F (Frequency)

Power savings > time increasePower savings > time increaseEnergy net savingsEnergy net savings

TACS June 2004 - 15 -

Dynamic Voltage Scaling (DVS)Dynamic Voltage Scaling (DVS)Vcc is ramped up increasing powerVcc is ramped up increasing powerOnce stable Once stable –– PLL relock at high frequencyPLL relock at high frequency

ClockClock

VccVcc

PowerPower

Switch Switch BackBack

TACS June 2004 - 16 -

Adaptive Energy ControlAdaptive Energy Control

Applications have wide dynamic power rangeApplications have wide dynamic power rangeRequire high power high performance burstsRequire high power high performance bursts

Determine user experienceDetermine user experienceTrade power performance as neededTrade power performance as needed

Driven by Operating system ACPIDriven by Operating system ACPIAverage power control on the fly Average power control on the fly -- ADAPTIVEADAPTIVE

HighHigh

LowLow

HighHigh

LowLow

TACS June 2004 - 17 -

ACPI ControlACPI ControlOperating system feature Operating system feature –– Industry standardIndustry standard

Supported by MS and LinuxSupported by MS and LinuxPassive and active policies defined for each zonePassive and active policies defined for each zoneUser preference User preference –– Max performance or Max batteryMax performance or Max battery

Switches _PSV and _ACxDVS or clock throttling used for passive power controlDVS or clock throttling used for passive power control

Available Power states published by BIOSDVS and once reached min Vcc - linearImplements PD controller algorithm

Fan on/off and speed used for active coolingFan on/off and speed used for active cooling_TMP = 60

-70--65--60--55--50--45--40--35--30--25-

-95-

-85--90-

-80--75-

_CRT

_PSV

_AC0

_AC1

500

700

900

1100

1300

1500

1700

1900

8:56:59 8:57:42 8:58:25 8:59:08 8:59:51 9:00:3540

50

60

70

80

90

100

Frequency

Temperature

TACS June 2004 - 18 -

TACS June 2004 - 19 -

TACS June 2004 - 20 -



Intel Pentium M power managementIntel Pentium M power managementThe experimentThe experimentTest resultsTest resultsConclusionsConclusions

TACS June 2004 - 21 -

Test SetupTest SetupThermal controlThermal control

CPU temperature is a function of power and ambient temp.CPU temperature is a function of power and ambient temp.Long time to heat the ambient and heat sinkLong time to heat the ambient and heat sink

Case temperature control formed stable environmentCase temperature control formed stable environmentHeating plate and fan to keep temperature at fixed temperatureHeating plate and fan to keep temperature at fixed temperatureForce extreme conditionsForce extreme conditions

Test casesTest casesSPECSPEC--IntInt and SPECand SPEC--FP componentsFP componentsUsed the self trigger mechanismUsed the self trigger mechanism

For repeatable & consistent resultsFor repeatable & consistent resultsCollected power temperatureCollected power temperatureand performanceand performance

Tj

DieHeating Plate

Main Board - Mobile

Tc

Fan

Controller

Testing on real silicon the Testing on real silicon the theoretical expected behaviortheoretical expected behavior

TACS June 2004 - 22 -




TACS June 2004 - 23 -

Lineal vs. DVS controlLineal vs. DVS control

Thermal Throttle impact

Cooling [% of max]

SPEC

2K P

erfo

rman

ce [

% o

f max

]

~3%

94%

95%

96%

97%

98%

99%

100%

55% 60% 65% 70% 75% 80%

Linear

DVS

StartThrottle

Higher temp. Less coolingHigher temp. Less cooling

TACS June 2004 - 24 -



Cooling [% of max]

SPEC

2K P

erfo

rman

ce [

% ]

~3%

94%

95%

96%

97%

98%

99%

100%

55% 60% 65% 70% 75% 80%

Linear

DVSHigher temp. Less coolingHigher temp. Less cooling

TACS June 2004 - 25 -



Cooling [% of max]

SPEC

2K P

erfo

rman

ce [

% ]

~3%

94%

95%

96%

97%

98%

99%

100%

55% 60% 65% 70% 75% 80%

Linear

DVS

~3%

~4%

~5%

~6%

Shallower Slope:Shallower Slope:More cooling at same More cooling at same performance performance

Higher temp. Less coolingHigher temp. Less cooling

TACS June 2004 - 26 -

DVS set pointDVS set pointThrottle impact on performance

50%

60%

70%

80%

90%

100%

Cooling [% of max]

Perf

orm

ance

[%]

50 60 70 80 90 100

600 Mhz800 Mhz1000 Mhz1200 Mhz

Optimal point (performance) is at the highest Optimal point (performance) is at the highest frequency that dose not accede frequency that dose not accede Tj_maxTj_max with no with no transitions up and downtransitions up and down

100% throttleOverheat

TACS June 2004 - 27 -

0

0.2.

0.4

Ave

rage

CPU

Pow

er [

W]

0

50

100

150

200

Mob

ile M

ark

02 [S

core

]

AveragePowerScore

0.6

0.8

1.0

1.2

Average Power managementAverage Power management

112

600 MHzPower saving (Battery)

1600 MHzPerformance (AC)

1.1

216

0.37

Lowest freq.Lowest freq.

66% PowerEfficiency 1:1.4 - Static

48% Performance

TACS June 2004 - 28 -

Average Power managementAverage Power management

0

0.2.

0.4

Ave

rage

CPU

Pow

er [

W]

0

50

100

150

200

Mob

ile M

ark

02 [S

core

]

AveragePowerScore

0.6

0.8

1.0

1.2

112

600 MHzPower saving (Battery)

1600 MHzPerformance (AC)

1.1195

216

0.37

600 – 1600ADAPTIVE

0.63

10% Performance43% Power

48% Performance66% PowerEfficiency 1:1.4 - Static

Efficiency 1:4

TACS June 2004 - 29 -

Energy efficiencyEnergy efficiencyEnergy consumed for the SPECEnergy consumed for the SPEC--IntInt and SPECand SPEC--FPFP

We measured energy as E=We measured energy as E=∫∫ttP(tP(t))

Energy consumed at 1600 MHz defined as 100%Energy consumed at 1600 MHz defined as 100%

0%

10%

20%

30%

40%

50%

60%

70%

80%

90%

100%

Rel

ativ

e En

ergy

eff

icie

ncy

1600 1200 1000 800 600

Frequency [MHz]

Energy efficiencyLowest energy at Lowest energy at lowest frequencylowest frequency

TACS June 2004 - 30 -




TACS June 2004 - 31 -

Summary and ConclusionsSummary and Conclusions

Intel Pentium M Specifically designed for mobileIntel Pentium M Specifically designed for mobileTargeting energy and power efficiencyTargeting energy and power efficiency

Mobile systems trade performance for powerMobile systems trade performance for powerTo meet user preferenceTo meet user preference

Enhanced Intel SpeedStep Technology provides Enhanced Intel SpeedStep Technology provides significantly improved power to performance and significantly improved power to performance and energy control schemeenergy control scheme

Silicon measurement confirm the theoretical workSilicon measurement confirm the theoretical workOptimal point for performance to power is at the highest Optimal point for performance to power is at the highest frequency that dose not accede frequency that dose not accede Tj_maxTj_max

Policy implemented into ACPI algorithmOptimal point for energy and battery life is at the minimum Optimal point for energy and battery life is at the minimum frequency possible with DVSfrequency possible with DVS

TACS June 2004 - 32 -

The authors would like to thank Nachum shamir, IrinaIlatov and Riad Durr for the thermal clamping measurements, to Jessie Garcia, Ali Saeed, Marco Wirasinghe for the evaluation and data collection for this article and to Cohen Aviad and Lev Finkelstein for results verification using simulation.

ThanksThanks

TACS June 2004 - 33 -

Die Temperature measurementsDie Temperature measurementsA diode connected to an external A/D reports temperatureA diode connected to an external A/D reports temperatureFixed temperatureFixed temperature

Source currentSource currentMeasured Measured VVbebe

n: diode ideality factork: Boltzmann constantq: electron charge constantT: diode temperature (Kelvin)VBE: Voltage from base to emitterIc : Collector currentIs : Saturation currentN: Ratio of collector currents

Appling 2 CurrentsAppling 2 Currents

Critical#Critical#

refref

refref

High#High#highhigh

CRCR

A/DA/D

TACS June 2004 - 34 -


ClockClock

STOPCLKSTOPCLK

PowerPower

TriggerTrigger

Temp.Temp.

Thermal significant timeThermal significant time

P>TDP

TACS June 2004 - 35 -

Dynamic Voltage Scaling (DVS)Dynamic Voltage Scaling (DVS)Vcc drops gradually while CPU activeVcc drops gradually while CPU activePower savings changes from linear to FPower savings changes from linear to F33

ClockClock

VccVcc

PowerPower CPU power drops byCPU power drops byP=C*VP=C*V22*F *F function of Ffunction of F33

Performance drops byPerformance drops byFunction of F (Frequency)Function of F (Frequency)

TACS June 2004 - 36 -

The Pentium M Power Control SchemesThe Pentium M Power Control Schemes

Linear power scalingLinear power scalingChange CPU frequency onlyChange CPU frequency only

reduces both power and performance linearly with frequencyreduces both power and performance linearly with frequencySaves power, No energy savingsSaves power, No energy savings

New Dynamic Voltage Scaling (DVS)New Dynamic Voltage Scaling (DVS)Reduces Voltage and frequency on the flyReduces Voltage and frequency on the fly

Frequency is dependent ~ linearly on VoltageFrequency is dependent ~ linearly on VoltagePower is a function of C*F*VPower is a function of C*F*V22

Reduction of both voltage and frequency provides FReduction of both voltage and frequency provides F33

power reduction for linear performance reduction power reduction for linear performance reduction Also results with energy savingsAlso results with energy savings

TACS June 2004 - 37 -

ACPI InterfaceACPI Interface

TACS June 2004 - 38 -

The Pentium M Power Control SchemesThe Pentium M Power Control Schemes

Linear power scalingLinear power scalingChange CPU frequency onlyChange CPU frequency only

reduces both power and performance linearly with frequencyreduces both power and performance linearly with frequency

New Dynamic Voltage Scaling (DVS)New Dynamic Voltage Scaling (DVS)Reduces Voltage and frequency on the flyReduces Voltage and frequency on the flyReduction of both voltage and frequency provides FReduction of both voltage and frequency provides F33

power reduction for linear performance reduction power reduction for linear performance reduction

See detailsSee details……

Documents

Intel Speedstep Technology of the Pentium M Processorskadron/tacs/rotem_slides.pdf · Intel® Speedstep® Technology of the Pentium® M Processor Efi Rotem, Avi Mendelson, Alon Naveh,