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Intel Restricted Secret11
RS – Intel 2009 DesktopPlatform Overview
Sept 2007
Intel Restricted Secret22
Legal Notice
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.Intel may make changes to specifications and product descriptions at any time, without notice. This document contains information on products in the design phase of development. The information here is subject to change without notice. Do not finalize a design with this information.Product plans, dates, and specifications are preliminary and subject to change without notices.Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined.“ Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.The Bloomfield, Lynnfield & Havendale processors and/or Ibexpeak chipset may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.Intel and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.*Other names and brands may be claimed as the property of others.Copyright © 2007, Intel Corporation
Intel Restricted Secret33
Balanced Intelligence
Graphics& Video
Perf.
Smaller Form
Factors
Lower Power
Processor & Memory
Perf.
Optimized Board
Layouts
Lead in the next generation of integration
Manageability
Security
HavendaleLynnfieldHavendaleLynnfield
IbexpeakIbexpeak
Intel Restricted Secret44
Agenda
Nehalem Family Processor OverviewIbexpeak Overview2009 Roadmap TransitionsPlatform Architecture & DesignEngagement ScheduleQ & A
Intel Restricted Secret55
NehalemThe Next Brand New Microarchitecture
20
07
-20
08
20
09
-20
10
45nm
32nm
Shrink/DerivativeWestmere
New MicroarchitectureSandy Bridge
65nm
20
05
-20
06
Shrink/DerivativePresler · Yonah · Dempsey
New MicroarchitectureIntel® Core™ Microarchitecture
Shrink/Derivative Penryn Family
New MicroarchitectureNehalem
Intel’s Silicon Cadence
• A coordinated and accelerated pace of architecture innovation
• Based on industry-leading silicon expertise & architectural design capabilities (parallel teams)
• Providing energy-efficient architectures at a pace to fuel industry-wide innovation and growth
See “Intel Architecture and Silicon Cadence”. Whitepaperhttp://download.intel.com/technology/eep/cadence-paper.pdf
“Tick Tock” (Shrink) (Innovate)
Intel Restricted Secret66
What’s The Nehalem Family?
• Next generation processor microarchitecture based on Intel® Core™ Microarchitecture with extensive enhancements
• 4 core scaleable design with performance & power efficiency improved over Intel® Core™ Microarchitecture
• New interconnects replaces Front Side Bus (FSB)• Integrated memory controller (IMC)• Integrated GPU• High end desktop launch targeted for Q4 ’08• Mainstream desktop launch targeted for 1H ‘09
Computational and Visual integration
Intel Restricted Secret77
Architecture Improvements
Baseline Yorkfield / Wolfdale
Improved Performance
Improved Performance• 1.2x-2x multi-threaded arch improvement
• 1.1x-1.25x relative to Wolfdale on Single Threaded apps
• Integrated Memory Controller
• Simultaneous Multi-Threading (SMT) for 2 threads per core capability
• 4 core for Extreme and Performance segments
Key focus is Performance & Power Efficiency
Improved Power
Efficiency
Improved Power Efficiency• Improved low power states
• Advanced technology for leakage reduction
• Tuned architecture for power efficiency
• 30% lower power at same performance of Wolfdale or higher performance at same power
Intel Restricted Secret88
Desktop Platform Partitioning
3-chip: Processor + Chipset4 Core ProcessorIntegrated Memory ControllerDiscrete Graphics
Memory
Graphics
ICHICH9
IOHTylersburg
Hig
h E
nd
Pla
tfo
rms
Bloomfield
GMCH=Integrated Graphics Memory Controller Hub, ICH=I/O Controller Hub, PCH=Platform Controller Hub, GPU=Graphics Processor Unit
New 2 Chip: Discrete GPU New 2 Chip: CPU/GPU OR Discrete GPU
Graphics
Ibexpeak Ibexpeak
HavendaleGraphics Memory
LynnfieldMemory
Benefits of 2 Chip Solution:• Power Delivery Simplified • No FSB Routing• Smaller Mother Board Options
One Common Processor Socket & PlatformPrior 3 Chip Direction
3-chip: Processor + Chipset4 core or 2 coreIntegrated or Discrete Graphics
MemoryGraphics
ICH
GMCH
Int GFX
Mai
nst
ream
Pla
tfo
rms Processor
Intel Restricted Secret99
Tylersburg HEDT Platform
Desktop Platform Transitions
Extreme & High-end Platform
Bloomfield CPUTylersburg HEDT Chipset (IOH / ICH9)
Yorkfield CPU X38 (Bearlake-X) Chipset
Core Microarchitecture Nehalem Microarchitecture
2008 2009
1H 2H 1H 2H
CNR = Conroe
WLF = Wolfdale
LGA 1366 Socket
Two different desktop Nehalem based platforms
Digital Home: Kingscreek
Digital Office: Piketon
MainstreamPlatforms
Wolfdale CPUEaglelake Chipset
Lynnfield & Havendale CPUsIbexpeak PCH
CNR / WLF CPUIntel® 3 Series Chipset
LGA 1160 Socket
Intel Restricted Secret1010
Nehalem Desktop Processor Comparison
Feature Bloomfield Lynnfield HavendaleProcessing Threads[via Simultaneous Multi-Threading capability (SMT)] 8 Up to 8 Up to 4
CPU Cores 4 4 2
Shared Cache 8MB 8MB 4MB
Integrated Memory Controller Channels 3 ch. DDR3 2 ch. DDR3
Discrete Graphics Support (PCIe Gen2) 2x16 or 4x8, 1x4 (via Tylersburg IOH)
1x16 or 2x8 1x16
Integrated GPU No No Yes
Processor Package TDP 130W 95W <95W
Socket LGA 1366 LGA 1160
First Samples / Production Q4 ’07 / Q4 ‘08 2H ’08 / 1H ‘09
Platform Support Tylersburg & ICH9 Ibexpeak
Common Features 7 additional SSE4 instructions, VRD11.1, 45nm process
Nehalem Processor Leadership with Integration
Intel Restricted Secret1111
Lynnfield & Havendale Implementation
Lynnfield Processor(Monolithic Die)
DMI
DDR3
Graphics
DD
R3 I
MC
PC
I-E
Power Thread Thread
Thread Thread
8M
Co
reC
ore
Co
reC
ore
Thread Thread
Thread Thread
Co
reC
ore
Co
reC
ore
Ibexpeak PCH
PCIe, SATA,NVRAM, etc.
Display Analog
Digital
I/O Control Processors
I/O functions
Lynnfield & Havendale can be supported on one platform
Same LGA 1160 Platform
DisplayLink
DMI
DDR3
Graphics
Havendale Processor(Multi-Chip Package - MCP)
MCP Processor
Power
4M
PCI-E
DDR3 IMC
GPU
Thread Thread
Thread Thread
Co
reC
ore
Co
reC
ore
SDVO, HDMIDisplay Port, DVI
Ibexpeak PCH
VGA
PCIe, SATA,NVRAM, etc.
Display Analog
Digital
I/O Control Processors
I/O functions
Intel Restricted Secret1212
Nehalem Turbo Mode Overview
What is Turbo Mode?– Opportunistically and automatically allows the CPU to run faster than the
TDP frequency IF the CPU is operating below specifications Must be below the power, temperature and current specification limits Increases performance of both multi-threaded and single-threaded workloads
Turbo Mode Operation:– Operates under OS control - only entered when OS requests higher
performance Transition from P1 to P0 state in ACPI terminology Can be enabled or disabled by BIOS Ability to enter Turbo Mode is independent of the number of active cores
– Achievable processor turbo frequency is limited by most constraining of: Processor temperature, power, core Icc and core ratio limits Maximum Turbo Mode frequency is dependent on the number of active cores
– Turbo Mode roadmap implementation being worked
Turbo Mode provides performance when you need it
Intel Restricted Secret1313
Core 0
Fre
qu
en
cy
(F)
Core 1 Core 2 Core 3
P1.......
Pn
Pn = P-states where P0 ≥ P1 ≥ Pn ; LFM = Lowest Frequency Mode
TDP
LFM
TDP
LFM
TDP
LFM
TDP
LFMP
ow
er
Workload
Core 0: TDP
Core 1: TDP
Core 2: TDP
Core 3: TDP
TDP envelope = TDP app on all cores
Turbo Mode Operation - Example
1 CPU TDP frequency determined with all cores running TDP application within TDP envelope
* Fspec (SPECfp benchmark) and Ispec (SPECint benchmark)refer to a “typical” single-threaded workload
Core 0: Ispec*
Core 2: Idle
Core 3: Idle
Core 1: Fspec*
Core 0: TDP
Core 2: Idle
Core 3: Idle
Core 1: TDP
Hea
dro
om2
3
2 In a multi-core processor, not all cores active on all workloads
3 At TDP frequency, most applications consume less than TDP power
Turbo Mode converts thermal headroom into higher frequenciesF
req
ue
nc
y
(F)
Core 0 Core 1 Core 2 Core 3
TDPFrequency
“Opportunistic”Frequencies
P0
P1.......
Pn
Bin0
LFM
Bin0
LFM
Pn = P-states where P0 ≥ P1 ≥ Pn ; LFM = Lowest Frequency Mode
+1
+2
+1
+2
+3+3
4
4 Power/thermal headroom converted to additional frequency on active cores (2 core operation shown)
1
Intel Restricted Secret1414
Balanced Graphics Architecture IntelligenceParallel execution, flexibility, scalability and performance
Fixed Functions• CPU utilization• Power consumption• Scalable pipeline
throughput
New Level of Visual Experience
EU
EU EU EU EU
EU EUEU
Fixed Function unitsFixed Function units
Array of Execution Units
EU
EU
additional
EUs
EU
EU
additional FFs
CABAC engine for
Video HW Decode
Execution units• Dynamic load balancing
– Parallel & switching between video/3D
• Performance• Visual enhancements• Programable architecture
Intel Restricted Secret1515
2009 Graphics Processing Unit• Up to 2x graphics performance1 with
improved performance per watt– DX10, OpenGL* 2.1, Native support for HD-DVD and Blu-ray
content for MPEG-2, VC-1 and H.264 AVC, Full bit rate support at 1080i/p resolution, Video Acceleration support
• Enhanced connectivity with multiple digital displays support– Integrated HDMI, DVI, and DisplayPort with HDCP, Display Link
• Next level content protection with key exchange integration
• Next generation User Interface
Meet ever changing Consumer demand
Graphics OptionsGraphics Options
22
1 pre silicon estimate2 Placeholder and subject to change1 pre silicon estimate2 Placeholder and subject to change
Intel Restricted Secret1616
Agenda
Nehalem Family Processor OverviewIbexpeak Overview2009 Roadmap Transitions Platform Architecture & DesignEngagement ScheduleQ & A
Intel Restricted Secret1717
What is the 2009 Intel Platform Controller?
Ibexpeak = The Intelligent Platform
DisplayDisplay
Ibexpeak PCH
Display
Analog
Digital
I/O Control Processors
I/O functions
Platform Management
Platform Management
I/O Capabilities
I/O Capabilities
SecuritySecurity
StorageStorage
Intel Restricted Secret1818
2009 I/O Control Processor
• I/O Control Processor Capabilities
Platform control processing
Display
Analog
Digital
I/O Control Processors
I/O functions
– Manageability Intel® Active Management Technology 6.0
Release
– Virtualization Intel® Virtualization Technology for
directed I/O Virtualization enhancements
– Acoustic management Intel® Quiet System Technology
– Security Danbury
– Local SRAM on die
Intel Restricted Secret1919
2009 Intel Platform Controller OverviewNew Features
Continuing Features
Integrated NAND ControllerIntegrated NAND Controller
2 port FIS-based multiplier(Ports 4&5)
2 port FIS-based multiplier(Ports 4&5)
GCLI on any PCIe port with Integrated MAC
GCLI on any PCIe port with Integrated MAC
Intel® Virtualization Technology for Directed
I/O
Intel® Virtualization Technology for Directed
I/O
Intel® Turbo Memory & Danbury Support
Intel® Turbo Memory & Danbury Support
Intel® Matrix Storage Manager, Intel® Rapid Recover Technology, eSATA Port Disable
Intel® Matrix Storage Manager, Intel® Rapid Recover Technology, eSATA Port Disable
Intel® AMT 6.0 ReleaseIntel® AMT 6.0 Release
Digital & Analog Display Interfaces
Digital & Analog Display Interfaces
Intel® High Definition Audio
Intel® High Definition Audio
2 additional USB ports2 additional USB ports
DMI
PCI
6 Ports 3 Gb/s
SM Bus 2.0
LAN PHY
WLAN
Audio CODEC
Display Link
GPIO
SPI Flash
Dual Independent Display
8 P
CIE
2
.0
x1
(2.
5 G
b/s
)Hardware-based KVMHardware-based KVM
Integrated Clock Chip BufferIntegrated Clock Chip Buffer
14 USB 2.0 ports
LPC I/FTPM 1.2
FWH
Super I/O
Ibexpeak
28x28 FCBGA
Intel® Quiet System Technology
Intel® Quiet System Technology2 additional PCIe 2.0 (2.5Gt/s)
ports2 additional PCIe 2.0 (2.5Gt/s)
ports
**
**
**
Intel Restricted Secret2020
2009 Display Platform
Display Connectivity Leadership
Havendale Processor• Routes display data to PEG or Display
Interface on PCH (via Display Link)
Ibexpeak PCH• Analog and Digital Display Interface• Integrated Audio Codec for HDMI
New Changes• Ports not muxed on PEG
– No PCIe switches required• Supports 2 HDMI streams with HDCP• 2nd VGA thru SDVO • No SDVO add card support• Evaluating lower cost level shifter solutions
DisplayLink
DMI
DDR3
Graphics
Havendale Processor
MCP Processor
Power
4M
PCI-E
DDR3 IMC
GPU
Thread Thread
Thread Thread
Co
reC
ore
Co
reC
ore
SDVO, HDMIDisplay Port, DVI
Ibexpeak PCH
VGA
PCIe, SATA,NVRAM, etc.
Display Analog
Digital
I/O Control Processors
I/O functions
Intel Restricted Secret2121
2009 Storage Enhancements
Benefits:• Performance & Protection with Intel® MST• Additional connectivity with FIS-based Port Multiplier Support• Integrated NAND controller:
– Danbury encryption– Pre-boot capabilities (HW based initialization) – Lower cost SSD (Solid State Disk) functionality
• New task oriented UI
ICH10 Ibexpeak PCH
SATA Ports 6 SATA Ports (AHCI, 3Gb/s) 6 SATA Ports (AHCI, 3Gb/s)
eSATA Support Yes, with Port Disable Yes, with Port Disable
Intel® Matrix Storage Technology
RAID 0,1,5,10, Intel® Rapid Recover Technology, Intel® Matrix RAID
RAID 0,1,5,10, Intel® Rapid Recover Technology, Intel® Matrix RAID
Port Multipliers N/A FIS-based port multiplier on 2 ports (4&5)
Intel® Turbo Memory PCIe based2008 PCIe based orIntegrated NAND Controller with Direct NAND Interface, Fast Flash
Encryption Support with Danbury
SATA SATA, Direct NAND interface
Intelligent next generation Storage
Intel Restricted Secret2222
Agenda
Nehalem Family Processor OverviewIbexpeak Overview2009 Roadmap Transitions Platform Architecture & DesignEngagement ScheduleQ & A
Intel Restricted Secret2323
65W TDP (LGA 775)Intel® G31 Express Chipset
DH & DO Platform Segmentation - Preliminary
Quad Core Nehalem Dual Core Nehalem
LYN
Digital Home
Dual Core Wolfdale
Dis
cret
e G
fx
HVN
WLF
Digital Office
WLF
Ibe
xp
ea
k P
CH
Two different desktop Nehalem based platforms
LYN = Lynnfield, HVN = Havendale, WLF = Wolfdale
HVN
Ibe
xp
ea
k P
CH
LGA 1366Processor TDP = 130W1
Mainstream & Essential
Entry
Performance
XE
Dis
cret
e G
fx
BLM
• Scaleable 95W platform
• Accepts Lynnfield & Havendale processors
For First Visit Customers – Skt B is newFor First Visit Customers – Skt B is new
GP
U GP
U
LGA 1160Processor TDP = 75W1
LGA 1160Processor TDP = 95W1
1: Does not include PCH or Tylersburg power, only processor socket.1: Does not include PCH or Tylersburg power, only processor socket.
Ty
lers
bu
rg
Intel Restricted Secret2424
65W TDP (LGA 775)Intel® G31 Express Chipset
DH & DO Platform Segmentation - Preliminary
Quad Core Nehalem Dual Core Nehalem
LYN
Digital Home
Dual Core Wolfdale
Dis
cret
e G
fxG
PU
HVN
WLF
Mainstream & Essential
Entry
Performance
Ibe
xp
ea
k P
CH
Customers who have already seen skt BCustomers who have already seen skt B
Digital Office
WLF
HVN
Ibe
xp
ea
k P
CH
GP
U
Two different desktop Nehalem based platforms
LYN = Lynnfield, HVN = Havendale, WLF = Wolfdale1: Does not include PCH power, only processor socket.1: Does not include PCH power, only processor socket.
LGA 1160Processor TDP = 75W1
LGA 1160Processor TDP = 95W1
• Scaleable 95W platform
• Accepts Lynnfield & Havendale processors
Intel Restricted Secret2525
Agenda
Nehalem Family Processor OverviewIbexpeak Overview2009 Roadmap Transitions Platform Architecture & DesignEngagement ScheduleQ & A
Intel Restricted Secret2626
Digital port B
Digitalconnectors
Digitalconnectors
DMI DL
VGA
Digital port C
Digital port D
2009 Display Partition
CPU
GPU
DMI
PEG
DL
PEGIMC
DP
DVI / HDMI
sDVO
DP
DVI / HDMI
DP
DVI / HDMI
Ibexpeak PCH
Port 2008 2009
VGA 1 1
HDMI 1 on PEG 2 on Digital Ports
Display Ports 2 on PEG 2 on Digital Ports
DVI 2 on PEG 2 on Digital Ports
SDVO 2 on PEG 1 on Digital Port
External Ports over SDVO
2nd VGA 2nd VGA
Two Digital Streams supported in any combination of DisplayPort, HDMI, and DVI
Enhanced connectivity with 2 digital displays supported
Intel Restricted Secret2727
2009 ME Repartitioning
FLASHFLASH
SW SW
(G)MCH(G)MCHDDR2DDR2
SPIME
BIOS
ICHICH
Sensors
ProcessorProcessor
SW Agents
OS
ME
Filters
MAC GbE
2006-2008 2009
SW SW
DDR3DDR3
FLASHFLASH
SPI MEBIOS
HanksvilleHanksvilleOOB
PCHPCH
Sensors
Processor
(CPU + GPU)
Processor
(CPU + GPU)
SW Agents
OS
Filters
PHY
MACGbE
MESRAM
New Sx/M3 State Replaces Sx/M1• ME operates from internal PCH SRAM• No need to access DRAM in Sx states• Faster transition from Moff to M3
S0/M0 Operation• SRAM is used as cacheS0/M0 Operation• SRAM is used as cache
DDR2DDR2
DDR3DDR3
Nineveh / Boazman
Nineveh / Boazman
OOB PHY
Intel Restricted Secret2828
2009 PCH Direct NAND Interface• Direct NAND Interface enables lower power and lower cost
– No PCIe ASIC required– Supports sell up through Integrated NAND modules– Platform still supports 2008 PCIe NAND add in cards
• The Open NAND Flash Interface (ONFI) Workgroup is standardizing vertical and right-angle entry connectors
– Allows for smaller modules than PCIe cards– Does not consume PCIe port– OEM involvement strongly encouraged: See www.onfi.org for more
details
• NAND down on motherboard configuration also supported– Limits number of slots/connectors on platform
• New features enabled with integrated NAND– Danbury encryption– Lower cost SSD (Solid State Disk) functionality
Direct NAND Interface allows for lower power and cost NVM solution
PCIe NAND add in cardPCIe NAND add in card
NAND
NAND Controller
PCBONFI Connector
Integrated NAND module
Integrated NAND module
NAND
Intel Restricted Secret2929
2009 Platform Clock Architecture
• Motivation & Benefits– Increased I/O ports and Technologies on
2009 platforms require more clocks than current clock chips deliver
– Saves growing clock chip to a larger package or a 2 chip solution
– Potential to save BOM cost/board space
– Improves power management
– The PCH will synthesize the 120MHz Display port clock
PCH
BCLK
DMI (Gen2)
PEG1 (Gen2)
PEG2 (Gen2)
SRC[7:0] (Gen1)
PCI[4:0]
PCI_FDBK
DP
FLEX 0 *
CLKREQ#[9:0]
FLEX 1 *
FLEX 2 *
FLEX 3 *
– Full integration - Intel will continue to evaluate “Full Clock Integration” support
PLL1
PLL2
PLL3
PLL4
CK505
BCLK
SATA/CKSSCD
SRC(Gen2)
DOT96
Ref Clk
14.318 Xtal
Buffered Mode
25MHz Xtal
Full Integration
Intel will work closely with OEMs on 2009 clocking requirements
Two stage approach to PCH platform clock enabling:– Buffered Mode (POR) – A CK505 is required to provide all the base clock frequencies and the
PCH will buffer / fan-out these clocks while providing new clocks required by 2009 platforms
Intel Restricted Secret3030
Quadrants for PCH & Processor Socket
Ibexpeak PCH
LGA 1160 Processor
PCIePCIe
Vtt
VttVtt
VccaxgVcc
DMI
Sideband
DDR3
DLIbexpeak
PCI
SATA
LPC
USB
SP
I/F
lash
VG
APCIe
DMI
RTC
Ho
st
GPIO(Sus)
SMBus
Audio
DL
JTA
G
Mis
c DisplayPort/SDVO/HDMI
GP
IO
(Co
re)
Intel Restricted Secret3131
Example 4L µATX CRB Layout (9.6” x 8.2”)
Changes from 2008:• 2-chip solution• CPU socket move• 2x12 Power Connector Move
from south edge of board to northwest of CPU
• Vcc, Vccaxg, & VTT VR’s wrap around northeast of CPU
• Addition of Direct NAND
Intel Restricted Secret3232
Processor Power Delivery - Preliminary1
Major Power Rails
VccVcc
VttVtt
Vccaxg
12 V
Digital Home
(Universal)
Digital Office
(HVN only)
CRB Phases
Iccaxg Max/TDC 25 / 20 A 20 / 15 A 1
Icc Max/TDC 95 / 80 A 65 / 55 A 3
Itt Max/TDC 35 / 25 A 35 / 25 A 1
1: Early pre-silicon estimates. Please see collateral for latest specifications.1: Early pre-silicon estimates. Please see collateral for latest specifications.
Intel Restricted Secret3333
2009 4L ATX CRBPCB Size (ATX vs. µATX w/8.2” cut)
Standard 12” x 9.6” ATX Board
8.2” cut enabled by 2 chip partition~$0.75 cost savings
Intel investigating features vs. 8.2-8.5“ board size
µATX cut (9.6”) enabled by removal of 3 PCI slots~$1.30 cost savings
Intel Restricted Secret3434
Proposed CRB Back Panel Configuration
VGA AudioUSB x2
USB x2RJ45 USB x2Display
Port
HDMI VGA AudioUSB x2
USB x2RJ45 USB x2Display
Port
HDMI
Back Panel Configuration Under Investigation
• Starting CRB back panel configuration tradeoff studies for µATX
• Are these back panel features still desirable on this 2009 platform?– VGA– Both Display Port and HDMI on same motherboard– 1394
Intel Restricted Secret3535
Comparison of Desktop Mainstream Sockets
Type Overview
LGA 775
Pitch 1.092 x 1.17 mm (43 x46 mils)Pad Size 18mils circularSolder Ball diameter 25millSeating Plane 3.8mm (± 0.1 mm actual) Cavity 14 x 15Package Size 37.5 mm square
LGA 1160
Pitch 0.914 mm (36 mils)Pad Size 14 x 18 oval, 21 mil & 16.9 mils circularSolder Ball Diameter 0.55-0.6mm (15 mil)Seating Plane 3.4± 0.2 mmCavity 24 x 16Package Size 37.5 mm squareIndependent Load Mechanism (ILM)
LGA 1160
LGA 775
Engaged with 3 Suppliers:• Tyco, Molex & Foxconn• Additional Suppliers Post launch
Pin A1
Pin A1
18 mil circular14 x 18 mil oval21 mil circular16.0 mil circular
Intel Restricted Secret3636
Socket 1160 & Integrated Load Mechanism (ILM)
Load plate
Backing Plate
Shoulder Screw
Load Lever
Intel Restricted Secret3737
Socket 1160 / ILM (ILM to MB Assembly)
1. Align back plate to motherboard– Back plate is located in backside fixture– Motherboard slides into backside fixture– Insulator prevents sheet metal contact with board
2. Insert shoulder screw– Note: Pick and Place cover already on LGA 1160
socket– Shoulder screw is installed on one-hole side
3. Align ILM top assembly– Note: Top assembly preassembled at ILM
manufacturer– Insulator under frame prevents sheet metal contact
with board
4. Secure with 2 X 6-32 Torx T-20 head fasteners
– Screw accessible with load plate closed
Intel Restricted Secret3838
LGA 1160 Socket and Heatsink Keep In Zone
DimensionLGA775
LGA1160
LGA1366
Keep In Zone95 mm square
95 mm square
102 mm square
Mounting Holes
72 mm square
75 mm square
80 mm square
Maximum Extrusion Diameter
90 mm ~92 mm 102 mm
Intel Restricted Secret3939
Thermal Solution Enabling
• RCBFH7-1160 – ATX reference solution– Continue with Radial Curved Fin Solution, which Provides VR cooling– Core OD and Extrusion ID common with RCBF3, 4 and 5 – Vendors can mix / match of core, extrusion and fans to meet cost or
acoustic goals– Cost Reduction from past Performance Heatsinks
• BTX solutions will be custom– Engaging with OEMs for details on BTX plans in 2009– MTB pending results of OEM feedback
• PCH Heatsink expecting to reuse existing ICH Heatsink
Digital Home(Universal: LYN + HVN)
Digital Office(HVN only)
TDP 95W 75W1
Heatsink RCFH7-1160 RCFH6-1160
Re-use options2004 Performance
(RCBFH3) w/New ClipWolfdale CR w/New Clip
(RCFH6-775)
1: Early pre-silicon estimates. Please see collateral for latest specifications1: Early pre-silicon estimates. Please see collateral for latest specifications
Intel Restricted Secret4040
Desktop Form Factor GuidanceATX & BTXATX & BTX
µATX & µBTXµATX & µBTX
µATX & µ/n/pBTXµATX & µ/n/pBTX
µATX & µ/n/pBTXµATX & µ/n/pBTX
Tower
Mini-Tower
Entertainment PC
SFF
Others Custom
Platform Year
SegmentForm
Factor
Motherboard Thermal Mechanical
CRB MB File
Physical CRB
Design Guide
Socket Dev
Reference Solution
Test Board
Design Guide
2008
ExtremeATX
BTX No planned support - No demand
PF/MS/ ValueATX
BTX Vendors
Proposed2009
ExtremeATX
BTX No planned support – No demand
PF/MS/ ValueATX
BTX Core Only Vendors
• Intel continues to support both ATX and BTX standard form factors for desktops
• Need to align Intel planned support with your ’09 product/chassis roadmaps.
Intel Restricted Secret4141
Agenda
Nehalem Family Processor OverviewIbexpeak Overview2009 Roadmap TransitionsPlatform Architecture & DesignEngagement ScheduleQ & A
Intel Restricted Secret4242
1H ‘09
2009 Platform Engagement Timeline
LYN & HVN Production
Legend:• Lynnfield = LYN• Havendale = HVN• Ibexpeak = IBX
Rev 1.0 Collateral
Rev 1.5 Collateral
Platform Power On Readiness for Q3 ‘08
Ibexpeak Production
Rev 0.7 Collateral
LYN & HVN QS
IBX Qual Samples
Start planning for Q3 ’08 Platform Power On
LYN & HVN 1st Samples
Ibexpeak 1st Samples
Q3 ‘07 Q4 ‘07 Q1 ‘08 Q2 ‘08 Q3 ‘08 Q4 ‘08
Design In
Visits
Overview Visits
Platform Visits
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Agenda
Nehalem Family Processor OverviewIbexpeak Overview2009 Roadmap TransitionsPlatform Architecture & DesignEngagement ScheduleQ & A
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Q&A
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Backup
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Bloomfield & Tylersburg
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Bloomfield Segmentation vs Mainstream Platform
Extreme Segment
Performance Segment
High end Mainstream Segment
4 & 2 cores; 8, 4 & 2 threadsVarious cache sizes
Planning three Bloomfield line items
High Volume Mainstream Platform
4 cores, 8 threads, 8MB shared cacheIMC, 6.4 GT/sec QPI
Top Bin Frequency130W TDP
LGA 1366
High-end
Desktop
Platform
LGA 1160
Mainstream
Socket
4 cores, 8 threads, 8MB shared cacheIMC, 4.8 GT/sec QPI
Bin -1 Frequency130W TDP
4 cores, 8 threads, 8MB shared cacheIMC, 4.8 GT/sec QPI
Bin -2 Frequency130W TDP
Bin y Frequency≤ 95W TDP
Different socket and platform than Bloomfield
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Memory Support & Configurations
New Integrated Memory Controller Architecture (IMC)• DDR3 scalable platform performance
– 800MHz, 1066MHz, 13331MHz speeds– 512Mb, 1Gb, 2Gb technologies– Improved performance per watt vs.
DDR2
• 3 Memory Channels– 2 DIMMs per channel– Un-buffered DIMM (UDIMM) only
support– 24GB total memory support (using 2Gb
tech)
• Lower latency– Population Rule - Slot 0 must always be
populated in at least one channel
1: Extreme Edition only at launch
Slot 0
Slot 1
Slot 0Slot 1
Slot 0
Slot 1
Increased Platform Performance and Flexibility
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Bloomfield* Performance Estimates
Bloomfield delivers outstanding levels of performance
*: Doesn’t account for any Turbo benefits Source: Intel – Performance projections are pre-silicon. Actual silicon comparisons may vary.
Intel Restricted Secret5050*Other names and brands may be claimed as the property of others
Bloomfield ProcessorBloomfield ProcessorTylersburg I/O Hub (IOH) 36S ChipsetTylersburg I/O Hub (IOH) 36S Chipset
Dual x16 / 4x8 Graphics Dual x16 / 4x8 Graphics + 1x4+ 1x4
PCI Express* 2.0PCI Express* 2.0GraphicsGraphics
eSATA*, USB*, eSATA*, USB*, Rapid Recovery Rapid Recovery
TechnologyTechnology
Monolithic Quad Monolithic Quad Core CPU Core CPU
DDR3 Memory Support Up DDR3 Memory Support Up to 1333MHz with CPU to 1333MHz with CPU Integrated Memory Integrated Memory Controller (IMC)Controller (IMC)
QPI – Low Latency QPI – Low Latency High Bandwidth High Bandwidth
QPI
IntelIntel®® 82567 GbE Networking 82567 GbE Networking
IntelIntel®® Turbo Memory Turbo Memory TechnologyTechnology
Bloomfield
Tylersburg HEDT Platform Ingredients
Enhanced Virtualization (VT-x & VT-d)Enhanced Virtualization (VT-x & VT-d)
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LGA 1366 FMB Details
2005 Perf FMBYorkfield
2008 Perf FMBBloomfield
TDP 130 W
IccMax 125 A 145 A
Icc TDC 115 A 110 A
VR VR11.0 VR11.1
VID step 12.5 mV 6.25 mV
VR TOB +/- 19 mV
H/S 2005 Performance H/S
Minimum changes to 2005 Performance FMB
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Comparison of HEDT SocketsLGA 775
LGA 1366
LGA 1366 is a another LGA socket development effort
Type Overview
LGA 775 (Intel® Core 2 Duo)
Contacts 775Pitch 1.092 x 1.17 mm (43 x46 mils)mm (0.042)Package Size 37.5 mm
LGA 1366(Bloomfield Processors)
Contacts 1366Pitch 1.016mm (40 mils)Package Size 42.5 x 45mmIndependent Load Mechanism (ILM)
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LGA 1366 ILM assembly
These assembly steps occur at board manufacturing site
b) Assemble back plate to bottom of board:
• after wave & test
• ≤2.5mm below board
• light interference fit is ‘captive’ feature
c) Assemble Independent Loading Mechanism (ILM)
• ‘Independent’ from socket (reduces tensile stress on socket solder ball)
d) Fasten ILM to back plate
• captive nuts (8-40 threads)
• ~8 in-lb torque
• ‘Engineered’ materials
a) Surface mount socket
• LGA1366
• Pb-free BGA
• 40mil pitch
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LGA 1366 ILM assembly - continued
e) Open load plate
f) Remove PnP cap g) Insert processor
• 42.5 x 45mm package
h) Close load plate & lever
• lever will not engage load plate if processor is mis-inserted
These assembly steps occur at system assembly site
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Bloomfield & Tylersburg Engagement Timeline
Legend:• Bloomfield = BLM• Tylersburg = TBG
Tylersburg HEDT platforms powering on in Q4 ’07
Q3 ‘07 Q4 ‘07 1H ‘08 2H ‘08
Bloomfield Production
Rev 1.0 Collateral
Rev 1.5 Collateral
Tylersburg Production
BLM Qual Samples
TBG Qual Samples
Bloomfield 1st Samples
Tylersburg 1st Samples
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Backup
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Desktop Platform Segmentation - Preliminary
High End / Workstation
LGA 1366 Platform
High End / Workstation
LGA 1366 Platform
Mainstream & EssentialMainstream & Essential
EntryEntry
1 1 • LGA 1366 platform in Extreme and High End
• Scale up to workstation
• Limited scalability to volume Mainstream
Mainstream LGA 1160 Platform
Mainstream LGA 1160 Platform
2
2 • LGA 1160 platform in volume mainstream
• Limited scalability to volume Entry
XE & High End
XE & High End
Entry LGA 775 Platform
Entry LGA 775 Platform
33 • LGA 775 (Gen N-1)
platform in volume Entry
• Limited scalability to volume Mainstream
Different platforms for different performance offerings
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Bloomfield: Extreme Desktop Processor(Nehalem Family)
Tylersburg HEDT Chipset
QPI
Bloomfield Processor
Performance/Features:
• 8 processing threads via Simultaneous Multi-Threading capability (SMT)
• 4 cores
• 8M on-chip Shared Cache
• Intel® QuickPath interconnect (QPI) to Tylersburg chipset
• Integrated Memory Controller (IMC) – 3ch DDR3
• Discrete graphics support – 2x16 or 4x8
• Adding 7 more SSE4 instructions
Power:
• 130W TDP
• VRD 11.1
Schedule:
• 2H ’07 First Samples
• 2H ’08 Production
Process Technology:
• 45nm CPU
Socket:
• New 1366 LGA Socket
Platform Compatibility:
• Tylersburg HEDT (TBG)
• ICH9
Intel’s highest performing desktop platform
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Lynnfield: Performance Desktop Processor(Nehalem Family)
Intel’s New Performance Microarchitecture for 2009
DMI
Lynnfield Processor
Performance/Features:
• Up to 8 processing threads via Simultaneous Multi-Threading capability (SMT)
• 4 cores
• 8M on-chip Shared Cache
• DMI interconnect to Platform Controller Hub (PCH)
• Integrated Memory Controller (IMC) – 2ch DDR3
• Discrete graphics support – 1x16 or 2x8
• Adding 7 more SSE4 instructions
Power:
• 95W TDP
• VRD 11.1
Schedule:
• 2H ’08 First Samples
• 1H ’09 Production
Process Technology:
• 45nm CPU
Socket:
• New 1160 LGA Socket
Platform Compatibility:
• Ibexpeak Platform Controller Hub (PCH)Ibexpeak PCH
DD
R3 I
MC
PC
I-E
Power Thread Thread
Thread Thread
8M
Co
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ore
Co
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Thread Thread
Thread Thread
Co
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GPU = Graphics Processing Unit, MCP = Multi-Chip Package
Havendale: Mainstream Desktop Processor(Nehalem Family)
Intel’s New Mainstream Microarchitecture for 2009
Ibexpeak PCH
Havendale Processor
DMI
Performance/Features:
• Up to 4 processing threads via Simultaneous Multi-Threading capability (SMT)
• 2 cores
• 4M on-chip Shared Cache
• DMI interconnect to Platform Controller Hub (PCH)
• Integrated Memory Controller (IMC) – 2ch DDR3
• Integrated GPU & Discrete graphics support – 1x16
• Adding 7 more SSE4 instructions
Power:
• <95W TDP
• VRD 11.1
Schedule:
• 2H ’08 First Samples
• 1H ’09 Production
Process Technology:
• 45nm CPU
Socket:
• New 1160 LGA Socket
Platform Compatibility:
• Ibexpeak Platform Controller Hub (PCH)
MCP Processor
Power
4M
PCI-E
DDR3 IMC
GPU
Thread Thread
Thread Thread
Co
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ore
Co
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Bloomfield Architecture ChangesCapability Description Benefit
Intel® QuickPath interconnect (QPI)
• FSB replacement for CPU to chipset interface
• Significantly higher bandwidth for improved performance
Integrated Memory Controller (IMC)
• Provides direct memory access without the need for an MCH
• Supports 3 channels of DDR3
• Lower latency & higher BW improves performance for optimized high-end applications
• Reduces CPU-memory bottleneck on high-end memory intensive applications
Simultaneous Multi-Threading (SMT)
• Multi-threading capability at the core level (up to 8 threads per socket)
• Improves multi-threaded applications and multi-tasking usage performance
Increased Shared Cache
• Up to 8M shared cache• Faster data access, resulting in higher
system throughput and shorter system latency
New Instructions • Nehalem supported new instructions
• Helps multimedia, gaming, graphics and high performance computing
• Enhance text-processing and string search capabilities
Improved Power Efficiency
• Improved low power states
• Low leakage transistors• Tuned architecture for power efficiency
Providing new levels of processor capability
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New and Improved Common User Interface
Goals• Simplify end user experience• Better utilization of product capabilities• Enable OEMs with greater customization
Enhance the look and feel, consistency, simplicity, EoU, flexibility
Features• Aero look and feel• Integrated Storage and Graphics User Interface• New wizards and greater Graphics and Storage feature/usage
visibility Configurable D3D and OGL driver settings Integrated display and media calibration wizards
Greater configurability, flexibility and customizationenabling better user experience
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Ibexpeak USB Enhancements14 USB 2.0 Ports
8 ports on EHCI#1, 6 ports on EHCI #2
Integrated USB 2.0 Rate Matching Hubs (RMH) Replaces 7 UHCI Controllers: All Ports support HS/FS/LS Allows for more advanced USB power savings Supports faster resume times eliminating 7 UHCI PCI Devices UHCI Implementation still available
USB 2.0 Rate Matching Hub
EHCI #1
Port 5Port 4Port 3Port 2Port 1Port 0
EHCI #2
Port 7Port 6
USB 2.0 Rate Matching Hub
Port 11Port 10Port 9 Port 13Port 12Port 8
UHCIUHCIUHCI
EHCI #1
Port 5Port 4Port 3Port 2Port 1Port 0
EHCI #2
Port 7Port 6 Port 11Port 10Port 9 Port 13Port 12Port 8
UHCIUHCIUHCIUHCI
Ibexpeak Implementation
Legacy ICHn Implementation
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Intel® SSE4
Intel Streaming SIMD Extensions 4– New set of SIMD (Single Instruction, Multiple Data) instructions– Most significant improvement to Intel® 64 ISA since 2001
54 new instructions
• Vectorizing compiler and media accelerators– Great for media editors, video encoders, 3D applications, games
• Efficient accelerated string and text processing– Great for databases, data mining, search and pattern matching
• Application targeted accelerators– Great for data transfer protocols, pattern recognition
Intel SSE4 will improve performance and energy efficiency for a broad range of applications
47 new instructions on Penryn
7 new instructions on Nehalem
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Intel® SSE4 Usage Model Benefits• Significant performance improvements in High Definition
video encoding, decoding and editing
• Potential Applications: DivX*, Adobe* Premiere*, Sony Vegas*, Windows* Media Encoder, iTunes*, etc.
• Experience new levels of gaming with improved 3D rendering and increased performance in physics modeling for ultra-realistic gaming
• Potential Game Titles: Ongoing enabling activities
• Edit and process digital photos with new levels of efficiency• Fast access to integrated graphics memory improving
graphics performance and streaming digital content
• Potential Applications: video capture apps, Adobe Photoshop*, etc..
ISSE4 expected to deliver amazing performance improvements on multi-media type applications
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Intel® QuickPath Interconnect
• Intel® QuickPath interconnect (QPI) is a serial, high-speed differential point-to-point interconnect – Offers significant bandwidth increase and similar latency to FSB– Narrow link maintains cost competitiveness– Replaces FSB (not backwards compatible with FSB hardware)– Transparent to software/OS (existing software will work seamlessly)– Protocol tuned for variations in types of streams (threading, ISOC, LT/VT)
and out of order requests
– Systems will use PCI-Express as the standard I/O interface
DeviceA
DeviceB
Link (2 Bytes, up to 6.4 GT/s)
Link (2 Bytes, up to 6.4 GT/s)
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LGA 1366 Heat Sink Details
• Reuse of 2005 Performance Heat Sink Designs with new mechanical attach
• Intel enabling a clip to accommodate the 80mm square attach pattern
• The Keep Out Zone (KOZ) can accommodate up to 102mm diameter solution
– Extra space could be used to reduce Acoustics
– See Bloomfield TMDG for dimensioned KOZ drawings
Attach Points for Thermal Solution
Attach Points for Independent Load Mechanism (ILM)
Expanded Heatsink keep in zone
LGA 775 Heatsink keep in zone
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Intel® ICH9 Overview OTHER KEY FEATURES:OTHER KEY FEATURES:
• IntelIntel®® High Definition Audio High Definition Audio
• SMBus 2.0/SMLINKSMBus 2.0/SMLINK
• Up to 4 PCI 2.3 Masters Up to 4 PCI 2.3 Masters
• Flexible GPIO UsageFlexible GPIO Usage
• Power ManagementPower Management
VT-d Virtualized I/O SupportVT-d Virtualized I/O Support
12 USB2.0 Ports With individual port disable functionality
12 USB2.0 Ports With individual port disable functionality
SATA 3Gb/s (up to 6 ports)Support eSATACommand Based Port Multiplier Support
SATA 3Gb/s (up to 6 ports)Support eSATACommand Based Port Multiplier Support
Intel® AMT 3.0Intel® AMT 3.0
Serial Peripheral Interface (SPI)For BIOS and AMT firmware storage
Serial Peripheral Interface (SPI)For BIOS and AMT firmware storage
Integrated 1000/100/10 MACOptimized GbE & WLAN Interfaces
Integrated 1000/100/10 MACOptimized GbE & WLAN Interfaces
PECI and SST supportSupports Intel® Quiet System Technology
PECI and SST supportSupports Intel® Quiet System Technology
Intel® Matrix StorageRAID 0/1/5/10 & Rapid Recover Technology
Intel® Matrix StorageRAID 0/1/5/10 & Rapid Recover Technology
6 PCI Express* x1 Ports6 PCI Express* x1 Ports
PCIe x1 (6 Lanes)
SPI Flash
TPM1.2
Intel®
LPC
FWH
SPI
LCI
GbE PHY
ICH9
Super IO
31 mm sqPBGA
676 pins
Controller Link
Tylersburg
IOH
DMI x4AC Coupled
GLCI
WLAN
PCIe x1
CODEC
HD Audio
Controller Link
NEW
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Intel® 82567 (Boazman) Gigabit Network Connection• Performance Features
– Virtual Appliance Support Virtualization Intel® AMT with System Defense Heuristics
– Receive Side Scaling (RSS), Dual Tx and Rx Queues– Jumbo Frame Support (up to 9Kbyte)– IPv4 & IPv6 offloads, Large Send Offload (LSO)
• Lower Power– Energy Star ready– Target <650mW TDP– GbE LAN disable pin
• Reduced BOM & Greater Design flexibil+ity
– 8x8mm QFN Package, 0.85mm z-height (typical)– Single 3.3V Rail
Integrated 1.0V LVRi/d & 1.8V LVRd– Common LAN/BIOS Flash– Intel® SingleDriver™ Technology
Red = new with Intel® ICH9 + Intel® 82567
Intel®
ICH9
10/100/100010/100/1000MACMAC
Intel® 82567
LCI
GLC
I
From 2007:>45% Reduction in TDP
>35% Reduction in Package Area
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Tylersburg HEDT PCI Express* 2.0- Port Configurations
Tylersburg HEDT IOH
• Tylersburg has support for 2x16 & 1x4 PCI Express* Gen2 ports
• Each x16 PCI Express* port can be bifurcated into 2x8
• Possible configurations include:– 1x16
– 2x16
– 1x16 and 2x8
– 4x8 (Intel working to enable Gfx sol’n)
• Bifurcation controlled via straps– Can be strapped to “Wait on BIOS” where
bifurcation is controlled via BIOS
Provides flexibility for multi-graphics configurations
x16
x8 x8
x16
x8 x8
PCI Express Gen2
x4
Port #1 Port #0Port #2
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Bloomfield / Tylersburg Customer Reference Board (CRB) Overview
ICH
IOH
DIMMS
PCIe 2x16
2x1, 1x4
CPU
Key Features
Full Size 6L ATX PCB CK505 Rev 1.0 clock solution Legacy Free / Discrete solution Passive Backside Assembly
QPI 4.8/6.4 GT/s iMC supporting 3 CH DDR3
Dual PEG Gen2 x16 slots Discrete TPM V1.2
External SATA (Backup & Restore) 12 USB ports Intel® 82567 LAN PHY
Intel® ICH9
Tylersburg
Platform
Bloomfield
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Power, Performance, Cost Differences
• Direct NAND Interface has lowest power, highest performance, and lowest cost
– Supports sell up through modules but requires new connector
• PCIe provides sell up through add in board without new connector cost
Direct NAND Interface
PCIe-attached
Power: Idle 0 mW ~ 40 mW
Power: Active (bus transfer) ~ 100 mW ~ 300 mW
Performance: Latency – exit from idle
0 µs 20 µs
Performance: Bandwidth*(Dependent on faster Flash availability)
Not limited <= 180 MB/s(PCIe Gen1)
Cost: ASIC $0 > $1
Cost: Connector~ $0.15 (DT)~ $0.60 (MB)
~ $0.06 (DT)~ $0.50 (MB)
Signals 27 Signals 4 Signals
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DDR3 Memory Technology Benefits
• Performance and Scalability– JEDEC full specs for DDR3 memory to 1333MHz vs. DDR2 at 800MHz– Expect DDR3 technology to scale to 2133MHz– Maximum over-clocking performance: [email protected] GT/s, DDR3@2GT/s+
• Lower Power Architecture– DDR3-800 offers >25% power savings vs. DDR2-800– DDR3-1333 approximately equal to DDR2-800 power consumption – DDR3-800 & DDR3-1066 consume less power than DDR2-800
• Supply Assurance– Expect majority of suppliers production aligned with Intel’s Q3’07 HEDT
introduction– Expect premiums to decline as DDR3 volumes increase in 2007 & beyond
Intel Chipsets Leverage DDR3 Advantages in 2007 and Beyond
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• More energy efficient architecture– DDR3-800 >25% lower TDP power vs.
DDR2-800– Fewer thermal throttling conditions– Added platform margin for Energy Star
• Increased Performance– ~10% perf gain (SPECrateFP) DDR3-1333
vs. DDR2-800– Expect more gains from overclocking– Additional scaling via increase in memory
ranks and increased CPU performance
(performance estimates from simulation)
DDR3 Energy Efficient Performance(DIMMs)
DDR3 enables higher performance with lower power architecture
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DDR3 Industry Status
– Suppliers begin DDR3 ramp in ’07 – ramp accelerates in ‘08
iSuppli: Jan '07 Forecast - Premium and Build Plans
DDR3-800 Premium <10% as 2008 Platform Ramps
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OOB Management Using Remote KVM
Main OS is up
OS is Unhealthy
BIOS
Multi-partition
Secure Remote control from Console
Managed system
TLS / KerberosTLS / Kerberos
Problem: Software KVM solutions only work when OS is healthy
Solution: Hardware KVM works seamlessly across system states giving IT uninterrupted control of the system
Hardware Based KVM Delivers Support In All System States
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Comparison between SW and HW KVM
Use Case
Existing Software Remote Control
Solutions 1
HW based KVM(802.1x & CIRA, VPN
when OS up)
OS installation/repair (multiple reboots)No visibility during
reboots Yes
OS running, CPU % high May not work Yes
EU cannot login to the system (corrupt profile) No Yes
OS hang / blue screen visibility No Yes
Unstable OS – requires use of safe mode Limited Yes
BIOS setup No Yes
Common Console for AMT & Remote control; common authentication
No Yes
Notes:1) SW solutions like PC Anywhere, GotoMYPC, LANDesk Remote Control, etc
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Mobile on Desktop(Using mobile components in a desktop system)
Clarkfield Processor(Monolithic Die)
DMI
DDR3
Graphics
PC
I-E
DD
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MC
Power Thread Thread
Thread Thread
8M
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Thread Thread
Thread Thread
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Ibexpeak PCH
DisplayLink
DMI
DDR3
Graphics
Auburndale Processor(Multi-Chip Package - MCP)
MCP Processor
Power
4M
PCI-E
DDR3 IMC
GPU
Thread Thread
Thread Thread
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Ibexpeak PCH
Intel’s New Mobile Microarchitecture for 2009
Same Socket
Schedule:
• 2H ’08 First Samples
• 1H ’09 Production
Socket:
• New rPGA Socket
Intel Restricted Secret7979
Extreme Edition55W CPU+MC, PEG
4C Penryn, Unlocked 45W, Mobile Socket
2C Penryn, Unlocked 45W + 10W MCH 4C Clarksfield, Unlocked 55W
High-end MS 45W CPU+MC, PEG
2C Penryn 35W + 10W MCH 4C Clarksfield 45W
Mainstream45W CPU+GPU
2C Penryn 35W + 12W GMCH 2C Auburndale 45W
Mobile CPU Roadmap
2008 2009
1H ‘08 2H ‘08 1H ‘09 2H ‘09