101
Short Course On Phase-Locked Loops and Their Applications Day 1, AM Lecture Integer-N Frequency Synthesizers Michael Perrott August 11, 2008 Copyright © 2008 by Michael H. Perrott All rights reserved.

Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

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Page 1: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

Short Course On Phase-Locked Loops and Their Applications

Day 1, AM Lecture

Integer-N Frequency Synthesizers

Michael PerrottAugust 11, 2008

Copyright © 2008 by Michael H. PerrottAll rights reserved.

Page 2: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

2M.H. Perrott

What is a Phase-Locked Loop (PLL)?

e(t) v(t) out(t)ref(t) Analog

Loop FilterPhase

Detect

VCO

ref(t)

out(t)

e(t) v(t)

ref(t)

out(t)

e(t) v(t)

de BellescizeOnde Electr, 1932

VCO efficiently provides oscillating waveform with variable frequencyPLL synchronizes VCO frequency to input reference frequency through feedback- Key block is phase detector

Realized as digital gates that create pulsed signals

Page 3: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

3M.H. Perrott

Integer-N Frequency Synthesizers

Use digital counter structure to divide VCO frequency- Constraint: must divide by integer values

Use PLL to synchronize reference and divider output

e(t) v(t) out(t)ref(t) Analog

Loop FilterPhase

Detect

VCO

ref(t)

div(t)

e(t) v(t)

Divider

N

Fout = N Fref

div(t) Sepe and JohnstonUS Patent (1968)

Output frequency is digitally controlled

Page 4: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

4M.H. Perrott

Integer-N Frequency Synthesizers in Wireless Systems

Design Issues: low noise, fast settling time, low power

Zin

Zo LNA To Filter

From Antennaand Bandpass

Filter

PC boardtrace

PackageInterface

LO signal

MixerRF in IF out

FrequencySynthesizer

ReferenceFrequency

VCO

PFD ChargePump

out(t)e(t) v(t)

N

LoopFilter

DividerVCO

ref(t)

div(t)

v(t) out(t)ref(t)

Page 5: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

5M.H. Perrott

Outline of Integer-N Frequency Synthesizer Talk

PFDout(t)e(t) v(t)

N

LoopFilter

DividerVCO

ref(t)

div(t)

Fout = N FrefFref

Overview of PLL BlocksSystem Level Modeling- Transfer function analysis- Nonlinear behavior- Type I versus Type II systems

Noise Analysis

Page 6: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

6M.H. Perrott

Popular VCO Structures

Vout

VinC RpL-Ramp

VCO Amp

Vout

Vin

LC oscillator

Ring oscillator

-1

LC Oscillator: low phase noise, large areaRing Oscillator: easy to integrate, higher phase noise

Page 7: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

7M.H. Perrott

Model for Voltage to Frequency Mapping of VCO

Vout

VinC RpL-Ramp

VCO Amp

Vout

Vin

LC oscillator

Ring oscillator

-1VCO

Frequency

Input Voltage

slope=Kv

Vbias

vin

Fvco

Fout

v

fc

Page 8: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

8M.H. Perrott

Time-domain frequency relationship (from previous slide)

Time-domain phase relationship

Model for Voltage to Phase Mapping of VCO

1/Fvco= α

1/Fvco= α+ε

out(t)

out(t)

Intuition of integral relationship between frequency and phase:

Page 9: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

9M.H. Perrott

Frequency-Domain Model for VCO

Time-domain relationship (from previous slide)

Corresponding frequency-domain model

Laplace-Domain

out(t)

VCO

v(t) Φout(t)v(t) 2πKvs

VCO

Φout(t)v(t) Kvjf

VCO

Frequency-Domain

Page 10: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

10M.H. Perrott

Divider

Implementation

Time-domain model- Frequency:

- Phase:

out div(t)

div(t)

out(t)

N

out(t)

count value

N = 6

Counter

Page 11: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

11M.H. Perrott

Frequency-Domain Model of Divider

Time-domain relationship between VCO phase and divider output phase (from previous slide)

Corresponding frequency-domain model (same as Laplace-domain)

out(t) Φout(t)

NDivider

div(t) Φdiv(t)1

Divider

Page 12: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

12M.H. Perrott

Phase Detector (PD)

XOR structure- Average value of error pulses corresponds to phase error- Loop filter extracts the average value and feeds to VCO

ref(t)

div(t)

e(t)

ref(t)

div(t)

e(t)1

-1

Page 13: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

13M.H. Perrott

Modeling of XOR Phase Detector

Average value of pulses is extracted by loop filter- Look at detector output over one cycle:

Equation:

T/2

W

1

-1e(t)

Page 14: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

14M.H. Perrott

Relate Pulse Width to Phase Error

Two cases:

1

-1e(t)

ref(t)

div(t)

W

1

-1e(t)

ref(t)

div(t)

W

W =Φref − Φdiv

π T/2

T/2 T/2

W = - Φref − Φdiv

π T/2

0 < Φref − Φdiv < π−π < Φref − Φdiv < 0

Page 15: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

15M.H. Perrott

Overall XOR Phase Detector Characteristic

Φref - Φdivππ/2−π/2−π 0

avg{e(t)}

1

-1

phase detectorrange = π

gain = 2/πgain = -2/π

1

-1e(t)

ref(t)

div(t)

W

1

-1e(t)

ref(t)

div(t)

W

W =Φref − Φdiv

π T/2

T/2 T/2

W = - Φref − Φdiv

π T/2

0 < Φref − Φdiv < π−π < Φref − Φdiv < 0

Page 16: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

16M.H. Perrott

Frequency-Domain Model of XOR Phase Detector

Assume phase difference confined within 0 to π radians- Phase detector characteristic looks like a constant gain

element

Corresponding frequency-domain model

Φref - Φdivππ/2−π/2−π 0

avg{e(t)}

1

-1

gain = 2/πgain = -2/π

ref(t)PD

e(t)

PD gaindiv(t)

Φref(t)

Φdiv(t)

e(t)

Page 17: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

17M.H. Perrott

Loop Filter

Consists of a lowpass filter to extract average of phase detector error pulsesFrequency-domain model

First order example

C1

R1e(t) v(t)

Laplace-Domain

e(t) e(t)

VCO

e(t)

VCO

Frequency-Domain

v(t)v(t)H(s)

H(s)H(f)Loop

Filter

v(t)

Page 18: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

18M.H. Perrott

Overall Linearized PLL Frequency-Domain Model

Combine models of individual components

N

Φref(t) Φout(t)

Φdiv(t)

e(t) v(t)H(s) 2πKv

s2π

1

Loop FilterXOR PD

VCO

Divider

N

Φref(t) Φout(t)

Φdiv(t)

e(t) v(t)H(f) Kv

jf2π

1

Laplace-Domain Model

Frequency-Domain Model

Loop FilterXOR PD

VCO

Divider

Page 19: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

19M.H. Perrott

Open Loop versus Closed Loop Response

Frequency-domain model

Define A(f) as open loop responseN

Φref(t) Φout(t)

Φdiv(t)

e(t) v(t)H(f) Kv

jf2π

1

Loop FilterXOR PD

VCO

Divider

Define G(f) as a parameterizing closed loop function- More details later in this lecture

Page 20: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

20M.H. Perrott

Classical PLL Transfer Function Design Approach

1. Choose an appropriate topology for H(f)Usually chosen from a small set of possibilities

2. Choose pole/zero values for H(f) as appropriate for the required filtering of the phase detector output

Constraint: set pole/zero locations higher than desired PLL bandwidth to allow stable dynamics to be possible

3. Adjust the open-loop gain to achieve the required bandwidth while maintaining stability

Plot gain and phase bode plots of A(f)Use phase (or gain) margin criterion to infer stability

Page 21: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

21M.H. Perrott

Example: First Order Loop Filter

Overall PLL block diagram

Loop filter

N

Φref(t) Φout(t)

Φdiv(t)

e(t) v(t)H(f) Kv

jf2π

1

Loop FilterXOR PD

VCO

Divider

C1

R1e(t) v(t)

Page 22: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

22M.H. Perrott

Closed Loop Poles Versus Open Loop Gain

Higher open loop gain leads to an increase in Q of closed loop poles

-90o

-180o

-120o

-150o

20log|A(f)|

f

angle(A(f))

Open loopgain

increased

0 dB

PM = 33o for C

PM = 45o for B

PM = 59o for A

A

A

A

B

B

B

C

C

C

Evaluation ofPhase Margin

Closed Loop PoleLocations of G(f)

Dominantpole pair

fp

Re{s}

Im{s}

0

Page 23: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

23M.H. Perrott

Corresponding Closed Loop Response

Increase in open loop gain leads to- Peaking in closed loop frequency response- Ringing in closed loop step response

5 dB0 dB

-5 dB

f

A

C

fp

B

Frequency Response of G(f)

1.4

0

1

0.6

t

AB

C

Step Response of G(f)

Page 24: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

24M.H. Perrott

The Impact of Parasitic Poles

Loop filter and VCO may have additional parasitic poles and zeros due to their circuit implementationWe can model such parasitics by including them in the loop filter transfer functionExample: add two parasitic poles to first order filter

C1

R1e(t) v(t)Parasitics

Page 25: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

25M.H. Perrott

Closed Loop Poles Versus Open Loop Gain

-90o

-315o

-165o

-180o

-240o

20log|A(f)|

ffp3

angle(A(f))

Open loopgain

increased

0 dB

PM = 51o for B

PM = -12o for C

PM = 72o for A

Non-dominantpoles

Dominantpole pair

ABC

B

A

A

B

C

C

Evaluation ofPhase Margin

Closed Loop PoleLocations of G(f)

fp fp2

Re{s}

Im{s}

0

Page 26: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

26M.H. Perrott

Corresponding Closed Loop Response

Increase in open loop gain now eventually leads to instability- Large peaking in closed loop frequency response- Increasing amplitude in closed loop step response

0 dB

Closed Loop Frequency Response Closed Loop Step Response

1

TimeFrequency

A

C

B

CB

A

Page 27: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

27M.H. Perrott

Response of PLL to Divide Value Changes

Change in output frequency achieved by changing the divide valueClassical approach provides no direct model of impact of divide value variations- Treat divide value variation as a perturbation to a linear

systemPLL responds according to its closed loop response

N

Φref(t) Φout(t)

Φdiv(t)

e(t) v(t)H(f) Kv

jf2π

1

Loop FilterXOR PD

VCO

Divider

NN+1

t

Page 28: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

28M.H. Perrott

Response of an Actual PLL to Divide Value Change

Example: Change divide value by one

40 60 80 100 120 140 160 180 200 220 24091.8

92

92.2

92.4

92.6

92.8

93

N (

Div

ide

Val

ue)

Synthesizer Response To Divider Step

40 60 80 100 120 140 160 180 200 220 2401.83

1.84

1.85

1.86

1.87

Out

put F

requ

ency

(G

Hz)

Time (microseconds)

- PLL responds according to closed loop response!

Page 29: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

29M.H. Perrott

What Happens with Large Divide Value Variations?

PLL temporarily loses frequency lock (cycle slipping occurs)

- Why does this happen?

40 60 80 100 120 140 160 180 200 220 240

92

93

94

95

96N

(D

ivid

e V

alue

)

Synthesizer Response To Divider Step

40 60 80 100 120 140 160 180 200 220 240

1.84

1.86

1.88

1.9

1.92

Out

put F

requ

ency

(G

Hz)

Time (microseconds)

Page 30: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

30M.H. Perrott

Recall Phase Detector Characteristic

To simplify modeling, we assumed that we always operated in a confined phase range (0 to π)- Led to a simple PD model

Large perturbations knock us out of that confined phase range- PD behavior varies depending on the phase range it

happens to be in

Φref - Φdivππ/2−π/2−π 0

avg{e(t)}

1

-1

gain = 2/πgain = -2/π

Page 31: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

31M.H. Perrott

Cycle Slipping

Consider the case where there is a frequency offset between divider output and reference- We know that phase difference will accumulate

Resulting ramp in phase causes PD characteristic to be swept across its different regions (cycle slipping)

Φref - Φdivππ/2−π/2−π 0

avg{e(t)}

1

-1

gain = 2/πgain = -2/π

ref(t)

div(t)

Page 32: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

32M.H. Perrott

Impact of Cycle Slipping

Loop filter averages out phase detector outputSevere cycle slipping causes phase detector to alternate between regions very quickly- Average value of XOR characteristic can be close to

zero- PLL frequency oscillates according to cycle slipping- In severe cases, PLL will not re-lock

PLL has finite frequency lock-in range!

π−π 3π nπ (n+2)π

1

-1

XOR DC characteristiccycle slipping

Φref - Φdiv

Page 33: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

33M.H. Perrott

Back to PLL Response Shown Previously

PLL output frequency indeed oscillates- Eventually locks when frequency difference is small enough

- How do we extend the frequency lock-in range?

40 60 80 100 120 140 160 180 200 220 240

92

93

94

95

96

N (

Div

ide

Val

ue)

Synthesizer Response To Divider Step

40 60 80 100 120 140 160 180 200 220 240

1.84

1.86

1.88

1.9

1.92

Out

put F

requ

ency

(G

Hz)

Time (microseconds)

Page 34: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

34M.H. Perrott

Phase Frequency Detectors (PFD)

D

Q

Q

D

Q

Q

R

Rref(t)

div(t)

Ref(t)

Div(t)

1

1

up(t)

e(t)

down(t)

Up(t)

Down(t)

10

-1

E(t)

Example: Tristate PFD

Page 35: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

35M.H. Perrott

Tristate PFD Characteristic

Calculate using similar approach as used for XOR phase detector

Note that phase error characteristic is asymmetric about zero phase- Key attribute for enabling frequency detection

2π−2π

1

−1

avg{e(t)}

phase detectorrange = 4π

gain = 1/(2π)

Φref - Φdiv

Page 36: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

36M.H. Perrott

PFD Enables PLL to Always Regain Frequency Lock

Asymmetric phase error characteristic allows positive frequency differences to be distinguished from negative frequency differences - Average value is now positive or negative according to

sign of frequency offset- PLL will always relock

Φref - Φdiv2π 4π 2nπ−2π

1

-1

Tristate DC characteristic

cycle slipping

0

lock

Page 37: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

37M.H. Perrott

Another PFD Structure

XOR-based PFD

S

R

D

Q

Q

D

Q

Q

D

Q

Q

D

Q

Q

ref(t)

div(t)

e(t)

Divide-by-2 FrequencyDetector

PhaseDetector

ref(t)

div(t)

ref/2(t)

div/2(t)

-11

e(t)

ref/2(t)

div/2(t)

Page 38: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

38M.H. Perrott

XOR-based PFD Characteristic

Calculate using similar approach as used for XOR phase detector

Phase error characteristic asymmetric about zero phase- Average value of phase error is positive or negative during

cycle slipping depending on sign of frequency error

2ππ−2π 5π4π−3π

1

−1

avg{e(t)}

phase detectorrange = 2π

gain = 1/π

Φref - Φdiv0

Page 39: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

39M.H. Perrott

Linearized PLL Model With PFD Structures

Assume that when PLL in lock, phase variations are within the linear range of PFD- Simulate impact of cycle slipping if desired (do not

include its effect in model)Same frequency-domain PLL model as before, but PFD gain depends on topology used

N

Φref(t) Φout(t)

Φdiv(t)

e(t) v(t)H(f) Kv

jfα2π

1

Loop FilterPFD

VCO

Divider

Tristate: α=1XOR-based: α=2

Page 40: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

40M.H. Perrott

Type I versus Type II PLL Implementations

Type I: one integrator in PLL open loop transfer function- VCO adds on integrator- Loop filter, H(f), has no integrators

Type II: two integrators in PLL open loop transfer function- Loop filter, H(f), has one integrator

N

Φref(t) Φout(t)

Φdiv(t)

e(t) v(t)H(f) Kv

jfα2π

1

Loop FilterPFD

VCO

Divider

Tristate: α=1XOR-based: α=2

Page 41: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

41M.H. Perrott

DC output range of gain block versus integrator

Issue: DC gain of loop filter often small and PFD output range is limited- Loop filter output fails to cover full input range of VCO

VCO Input Range Issue for Type I PLL Implementations

PFDLoopFilter

N[k]

ref(t) out(t)

Divider

e(t) v(t)

VDD

Gnd

Output Rangeof Loop Filter

NoIntegrator

VCO

0Ks

Integrator0

Gain Block

K

Page 42: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

42M.H. Perrott

Options for Achieving Full Range Span of VCO

LoopFilter

D/A

e(t) v(t)C.P.

VDD

Gnd

Output Rangeof Loop FilterCourse

Tune

NoIntegrator

LoopFilter

e(t) v(t)C.P.

VDD

Gnd

Output Rangeof Loop Filter

ContainsIntegrator

Type I Type II

Type I- Add a D/A converter to provide coarse tuning

Adds power and complexitySteady-state phase error inconsistently set

Type II- Integrator automatically provides DC level shifting

Low power and simple implementationSteady-state phase error always set to zero

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43M.H. Perrott

A Common Loop Filter for Type II PLL Implementation

Use a charge pump to create the integrator- Current onto a capacitor forms integrator- Add extra pole/zero using resistor and capacitor

Gain of loop filter can be adjusted according to the value of the charge pump currentExample: lead/lag network

C1C2

R1

v(t)e(t) ChargePump

i(t)

Page 44: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

44M.H. Perrott

Charge Pump Implementations

Switch currents in and out:

e(t)down(t) e(t)

Iout(t)Iout(t)

Icp

Icp 2Icp

Icp Icp

Single-Ended Differential

up(t)

Page 45: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

45M.H. Perrott

Modeling of Loop Filter/Charge Pump

Charge pump is gain elementLoop filter forms transfer function

Example: lead/lag network from previous slide

e(t) v(t)H(s)Icp

LoopFilter

ChargePump

Page 46: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

46M.H. Perrott

PLL Design with Lead/Lag Filter

Overall PLL block diagram

Loop filter

Set open loop gain to achieve adequate phase margin- Set fz lower than and fp higher than desired PLL bandwidth

N

Φref(t) Φout(t)

Φdiv(t)

e(t) v(t)H(f) Kv

jfα2π

1

Loop FilterPFD

VCO

Divider

Tristate: α=1XOR-based: α=2

Icp

ChargePump

Page 47: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

47M.H. Perrott

Closed Loop Poles Versus Open Loop Gain

Open loop gain cannot be too low or too high if reasonable phase margin is desired

Non-dominantpole

Dominantpole pair

Open loopgain

increased

120o

-180o

-140o

-160o

20log|A(f)|

ffz

0 dB

PM = 55o for CPM = 53o for APM = 54o for B

angle(A(f))

A

A

A

A

B

B

B

B

C

C

C

C

Evaluation ofPhase Margin

Closed Loop PoleLocations of G(f)

fp

Re{s}

Im{s}

0

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48M.H. Perrott

Impact of Parasitics When Lead/Lag Filter Used

We can again model impact of parasitics by including them in loop filter transfer function

Example: include two parasitic poles with the lead/lag transfer function

C1C2

R1

e(t) ChargePump

i(t) v(t)Parasitics

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49M.H. Perrott

Closed Loop Poles Versus Open Loop Gain

Closed loop response becomes unstable if open loop gain is too high

Non-dominantpoles

Dominantpole pair

Open loopgain

increased

120o

-180o

-140o

-160o

20log|A(f)|

ffz

0 dB

PM = -7o for C

PM = 38o for BPM = 46o for A

angle(A(f))

A

A

AA

B

B

B

B

C

C

C

C

Evaluation ofPhase Margin

Closed Loop PoleLocations of G(f)

Re{s}

Im{s}

0

fp2fp fp3

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50M.H. Perrott

Negative Issues For Type II PLL Implementations

Parasitic pole/zero pair causes- Peaking in the closed loop frequency response

A big issue for CDR systems, but not too bad for wireless- Extended settling time due to parasitic “tail” response

Bad for wireless systems demanding fast settling time

ffofz

fzfcp

|G(f)|Peaking caused by

undesired pole/zero pair

0

1

Frequency (Hz)

0 1 2 3 4

0.6

1

1.4

Normalized time: t*fo

Nor

mal

ized

Am

plitu

de

Step Responses for a Second OrderG(f) implemented as a Bessel Filter

Type II: fz/fo = 1/3

Type II: fz/fo = 1/8

Type I

Page 51: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

51M.H. Perrott

Summary of Integer-N Dynamic Modeling

Linearized models can be derived for each PLL block- Resulting transfer function model of PLL is accurate for

small perturbations in PLL- Linear PLL model breaks down for large perturbations

on PLL, such as a large step change in frequencyCycle slipping is key nonlinear effect

Key issues for designing PLL are- Achieve stable operation with desired bandwidth- Allow full range of VCO with a simple implementation

Type II PLL is very popular to achieve this

Page 52: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

Noise Analysis of Integer-N Synthesizers

Page 53: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

53M.H. Perrott

Frequency Synthesizer Noise in Wireless Systems

Synthesizer noise has a negative impact on system- Receiver – lower sensitivity, poorer blocking performance- Transmitter – increased spectral emissions (output spectrum

must meet a mask requirement)Noise is characterized in frequency domain

Zin

Zo LNA To Filter

From Antennaand Bandpass

Filter

PC boardtrace

PackageInterface

LO signal

MixerRF in IF out

FrequencySynthesizer

ReferenceFrequency

VCO

f

PhaseNoise

fo

Page 54: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

54M.H. Perrott

Noise Modeling for Frequency Synthesizers

PLL has an impact on VCO noise in two ways- Adds extrinsic noise from various PLL circuits- Highpass filters VCO noise through PLL feedback dynamics

Focus on modeling the above based on phase deviations- Simpler than dealing directly with PLL sine wave output

vin(t)vc(t)

vn(t)

PLL dynamicsset VCO

carrier frequency f

PhaseNoise

fo

Sout(f)

Extrinsic noise(from PLL)

out(t)

Intrinsicnoise

To PLL

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55M.H. Perrott

vin(t)vc(t)

vn(t)

PLL dynamicsset VCO

carrier frequency f

PhaseNoise

fo

Frequency-domain viewSout(f)

Extrinsic noise(from PLL)

Intrinsicnoise

2πKvs

Φout

Φvn(t)

2cos(2πfot+Φout(t))out(t)

To PLL

Phase Deviation Model for Noise Analysis

Model the impact of noise on instantaneous phase- Relationship between PLL output and instantaneous phase

- Output spectrum (we will derive this in a later lecture)

Note: Kv units are Hz/V

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56M.H. Perrott

Phase noise is non-periodic

- Described as a spectral density relative to carrier power

Spurious noise is periodic

- Described as tone power relative to carrier power

Phase Noise Versus Spurious Noise

SΦout(f)Sout(f)

f-fo fo

1dBc/Hz

Sout(f)

f-fo fo

dBc1

fspur

21 dspur

fspur

2

Page 57: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

57M.H. Perrott

Sources of Noise in Frequency Synthesizers

Extrinsic noise sources to VCO- Reference/divider jitter and reference feedthrough- Charge pump noise

PFD ChargePump

e(t) v(t)

N

LoopFilter

DividerVCO

ref(t)

div(t)

f

Charge PumpNoise

VCO Noise

f

-20 dB/dec

1/Tf

ReferenceJitter

f

ReferenceFeedthrough

T

f

DividerJitter

Page 58: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

58M.H. Perrott

Modeling the Impact of Noise on Output Phase of PLL

Determine impact on output phase by deriving transfer function from each noise source to PLL output phase- There are a lot of transfer functions to keep track of!

Φdiv[k]

Φref [k] KV

jf

v(t) Φout(t)H(f)

1N

�πα e(t)

espur(t)Φjit[k] Φvn(t)Ιcpn(t)

Icp

VCO Noise

f0

SΦjit(f)

f0

SΙcpn(f)

f0

SEspur(f)

Divider/ReferenceJitter

ReferenceFeedthrough

Charge PumpNoise

1/T f0

SΦvn(f)

-20 dB/dec

PFDChargePump

LoopFilter

Divider

VCO

Page 59: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

59M.H. Perrott

Simplified Noise Model

Refer all PLL noise sources (other than the VCO) to the PFD output- PFD-referred noise corresponds to the sum of these

noise sources referred to the PFD output

Φdiv[k]

Φref [k] KV

jf

v(t) Φout(t)H(f)

1N

�πα e(t)

Φvn(t)en(t)

Icp

VCO-referredNoise

f0

SEn(f)

PFD-referredNoise

1/T f0

SΦvn(f)

-20 dB/dec

PFDChargePump

LoopFilter

Divider

VCO

Page 60: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

60M.H. Perrott

Impact of PFD-referred Noise on Synthesizer Output

Transfer function derived using Black’s formula

Φdiv[k]

Φref [k] KV

jf

v(t) Φout(t)H(f)

1N

�πα e(t)

Φvn(t)en(t)

Icp

VCO-referredNoise

f0

SEn(f)

PFD-referredNoise

1/T f0

SΦvn(f)

-20 dB/dec

PFDChargePump

LoopFilter

Divider

VCO

Page 61: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

61M.H. Perrott

Impact of VCO-referred Noise on Synthesizer Output

Transfer function again derived from Black’s formula

Φdiv[k]

Φref [k] KV

jf

v(t) Φout(t)H(f)

1N

�πα e(t)

Φvn(t)en(t)

Icp

VCO-referredNoise

f0

SEn(f)

PFD-referredNoise

1/T f0

SΦvn(f)

-20 dB/dec

PFDChargePump

LoopFilter

Divider

VCO

Page 62: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

62M.H. Perrott

A Simpler Parameterization for PLL Transfer Functions

Define G(f) as

- A(f) is the open loop transfer function of the PLL

Φdiv[k]

Φref [k] KV

jf

v(t) Φout(t)H(f)

1N

�πα e(t)

Φvn(t)en(t)

Icp

VCO-referredNoise

f0

SEn(f)

PFD-referredNoise

1/T f0

SΦvn(f)

-20 dB/dec

PFDChargePump

LoopFilter

Divider

VCO

Always has a gainof one at DC

Page 63: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

63M.H. Perrott

Parameterize Noise Transfer Functions in Terms of G(f)

PFD-referred noise

VCO-referred noise

Page 64: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

64M.H. Perrott

Parameterized PLL Noise Model

PFD-referred noise is lowpass filteredVCO-referred noise is highpass filteredBoth filters have the same transition frequency values- Defined as fo

Φvn(t)en(t)

Φout(t)Φc(t)Φn(t)

Φnvco(t)Φnpfd(t)

fo1-G(f)

foG(f)�πNα

VCO-referredNoise

f0

SEn(f)

PFD-referredNoise

1/T f0

SΦvn(f)

-20 dB/dec

Divider Controlof Frequency Setting

(assume noiseless for now)

Page 65: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

65M.H. Perrott

Impact of PLL Parameters on Noise Scaling

PFD-referred noise is scaled by square of divide value and inverse of PFD gain- High divide values lead to large multiplication of this noise

VCO-referred noise is not scaled (only filtered)

Φvn(t)en(t)

Φout(t)Φc(t)Φn(t)

Φnvco(t)Φnpfd(t)

fo1-G(f)

foG(f)�πNα

VCO-referredNoise

f0

SEn(f)

PFD-referredNoise

1/T f0

SΦvn(f)

-20 dB/dec

Divider Controlof Frequency Setting

(assume noiseless for now)

Sen(f)�πNα

2

Rad

ians

2 /Hz

SΦvn(f)

f0

Page 66: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

66M.H. Perrott

Optimal Bandwidth Setting for Minimum Noise

Optimal bandwidth is where scaled noise sources meet- Higher bandwidth will pass more PFD-referred noise- Lower bandwidth will pass more VCO-referred noise

Φvn(t)en(t)

Φout(t)Φc(t)Φn(t)

Φnvco(t)Φnpfd(t)

fo1-G(f)

foG(f)�πNα

VCO-referredNoise

f0

SEn(f)

PFD-referredNoise

1/T f0

SΦvn(f)

-20 dB/dec

Divider Controlof Frequency Setting

(assume noiseless for now)

Sen(f)�πNα

2

Rad

ians

2 /Hz

SΦvn(f)

f(fo)opt0

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67M.H. Perrott

Resulting Output Noise with Optimal Bandwidth

PFD-referred noise dominates at low frequencies- Corresponds to close-in phase noise of synthesizer

VCO-referred noise dominates at high frequencies- Corresponds to far-away phase noise of synthesizer

Φvn(t)en(t)

Φout(t)Φc(t)Φn(t)

Φnvco(t)Φnpfd(t)

fo1-G(f)

foG(f)�πNα

VCO-referredNoise

f0

SEn(f)

PFD-referredNoise

1/T f0

SΦvn(f)

-20 dB/dec

Divider Controlof Frequency Setting

(assume noiseless for now)

Sen(f)�πNα

2

Rad

ians

2 /Hz

SΦvn(f)

f(fo)opt0

Rad

ians

2 /Hz SΦnpfd(f)

SΦnvco(f)

f(fo)opt0

Page 68: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

68M.H. Perrott

Analysis of Charge Pump Noise Impact

We can refer charge pump noise to PFD output by simply scaling it by 1/Icp

Φdiv[k]

Φref [k] KV

jf

v(t) Φout(t)H(f)

1N

�πα e(t)

en(t) Φvn(t)Ιcpn(t)

Icp

VCO Noise

f0

SΙcpn(f)

Charge PumpNoise

f0

SΦvn(f)

-20 dB/dec

PFDChargePump

LoopFilter

Divider

VCO

PFD-referredNoise

Page 69: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

69M.H. Perrott

Calculation of Charge Pump Noise Impact

Contribution of charge pump noise to overall output noise

- Need to determine impact of Icp on SIcpn(f)

Φdiv[k]

Φref [k] KV

jf

v(t) Φout(t)H(f)

1N

�πα e(t)

en(t) Φvn(t)Ιcpn(t)

Icp

VCO Noise

f0

SΙcpn(f)

Charge PumpNoise

f0

SΦvn(f)

-20 dB/dec

PFDChargePump

LoopFilter

Divider

VCO

PFD-referredNoise

Page 70: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

70M.H. Perrott

Impact of Transistor Current Value on its Noise

Charge pump noise will be related to the current it creates as

Recall that gdo is the channel resistance at zero Vds- At a fixed current density, we have

M2M1

Ibias

currentsource

current bias

Id

idbias2 id

2

Cbig

WL

Page 71: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

71M.H. Perrott

Impact of Charge Pump Current Value on Output Noise

Recall

Given previous slide, we can say

- Assumes a fixed current density for the key transistors in the charge pump as Icp is varied

Therefore

- Want high charge pump current to achieve low noise- Limitation set by power and area considerations

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72M.H. Perrott

Impact of Synthesizer Noise on Transmitters

Synthesizer noise can be lumped into two categories- Close-in phase noise: reduces SNR of modulated signal- Far-away phase noise: creates spectral emissions outside

the desired transmit channelThis is the critical issue for transmitters

Sx(f)

f

Sout(f)

ffLO

Sy(f)

ffRFfIF

x(t) y(t)

out(t)

Synthesizer

close-inphase noise

far-awayphase noise

reductionof SNR

out-of-bandemission

Page 73: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

73M.H. Perrott

Impact of Remaining Portion of Transmitter

Power amplifier- Nonlinearity will increase out-of-band emission and create

harmonic contentBand select filter- Removes harmonic content, but not out-of-band emission

Sx(f)

f

Sout(f)

ffLO

Sy(f)

ffRFfIF

x(t) y(t)

out(t)

Synthesizer

close-inphase noise

far-awayphase noise

reductionof SNR

out-of-bandemission

To Antenna

Band SelectFilter

PA

Page 74: Integer-N Frequency SynthesizersOutline of Integer-N Frequency Synthesizer Talk PFD e(t) v(t) out(t) N Loop Filter Divider VCO ref(t) div(t) Fref Fout = N Fref Overview of PLL Blocks

74M.H. Perrott

Why is Out-of-Band Emission A Problem?

Near-far problem- Interfering transmitter closer to receiver than desired

transmitter- Out-of-emission requirements must be stringent to

prevent complete corruption of desired signal

Transmitter 2 Base

Station

Transmitter 1

Desired Channel( )

Interfering Channel( )

Relative PowerDifference (dB)

Desired Channel

Interfering Channel

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75M.H. Perrott

Specification of Out-of-Band Emissions

Maximum radiated power is specified in desired and adjacent channels- Desired channel power: maximum is M0 dBm- Out-of-band emission: maximum power defined as

integration of transmitted spectral density over bandwidth R centered at midpoint of each channel offset

ffRF

MaximumRF OutputEmission

(dBm) M0 dBm

M1 dBm

M2 dBm

Channel Spacing= W Hz

IntegrationBandwidth= R Hz

M3 dBm

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76M.H. Perrott

Calculation of Transmitted Power in a Given Channel

For simplicity, assume that the spectral density is flat over the channel bandwidth- Actual spectral density of signal often varies with

frequency over the bandwidth of a given channelResulting power calculation (single-sided Sx(f))

Express in dB ( Note: dB(x) = 10log(x) )

R Hz R Hz

fmid

Sx(fmid) Sx(fmid)

fmid

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77M.H. Perrott

Transmitter Output Versus Emission Specification

Assume a piecewise constant spectral density profile for transmitter- Simplifies calculations

Issue: emission specification is measured over a narrower band than channel spacing- Need to account for bandwidth discrepancy when doing

calculations

ffRF

RF Output(dBm)

Y0 dBm

Y0+X1 dBm

Y0+X2 dBm

ffRF

MaximumRF OutputEmission

(dBm) M0 dBm

M1 dBm

M2 dBmM3 dBm

Channel Spacing= W Hz

Channel Spacing= W Hz

ChannelSpacing= W Hz

IntegrationBandwidth= R Hz

Y0+X3 dBm

Piecewise Constant Approximationof Transmitter Output Spectrum Emission Specification

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78M.H. Perrott

Correction Factor for Bandwidth Mismatch

Calculation of maximum emission in offset channel 1

ffRF

RF Output(dBm)

Y0 dBm

Y0+X1 dBm

Y0+X2 dBm

ffRF

MaximumRF OutputEmission

(dBm) M0 dBm

M1 dBm

M2 dBmM3 dBm

Channel Spacing= W Hz

Channel Spacing= W Hz

ChannelSpacing= W Hz

IntegrationBandwidth= R Hz

Y0+X3 dBm

Piecewise Constant Approximationof Transmitter Output Spectrum Emission Specification

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79M.H. Perrott

Out-of-band emission requirements are function of the power of the signal in the desired channel- For offset channel 1 (as calculated on previous slide)

- Most stringent case is when Y0 maximum

Condition for Most Stringent Emission Requirement

ffRF

RF Output(dBm)

Y0 dBm

Y0+X1 dBm

Y0+X2 dBm

ffRF

MaximumRF OutputEmission

(dBm) M0 dBm

M1 dBm

M2 dBmM3 dBm

Channel Spacing= W Hz

Channel Spacing= W Hz

ChannelSpacing= W Hz

IntegrationBandwidth= R Hz

Y0+X3 dBm

Piecewise Constant Approximationof Transmitter Output Spectrum Emission Specification

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80M.H. Perrott

Table of Most Stringent Emission Requirements

ffRF

RF Output(dBm)

Y0 dBm

Y0+X1 dBm

Y0+X2 dBm

ffRF

MaximumRF OutputEmission

(dBm) M0 dBm

M1 dBm

M2 dBmM3 dBm

Channel Spacing= W Hz

Channel Spacing= W Hz

ChannelSpacing= W Hz

IntegrationBandwidth= R Hz

Y0+X3 dBm

Piecewise Constant Approximationof Transmitter Output Spectrum Emission Specification

M1 dBm X1 = M1-M0 + dB(W/R) dBX2 = M2-M0 + dB(W/R) dB

Y0 = M0 (for most stringent case)M0 dBm

M2 dBm

ChannelOffset

MaskPower

Emission Requirements(Most Stringent)

012

X3 = M3-M0 + dB(W/R) dBM3 dBm3

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81M.H. Perrott

Impact of Synthesizer Noise on Transmitter Output

Consider a spurious tone at a given offset frequency- Convolution with IF signal produces a replica of the

desired signal at the given offset frequency

ffLO

SynthesizerSpectrum

(dBc)0 dBc

X2 dBc

ffRF

RF Output(dBm)

M0 dBm

IF

LO

RF

fIFf

IF Input(dBm)

To Antenna

Band SelectFilter

PA

M0+X2 dBm

foffset

foffset

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82M.H. Perrott

Impact of Synthesizer Phase Noise (Isolated Channel)

Consider phase noise at a given offset frequency- Convolution with IF signal produces a smeared version

of the desired signal at the given offset frequencyFor simplicity, approximate smeared signal as shown

ffLO

SynthesizerSpectrum

(dBc)0 dBc

X2 dBc

ffRF

RF Output(dBm)

M0 dBm

IF

LO

RF

fIFf

IF Input(dBm)

To Antenna

Band SelectFilter

PA

M0+X2 dBm

foffset

foffset

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83M.H. Perrott

Impact of Synthesizer Phase Noise (All Channels)

Partition synthesizer phase noise into channels- Required phase noise power (dBc) in each channel is

related directly to spectral mask requirementsException is X0 – set by transmit SNR requirements

ffLO

SynthesizerSpectrum

(dBc)X0 dBc

0 dBc

X1 dBcX2 dBc

ffRF

RF Output(dBm)

M0 dBm

M0+X1 dBm

IF

LO

RF

fIFf

IF Input(dBm)

To Antenna

Band SelectFilter

PA

Channel Spacing= W Hz

Channel Spacing= W Hz

X3 dBc

M0+X3 dBmM0+X2 dBm

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84M.H. Perrott

Synthesizer Phase Noise Requirements

Impact of channel bandwidth (offset channel 1)

Overall requirements (most stringent, i.e., Y0 = M0)

ffLO

SynthesizerSpectrum

(dBc)X0 dBc

0 dBc

X1 dBcX2 dBc

IF

LO

RF To Antenna

Band SelectFilter

PA

Channel Spacing= W Hz

X3 dBc

X1 - dB(W) dBc/HzX2 - dB(W) dBc/Hz

ChannelOffset

Maximum Synth. Phase Noise(Most Stringent)

12

X3 - dB(W) dBc/Hz3

X1 = M1-M0 + dB(W/R) dBX2 = M2-M0 + dB(W/R) dB

Emission Requirements(Most Stringent)

X3 = M3-M0 + dB(W/R) dB

0 Y0 = M0 set by required transmit SNR

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85M.H. Perrott

Example – DECT Cordless Telephone Standard

Standard for many cordless phones operating at 1.8 GHzTransmitter Specifications- Channel spacing: W = 1.728 MHz- Maximum output power: Mo = 250 mW (24 dBm)- Integration bandwidth: R = 1 MHz- Emission mask requirements

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86M.H. Perrott

Synthesizer Phase Noise Requirements for DECT

Using previous calculations with DECT values

Graphical display of phase noise mask

-8 dBm X1 = -29.6 dBcX2 = -51.6 dBc

-92 dBc/Hz-114 dBc/Hz

24 dBm

-30 dBm

ChannelOffset

MaskPower

Maximum Synth. NoisePower in Integration BW

Maximum Synth. Phase Noise at Channel Offset

01.728 MHz3.456 MHz

X3 = -65.6 dBc -128 dBc/Hz-44 dBm5.184 MHz

set by required transmit SNR

ffLO

SynthesizerSpectrum

(dBc)-92 dBc/Hz

-114 dBc/Hz

-128 dBc/Hz

Channel Spacing = 1.728 MHz

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87M.H. Perrott

Critical Specification for Phase Noise

Critical specification is defined to be the one that is hardest to meet with an assumed phase noise rolloff- Assume synthesizer phase noise rolls off at -20

dB/decadeCorresponds to VCO phase noise characteristic

For DECT transmitter synthesizer- Critical specification is -128 dBc/Hz at 5.184 MHz offset

ffLO

SynthesizerSpectrum

(dBc)-92 dBc/Hz

0 dBc

-114 dBc/Hz

-128 dBc/Hz

Channel Spacing = 1.728 MHz

Phase NoiseRolloff: -20 dB/dec

CriticalSpec.

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88M.H. Perrott

Receiver Blocking Performance

Radio receivers must operate in the presence of large interferers (called blockers)Channel filter plays critical role in removing blockers

Passes desired signal channel, rejects interferers

fRFf

Synthesizer

LNATo

IF ProcessingStage

Band SelectFilter

ChannelFilter

Band Select Filter MustPass All Channels

-73-58-39

RF Input(dBm)

fIF

fLO

f

Channel FilterBandwidth

IF Output(dBm)

f

SynthesizerSpectrum(dBc/Hz)

0 dBc

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89M.H. Perrott

Impact of Nonidealities on Blocking Performance

Blockers leak into desired band due to- Nonlinearity of LNA and mixer (IIP3)- Synthesizer phase and spurious noise

In-band interference cannot be removed by channel filter!

fRFf

Synthesizer

LNATo

IF ProcessingStage

Band SelectFilter

ChannelFilter

Band Select Filter MustPass All Channels

-73-58-39

RF Input(dBm)

fIF

fLO

f

Channel FilterBandwidth

IF Output(dBm)

Synthesizer Noise and Mixer/LNA Distortion

Produce Inband Interference

Phase Noise(dBc/Hz)

Spurious Noise(dBc)

f

SynthesizerSpectrum(dBc/Hz)

0 dBc

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90M.H. Perrott

Quantifying Tolerable In-Band Interference Levels

Digital radios quantify performance with bit error rate (BER)- Minimum BER often set at 1e-3 for many radio systems- There is a corresponding minimum SNR that must be achieved

Goal: design so that SNR with interferers is above SNRmin

fRFf

Synthesizer

LNATo

IF ProcessingStage

Band SelectFilter

ChannelFilter

Band Select Filter MustPass All Channels

-73-58-39

RF Input(dBm)

fIF

fLO

f

Channel FilterBandwidth

IF Output(dBm)

Synthesizer Noise and Mixer/LNA Distortion

Produce Inband Interference

Phase Noise(dBc/Hz)

Spurious Noise(dBc)

f

SynthesizerSpectrum(dBc/Hz)

Min SNR: 15-20 dB

0 dBc

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91M.H. Perrott

Impact of Synthesizer on Blockers

Synthesizer passes desired signal and blocker- Assume blocker is Y dB higher in signal power than

desired signal

fRFf

f

foffset

RF Input(dBm)

fIFf

fLO

IF Output(dBm)

SynthesizerSpectrum

(dBc) 0 dBc

Y dB

RF

LO

IF

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92M.H. Perrott

Impact of Synthesizer Spurious Noise on Blockers

Spurious tones cause the blocker (Y dB) (and desired) signals to “leak” into other frequency bands- In-band interference occurs when spurious tone offset

frequency is same as blocker offset frequency- Resulting SNR = -X-Y dB with spurious tone (X dBc)

fRFf

f

foffset

RF Input(dBm)

foffset

fIFf

fLO

IF Output(dBm)

SynthesizerSpectrum

(dBc)

X dBc

0 dBc

Y dB

SNR: -X-Y dBX dB

RF

LO

IF

SpuriousTone

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93M.H. Perrott

Impact of Synthesizer Phase Noise on Blockers

Same impact as spurious tone, but blocker signal is “smeared” by convolution with phase noise- For simplicity, ignore “smearing” and approximate as

shown above

fRFf

f

foffset

RF Input(dBm)

foffset

fIFf

fLO

IF Output(dBm)

SynthesizerSpectrum

(dBc)

X dBc

0 dBc

Y dB

SNR: -X-Y dBX dB

RF

LO

IF

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94M.H. Perrott

Blocking Performance Analysis (Part 1)

Ignore all out-of-band energy at the IF output- Assume that channel filter removes it- Motivation: simplifies analysis

fRFf

f

foffset

RF Input(dBm)

foffset

fIFf

fLO

SynthesizerSpectrum

(dBc)

X dBc

0 dBc

Y dB

SNR: -X-Y dB

RF

LO

IF

In-ChannelIF Output

(dBm)

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95M.H. Perrott

Blocking Performance Analysis (Part 2)

Consider the impact of blockers surrounding the desired signal with a given phase noise profile- SNRmin must be maintained- Evaluate impact on SNR one blocker at a time

ffLO

SynthesizerSpectrum

(dBc)

X0 dBc

0 dBc

X1 dBcX2 dBc

RF

LO

IF

fRFf

RF Input(dBm)

Y1 dBY2 dB

fIFf

Channel FilterBandwidth

In-ChannelIF Output

(dBm)

Inband InterferenceProduced by

Synth. Phase Noise

= W Hz

Channel Spacing

Channel Spacing

SNRmin: 15-20 dB

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96M.H. Perrott

Blocking Performance Analysis (Part 3)

ffLO

SynthesizerSpectrum

(dBc)

X0 dBc

0 dBc

X1 dBcX2 dBc

RF

LO

IF

fRFf

RF Input(dBm)

Y1 dBY2 dB

fIFf

Channel FilterBandwidth

In-ChannelIF Output

(dBm)

Inband InterferenceProduced by

Synth. Phase Noise

= W Hz

Channel Spacing

Channel Spacing

SNRmin: 15-20 dB

Y1 dB X1 = -SNRmin-Y1 dBcX2 = -SNRmin-Y2 dBcY2 dB

ChannelOffset

Relative BlockingPower

Maximum Synth. NoisePower at Channel Offset

12

X3 = -SNRmin-Y3 dBcY3 dB3

0 dB X0 = -SNRmin dBc0

Derive using the relationship

SNR = -X-Y dB >= SNRmin

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97M.H. Perrott

Blocking Performance Analysis (Part 4)

ffLO

SynthesizerSpectrum

(dBc)

X0 dBc

0 dBc

X1 dBcX2 dBc

RF

LO

IF

fRFf

RF Input(dBm)

Y1 dBY2 dB

fIFf

Channel FilterBandwidth

In-ChannelIF Output

(dBm)

Inband InterferenceProduced by

Synth. Phase Noise

= W Hz

Channel Spacing

Channel Spacing

SNRmin: 15-20 dB

Y1 dB X1 = -SNRmin-Y1 dBcX2 = -SNRmin-Y2 dBcY2 dB

ChannelOffset

Relative BlockingPower

Maximum Synth. NoisePower at Channel Offset

12

X3 = -SNRmin-Y3 dBcY3 dB3

0 dB X0 = -SNRmin dBc0X1 - dB(W) dBc/HzX2 - dB(W) dBc/Hz

Maximum Synth. PhaseNoise at Channel Offset

X3 - dB(W) dBc/Hz

X0 - dB(W) dBc/Hz

Convert power tospectral density

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98M.H. Perrott

Example – DECT Cordless Telephone Standard

Receiver blocking specifications- Channel spacing: W = 1.728 MHz- Power of desired signal for blocking test: -73 dBm- Minimum bit error rate (BER) with blockers: 1e-3

Sets the value of SNRmin

Perform receiver simulations to determine SNRmin

Assume SNRmin = 15 dB for calculations to follow- Strength of interferers for blocking test

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99M.H. Perrott

Synthesizer Phase Noise Requirements for DECT

ffLO

SynthesizerSpectrum

(dBc)

X0 dBc

0 dBc

X1 dBcX2 dBc

RF

LO

IF

fRFf

RF Input(dBm)

fIFf

Channel FilterBandwidth

In-ChannelIF Output

(dBm)

Inband InterferenceProduced by

Synth. Phase Noise

W = 1.73 MHz

Channel Spacing= 1.73 MHz

Channel Spacing= 1.73 MHz

SNRmin: 15 dB

Y1 = 15 dB X1 = -30 dBcX2 = -49 dBcY2 = 34 dB

ChannelOffset

Relative BlockingPower

Maximum Synth. NoisePower at Channel Offset

1.728 MHz3.456 MHz

X3 = -55 dBcY3 = 40 dB5.184 MHz

0 dB X0 = -15 dBc0-92 dBc/Hz

-111 dBc/Hz

Maximum Synth. PhaseNoise at Channel Offset

-117 dBc/Hz

-77 dBc/Hz

-73 dBm-58 dBm-39 dBm-33 dBm

X3 dBc

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100M.H. Perrott

Graphical Display of Required Phase Noise Performance

Mark phase noise requirements at each offset frequency

Calculate critical specification for receive synthesizer- Critical specification is -117 dBc/Hz at 5.184 MHz offset

Lower performance demanded of receiver synthesizer than transmitter synthesizer in DECT applications!

ffLO

SynthesizerSpectrum

(dBc)

-92 dBc/Hz

0 dBc

-111 dBc/Hz

-117 dBc/Hz

Channel Spacing = 1.728 MHz

Phase NoiseRolloff: -20 dB/dec

CriticalSpec.

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101M.H. Perrott

Summary of Noise Analysis of Integer-N Synthesizers

Key PLL noise sources are- VCO noise (we will cover in detail tomorrow)- PFD-referred noise

Charge pump noise, reference noise, etc.

Setting of PLL bandwidth has strong impact on noise- High PLL bandwidth suppresses VCO noise- Low PLL bandwidth suppresses PFD-referred noise

Noise performance required of PLL depends on application- Wireless transmitter: must meek spectral mask- Wireless receiver: must suppress blockers and achieve

good SNR for received signal