Instructor: Yuzhuang Huyhu1@cs.sfu.ca

State-Machine Diagrams contd.(Chapter 5, Section 5-7)Use boolean expressions to simplify the

diagram.

S0

S1

S2

S3

Reset

AB A

(A+B)/ZA

B/Y

Z

A B

AB

Y,Z

A

B/Y

(A+B)/Y

Inputs: A, BOutputs: Y, ZDefaults: Y=0,Z=0

Input Conditions in State-Machine DiagramsInput condition: boolean expression or

equation in terms of input variables.

Transition condition (TC): an input condition on a transition arc, and causes a state transition to occur.

Unconditional transition: always occurs on the next clock. It can be thought of as having an implicit transition condition equal to 1.

Output Conditions in State-Machine Diagrams Output condition (OC): an input condition that, if

equal to 1, causes an output action to occur. Moore output actions: unconditional for each state. Transition-condition independent (TCI) Mealy

output actions: depend on only states. Transition-condition dependent (TCD) Mealy

output actions: depend on both the state and a transition condition.

Transition and output condition dependent (TOCD) output actions: depend on the state, a transition condition, and an output condition. There is a slash between such an output action with its associated output condition.

Constraints on Input ConditionsThe transition conditions from a given state

Si must be mutually exclusive. An invalid example:

The transition conditions from a given state must cover all possible combinations of input values.

SY,Z

AB

B

AInputs: A, BOutputs: Y, ZDefaults: Y=0,Z=0

Constraints on Output ConditionsFor every output action in state Si or on its transitions

having coincident output variables with differing values, the corresponding pair of output conditions must be mutually exclusive. An invalid example:

For every output variable, the output conditions for state Si or its transitions must cover all possible combinations of input values that can occur.

SY,Z

AB

AB

AInputs: A, BOutputs: Y, ZDefaults: Y=0,Z=0

Z

State-Machine Design of a Sliding Door Control

Sliding Door Control contd.

What states should we consider?

State-Machine Diagram for the Automatic Sliding DoorDefaults: BT=0, CD=0, OD=0 Closed

Open

Opened

Close

LK,

PA·PP·MOLK·CL/CD

BT

PA·PP·MO PA+PP+MO+DR

CD

CL·PA·PP·MO·DR

CL·PA·PP·MO·DR

PA+PP+MO

OL/OD

OLOD

OL

Reset LK· (PA+PP+MO)

Modified State Table for the Automatic Sliding Door

State Equations for the Automatic Sliding DoorPA + PP + MO appears frequently as factors

in other transition conditions.

X = PA+PP+MO

Y1(t+1)=Y1·Y2·OL+Y1· Y2 +Y1·Y2·CL ·X·DR

Y2(t+1)=Y1·Y2·LK·X+Y1· Y2 +Y1·Y2·X+Y1·Y2·(X+DR)

Registers and Register Transfers(Chapter 7)

A register consists of a set of flip-flops, together with gates that implement their state transitions.

A counter is a register that goes through a predetermined sequence of states upon the application of clock pulses.

The Simplest RegisterConsists of only flip-flops without external

gates.D

>C R

D

>C R

Q0

Q1

D0

D1

Clock

Clear

Register with Parallel LoadConnect Load to C-input or D-input? Be

careful of the clock skew.D

>C R

D

>C R

Q0

Q1

D0

D1

Clock

Clear Load Clock

C inputs

Register with Parallel Load contd.Direct Load through gates into the D inputs.

D

EN

D

EN

>C

Q0

Q1

D0

D1

Load

Clock >C

D

Clock

QEN D

>C

Digital System DesignIn most digital system designs, we partition

the system into two types of modules: a datapath, and a control unit.

Control Unit

Data PathControl inputs Data

outputsControl outputs

Data inputs

Control Signals

Status Signals

Register Transfer OperationsThe registers are assumed to be basic components of

the digital system. The movement of the data stored in registers and the processing performed on the data are referred to as register transfer operations. They are specified by the following three basic components.

The set of registers in the system. The operations that are performed on the data

stored in the registers, and The control that supervises the sequence of operations in the system.

Register Transfer Operations contd.Representations of Registers:

R

(a) Register R

7 6 5 4 3 2 1 0

(b) Bits of a register

R2

(c) A 16-bit Register

PC(H) PC(L)

(b) Bits of a register

15 0 15 8 7 0

Basic Symbols for Register Transfers

An Register Transfer ExampleTransfer from R1 to R2 when K1 = 1.

R1 R2

Load

Clock

K1

n

MicrooperationsTransfer microoperations, which transfer binary

data from one register to another.

Arithmetic microoperations, which perform arithmetic on data in registers.

Logic microoperations, which perform bit manipulation on data in registers.

Shift microoperations, which shift data in registers.

Shift RegistersA register capable of shifting its stored bits

laterally in one or both directions is called a shift register.

D

>C

D

>C

D

>C

D

>C

Serial input SI

Serial output SO

Clock

Ripple CounterThe flip-flop is positive edge triggered.

D

>C R

D

>C R

D

>C R

D

>C R

D

>C R

D

>C R

D

>C R

D

>C R

Clock

Reset

Multiplexer and Bus-based Transfers for Multiple Registers

R0

R1

R2

3-to-1

MUX

select

bus

2

R0

R1

R2

EN

EN

EN

Enable

Multiplexer Bus Three-state Bus

Control of Register TransfersProgrammable system: a portion of the input to

the processor consists of a sequence of instructions. Each instruction specifies the operation that the system is to perform, which operands to use, where to place the results of the operation, and in some cases, which instruction to execute next.

Non-programmable system: the control unit determines the operations to be performed and the sequence of those operations, based on its inputs and the status bits from the datapath.

Register-Transfer System Design ProcedureWrite a detailed system specification.

Define all external data and control input signals, all external data, control and status output signals, and the registers of the datapath and control unit.

Find a state machine diagram for the system including the register transfers in the datapath and in the control unit.

Register-Transfer System Design Procedure contd.Define internal control and status signals.

Draw a block diagram of the datapath, and a block diagram of the control unit if it includes register transfer hardware.

Design any specialized register transfer logic in both the control and datapath.

Design the control unit logic.

Verify the design.

An Example: DashWatchThe DashWatch is a very inexpensive stopwatch.

It has a 4-digit BCD counter called TM, and a 16-bit parallel load register SD.

START

STOP

CSSRESE

T

Display Time

Inputs, Outputs, and Registers of the DashWatch

State-Machine Diagram for the DashWatch S

1

S2

S3

S4

S5

S7

S6

SD<-(9999)BCD

TM<-(0000)BCD

TM<-(TM+1)BCD, DIS=TM

DIS=TM

SD<-TM

RESET

START

STOP

CSS·START

START

STOP

CSS

TM<SDTM>=SDSTART

CSS·START

START DIS=SD

Datapath Output Actions and Status Generation

Datapath Block Diagram

SRST

TM

A<B Comparator

Storage RegisterLOAD

RESET

D1 D016-Bit 2-to-1 MUX

DP4-Digit LCD Display

Segment Converter4-Digit BCD-to-7

D1 D016-Bit 2-to-1 MUX

ENTM

RSTM

ALTB

LSR

RESET

UPDATE

SD

SDS

1

1001100110011001

DIS

4-Digit BCD CounterC0

D

Control State-Machine Diagram S

1

S2

S3

S4

S5

S7

S6

LSR

RSTM

ENTM

UPDATE, LSR

RESET

START

STOP

CSS·START

START

STOP

CSS

ALTBSTART

CSS·START

START DS

Defaults: All outputs = 0

Thanks!