INPUT/OUTPUT INPUT/OUTPUT ARCHITECTUREARCHITECTURE

By Truc TruongBy Truc Truong

Input DevicesInput Devices

KeyboardKeyboard MouseMouse ScannerScanner CD-RomCD-Rom Game ControllerGame Controller

Output DevicesOutput Devices

MonitorMonitor PrintersPrinters Disk DriveDisk Drive Floppy DriveFloppy Drive CDRW-RomCDRW-Rom SpeakersSpeakers

Input and Output devicesInput and Output devices

ModemModem Network Interface CardNetwork Interface Card Portable zip drivesPortable zip drives

ModemModem

What is a modemWhat is a modem It's short for MOdulator / DEModulator and it It's short for MOdulator / DEModulator and it

allows you to connect your computer to the allows you to connect your computer to the phone line and communicate with another phone line and communicate with another computer. computer.

Data Transfer for Data Transfer for CommunicationCommunication

Synchronous Synchronous In synchronous data transmission, data is sent In synchronous data transmission, data is sent

via a bit-stream, which sends a group of via a bit-stream, which sends a group of characters in a single stream In order to do characters in a single stream In order to do this, modems gather groups of characters into this, modems gather groups of characters into a buffer, where they are prepared to be sent as a buffer, where they are prepared to be sent as such a stream. In order for the stream to be such a stream. In order for the stream to be sent, synchronous modems must be in perfect sent, synchronous modems must be in perfect synchronization with each other. They synchronization with each other. They accomplish this by sending special characters, accomplish this by sending special characters, called synchronization, or syn, characters. called synchronization, or syn, characters. When the clocks of each modem are in When the clocks of each modem are in synchronization, the data stream is sent. synchronization, the data stream is sent.

Data Transfer for Data Transfer for CommunicationCommunication

AsynchronousAsynchronous In asynchronous transmission, data is In asynchronous transmission, data is

coded into a series of pulses, including a coded into a series of pulses, including a start bit and a stop bit. A start bit is sent start bit and a stop bit. A start bit is sent by the sending modem to inform the by the sending modem to inform the receiving modem that a character is to receiving modem that a character is to be sent. The character is then sent, be sent. The character is then sent, followed by a stop bit designating that followed by a stop bit designating that the transfer of that bit is complete.the transfer of that bit is complete.

Function of I/O modulesFunction of I/O modules

1)   Control and Timing. 1)   Control and Timing.

2)   CPU Communicating. 2)   CPU Communicating.

3)   Device Communication. 3)   Device Communication.

4)   Data Buffering. 4)   Data Buffering.

5)   Error Detection.5)   Error Detection.

Control and TimingControl and Timing

1) CPU asks I/O module to check the 1) CPU asks I/O module to check the status of attached device. status of attached device.

2) I/O module tells the status. 2) I/O module tells the status.

3) CPU requests for data transfer to I/O 3) CPU requests for data transfer to I/O module if device is ready. module if device is ready.

4) I/O module gathers the data and 4) I/O module gathers the data and transfers to the CPU. transfers to the CPU.

Cpu CommunicationCpu Communication

1) 1) Command DecodingCommand Decoding : : Like read/write seek etc. Like read/write seek etc. Data Data Exchange between CPU and Module. Status Exchange between CPU and Module. Status reporting to CPU, since reporting to CPU, since peripherals are slow. Address recognition for the peripherals are slow. Address recognition for the devices connected devices connected to it. to it.

2) 2) Device Communication Device Communication :: This may involves This may involves command, status command, status information and data transfer. information and data transfer.

3)3) Data BufferingData Buffering : :  Essential function to overcome   Essential function to overcome speed mismatch. speed mismatch.

4) 4) Error DetectionError Detection : : Like paper jam, bad data etc. Like paper jam, bad data etc.

INPUT/OUTPUT MODULE INPUT/OUTPUT MODULE STRUCTURESTRUCTURE

TECHNIQUES OF I/OTECHNIQUES OF I/O

1) 1) Programmed I/OProgrammed I/O : : The CPU issues a command then waits for The CPU issues a command then waits for I/O I/O operations to be complete. The CPU is faster than the I/O operations to be complete. The CPU is faster than the I/O module module then method is wasteful. then method is wasteful.

2) 2) Interrupt Driven I/O Interrupt Driven I/O :: The CPU issues commands then The CPU issues commands then proceeds proceeds with its normal work until interrupted by I/O device on with its normal work until interrupted by I/O device on completion completion of its work. of its work.

3) 3) DMADMA : : In this CPU and I/O Module exchange data without In this CPU and I/O Module exchange data without involvement of CPU. involvement of CPU.

4)4) Memory mapped I/O Memory mapped I/O : : Memory and I/O are treated as Memory and I/O are treated as memory memory only. It means no signal like IO/M. only. It means no signal like IO/M.

5) 5) Isolated I/O  Isolated I/O  :: Address space of memory and I/O is isolated. Address space of memory and I/O is isolated. It uses IO/M  signal. It uses IO/M  signal.

INPUT/OUTPUT INPUT/OUTPUT CONTROLLERS CONTROLLERS

Design Issues:Design Issues:

There will be multiple devices that There will be multiple devices that will generate interrupt signals. will generate interrupt signals. Consider the following when Consider the following when designing the I/O controllersdesigning the I/O controllers

1) How does CPU knows which device 1) How does CPU knows which device has interrupted?has interrupted?

2) In case of multiple interrupt, which 2) In case of multiple interrupt, which request is to berequest is to be serviced?serviced?

Four design techniquesFour design techniques

1) 1) Multiple Interrupt LinesMultiple Interrupt Lines : : In this method we have multiple In this method we have multiple lines like in IC 8085. lines like in IC 8085.

2) 2) Software PollingSoftware Polling : : ISR polls to find out the device which has ISR polls to find out the device which has interrupted. The CPU reads a status register.The method is interrupted. The CPU reads a status register.The method is time time consuming. consuming.

3) 3) Daisy ChinDaisy Chin : : The method is hardware polling. The ack signal The method is hardware polling. The ack signal propagates through and is stopped by the device who is propagates through and is stopped by the device who is interrupted. interrupted.

4) 4) Bus ArbitrationBus Arbitration : : In this method the device first gets control In this method the device first gets control of bus and then raises an interrupt request for data transfer. of bus and then raises an interrupt request for data transfer. The CPU issues an ack then the devices gives vector for The CPU issues an ack then the devices gives vector for branching. branching.

Programmed I/OProgrammed I/O

The code in the OS for Programmed I/O be more like:The code in the OS for Programmed I/O be more like: keyboard_wait: ; for get_ch keyboard_wait: ; for get_ch test Keyboard_Status, 80000000h test Keyboard_Status, 80000000h jz keyboard_wait jz keyboard_wait mov eax, Keyboard_Data mov eax, Keyboard_Data and and display_wait: ; for put_ch display_wait: ; for put_ch test Display_Status, 80000000h test Display_Status, 80000000h jz display_wait jz display_wait mov Display_Data, eax mov Display_Data, eax

This scheme is known as BUSY WAITING, or SPIN WAITING. This scheme is known as BUSY WAITING, or SPIN WAITING. The little loop is called a SPIN WAIT LOOP. The little loop is called a SPIN WAIT LOOP.

Problems with Programmed Problems with Programmed I/OI/O

*much time is wasted spin waiting. *much time is wasted spin waiting.

if it takes 100 instructions to program this, and each if it takes 100 instructions to program this, and each instruction takes 20ns to execute, then it takes instruction takes 20ns to execute, then it takes

100 * 20nsec = 2000nsec = 2 usec to execute100 * 20nsec = 2000nsec = 2 usec to execute

if a device takes 2msec (=2000usec) to deal with one if a device takes 2msec (=2000usec) to deal with one character, then the percent of time spent waiting character, then the percent of time spent waiting

time waiting / total time = 2000us / 2000us +2us =99.9%time waiting / total time = 2000us / 2000us +2us =99.9%

We'd like a solution that spent less time "doing We'd like a solution that spent less time "doing nothing" nothing"

InterruptsInterrupts

CPU interrupt request line triggered by I/O CPU interrupt request line triggered by I/O devicesdevices

Interrupt handler receives interruptInterrupt handler receives interrupt Maskable to ignore or delay some interruptsMaskable to ignore or delay some interrupts Interrupt vector to dispatch interrupt to Interrupt vector to dispatch interrupt to

correct handlercorrect handler Based on priortyBased on priorty Some unmaskableSome unmaskable

Interrupt mechanism also used for exceptionsInterrupt mechanism also used for exceptions

Interrupt ProcessingInterrupt Processing

Interrupt driven I/O cycleInterrupt driven I/O cycle

Direct Memory AccessDirect Memory Access

Special Purpose Processor: DMA controllerSpecial Purpose Processor: DMA controller Free CPU from pure data transfer tasksFree CPU from pure data transfer tasks DMA access: Pointer to source, destination and DMA access: Pointer to source, destination and

size of data issued to start transfersize of data issued to start transfer Processor writes the data DMA access data and Processor writes the data DMA access data and

continuous workingcontinuous working Handshake protocolHandshake protocol

DMA request and DMA acknowledgeDMA request and DMA acknowledge DMA controllers are standard components DMA controllers are standard components

in PCsin PCs Bus-mastering I/O hardware contain their Bus-mastering I/O hardware contain their

own DMA hardwareown DMA hardware

DMA TransferDMA Transfer

I/O Interface diagramI/O Interface diagram

I/O Transfer ModeI/O Transfer Mode

SerialSerial In band signalingIn band signaling Bit orientedBit oriented Bit/byte word translationBit/byte word translation

ParallelParallel Byte word orientedByte word oriented Out of band signalingOut of band signaling IDE, SCSIIDE, SCSI

Serial TransferSerial Transfer

Asynchronous ClockingAsynchronous Clocking Master clock the transferMaster clock the transfer Slave derive clock from masterSlave derive clock from master

Synchronous clockingSynchronous clocking Independent clockingIndependent clocking Verification by synchronization patternVerification by synchronization pattern

Parallel TransferParallel Transfer

Data transferData transfer Read sectorRead sector Write sectorWrite sector

ControlControl Disk seekDisk seek

Transfer IntegrityTransfer Integrity Transfer parityTransfer parity Data encodingData encoding