Info 2950 Fsm Part1

8/2/2019 Info 2950 Fsm Part1

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INFO 2950

Prof. Carla Gomes

[email protected]

Module

Modeling Computation:

Finite State Machines with Output

Rosen, Chapter 12.2

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Remember the general picture of a computer as

being a transition function T :S × IS ×O? ± If the state set S is finite (not infinite), we call this

system a finite state machine.

If the domain S × I is reasonably small, then we can

specify T explicitly by writing out its completegraph.

± However, this is practical only for machines that have a

very small information capacity.

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Size of FSMs

The information capacity of an FSM isC = I[S ] = log |S |.

± Thus, if we represent a machine having an information capacity

of C bits as an FSM, then its state transition graph will have|S | = 2C nodes.

E . g . suppose your desktop computer has a 512MBmemory, and 60GB hard drive.

± Its information capacity, including the hard drive and memory(and ignoring the CPU¶s internal state), is then roughly~512×223 + 60×233 = 519,691,042,816 b.

± How many states would be needed to write out the machine¶sentire transition function graph?

2519,691,042,816 = A number having >1.7 trillion decimal digits!

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FSMs as Models

The FSM diagram of a reasonably-sized computer ismore than astronomically huge.

± Yet, we are able to design and build these computersusing only a modest amount of industrial resources.

Why is this possible?

Answer: A real computer has r e gul ar ities in its

transition function that are not capt ur ed if we justwrite out its FSM transition function explicitly.

± I.e., a transition function can have a small, simple,regular description, even if its domain is enormous.

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Limitations with FSM Model

It ignores many important physical realities: ± How is the transition function¶s structure to be encoded

in physical hardware? How much hardware complexity is required to do this?

± How close in physical space is one bit¶s worth of themachine¶s information capacity to another?

How long does it take to communicate information from one part of the machine to another?

± How much energy gets dissipated to heat when themachine updates its state?

How fast can the heat be removed, and how much does thisimpact the machine¶s performance?

Let¶s consider a basic example.

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Applications

Finite-State Machines are used in a variety of

applications.

± Spell checking programs

± Grammar checking

± Indexing and searching large text files

± Speech/Language recognition

± Network Protocols

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Types of Finite-State Machines

Finite-State Machines with Output

± M ealy: Output determined by state and input

± M oor e: Output determined by state alone

Finite-State Machines with No Output

± Also known as finite-state automata

± There are two types of finite-state automata

Deter ministic: Each state-input pair dictates a unique transitioninto another state

Non-deter ministic: Each state-input pair can lead to several possible states

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Finite State Machines with Output

We will focus on only M ealy machines

Since we will always refer to finite-state machineswith no output as finite-state automata, we willuse the term finite-state machine to mean finite-

state machine with output .

The best way to understand finite-state machines is probably with an example.

Perhaps the best example deals with a device most of use are very familiar with²vending machines.

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Example: Candy Machine

Consider a vending machine that

± Accepts nickels (5 cents), dimes (10 cents), and

quarters (25 cents), crediting the amount.

± If the total credit is more than 25, it returns the

difference so only 25 cents credit remains.

± Dispenses a candy bar if the candy button is pushed and

there is 20 cents credit.

± Dispenses a candy bar and returns 5 cents if the candy

button is pushed and there is 25 cents credit.

± Dispenses a soda if the soda button is pushed and there

is 25 cents credit.

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Candy Machine States

The vending machine can be in different states basedon the amount of money that has been credited tothe user.

Change is returned after 25 cents, and all coins are

multiples of 5.Thus, the machine can be in the following states:

± 0 cents credit (state S 0)


± 10 cents credit (state S 2) ± 15 cents credit (state S 3)



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Candy Machine Input/Output

The machine can accept the following inputs ± A dime (10 cents) inserted

± A nickel (5 cents) inserted

± A quarter (25 cents) inserted

± Candy button pushed (CB) ± Soda button pushed (SB)

The machine has the following possible outputs

± A dime (10 cents) returned

± A nickel (5 cents) returned ± A quarter (25 cents) returned

± A candy bar (C) dispensed

± A soda (S) dispensed

± Nothing (n) is returned or dispensed

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Candy Machine FSM

We now have enough information to construct our finite-statemachine.

For each possible input and each possible state, we need to

know what to output (if anything) and what state the

machine should go to.

For instance:

± If the machine is in state S 3 (15 cents credit) and

± a quarter (25 cents) is input

± the machine should transition into state S 5 (25 cents credit) and

± 15 cents (a dime and nickel) should be output.

We can construct a state diagram and/or a state table by

considering every possible input on every possible state.

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Candy Machine State Diagram

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Candy Machine State Table

Next State Output

Input Input

State 5 10 25 CB SB 5 10 25 CB SB

S0 S1 S2 S5 S0 S0 n n n n n

S1 S2 S3 S5 S1 S1 n n 5 n n

S2 S3 S4 S5 S2 S2 n n 10 n n

S3 S4 S5 S5 S3 S3 n n 15 n nS4 S5 S5 S5 S0 S4 n 5 20 Candy n

S5 S5 S5 S5 S0 S0 5 10 25 Candy,5 Soda

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FSM Definition

Definition: A finite-state machine is a 6-tuple M =(S , I , O, f ,

g , S 0) where

± S is a finite set of states ± I is a finite input al phabet

± O is a finite output al phabet

± f :S v I pS is a t r ansition f unction from each state-input pair to a

state

± g :S v I pO is a output f unction from each state-input pair to anoutput

± S 0 is the initial state

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FSM Representations

As we have already seen, there are two common

ways of representing finite-state machines

± A state tabl e is used to represent a finite-state machine

by giving the values of the functions f and g .

± A state dia g r am is a directed graph representation of a

finite-state machine.

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State Tables

A state tabl e is organized as follows

Output

Input

5 10 25 CB SB

n n n n n

n n 5 n n

n n 10 n n

n n 15 n n

n 5 20 Candy n

5 10 25 Candy,5 Soda

State

S0

S1

S2

S3

S4

S5

Next State

Input

5 10 25 CB SB

S1 S2 S5 S0 S0

S2 S3 S5 S1 S1

S3 S4 S5 S2 S2

S4 S5 S5 S3 S3

S5 S5 S5 S0 S4

S5 S5 S5 S0 S0

The second half are also indexed

by the inputs

The entries in the table give the

value of the function g ± that is, theoutputs.

The rows are indexed by the states.

The columns are split into two groups:

The first half are indexed by the inputs

The entries in the table give the value of thefunction f ± that is the new states

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State Diagram

A state dia g r am is organized as follows ± The nodes in the graph represent the states.

Each ed g e is labeled with a pair ( x, y), where

An ed g e (S i ,S j) occurs if some input causes a transition

from S i to S j

The ed g es in the graph represent the t r ansitions.

x is the input which (along withthe state) causes the transition

y is the output triggered by thestate-input pair.

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Example: Unit Delay

In some electronic devices, it is necessary to use a unit-del a y machine.

That is, whatever is input into the machine should be outputfrom the machine, but delayed by a specific amount of time.

For instance, given a string of binary numbers x1, x2, «, xn,the machine should produce the string 0, x1, x2, «, xn-1.

We want to use a finite state machine to model the behavior of a unit-del a y machine.

What should a state in this machine represent?One possibility is that a state represents the last input bit.

Thus we need a state for ³1´ and a state for ³0´

We also need start state.

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Unit Delay States

We will use the following states (that memorize last bit;except S0)

± State S 0 is the start state

± State S 1 occurs if the previous input was 1

± State S 2 occurs if the previous input was 0

We can easily construct the state table for the unit delaymachine by realizing that

± When the input is 0, we always transition to state S 2 ± When the input is 1, we always transition to state S 1

± When we are in state S 1 we always output 1 (since the previous input was 1)

± When we are in state S 2 we always output 0 (since the previous input was 0)

± When we are in state S 0 we always output 0 (since we

always output 0 first)

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Unit Delay State Table/Diagram

Here is the state table and state diagram based on our

previous observations.

Next State Output

Input Input

State 0 1 0 1

S0 S2 S1 0 0S1 S2 S1 1 1

S2 S2 S1 0 0

What¶s output of 101011?

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Example: Binary Adder

We want to construct a finite state machine that will add twonumbers.

The input is two binary numbers, ( xn« x1 x0)2 and ( yn« y1 y0)2

At each step, we can compute ( xi+ yi) starting with ( x0+ y0). ± If ( xi+ yi)=0, we output 0.

± If ( xi+ yi)=1, we output 1.

± If ( xi+ yi)=2, we have a problem.

The problem is we need a carry bit.

In fact, our computation needs to know the carry bit at eachstep (so we compute xi+ yi+ci at each step), and be able togive it to the next step.

We can take care of this by using states to represent the carry bit.

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Binary Adder States

We will use the following states ± State S0 occurs if the carry bit is 0

± State S 1 occurs if the carry bit is 1

Since when we begin the computation, there is no carry, wecan use S 0 as the start state,

So, how does which state we are in affect the output?

If we are in state S 0 (we have a carry of 0)

± If ( xi+ yi)=0, we output 0, and stay in state S 0

± If ( xi+ yi)=1, we output 1, and stay in state S 0 ± If ( xi+ yi)=2, we output 0, and go to state S 1

If we are in state S 1 (we have a carry of 1)

± If ( xi+ yi +1)=1, we output 1, and go to state S 0 ± If ( xi+ yi +1)=2, we output 0, and stay in state S 1 ± If ( xi+ yi +1)=3, we output 1, and stay in state S 1

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Binary Adder State

Table/Diagram

From the previous observations, we can construct the state

table and state diagrams

for the binary adder

Next State Output

Input Input

State 00 01 10 11 00 01 10 11

S0 S0 S0 S0 S1 0 1 1 0

S1 S0 S1 S1 S1 1 0 0 1

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Construct a state table for the finite-state machine in Fig. 3.

Find the output string for the input 101011

Answer: 001000

Input, output

Output of 101011? 001000

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S0 ± this state remembers that the previous input value (if it exists)

was not a 1

S1 ± this state remembers that the previous input value was a 1, but the

input before (if it exists) was not a 1

S2 ± this state remembers that the previous two input values were 1

Language Recognizer

We want to construct an FSM that outputs 1 iff the string readso far has 111.

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S0 ± this state remembers that the

previous input value (if it exists)

was not a 1


previous input value was a 1, butthe input before (if it exists) was

not a 1


previous two input values were 1

S0 S1 S2

0,0

1,1

0,0

1,0

0,01,0

Language Recognizer

This finite-state machine recognizes the set of bit strings that

end in 111.

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FSM as a Language Recognizer

Definition: Let M =(S , I , O, f , g , S 0) be a FSM and L I*.

We say that M recognizes (or accepts) L, iff for any inputstring x that belongs to L, M produces a 1 as an output

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Next

Finite state machines with no output

Finite Automata

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Info 2950 Fsm Part1