Embed Size (px)
Citation preview
iNEMI Technology
Roadmap
Chuck RichardsonDirector of
RoadmappingSMTAI
October 6, 2009
Agenda
1
• iNEMI Introduction
• 2009 iNEMI Roadmap Overview– Packaging Chapter Highlights– Environmentally Conscious Electronics Chapter Highlights – Board Assembly Chapter Highlights
• 2011 iNEMI Roadmap Preview
1
iNEMI Introduction
Who Are We?• iNEMI organization:
– Corporate membership– Not-for-profit, R&D consortium– Collaboration defined by organization by-laws, intellectual
property policy, and project agreements. • Member companies/organizations:
– Leadership OEM, EMS, and Supplier companies– Government labs– Academic Institutions.
• Small staff provides services to facilitate global collaboration (USA, Asia & Europe): – Support to help organize & manage projects – Communication services for collaboration
• Website is www.inemi.org– Manage Relationships with other Organizations
3
Global Operations
4
• iNEMI is headquartered in Herndon, Virginia, USA.
• Started iNEMI China Collaboration in 2003.
• Opened an office in Shanghai and added a team member in Europe in 2007.
• Dr. Haley Fu is leading operations in Asia, based in Shanghai, China.
• Grace O’Malley is representing iNEMI in Europe from her base in Ireland.
OEM/ODM/EMS Members
5
Supplier Members
6
Association/Consortium, Government, Consultant & University Members
7
Deliverables
8
iNEMI provides five important deliverables:
1. Technology roadmaps
2. Technology deployment projects
3. Research priorities
4. Forums on key industry issues
5. Position papers to focus industry direction
“Advancing Manufacturing Technology”
Leadership through Innovation• A proven approach for identifying the technology
needs and gaps of the industry through our roadmapping process
• A strong track record of developing supply chains to introduce new materials, processes, and technologies into production
• A research vision with three major thrusts:– Energy & the environment– Miniaturization– Medical electronics
9
iNEMI Methodology
10
Gap Analysis
iNEMIProjects
Competitive Solutions
No Work Required
Available to Market
ResearchGovernment
Academia
Disruptive Technologies
2009 iNEMI Roadmap
Statistics for the 2009 Roadmap
• > 550 participants• > 250 companies/organizations• 18 countries from 4 continents• 20 Technology Working Groups (TWGs)
– New roadmaps on Solid State Illumination, Photovoltaics and RFID Item-Level Tag
• 5 Product Emulator Groups (PEGs)• > 1400 pages of information• Roadmaps the needs for 2009-2019
12
2009 Technology Working Groups (TWGs)
Organic PCB/ Substrates
BoardAssembly Customer
RF Components & Subsystems
OptoelectronicsLarge Area, Flexible Electronics
Modeling, Simulation, and Design
PackagingSemiconductor
Technology
Final Assembly
Mass Storage (Magnetic & Optical)
Passive Components
Test, Inspection & Measurement
Environmentally Conscious Electronics
Ceramic Substrates
Thermal Management
Connectors
Red=Business Green=Engineering Blue=Manufacturing Blue=Component & Subsystem
Solid State Illumination
PhotovoltaicsRF Identification/Item Level Tag
Information Management
13
Roadmap Development
14
Product Sector Needs Vs. Technology Evolution
Product Emulator GroupsTWGs
Med
ical
Pro
duct
s
Aut
omot
ive
Net
Com
/Dat
a C
om
Semiconductor Technology
Design Technologies
Manufacturing Technologies
Comp./Subsyst. Technologies
Modeling, Thermal, etc.
Board Assy, Test, etc.
Packaging, Substrates, Displays, etc.
Business Processes Prod Lifecycle Information Mgmt.
Port
able
/ C
onsu
mer
Offi
ce /
Larg
eSy
stem
s
2009 Product Emulator Groups
15
Product Emulator Chair(s) 2009Automotive Products Jim Spall
Medical Products Anthony Primavera, MSEIBill Burdick, GE Research
Consumer / Portable Products Susan Noe, 3M
Office/Large Business System Products David Lober, IntelDavid Copeland, Sun
Network, Data, Telecom John Duffy, Cisco
2009 TWG Leadership
16
2009 TWG Leadership (cont.)
Component / Subsystem Technologies Chair(s) Co-Chair(s)
Semiconductor Technology Paolo Gargini, Intel Alan K. Allan, Intel
Optoelectronics Dick Otte, Promex William Ring, WSR
Photovoltaics Alain Harrus, Cross Link Capital Jim Handy, Objective Analysis
Packaging Bill Bottoms, NanoNexus William Chen, ASE
Passive Components Philip Lessner, Kemet John Galvagni, AVX
Connectors John MacWilliams, Consultant
RF Components Ken Harvey, Teradyne Eric Strid, Cascade MicroTech
Large Area, Flexible Electronics Dan Gamota, Motorola Jan Obrzut, NIST Jie Zhang, Motorola
Interconnect Substrates (Ceramic) Howard Imhof, Metalor Ton Schless, Sibco
Interconnect PCB (Organic) John T. Fisher, IPC Henry Utsunomiya, Consultant
Mass Data Storage Roger F. Hoyt, Consultant Tom Coughlin, Coughlin Associates
Solid State Illumination Marc Chason, Consultant
17
Business Issues
Situation Analysis
• Growth of Automotive Electronics• Convergence (Driven by wireless/portable products)
– Medical-Consumer– Automotive-Entertainment– Communication-Entertainment
• Medical Electronics focus shifting towards diagnostics/prevention vs. therapy.– Motivations: reduce cost & improve outcomes – High volume consumer oriented– Challenge for getting quick regulatory acceptance
19
Situation Analysis
• Miniaturization and Thinner• Quality, reliability, cost• Counterfeit Products• Time to market• Increasing Material Restrictions• Increased focus on Energy Reduction
– Both product & manufacturing– Life-cycle approach
20
Strategic Infrastructural Changes• The restructuring of the electronics industry over the last
decade from vertically integrated OEMs to a multi-firm supply chain has resulted in a disparity in R&D needs versus available resources.
• Restructuring has created skill gaps at various nodes of supply chain.
• Critical needs for research and development exist in the middle part of the supply chain (IC assembly services, passive components and EMS assembly) and yet these are the firms least capable of providing the resources.
• A partial solution has been the development of vertical teams to develop critical new technology while sharing the costs.
21
Technology Issues and
Needs
Key Technology Issues• Semiconductors:
– Scaling and next generation technology• Packaging: More than Moore
– New level of packaging blending Semiconductor back end and assembly/packaging, infrastructure.
– Stacked Die• Cooling• Through hole via process and reliability• Assembly accuracy required for PoP, stacked die, etc. not consistent
with today’s Board Assembly equipment.– New capability to close the gap between chip and substrate
interconnect density: “Shortstopper”• Silicon Interposer• Organic
23
• Manufacturing processes to accelerate miniaturization• Assembly processes that support 3-D structures and low
temperature processing.• Warpage Reduction
– Wafer– Package– PWB
• Lower testing costs, particularly for new non-digital technologies
Manufacturing Technologies
Identified Needs
24
Paradigm Shifts
25
• Touch Screens becoming main stream.• MEMs oscillators replacing quartz crystals.• Emergence of photovoltaics.• Energy Efficient Lighting.• Printed electronics. • Flash memory instead of hard drives for lower power.• Wafer level packaging is coming of age.• ODMs for Cell Phones:
– Especially for low cost models– Can also be used to level load OEM factories
• Migration of where and how passive devices are used.
Packaging TWG Highlights
Packaging TWG is common group
between ITRS and iNEMI.
The pace of change in Packaging is increasing• As traditional CMOS scaling nears it natural limits other
technologies are needed to continue progress• This has resulted in an increase in the pace of systems
packaging innovation.• Many packaging processes have outpaced Roadmap
forecasts. Among these are:– Wafer thinning and handling of thinned wafers/die– Wafer level packaging– Incorporation of new materials– 3D integration
“Consumerization” of electronics is the primary driving force.
27
System level Integration in the Package
The most important trend in packaging is the incorporation of system level integration through System-in Package
• This enables equivalent scaling through functional diversification
• The result is a demand for new packaging capability requiring new technology and new materials:– Higher interconnect density in package– Increases thermal density – Test access challenges– More difficult demands associated with ensuring reliability
28
“More than Moore” is key to growth until a post CMOS switch is ready
29
• Packaging innovation enables “More than Moore”
– 3D packaging technologies
– Equivalent scaling through functional diversity
• Consumer markets drive innovation in packaging
– Size, power, performance
– Cost, time to market
• New materials required to meet today’s market demand
but will also enable many future advances in packaging.
Moore’s Law Scaling can not maintain the Pace of Progress and Packaging enables equivalent scaling
Interacting with people and environmentNon-digital content System-in-Package (SiP)
Beyond CMOS
Information Processing Digital content System-on-Chip (SOC)
BiochipsFluidics
SensorsActuators
HVPower
Analog/RF Passives
More than Moore : Functional Diversification
130nm
90nm
65nm
45nm
32nm
Λ...22nm
Mor
e M
oore
: Sc
alin
g
Baseline CMOS: CPU, Memory, Logic
30
Impact of Recession on System Packaging
• Will reduce the introduction of new high-tech products
• Increased packaging density at the SIP level will be achieved
with current technology
– Current technology uses a variety of existing approaches
– Capital investment in new equipment and processes will be
curtailed
– Introduction of thru silicon vias (TSV) will be delayed
– End of recession will require a rapid increase in introducing new
packaging technology.
31
Wafer Level Packaging
32
• The answer to the historical lack of scaling in packaging to match the scaling in IC production.
•
• WLP offers portable consumer products :– inherent lower cost– improved electrical performance– lower power requirements– Smaller size.
Wafer Level Packaging
33
Wafer level CSP in the simplest structure Wafer level CSP with copper post and resin mold
Opto wafer level CSP with tapered TSV interconnection
Opto wafer level CSP with beam lead metallurgy
IPD embedded silicon substrate
Build-up substrate through wafer level fabrication
Thin Chip Integration (Embedded device in polymer dielectric)
embedded Wafer Level Ball Grid Array
Stacked devices with Through Silicon Via´s (TSV)
Processor
High-Capacity Memory Several architectural variations are in use
today
System in Package
34
• The key to MtM functional diversification is System in Package. This technology enables:
– Embedded active and passive components– MEMS integration – Wireless integration– Sensor integration– Analog circuit integration
---with traditional logic and memory integrated circuits
• ITRS Assembly & Package System In Package White Paper
http://www.itrs.net/Links/2007ITRS/LinkedFiles/AP/AP_Paper.pdf
SiP presents new challenges for Thermal management
35
• High performance generates high thermal density• Heat removal requires much greater volume than the
semiconductor– Increased volume means increased wiring length causing higher
interconnect latency, higher power dissipation, lower bandwidth, and higher interconnect losses
– These consequences of increased volume generates more heat to restore the same performance
• ITRS projection for 14nm node– Power density >100W/cm² – Junction to ambient thermal resistance <0.2degrees C/W
3D Packaging increases Performance Density and enables system level integration
36
Manufacturable solutions exist, and are being optimizedManufacturable solutions are knownInterim solutions are knownManufacturable solutions are NOT known
Current demands on Packaging technology present difficult challenges
• Major changes will be required in many areas to meet these challenges. These include:– Pb free transition presenting cost, reliability and process
compatibility problems that are not resolved (High Rel. apps.)– A new generation of DFM and DFT will be required for complex
SiP and SoC packaging– Stress induced changes in electrical properties for very thin die
will require new solutions as thinner die emerge– Reliability for through wafer vias and die layer bonding is
unproven– Warpage control for stacked die is essential for large die with fine
pitch interconnect– Interconnect for nano-scale structures– Self assembly for very small die
37
• Thinned wafers• 3D systems integration• Wafer level packaging• Bio-chips• Integrated optics• Embedded/integrated active and passive devices• MEMS• Flexible (wearable) electronics• Printable circuits
– Semiconductors– Light emitters– RF– Interconnect Texflex embroidered interconnects (Fraunhofer IZM)
New Packaging Technologies will be essential
38
Summary of Packaging Evolution
39
• Packaging innovation enables “More than Moore”
– 3D packaging technologies
– Equivalent scaling through functional diversity
• Consumer market drives innovation in packaging:
– Size, power, performance
– Cost, time to market
• New materials are required to meet today’s market demand but will enable many future advances in packaging.
Alternative Component Technologies:
Embedded Components
Printed Electronics
Examples of New Substrate Technology:1) Embedding Active Devices
41
Embedding technology to improve performance at a lower cost
42
Printed Electronics Applications
Displays - $20B
Power - $16B
Lighting - $15B
Signage - $10B
*Data compiled from press and industry reports.
Printed Electronics Applications
43
Air Baggage/Freight, Ticketing, RFID -$20B
Sensors - $10B
Logic/Memory - $30B
*Data compiled from press and industry reports.
2009 Environmentally
Conscious Electronics (ECE)
Roadmap:Future Initiatives for
Sustainability
44
Trend Analysis
• To produce environmentally-conscious electronics the ECE TWG must continue to keep pace with:– Continuing emergence of material restrictions
– Energy efficiency requirements and renewable energy
– End-of life requirements
– Holistic Eco-design requirements
– Sustainable business practices
• As many of these issues are shared by industry, it’s best to work together!
Materials
Materials
Short Term Needs - Identified in 2009 Roadmap
• A strategy and action plan to facilitate low risk conversion of high-reliability applications to Pb-Free solders
• Prepare for possibility of additional substance restrictions under RoHS and/or REACH (HBCDD, phthalates)
• Proactive programs to convert to halogenated flame retardant (HFR) - free and PVC-free material alternatives
47
Pb-Free Conversion by Segment
48
Industry Segment Status
Portable / Consumer Full global conversion to Pb-free. Working improvements to mechanical shock.
Office Systems / Large Business / Communication Systems
Most have taken Pb exemption for mission critical electronics – exemption may sunset ~2014 Working to close Pb-free knowledge gaps.
Medical Products Either out of scope or have taken Pb exemption.
Automotive Mission critical electronics still using SnPb. Entertainment/communication systems moving to Pb-free.
Netcom Many have taken Pb exemption for mission critical electronics – exemption may sunset ~2014 Working to close Pb-free knowledge gaps.
• The components supply chain is rapidly converting to RoHS compliant offerings (Pb-
free) with little motivation to continue to produce SnPb product.
• Taking the Pb exemption has changed the risk profile for High Reliability producers.
Proactive HFR Free/PVC-Free Activities• US EPA Design for Environment Program: Alternatives Assessment
of Flame Retardants for the Electronics Industry– EHS assessment of PCB laminates, report published by end 2009
• iNEMI HFR-Free PCB Project– Technical evaluation of key electrical and mechanical properties
• iNEMI HFR-Free High-Reliability PCB Project
• iNEMI PVC Alternatives Project
• iNEMI-Intel Symposium on Environmentally Friendly Materials – November 11-12, Shanghai, China
49
Materials
Recommendations
• Need for development and implementation of good scientific methodologies to assess true environmental impacts of materials and potential trade-offs of alternatives (LCA-type approach)
• Greater involvement of industry on policy making for material restrictions to assure better understanding of trade-offs inherent in substitutions
50
Energy
Global CO2 Emissions
~ 40 Billion tonnes
~2%
ICT Sector~ 850 Mil tonnes
PC Sector
~ 320 Mil tonnes
ManufacturingSupply Chain Distribution Energy Use
Recovery Recycle
>>
<
The Big PictureClimate/ Energy Example
<
Sources: Smart 2020 Report 2008; IDC; Gartner
How do we get the facts and data?•Standardized Product Lifecycle Assessment•Identifies opportunities & issues•Allows identifying what counts most
Energy Efficiency – Becoming More Common in the Marketplace
53
54
Energy
Situation Analysis– Energy Costs Impacting End User
– Regulations impacting technology choices
– Energy Management• Reducing Energy Use in Data Centers is a Market Opportunity
Needs– More efficient power supply technology
– Harmonize energy management standards (Energy Star, EuP, etc)
– New innovative energy sources
Highlights of These Emerging Technologies
• The advantages of energy efficiency is readily understood.• Technology is attracting the attention• The challenge is to increase energy efficiency while
producing the products at a competitive cost. • Alignment of supply chains for cost reduction to drive
consumer acceptance is needed for solid state illumination
• Currently incentives are imperative for photovoltaics
Recycling-Reuse
57
Recycling-Reuse
Develop metrics and infrastructure for effective resource management
• Quantify & promote dematerialization efforts underway within industry
• Increase information sharing between brand owners and electronics recyclers to increase reuse/recycling efficiencies & lower costs
• Prioritize product & packaging design features that will enable cost-effective, environmentally-responsible reuse/recycling, use data to influence emerging regulations and standards (Basel Convention, R2 guidelines, EPEAT, etc)
Identify opportunities for post-industrial & post-consumer recycled content
• Quantify use of recycled content metals and plastics in “common” electronic components today, identify opportunities for further R&D
Eco-Design
Eco-Design Promote life cycle thinking
• Develop building block approach to LCAs in IT industry (iNEMI Eco-Impact Evaluator Project, in progress)
• Participate in international carbon footprint standards, particularly as they relate to product carbon footprint (PCF) labeling (ex: GHG Protocol)
Encourage harmonization of green procurement standards in both B2B and B2C markets
• Prepare for revision to IEEE 1680 (EPEAT standard for PCs) and future EPEAT standards for printers, servers, etc
• Identify key requirements differences in regional green procurement standards, work towards global harmonization (ex: painted plastics)
• Address emerging retailer interest in sustainability “indexing” in EU, US
Engage in international eco-design standards• Existing ICT/CE Vertical IEC Standard 62075
• New Horizontal “Environmental Conscious Design” IEC Standard 62430
Sustainability
Sustainability Requires Balancing Competing Objectives
•Environmental Regulations do not always lead to sustainability
– Legislating the use of corn based ethanol in automobile fuels without considering environmental, social and economic impacts
– Legislating the use of Compact Fluorescent Lamps without requiring the development of a recycling infrastructure for the mercury in the lamps.
61
62
Sustainability
Electronics as solution to climate change• Smart city planning• Smart buildings• Smart appliances• Dematerialization• Smart industry• I-optimization• Smart grid• Integrated renewables• Smart work• Intelligent transport
Potential Impact: Reduction of 1 billion tons of Green House Gas emissions.
Conclusions
Concluding Thoughts
• New global environmental requirements continue to multiply – faster than industry can effectively respond
• Industry needs to be more proactive in developing solutions that:– Are based on science and engineering, delivering value to customers– Are available in advance of new regulations– Can influence future regulations and stakeholder groups for more
sustainable results
• iNEMI and its members plan to play a significant role in preparing industry for these future needs.
• Sustainability will be a major undertaking for industry as well as society.
• Electronic solutions can help to empower people to live a more sustainable lifestyle
64
Board Assembly Roadmap
Highlights
66
Chapter Overview
Milestones• Team formation:
March 2008• Final report :
Sept. 2008
Contents• Approximately
71 pages / 26,000 words22 Tables / 8 Figures
• Business / Technology• Span: 10 yrs
(2009-2019)
67
Key TrendsBusiness Environment
• Higher level of service demands or opportunities placed on EMS
• EMS companies are expanding offerings to include services in a wider range of a product’s life cycle
• Increased role of EMS/ODM and materials/equipment suppliers in R&D and process development
• Continued migration to low cost regions
• The demands on cost reduction, and consequent low margins in this segment, are driving consolidation among EMS companies
• Thermal Management migration from passive cooling to active cooling
• Lower escape and defect rates
68
Key TrendsMain Drivers for Development in Board Assembly• Aggressive reduction of conversion cost• Transition to environmental and regulatory requirements • Reduction in New Product Introduction (NPI) Time• Increased Component I/O Density
69
NPI Capabilities Enhancement PrioritiesShort-term Priorities (1 – 3 years)• Elimination of hard tooling from current manufacturing processes• Elimination (or easy identification) of counterfeit parts from the supply
chainMedium-term Priorities (3 – 7 years)• Modeling and simulation tools need to push towards the reduction /
elimination of Functional Verification steps. • DfX rule systems need to be consolidated but be flexible enough to
accommodate new component and assembly technologies - industry standards are valuable but only if they can have a much shorter development and revision cycle than what is supported today.
Long-term Priorities (8+ years)• NPI cycle time can be improved with a change to deposited materials
which could replace discrete components. This could also be accompanied by different delivery methods.
• Material developments may help qualify high reliability applications.• New interconnect technologies may provide flexible routing options,
reducing or eliminating PCB fabrication cycle time.
70
Key TrendsTechnical Trends (examples of solutions)SiP solutions• Embedded components• Flexible tooling solutions • Optimized production equipment sets • Optimized production line configurations
71
Impact of Embedded Passive Implementations
Embedded Passive Type
Board Assembly Impact
Second Level Substrate
Handling / Manufacturing Process which does not adversely impact the embedded passive performance
Reduction in the number of placement machines
Need for placement equipment with higher flexibility
Known good substrate
Increased board thickness due to additional layers
Increased thermal mass of substrates
Package Level Substrate
Need for placement equipment with higher flexibility
Known good substrate
Advancements in board handling due to increased adoption of ceramic substrates
Increased thermal mass of substrates
Interconnect Level
Equipment for integration of the passives on the termination
Known good die
Interconnect technologies for the passives on the termination
Reliability understanding of integration of the passives on the interconnect
Assembly Materials Technology Needs Parameter Definition 2007 2009 2011 2019
Bar Solder
Lead-free % US 30% 50% 75% 95%
Lead-free % WW 75% 90% 95% 95%
Alloy SAC/Sn-Cu SAC/Sn-Cu SAC/Sn-Cu SAC /Sn-Cu
AlloyLow Temp
Low Temp
Solder Pastes
Lead-free % US 30% 50% 75% 90%
Lead-free % WW 60% 80% 85% 90%
Alloy
SAC Lower Silver SAC Lower Silver SAC/Low Temp.
Lower Silver SAC/Low Temp. Lower Silver SAC/Low Temp.Temp
Halogen-free 85% 90% 95% 95%
Recycle ratio 5% 10% 25% 25%
Wave Solder FluxVOC Free 40% 50% 60% 90%
Halogen free 95% 95% 95% 95%
Die Attach PreformsThermal conductivity critical 85% 90% 90% 90%
Matched CTE capability 5% 7% 25% 50%
Die Attach Adhesives
Lead-free compatibility JEDEC +260 reflow, small die, paste
JEDEC L1 @260 JEDEC L1 @260 JEDEC L1 @260JEDEC L1 @260
Lead-free compatibility JEDEC +260 reflow, large die, paste
JEDEC L2 @260 JEDEC L1 @260 JEDEC L1 @260JEDEC L1 @260
High thermal (polymer based) paste >30 W/m-K >50 W/m-K >100 W/m-K >100 W/m-K
Compatibility with Low-k ILD, paste
JEDEC L2 @260 90 nm tech
JEDEC L1 @260 65 nm tech
JEDEC L1 @260 45 nm tech
JEDEC L1 @26032 and below nm tech
Pre-applied polymer DA to silicon JEDEC L3 @260 JEDEC L2 @260 JEDEC L2A @260 JEDEC L1 @260
Assembly Materials Technology Needs(2)
Underfills
Lead-free FC in package (Laminate) BGA balls only
JEDEC L3 @ 260, BGA balls only
JEDEC L2 @ 260, BGA balls only
JEDEC L1 @260, FC bump and BGA balls
JEDEC L1 @260, FC bump and BGA balls
Lead-free FC in package (ceramic), BGA balls only
JEDEC L1 @260, BGA balls only
JEDEC L1 @260, BGA balls only
JEDEC L1 @260, FC bump and BGA balls
JEDEC L1 @260, FC bump and BGA balls
Low K ILD JEDEC L3 @26090 nm tech
JEDEC L2 @26065 nm tech
JEDEC L2 @26045 nm tech
JEDEC L2 @26045 nm tech
Pre-applied FC JEDEC L3 @260 JEDEC L2 @260 JEDEC L2A @260 JEDEC L2A @260
Large Die 25 mm Low K 25 mm low K 30 mm low K 30 mm low K
CSPPre-applied Lead-free
Reworkable5%
Reworkable25%
Reworkable25%
Conformal CoatingsLead-free Compatible with
Lead-free residuesCompatible with Lead-free residues
Compatible with Lead-free residues
Compatible with Lead-free residues
VOC VOC-Free VOC-Free VOC-Free VOC-Free
Nano-materialsAs fillers Small Commercial
Quantities Large Quantities?
Key
Current Capability
In Development
Research Needed
74
Technology Gaps and Challenges
Materials
• PCB / Substrate– Higher use of flexible (especially for Portables) and low loss materials
(especially for Communications and Medical)• Increased use of LCP
– Substrate technologies also need to be able to keep up with the increasing density of board designs and miniaturization.
– The issues of CTE (coefficient of thermal expansion) mismatch at the 2nd level interconnect, package warpage and resulting assembly problems
– Decreasing pad diameters impacting the reliability of the second level assembly
– Transition to embedded passives (in Portables)– Halogen Fire Retardant - free development process impacts?
• 01005– Component availability for the range of values required– Cost– Assembly process development
75
Technology Gaps and ChallengesMaterials
Die attach• Preform use will increase, driven by thermal conductivity and CTE
requirements • Lead-free compatible
– Higher reflow temperatures and new materials– Compatibility with new solder masks
• Low thermal resistance materials due to increased power density and thermal management– Alternative fillers and fiber technology
• Compatibility with stress-sensitive low-K material• Thermal and moisture resistant polymers• Non-Ag fillers to reduce cost• Lower temperature cure to reduce assembly cost and reduce
warpage for stress sensitive applications
76
Technology Gaps and Challenges
Materials
Conformal Coatings
– Conformal coating materials/processes that are compatible with lead-free solder materials & processes, to help mitigate lead-free issues such as Sn-whisker formation
– Compatibility and wetting with various lead-free materials (mold compounds, solders, solder mask…)
– Low or non-VOC (Volatile Organic Compound) conformal coatings
77
Technology Gaps and ChallengesMaterials
Solder• Fundamental understanding of lead-free solder material metallurgy,
processability, and reliability• Next generation solder materials
– Replace the high cost Ag-containing alloys for certain cost-sensitive applications
– Meet the need for ultra-low temperature attachment requirements for new polymer based products
– Improve the SAC alloys in order to overcome several critical concerns and provide a wider process window
• Copper dissolution during wave / selective soldering and rework• Reliability under high strain• Reliability under high strain rate (mechanical shock)• Reliability for smaller solder joints with low stand-off• Reliability of various “mixed” alloys due to reflow, wave soldering, rework• Controlled release of alloy alternatives (process impact warning)
– New interconnect technologies deploying nano-materials to support decreased pitch
78
Technology Gaps and ChallengesMaterials
• Underfill– Reworkable underfills for large die/packages and fine pitch
packages– Underfill chemistries to meet fill time and voiding requirements
for components with low stand-off– Higher temperature lead-free reflow profiles require underfills
to have improved thermal and hydrolytic stability– Underfill compatibility– Pre-applied underfills to both silicon and substrate to drive
down cost– Selective encapsulation and bonding (such as corner bond)
• Cycle time and consistency are some of the issues to be resolved
79
Technology Gaps and ChallengesProcesses
Paste Deposition• The widening range of required paste volume deposited on mixed
technology assemblies is pushing traditional stencil design rules to their limit– Finer solder powder for fine pitch applications– Need for stencil, printing, and materials technologies to increase the
consistency of the deposit– Increased stencil design accuracy (<12.5µm for 01005)
– Increased transfer efficiency with lower area ratio• Thicker stencil, smaller aperture
– Non-traditional technologies for solder paste deposition– Interconnect materials patterned on the PCB without the use of a
mask, stencil or screen
80
Technology Gaps and Challenges
Equipment
Placement Equipment• Capability to monitor the incoming component quality
real-time, during the placement process (while still providing a reasonable ROI)
• Integration of press fit technology in the SMT process will improve productivity with the higher adoption of flexible tooling
• Odd form capabilities• Flexible circuit assembly• Increased capabilities with aggressive pricing
81
Technology Gaps and Challenges
Processes & Equipment
Reflow Equipment• More efficient reflow technologies, possibly combining reflow
technologies such as thick film elements, microwave elements, positive thermal expansion elements, and induction heating, with conventional convection reflow
• Vapor phase
Lead-Free Wave & Selective Soldering• Equipment upgrade• Design guidelines• Improvement in flux chemistries to promote wetting• Achieving complete PTH hole-fill for large and thick boards
Reflow Technology Forecast Parameter Metric 2007 2009 2011 2013 2019
Temperature Delta Performance
Lead-free ProcessingMaintenance
Cross Conveyor Uniformity at Peak temperature -LF profile (°C)
7 7 5 4 4
Along Conveyor Uniformity at Peek temperature -LF profile (°C)
10 10 7 5 5
Peak Temperature Repeatability of a given thermal couple (°C)
5 5 4 3 3
Inert Capability Scfh (Std ft³/hour), (ppm levels) 100 100 100 100 100
Cooling rates Solder joint reliability 4°/sec 6°/sec 6°/sec 6°/sec 6°/sec
Flux Management Flux collection Self Cleaning Self Cleaning
Advanced flux chemistry and better containment
Advanced flux chemistry and better containment
Elimination of flux management
Cost of Operation, Energy & Consumption Reduction in operating costs 70% 60% 50% 40% 40%
Traceability
Ability to link process parameters and changeovers to equipment
GEM/SECS
Data logging XML connectivity SPC
Auto collection of data and warnings
Closed loop controlTracking of all products
and materials processed
Change over time
Total time from one product to the next with significant temperature profile change
25 minutes 20 minutes 17 minutes 15 minutes 10 minutes
83
Technology Gaps and Challenges
Processes
Rework
• Increasing package density and smaller components with lower stand-off challenge assembly cleaning and rework
• High component pin counts, larger component body sizes, and tighter component pitches/smaller land patterns, will challenge rework placement accuracy and reflow techniques, and impact rework yields
• Narrower process window for rework due to higher lead-free process temperatures
• Rework for fine pitch (0.4mm) devices and 01005
84
Technology Gaps and Challenges
Processes
Rework
• PTH– Complete hole-fill and Cu dissolution for lead-free rework
(using a mini-pot) – Process to remove and replace PTH in a single step
• Area array packages– Mini-stencil paste printing– Special tooling for package size >50mm– MSL (Moisture Sensitivity Level) issue
85
Technology Gaps and Challenges
Processes & Equipment
• Development of automated printing, dispensing, placement, and rework equipment capable of the pitch requirements for SiP package assembly
• The increased need for 3D board assembly requires innovation in every step of the board assembly process– Paste deposition, component placement and attachment,
inspection and test, etc.– Equipment supply base to support material handling of
flexible/low loss substrates
• Optical interconnects will generate challenges for Board Assembly materials, methods and equipment
86
Technology Gaps and Challenges
Inspection, Test and Reliability
• Inspection/Test technologies need to keep up with the increasing density of board designs and complexity of component packages
• Industry standard for ion chromatography testing as related to product reliability
87
Disruptive Technologies and Events
Environmental Drivers• New interconnect materials development driven by REACH regulations
• New industry (iNEMI) pro-activity toward HFR-free and other issues
• Development of alternative materials (nano solder, conductive adhesives)and processes (warm assembly, nano-velcro) driven by energy consumptionand carbon footprint considerations
Convergence of Packaging and Assembly• Will drive changes in industry supply chain
Printing Process• The need for finer pitch, smaller volume deposits, combined with non-planar
surfaces, may drive alternative deposition schemes (movement from stencilprinting to dispensing / jetting).
• Cutting edge, fine pitch packages are developed for Portable products, butthe same packages will get used for larger boards in other segments.Sometimes, a 0.4 mm pitch component will be next to a large CCGA. This willplace extreme divergence in print volume requirements leading to hybridassembly approaches.
88
Disruptive Technologies and Events
Energy Costs Will Drive New Process and Materials Development as well as Geographic Footprint for Assembly
• With dramatic changes in the energy infrastructure, significant changes will occur in the development and deployment of low energy consuming materials and processes.
• Manufacturing site location considerations will factor in costs of energy and transportation.
Embedded PCBs• Embedding active, passive, and optical components in PCBs, in various
formats (e.g. bare die, packaged parts, and modules), will present challenges for the PCB fabrication and assembly processes, and will inevitably impact the configuration of the supply chain.
• Process development, test, reliability, yield, and cost are some of the issues to be addressed.
Printed Electronics• Printed Electronics will have direct impact on many elements of the
Board Assembly supply chain, including equipment, materials, and processes.
89
Business Issues / Potential Barriers
• Supply chain readiness to deal with the transition to lead-free/HFR-free/REACH/?– Ability for the supply chain to support both lead
containing and lead-free BoM’s– Ability to support the cost reduction targets with
the transition to lead-free/HFR-free• Increased energy consumption, raw material cost
increase, and yield issues– EMS, ODM and OEM companies need to work on creative
engineered solutions to bridge these gaps
90
Business Issues / Potential Barriers
• Emerging technologies– With R&D transitioning to low cost geographies, government,
academia and industry consortia will need to formulate ways to adopt and develop emerging technologies (such as nano-technology) into the board assembly process, in the global outsourcing environment
• DFM in the global outsourcing environment requires closer interactions and collaboration across the supply chain– Industry standards need to be further developed to facilitate
and streamline information flow
Concluding ThoughtsImpact of the Recession
91
• Strengthening of vertical development teams (across design / supply chain)
• Will delay new technologies requiring significant investments (both capital and R&D)
• Increased consortial activity on environmental efforts (reduce total industry investments)
• Increased industry cooperation to determine their priorities for closing Technology Gaps
91
Conclusions• Consumer electronics has become the major driving force for our
industry:– New technology to enable miniaturization– Relentless cost reduction– Volume manufacturing capability
• Packaging is Key Enabler providing higher density & smaller size:– More than Moore– 3D configurations, Improved performance
• New global environmental requirements continue to multiply –faster than industry can effectively respond.– iNEMI and its members plan to play a significant role in preparing
industry for these future needs.• Sustainability will be a major undertaking for industry as well as
society. • Electronic solutions can help to empower people to live a more
sustainable lifestyle.
92
2011 iNEMI Roadmap
Preview
9494
2011 iNEMI Roadmap Goals• Maintain/expand strong linkages with other technology roadmaps/organizations • Strengthen Product Emulator value• Strengthen linkages with European and Asian organizations • Expand emphasis on disruptive events (business and technical)• Expand emphasis on prioritizing technical and market gaps and needs throughout
roadmap• Improve the “Executive Summaries” in individual chapters by highlighting the key
points from the chapter• Establish Aerospace / Defense PEG for 2011 cycle • Transition TWG Chapter on Sensors to MEMS focus • Move organic substrates to “Packaging” TWG to reduce confusion • Restore TWG Chapter on Energy Storage & Conversion Systems • Utilize Web based meeting option to increase roadmap meeting efficiency
9595
2011 Technology Working Groups (TWGs)
Organic PCB BoardAssembly Customer
RF Components & Subsystems
OptoelectronicsLarge Area, Flexible Electronics
Energy Storage & Conversion Systems
Modeling, Simulation, and Design
Packaging &
Component Substrates
SemiconductorTechnology
Final Assembly
Mass Storage (Magnetic & Optical)
Passive Components
Information Management
Test, Inspection & Measurement
Environmentally Conscious Electronics
Ceramic Substrates
Thermal Management
Connectors
MEMS/Sensors
Red=Business Green=Engineering Blue=Manufacturing Blue=Component & Subsystem
Solid State Illumination
Photovoltaics
9696
2009/11Product Emulator Groups
Product Emulator Chair(s) 2009 Chair(s) 2011
Automotive Products Jim Spall, Delphi Jim Spall
Medical Products Anthony Primavera, Boston Scientific
Anthony Primavera, Micro Systems Eng. Bill Burdick, GE Research
Consumer / Portable Products Susan Noe, 3M Shahrokh Shahidzadeh, Intel
Office/Large Business System Products
David Lober, IntelDavid Copeland, Sun
David Lober, IntelDavid Copeland, Sun
Network, Data, Telecom John Duffy, Cisco Need Chair
Aerospace & Defense Not Covered TBD, Lockheed Martin
9797
2009 TWG Leadership Status
Business Processes / Technologies Chair(s) Co-Chair(s) Information Management Eric Simmon, NIST Jeff Pettinato, Intel Design Technologies Modeling, Simulation & Design Tools Yishao Lai, ASE S.B. Park, Binghamton U. Environmentally Conscious Electronics Need Chair Thermal Management Ravi Prasher, Intel Azmat Malik, Consultant
Manufacturing Technologies Final Assembly John Allen, Celestica Reijo Tuokko, Tampere U. Board Assembly Dongkai Shangguan,
Flextronics Aaron Unterborn, Microsoft Ravi Bhatkal, Cookson
Test, Inspection & Measurement Mike Reagin, Delphi
9898
2011 TWG Leadership (cont.)Component / Subsystem Technologies
Chair(s) Co-Chair(s)
Semiconductor Technology Paolo Gargini, Intel Alan K. Allan, Intel
Optoelectronics Dick Otte, Promex William Ring, WSR
Photovoltaics Jim Handy, Objective-Analysis Alain Harrus, Cross Link
Packaging Bill Bottoms, NanoNexus William Chen, ASE
Passive Components Philip Lessner, Kemet
Connectors John MacWilliams, Consultant
RF Components Ken Harvey, Advantest Eric Strid, Cascade MicroTech
MEMS / Sensors John McKillop, Tekton LLC Raffaella Borzi, IMEC
Large Area, Flexible Electronics Dan Gamota, Printovate Jan Obrzut, NIST
Energy Storage & Conversion Systems
Need Chair Need Co-chair
Interconnect Substrates (Ceramic) Howard Imhof, Metalor Ton Schless, Sibco
Interconnect PCB John T. Fisher, IPC Henry Utsunomiya, Consultant
Mass Data Storage Roger F. Hoyt, Consultant Tom Coughlin, Coughlin Associates
Solid State Illumination Marc Chason, Consultant
9999
Format for TWG Chapters • Executive Summary (1page)• Introduction• Situation (Infrastructure) Analysis
– Manufacturing Equipment– Manufacturing Processes– Materials– Quality/Reliability– Environmental Technology– Test, Inspection, Measurement (TIM)
• Roadmap of Quantified Key Attribute Needs• Critical (Infrastructure) Issues• Technology Needs:
- Prioritized Research, Development - Grouped into Categories: Mfg. Processes, Environment & Energy, Enterprise Systems, Materials and Design. Category Subheadings; Areas For Innovation, Implementation Tools and Cross Cutting System Issues.
- Implementation• Gaps and Showstoppers• Recommendations on Potential Alternative Technologies• Contributors
100100
2011 Roadmap Schedule
• 3Q2009: Recruit Product Sector Champions, teams and refine data charts/Begin 2011 Roadmap Newsletter & send 2009 PEG chapters 8/1/09
• 3/4Q09: Product Sector Champions Develop Emulators – September 9, 2009 – Teleconference with P.E. Group Chairs– September 17, 2009 Web based meeting TWG/PEG Chairs (key attributes)– October 9, 2009 - Roadmap PEG Kick-off with PEG/TWG/TC at SMTAI– December 17 , 2009 – Web based Teleconference with TC on PEG Emulator review
• 2009 “Word” chapter, format, Exec. Summary emailed to each TWG chair (Word) 1/4/2010
• Organizing Teleconference with TWG Chairs 1/11/2010: • February , 2010 PEG Workshop/TWG Kick-off CA:
– Product Sector Tables Complete – PEG Chapter rough drafts written– Cross cut issues are initially addressed
101101
2011 Roadmap Schedule - Continued
• April 9, 2010 TC/PEG/TWG face to face chapter status review meeting at APEX
• May 6, 2010 Telecon with TWG Chairs, Preliminary PEG Chapters Due• May 2010 – Open Roadmap TWG Presentations in Las Vegas, NV (ECTC)• June , 2010 European Roadmap Workshop – TBD• June , 2010 – Asian Roadmap Workshop – TBD • July 1, 2010 – TWG Drafts Due for TC Review• August 4, 2010 – TC Face-to-Face Review with TWG Chairs at TBD• September 22, 2010 Final Chapters of Roadmap Due• October , 2010 Council of Members Briefing SMTAI • October 31, 2010 – Edit, Prepare Appendix A-D, Executive Summary • November 20, 2010 – Go To “Press” • December 5, 2010 – Ship to Members • April, 2011 – Industry presentation at APEX
102102
Optoelectronics and Optical Storage
Organic Printed Circuit Boards
Magnetic and Optical Storage
Supply ChainManagement
Semiconductors
iNEMIInformation
ManagementTWG
iNEMIMass Data
Storage TWG
iNEMI / IPC / EIPCOrganic PWB
TWG
iNEMI / ITRS / MIG
PackagingTWG
iNEMIBoard Assembly
TWG
Interconnect Substrates—Ceramic
iNEMI Roadmap
iNEMIOptoelectronics
TWG
Ten Contributing Organizations
iNEMI / MIG / ITRSMEMSTWG
