24
925 INDEX Note: Page numbers for defining references are given in bold color . &*%$#@! (ceiling function) 53 I CC 139 (vee) 197 !$ (ABEL XNOR) 251 ! (ABEL NOT) 251, 252, 363 != operator, ABEL 259 # (ABEL OR) 251 $ (ABEL XOR) 251 & (ABEL AND) 251 &, VHDL concatenation operator 276, 502, 743 * suffix 552, 554 + operator, ABEL 705 .AP suffix, ABEL 628 .AR suffix, ABEL 628 .C. symbol, ABEL 638 .CLK suffix, ABEL 628 .FB suffix, ABEL 633 .OE suffix, ABEL 391, 628 .PIN suffix, ABEL 633 .Q suffix, ABEL 633 .SP suffix, ABEL 628 .SR suffix, ABEL 628 .X. symbol, ABEL 252 /= operator, VHDL 287, 427 / prefix, ABEL 250 :, in bus name 327 := operator, ABEL 628 := operator, VHDL 290 :> operator, ABEL 628 <= operator, ABEL 259 <= operator, VHDL 287 < operator, ABEL 259 < operator, VHDL 287 == operator, ABEL 259 = operator, ABEL 252, 254 = operator, VHDL 287, 427 >= operator, ABEL 259 >= operator, VHDL 287 -> operator, ABEL 257 > operator, ABEL 259 > operator, VHDL 287 @ALTERNATE directive, ABEL 251 @CARRY directive, ABEL 444 @DCSET directive, ABEL 260 ^b binary prefix, ABEL 259 ^h hexadecimal prefix, ABEL 259 _L suffix 318, 354, 356 , Exclusive OR symbol 305, 411 ’ prefix, as in ’139 354 0 0 3 0 and 1 3, 7, 8, 25, 80, 86, 195, 317, 836 0s catching 547, 548 0-set 300 0x prefix 29 1 3 10’s complement 35 10’s-complement representation 50 1076, IEEE arithmetic packages 281 1164, IEEE standard logic package 273, 276, 277, 281 128V64 872 16V8 733, 798, 802 16V8C 674, 685 16V8R 685 16V8S 685, 687 1-bit parity code 60 1-out-of-10 code 51 1-out-of-m code 351 1-out-of-n code 55, 572 1s catching 547, 548 1s-counting machine 580, 799, 819 1-set 300 20V8 486, 687, 707 22V10 486, 689, 798, 802 2421 code 50 27128 844 27256 844 27512 844

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Page 1: INDEX [wakerly.org]wakerly.org/DDPP/DDPP3_mkt/ddpp3ix.pdf · INDEX Note: Page numbers for ... clocked assignment operator, := 628 clocked truth-table operator, :> 628 ... 243 Brayton,

925

INDEX

Note: Page numbers for defining references are given in bold color.

&*%$#@! (ceiling function) 53∆ICC 139∧ (vee) 197!$ (ABEL XNOR) 251! (ABEL NOT) 251, 252, 363!= operator, ABEL 259# (ABEL OR) 251$ (ABEL XOR) 251& (ABEL AND) 251&, VHDL concatenation operator

276, 502, 743∗ suffix 552, 554+ operator, ABEL 705.AP suffix, ABEL 628.AR suffix, ABEL 628.C. symbol, ABEL 638.CLK suffix, ABEL 628.FB suffix, ABEL 633.OE suffix, ABEL 391, 628.PIN suffix, ABEL 633.Q suffix, ABEL 633.SP suffix, ABEL 628.SR suffix, ABEL 628.X. symbol, ABEL 252/= operator, VHDL 287, 427/ prefix, ABEL 250:, in bus name 327

:= operator, ABEL 628:= operator, VHDL 290:> operator, ABEL 628<= operator, ABEL 259<= operator, VHDL 287< operator, ABEL 259< operator, VHDL 287== operator, ABEL 259= operator, ABEL 252, 254= operator, VHDL 287, 427>= operator, ABEL 259>= operator, VHDL 287-> operator, ABEL 257> operator, ABEL 259> operator, VHDL 287@ALTERNATE directive, ABEL 251@CARRY directive, ABEL 444@DCSET directive, ABEL 260^b binary prefix, ABEL 259^h hexadecimal prefix, ABEL 259_L suffix 318, 354, 356⊕, Exclusive OR symbol 305, 411’ prefix, as in ’139 354

00 30 and 1 3, 7, 8, 25, 80, 86, 195,

317, 836

0s catching 547, 5480-set 3000x prefix 291 310’s complement 3510’s-complement representation 501076, IEEE arithmetic packages

2811164, IEEE standard logic package

273, 276, 277, 281128V64 87216V8 733, 798, 80216V8C 674, 68516V8R 68516V8S 685, 6871-bit parity code 601-out-of-10 code 511-out-of-m code 3511-out-of-n code 55, 5721s catching 547, 5481s-counting machine 580, 799, 8191-set 30020V8 486, 687, 70722V10 486, 689, 798, 8022421 code 5027128 84427256 84427512 844

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926 Index

2764 8442n-to-n encoder 3762-to-4 decoder 352, 354, 3553-to-8 decoder 357, 3594000-series CMOS 1354-to-16 decoder 3594-to-2 encoder 37854 prefix 98, 13554-series parts 137, 1685-to-32 decoder 3595-variable Karnaugh map 307, 5745-V-tolerant inputs 173, 1745-V-tolerant outputs 1746-variable Karnaugh map 3087497 78974ACT74 66674ALS (Advanced Low-power

Schottky TTL) 16774ALS74 77074AS (Advanced Schottky TTL)

16674AS374 77374AS4374 77374F (Fast TTL) 16774F373 76974F374 76974F74 666, 76974H (High-speed TTL) 16674L (Low-power TTL) 16674LS (Low-power Schottky TTL)

166, 66974LS00 16874LS138 33674LS139 33674LS74 542, 548, 627, 768, 769,

77074LS86 33674 prefix 98, 13574S (Schottky TTL) 16674S174 76974S373 76974S374 76974S74 76974-series ICs 31274-series parts 135, 13774-series TTL 166

74VHC1G00 1474x00 137, 168, 329, 33474x02 329, 33474x03 32974x04 329, 33474x08 329, 33474x10 329, 33474x109 548, 66674x11 329, 33474x112 66674x125 38774x126 38774x138 137, 143, 335, 357, 359,

361, 385, 405, 415, 475, 477, 703–704

74x139 335, 354, 355, 359, 40574x14 329, 33474x148 378, 472, 473, 475, 47774x151 335, 399, 402, 469, 472,

47374x153 335, 391, 401, 40574x157 335, 401, 470, 478, 75474x160 69974x161 69974x162 69974x163 696, 696–704, 705, 720–

723, 76074x164 714, 72374x166 714, 72374x169 70374x174 67274x175 67174x181 439, 439–44074x182 335, 44174x194 714–716, 732, 733, 754,

76074x20 329, 33474x21 329, 33474x240 39074x241 390, 76074x245 39074x251 402, 40474x253 40274x257 40274x266 32974x27 329, 334

74x280 335, 413, 41574x283 335, 422, 423, 436–438,

75474x299 71674x30 329, 33474x32 329, 33474x373 535, 67374x374 535, 672, 704, 76074x375 66674x377 673, 723, 754, 760, 76274x381 335, 44074x382 44074x49 37274x540 39074x541 387, 41574x682 335, 424, 426, 47874x74 66674x83 43674x85 422, 423–42674x86 329, 334, 412, 420, 478,

73274x prefix 138, 35482S100 3408421 code 508B10B code 56, 71, 748-input priority encoder 3788-to-3 encoder 3769s’ complement 38

Aa, asynchronous event frequency

768ABEL 9, 16, 249–263

!$ (XNOR) 251! (NOT) 251, 252, 363!= operator 259# (OR) 251$ (XOR) 251& (AND) 251+ operator 705.AP suffix 628.AR suffix 628.C., clock edge 638.CLK suffix 628.FB suffix 633

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Index 927

ABEL (continued).OE suffix 391, 628.PIN suffix 633.Q suffix 633.SP suffix 628.SR suffix 628.X. symbol 252/ prefix 250:= operator 628<= operator 259< operator 259== operator 259= operator 252, 254>= operator 259-> operator 257> operator 259@ALTERNATE directive 251@CARRY directive 444@DCSET directive 260^b binary prefix 259^h hexadecimal prefix 259attribute suffix 391, 628, 632buffer keyword 252case sensitivity 249CASE statement 630clocked assignment operator, :=

628clocked truth-table operator, :>

628com keyword 250comments 250compiler 249, 563constant expression 362counters 705current-state-variables 634dc keyword 260device declaration 250don’t-care input combination

260ELSE clause 253, 630ENABLE keyword 252end statement 252equation block 254equations 250

state variable on lefthand side 630

ABEL (continued)equations statement 250GOTO statement 630identifier 249IF statement 630input-list 257, 262intermediate equation 252, 483invert keyword 252istype keyword 250language processor 249module statement 249neg keyword 252next-state-variables 634NOT prefix 250operator precedence 251other declarations 250output-list 257, 262pin declarations 250pin definitions 363pos keyword 252precedence 251property list, istype 250range 258reg keyword 628relation 258relational expression 258relational operators 258retain property 675set 258, 629, 634state 630state_diagram 629state diagram 629–637state-value 630state-vector 629string 250test_vectors 251, 262test vectors 251, 638title 250truth_table keyword 257truth table 257, 260, 628unclocked assignment operator,

= 252, 254unclocked truth-table operator,

-> 257WHEN statement 253WITH statement 636

abnormal state 600, 725, 726absolute maximum ratings 173absolute maximum ratings, TTL

168access time from address 846, 858access time from chip select 846,

858AC fanout 110AC load 115, 758Active-CAD xxActive-HDL xxactive high 317active-high clock 530active-high pin 319active level 2, 317, 321, 323, 354,

356, 473active-level naming convention

318active low 317active-low clock 530active-low pin 319active mode 846active pull-up 127active region 150actual parameters, VHDL 276adder 430adders 430–443adding out 199, 212, 213, 432addition operator 705address hold time 859address input 832address setup time 859adjacency diagram 620adjacent states 620advanced courses xviiafter keyword, VHDL 295AHC (Advanced High-speed

CMOS) 137AHCT (Advanced High-speed

CMOS, TTL compatible) 137

A-law PCM 848, 852Aldec, Inc. xxAlfke, Peter 183, 784algebraic operator 196

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928 Index

algorithmic state machine (ASM) 645

chart 645all inclusion 561, 587alpha particle 58Alternate Mark Inversion (AMI) 72ALU 398, 430ambiguous state diagram 585, 587,

590Amerasekera, E. A. 921American National Standards

Institute (ANSI) 316, 455American Standard Code for

Information Interchange (ASCII) 53

amplifier 150analog 3analog electronics 1analog-to-digital converter 718analog vs. digital 3–6, 7–8, 79analysis

combinational-circuit 193AND gate 6, 82, 196, 204, 219

CMOS 93AND operation 197AND-OR circuit 203, 212, 214,

218, 219, 220, 223, 248, 346AND-OR device 337AND-OR-INVERT (AOI) gate,

CMOS 94, 185AND plane, PLA 346anode 146ANSI See American National

Standards Instituteapplication-specific IC (ASIC) 16–

17, 313, 577, 605, 750, 758design 14, 23, 312, 534

approved-part number 897approved parts list 897architecture, VHDL 268architecture, VHDL 269architecture-control fuses,

GAL16V8 344architecture definition, VHDL 269,

270Archuleta, George iv

arguments, VHDL 276arithmetic and logic unit (ALU)

439arithmetic packages, IEEE 1076

281arithmetic shift 743array, VHDL 274

type matching 286array, VHDL 274array index, VHDL 274array literal, VHDL 275array slice, VHDL 276array type, unconstrained 276array types, VHDL 274arrow, state-diagram 556ASCII See American Standard

Code for Information Interchange

ASIC See application-specific ICASIC routing 758ASM See algorithmic state

machineASM chart 645assert 317associative law 198asterisk, meaning of xviiasymmetric output drive 137

TTL 161asynchronous design 2asynchronous input 750asynchronous inputs, flip-flop 541asynchronous input signal 762asynchronous signals 659, 750asynchronous SRAM 861Asynchronous Transfer Mode

(ATM) 176ATM See Asynchronous Transfer

Modeattribute statement, VHDL 816attribute suffix, ABEL 391, 628,

632Auclair, Dan 844automatic tester 904auto-router 902axiom 195

Bβ 151baby from hell 5back annotation 897back-end design process 266balanced code 71barrel shifter 463, 468, 500Bartee, T. C. 298base 26base, transistor 149basis step 200BCD See binary-coded decimalBCD addition 50BCD code 351, 372BCD decoder 353bed of nails 904begin, VHDL 269behavioral description, VHDL 289behavioral design, VHDL 289behavioral model 900Belgard, Richard A. 12bias 39bidirectional bus 391bidirectional data bus 861bidirectional pins, PLD 342, 391,

682bidirectional shift register 714big picture 23billions and billions 48, 55, 240,

311, 456, 465, 853, 893bill of materials (BOM) 313binary adder, serial 749binary addition 32binary-addition table 32binary-coded decimal (BCD) 48binary counter 705binary decoder 352, 405binary digit 25, 26, 80binary division 47–48binary encoder 376binary operator 199binary point 27binary prefix, ABEL 259binary radix 26binary rate multiplier 789

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Index 929

binary subtraction 32binary-subtraction table 32binary-to-hexadecimal conversion

27binary-to-octal conversion 27binomial coefficient 49, 56, 240,

570bipolar junction transistor (BJT)

84, 149–152bipolar logic family 85bipolar PAL devices 687bipolar PLA circuit 346bipolar PROM 842Bipolar Return-to-Zero (BPRZ) 72bipolar ROM 840biquinary code 50Birkhoff, G. 298Birkner, John xxiibistable 531–534, 604bit 26, 80bit, VHDL 271bit_vector, VHDL 271bit cell 69bit line 836bit rate 69bits per second 69bit time 69BJT See bipolar junction

transistorBlakeslee, Thomas R. 784, 921block diagram 312, 313, 314, 324,

325, 405, 476board-level design 22, 921Bolton, Martin 785BOM See bill of materialsBoole, George 194, 298boolean, VHDL 271, 272Boolean algebra 194, 298

See also switching algebrabootstrap ROM module 837borrow 32, 43, 43, 432boundary inputs, iterative-circuit

421, 747boundary outputs, iterative-circuit

421, 747BPRZ See Bipolar Return-to-Zerobps 69

branching method 229, 243Brayton, R. K. 300breakdown, diode 147Brown, Charlie 534bubble 83, 90bubble-to-bubble logic design 2,

321, 356, 359, 404, 412, 474buffer 320buffer, VHDL 270buffer amplifier 80buffer keyword, ABEL 252bugs 5buried flip-flops 602buried macrocell 873burn-in 910burst mode 863bus 315, 326, 332, 898

bidirectional 391open-drain 131

bus holder circuit 670bus transceiver 390, 392BUT 305BUT flop 654BUT gate 305butification 459byte 28

CC 10, 11C++ 10, 11CAD See computer-aided designCadence Design Systems 265CAE See computer-aided

engineeringCampbell, D. S. 921canonical product 208, 215, 220,

230canonical sum 208, 209, 215, 220,

223Cantoni, Antonio 785capacitance, stray 114capacitive load 114, 115, 333capacitive loading 171capacitors, decoupling 112, 158capacitors, filtering 112carburetor 4

carry 32, 43, 43carry bit 800carry generate 434carry lookahead 434carry lookahead adder 435carry out 431carry propagate 434CAS_L (column address strobe)

868CAS-before-RAS refresh cycle 870cascaded synchronizers 772cascading input, iterative-circuit

747cascading inputs, comparator 423cascading inputs and outputs,

interative-circuit 421cascading output, iterative-circuit

747CASE, ABEL 630Case, Brian 12case sensitivity

ABEL 249VHDL 269

case statement, VHDL 292CAS latency 872cathode 146, 146causality 330, 535CCD See charge-coupled deviceCD See compact discceiling function 53central office (CO) 4, 718central processing unit (CPU) 831character, VHDL 271, 272characteristic equation 548, 552,

558, 559, 562, 573, 577, 593characteristic impedance 192characteristic impedance Z0 913charge-coupled device (CCD) 855Charlie Brown 534check bits 60checksum 68checksum code 68Chicago, Illinois 808, 825chip 6chip-select (CS) input 845chip-select setup 859chip vs. IC 12

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930 Index

CINmax 140circle 556circuit description 194, 313circuit specification 312circular reasoning 569circular shift 743Cisco Systems xxiiCL 122clamp diode 156, 173clamping diodes 918clam shell 904Clare, Christopher R. 645CLB See configurable logic blockclear 535, 541clear input 660, 905clock 7, 530, 531

distribution 177frequency 530gated 714in synchronous system 750jitter 664period 530recovery 733skew 663, 664, 750, 757, 761tick 530, 550

clocked assignment operator, := 628

clocked synchronous state machine 531, 550

clocked truth-table operator, :> 628clock-enable input 542clock skew 750Cluley, J. C. 921CML See current-mode logicCMOS (complementary MOS)

85–144, 176, 385, 7584000-series 135AND 93AND-OR-INVERT (AOI) gate 94,

185gates 336inverter 88–90latch-up 112logic 80, 88NAND gate 90NOR gate 90

OR-AND-INVERT (OAI) gate 95, 185

OR gate 93transfer characteristic 124transmission gate 123

CMOS/TTL interfacing 102, 105, 136

CMOS load 141CO See central officeCoburn, James 73code 48, 351coded state 569, 587, 620coded states 620code rate 78codes 48–56code word 48Cohen, Danny 724collector, transistor 149colon, in bus name 327column-address register 869combinational carry output 707combinational circuit 7, 82, 193,

529speed 219

combinational-circuit analysis 193, 209–214

combinational-circuit synthesis 193, 215–235

combinational multiplier 446combinational vs. combinatorial

343combination lock 582combination-lock state machine

800, 820combinatorial 240combining theorem 199, 220, 239com keyword, ABEL 250command input 751comments

ABEL 250VHDL 269

common-emitter configuration 150common-mode signal 177communication 314commutative law 198compact disc (CD) 4, 81, 848

compact-disc player 831companded encoding 848comparator 419, 476, 488

iterative 421parallel 421

comparator, serial 748comparators 419–430comparing numbers 33compatible states 614compiler

ABEL 249VHDL 265

complement 196of a logic expression 202

complementary MOS See CMOScomplementary MOS (CMOS)

load 141TTL interfacing 102, 105, 136

complement number system 35complete set 305complete sum 227, 248, 309complete test set 903complex PLD (CPLD) 15, 16, 23,

872–881, 891programming technology 349

component, VHDL 283component declaration, VHDL 283component failure rate 909, 911component library 897component location 897component model 899component statement, VHDL 282component type 897component value 897computer-aided design (CAD) 9,

199, 317, 320, 895, 895program 591software 590, 591, 758, 759tools 9–12, 895–902, 920

analog simulator 899computer-aided design (CAD) tools

895–902computer-aided engineering (CAE)

895computing the radix complement

36

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Index 931

concatenation operator &, VHDL 276, 502, 743

concurrent signal-assignment statement, VHDL 286

concurrent statement, VHDL 282conditional concurrent signal-

assignment statement, VHDL 287

condition input 751conference circuit 850configurable logic block (CLB) 882connection flag 898consensus 200, 246consensus term 617, 626, 674consensus theorem 200constant, VHDL 274constant, VHDL 272constant declaration, VHDL 274constant expression, ABEL 362constant outputs, PLA 339constraints 267contact bounce 667controllability 907control unit 750Conway, Lynn 183, 645, 785cooling 176core logic 171Cortner, J. Max 921cosmic ray 58, 79cost 6, 16, 17, 22, 23, 409, 861,

902, 903, 908combinational-circuit 220, 225,

228of PLD-based designs 693state-machine 570, 572, 575,

579, 798, 802Costello, D. J. Jr. 73counter 693–707, 751

in ABEL 705cover 199covering theorem 199covers 226CPLD See complex PLDCPU See central processing unitCRC See cyclic-redundancy

checkcritical race 611, 611

critical signal paths 901CS-controlled write 859cube representation 237current

direction, CMOS 105direction, TTL 160flow, CMOS 105flow, TTL 160leakage 88, 127, 147sinking 105sourcing 105TTL sinking 158TTL sourcing 158

current-mode logic (CML) 175–179

current spikes 112TTL 158

current-state-variables, ABEL 634cursing 243custom LSI 17custom VLSI 348cut off (OFF) 151cut set 609CV2f power 122, 136cyclic-redundancy-check (CRC)

code 65

Ddata bit 332dataflow description, VHDL 286dataflow design, VHDL 286data hold time 859data output 832data setup time 859data sheet 97

TTL 168data unit 750Davidson, Edward S. iv, xxiiDC balance 71, 733DC fanout 110dc keyword, ABEL 260DC load 102, 115, 758DC noise margin 96, 101, 170

HIGH-state 142LOW-state 142TTL 160

DC noise margin, TTL 161DDR-DRAM (double-data-rate

synchronous DRAM) 891dead time 386deassert 317debounce 668debugging 3, 111decade counter 699decimal codes 48–51decimal decoder 353decimal point 26decimal-to-radix-r conversion 30decision window 767declarations, ABEL 249, 250decode 352decoder 351–374, 703, 833decoding 61decoding glitches 703, 727, 729decomposed state assignment 571decomposed state machine 755decomposition, state-machine 602decoupling capacitors 112, 158delay 244, 266, 267, 330–337,

536, 758maximum 331, 333minimum 333, 336three-state-buffer 386TTL 161typical 331, 333See also propagation delay

delay, feedback-sequential-circuit 624

delay line 855delay path 663delta-delay, VHDl 296DeMorgan’s theorem 200, 485

generalized 202, 204, 206, 212, 231, 374

DeMorgan equivalent symbols 317demultiplexer 405descrambler 733design 605

state-machine 569, 577, 591vs. synthesis 194

design, hierarchical 265design, state-machine 561, 563

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932 Index

design flow 264VHDL 264

design for testability 902–908, 921design for testability (DFT) 903design review 896design-rule checker 899design time 23device declaration 250Devo 644, 785D flip-flop 540–545

CMOS 614with enable 542

DFT See design for testabilitydiagnostic test 902dice 12die 12

plural of 12differential amplifier 176differential inputs 177differential outputs 177digital 3digital abstraction 96, 195digital attenuator 849, 849, 850digital camera 3digital conference circuit 850digital design 1, 5digital logic 80digital phase-locked loop 774digital phase-locked loop (DPLL)

71, 774digital revolution 5digital simulator 899Digital Subscriber Line (DSL) 718digital telephony 718digital-to-analog converter 718digital versatile disc (DVD) 4digital voice coding 852digital voice samples 848digital vs. analog 3–6, 7–8, 79Dillinger, Thomas E. 456diminished radix-complement

system 38diode 84, 146, 836

clamp 173forward-biased 146reverse-biased 146

Schottky 154zener 147

diode action 146diode-AND function 346diode AND gate 148, 156diode breakdown 147diode-drop 147diode logic 145, 164DIP See dual in-line pindiphase 72DIP package 353DIP switch 667directed arc, state-diagram 556distance 58distinguished 1-cell 228, 235, 242distributive law 199divide-by-m counter 693division overflow 48D latch 538, 666, 674, 854documentation 2, 3, 196, 312–330,

353–357, 536, 660–666don’t-care bit 58don’t-care input combination 232,

236ABEL 260

don’t-cares in excitation tables 623don’t-cares in state coding 600don’t-care states 598don’t-care truth-table notation 352double-buffered data 723double-data-rate synchronous

DRAM (DDR-DRAM) 891Downs, Thomas 299downto, VHDL 273, 276DPLL See digital phase-locked

loopdrain, CMOS transistor 87DRAM See dynamic RAMd-set 232, 260DSL See Digital Subscriber Linedual in-line-pin (DIP) package 13,

667dual-inline-pin (DIP) package 330duality 195, 203, 219dual of a logic expression 203Duggal, Akhil xxii

dumb errors 272, 326duty cycle 530, 699, 701DVD See digital versatile discdynamic hazard 247, 750dynamic indicator 660dynamic-input indicator 540dynamic power dissipation 121,

139dynamic RAM (DRAM) 854, 866–

872synchronous (SDRAM) 871tricky timing 869

dynamic range 848

Eeasy-ware 896eclipse 228, 243edge-triggered behavior 540edge-triggered D flip-flop 531,

540–545, 677with enable 542

edge-triggered J-K flip-flop 547EDO-DRAM See extended-data-

out DRAMEEPROM See electrically

erasable programmable read-only memory

electrical characteristics, TTL 168electrical loading 267electrically erasable PLD 349electrically erasable programmable

read-only memory (EEPROM) 843

electronics concepts xviielectrostatic discharge 97electrostatic discharge (ESD) 112else, VHDL 269, 287, 292ELSE clause, ABEL 253, 630elsif, VHDL 292emitter, transistor 149emitter-coupled logic (ECL) 175–

183100K family 18210H family 17910K family 179

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Index 933

enable input 352, 357decoder 359D flip-flop 542multiplexer 402, 405three-state-buffer 389

ENABLE keyword, ABEL 252encoder 376–378end, VHDL 269, 270end-around carry 44end statement, ABEL 252engineering design margins 96engineering workstation 897enhanced synchronous DRAM

(ESDRAM) 891Eniac 84entity, VHDL 268entity, VHDL 269, 270entity declaration, VHDL 269entrepreneur 314enumerated type, VHDL 272, 815EPLD 348EPROM See erasable

programmable read-only memory

equation block, ABEL 254equations, ABEL 250

reverse-polarity 252equations, ABEL, state variable on

lefthand side 630equations statement, ABEL 250Equivalence gate 410equivalent load circuit 115equivalent states 568equivalent symbols 317erasable programmable logic device

(EPLD) 348erasable programmable read-only

memory (EPROM) 842, 910erasing 842flash 843

erasing EPROM 842error 58error-correcting code 61, 415, 733error-correcting decoder 64error correction 61error-detecting code 58, 413, 733error-detecting codes 58–68

error model 58errors in this book xxiiESD See electrostatic dischargeESDRAM (enhanced synchronous

DRAM) 891Eshraghian, Kamran 183Espresso-EXACT 300Espresso-II 244, 300Espresso-MV 244, 300essential hazard 624, 677, 757essential prime implicant 228, 235,

242Ethernet 733

gigabit 176even-parity circuit 413even-parity code 59, 413event attribute, VHDL 643, 678event list, simulator 296excess-2m−1 system 39excess-3 code 50excess-B representation 39excitation 554excitation equation 554, 559, 561,

593, 605excitation maps 574excitation table 573Exclusive-NOR (XNOR) gate 410

comparator 420Exclusive-OR (XOR) gate 304, 410

comparator 420Exclusive-OR function 231exit statement, VHDL 293explicit type conversion, VHDL

510exponent 848expression

ABEL relational 258minimal product-of-sums 231minimal sum-of-products 231product-of-sums 203, 207, 214,

219sum-of-products 203, 207, 211,

214, 216, 217, 219, 299switching algebra 196, 197

expression, ambiguous 198extended-data-out (EDO) DRAM

871

external feedback, PLD 691extra negative number 37, 42

Ff, synchronizer frequency 768failure 58

intermittent 112failure rate 909, 911, 921fall time 125, 758

ECL 180fall time (tf) 114FALSE 3false, VHDL 272fan-in 92

TTL 164fanout 96, 109, 127, 142, 170,

355, 758, 899AC 110DC 110HIGH-state 110, 142LOW-state 109, 142overall 110TTL 160

Farley, Rebecca A. xxiifault detection 300FCC Part 15 901FCT (Fast CMOS, TTL compatible)

142FCT-T (Fast CMOS, TTL

compatible with TTL VOH) 143

feedback input 690feedback loop 193, 531, 532, 533,

534, 535, 537, 604, 605, 609, 615

feedback sequential circuit 531, 534, 604–627

hazards 248Feinsmith, Jason xxiiiferroelectric RAM 854fiber-optic transceiver 176fictional buffer 605, 606, 609field, finite 73, 730field effect 87field-programmable gate array

(FPGA) 11, 15, 16, 23, 313, 349, 799, 882–891

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934 Index

fields, schematic 897FIFO See first-in, first-out

memoryfighting outputs 127, 132, 386filtering capacitors 112fine-line PCB technology 18finite field 73, 730finite induction 200finite-memory design 801, 821finite-memory machine 653finite-state machine 530, 568, 653Fiorino, Mike ivfirst-in, first-out (FIFO) memory

891FIT 909fitter 267, 799fitting 267fixed-OR element (FOE) 340flash EPROM 843, 844flash memory 844flat schematic structure 325Fleischer, Bruce M. xvii , xxi, 183Fletcher, William I. 645flip-flop 7, 534, 540–549, 604,

666asynchronous inputs 541CMOS D 614

floating gate 349floating-gate MOS transistor 348,

842floating input 111, 670

TTL 163floating output 385floating-point representation 848floating signal 385floating state 126, 385floorplan 901flowchart 645flow table 613Flynn, Michael J. 73fmax 691Ford Thunderbird 585for loop, VHDL 293formal parameters, VHDL 276forward-biased diode 146forward resistance 147

Foundation Express digital-design tools xx

FPGA See field-programmable gate array

frame 720Franaszek, Peter 74free-running counter 698front-end design process 265full adder 431, 432, 433full subtractor 432function, VHDL 276

impure 526pure 526

function, VHDL 276functional verification 266, 267function block (FB), Xilinx 873function declaration, VHDL 281function definition, VHDL 276function hazard 704, 750, 784function table 356fundamental-mode circuit 604,

606, 607fun stuff xvii , 2, 577, 604, 896fusible link 346, 842

GG (giga-) 72Gagliardi, R. M. 74gain 151GAL16V8 344, 486, 690, 692GAL16V8C 344, 685, 687GAL16V8R 685GAL16V8S 685, 687GAL20V8 344, 687, 692GAL22V10 689, 692GAL devices 343–344, 685–693Galois, Évariste 73, 730Galois-field arithmetic 604Galois fields 784gate 6gate array 17, 577, 614gate-array design 17gated clock 714gate gobbler 510gate of CMOS transistor 87Gateway Design Automation 265

gating the clock 760Gaubatz, Donald A. xxiigeneralized DeMorgan’s theorem

202, 204, 206, 212, 231, 316, 374

generalized Shannon expansion theorems 304

generate statement, VHDL 283, 453

generic, VHDL 284generic array logic (GAL) 344

See also GAL devicegeneric constant, VHDL 284generic declaration, VHDL 284generic map, VHDL 284giga- (G) 72gigabit Ethernet 176Gill, John xxiiglitch 2, 244, 340, 703, 727, 729,

761, 797glue ICs 14go/no-go test 902Goldstine, Herman H. 298gongs 455GOTO statement, ABEL 630Grabel, A. 183, 456Graham, Martin 921Gray code 51, 57, 352Greek philosophers 644, 785ground bounce 143group-carry lookahead 441group-ripple adder 438guessing game 594, 602–603,

804–808, 823–825Gwennap, Linley xxii, 12

HHachtel, G. D. 300half adder 431half sum 431Hamlet circuit 309Hamming, R. W. 61Hamming code 61, 415Hamming distance 58hardware description language

(HDL) 5, 9, 197, 249compiler 9

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Index 935

hardware model 5, 900Hayes, John P. 921hazard 244–248, 617, 750

dynamic 247, 750essential 624, 677, 757function 704, 750, 784in feedback sequential circuit

248in synchronous design 248static 674, 703, 750static-0 245static-1 244

hazard-free excitation logic 616, 617

HC (High-speed CMOS) 136, 173HCT (High-speed CMOS, TTL

compatible) 136, 669Heater, Courtenay xxiiHellerman, Herbert 530helper output, PLD 364hertz 69hexadecimal addition 34hexadecimal digits A–F 27hexadecimal number system 27–29hexadecimal prefix, ABEL 259hexadecimal-to-binary conversion

28hierarchical design 265hierarchical schematic structure

325, 898HIGH 3, 80, 86, 148, 204, 317high-impedance state 126, 385high-order bit 27high-order digit 26HIGH-state DC noise margin 142HIGH-state fanout 110, 142

TTL 161HIGH-state unit load, TTL 161Hi-Z state 126, 385, 386, 387

multiplexer output 402HM62256 861HM6264 861HM628128 861HM628512 861hold time 266, 540, 541, 548, 549,

677, 848, 856hold-time margin 663

Huntington, E. V. 298Huntington postulates 298Hwang, Kai 73hysteresis 124, 328, 389Hz 69

II/O block (IOB) 878, 886I/O pin, PAL 343I/O pins 405∆ICC 139ICCH, TTL 168ICCL, TTL 168ICCT 139IC type 328IC vs. chip 12identifier

ABEL 249VHDL 269

idle state 569IEEE (Institute of Electrical and

Electronic Engineers) 316IEEE 1076 arithmetic packages 281IEEE 1164 standard logic package

273, 276, 277, 281, 395IEEE standard logic symbols 455,

661IF statement, ABEL 630if statement, VHDL 291I I, TTL 168I IH 101I IL 101I Imax 140impedance vs. resistance 88imply 225impure function, VHDL 526in, VHDL 269, 270in-circuit testing 904includes 226inconsistent state-machine

representations 661independent error model 58index 24induction step 200infant mortality 910information bit 59

initial state 566, 570, 571, 572, 900inout, VHDL 270input

5-V-tolerant 173, 174floating 111PLA 337

input-list, ABEL 257, 262input state 607instantiate 268, 282instructors xxiin-system programmability 350integer, VHDL 271, 272integrated circuit (IC) 12–15, 84Integrated Services Digital Network

(ISDN) 718intermediate equation, ABEL 252,

483intermittent failure 112internal feedback. PLD 691internal state 607Internet Protocol (IP) 4introductory courses xviiinvalid logic level 8inversion bubble 83, 90, 218, 315,

316, 317, 319, 320–323, 356, 357

inverted 1-out-of-n code 55inverter 7, 82, 152–154, 196, 316,

320CMOS 88

inverter, CMOS 88–90inverting gate 219, 355invert keyword, ABEL 252IOH 101IOHmax 104IOHmax, TTL 161IOHmaxC 142IOL 101IOLmax 104IOLmax, TTL 161IOLmaxC 141IOLmaxT 141IOS, TTL 168IP (Internet Protocol) 4irredundant sum 306is, VHDL 269, 270

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936 Index

ISDN (Integrated Services Digital Network) 718

istype keyword, ABEL 250iterative circuit 421, 424

boundary inputs 747boundary outputs 747cascading input 747cascading output 747primary output 747

iterative circuits 747iterative comparator 421iterative consensus 200iterative-consensus algorithm 299iterative widget 747

JJain, Prem xxiiJenkins, Jesse xxiiJ-K application table 577J-K flip-flop 561, 666J-K flip-flop 666Johnson, Howard W. 921Johnson counter 727

self-correcting 729joke 530

really bad 602JPEG 4JTAG port 350juxtaposition 197

KK (kilo-) 72Kane, Patrick xxiiiKarnaugh, M. 299Karnaugh map 221

5-variable 307, 5746-variable 308

keyword, VHDL 269kilo- (K) 72Kirchhoff’s laws 914Kleeman, Lindsay 785Klir, George J. 183, 299kludge 761Knuth, Donald E. iv, 73, 343Kohavi, Zvi 300, 645

L_L suffix 318, 354, 356λ 909laboratory courses xviiLancaster, Don 183larger-scale logic element 319,

323, 353–354large-scale integration (LSI) 14, 15

functions 17Larsen, Ib 183, 784latch 534, 535–540, 604, 666

VHDL inferred 677latching decoder 676latch-up, CMOS 112late-write SSRAM with flow-

through outputs 862late-write SSRAM with pipelined

outputs 863lawyers 126, 340LCD (liquid-crystal display) 372leakage current 88, 101, 127, 147least significant bit (LSB) 27least significant digit 26LED See light-emitting diodeleft, shift-register direction 716Lentz, Robert xxiiilevel shifter 175level translator 175Levesque, A. H. 74, 784LFSR counter 730, 784library, VHDL 280library clause, VHDL 280light-emitting diode (LED 130light-emitting diode (LED) 102,

129, 161, 372Lin, S. 73linear feedback shift register

(LFSR) 603, 604counter 730

line code 69liquid-crystal display (LCD) 372literal 207load

AC 115capacitive 115DC 102, 115

resistive 102load capacitance 114, 171logic, multivalued 244logic 0 8logic 1 8logical addition 197logical multiplication 196logic circuit

combinational 193sequential 193

logic design 1, 5logic designer 314logic-design template 9logic diagram 312, 323–326logic equation 318logic expression 197, 318

complement of 202dual of 203parenthesized 211

logic family 85logic inverter 152

CMOS 88logic level, invalid 8logic symbol 356

74x151 alternate 473traditional 355

logic value 80CMOS undefined 86

lookahead carry circuit 441LOW 3, 80, 86, 148, 204, 317low-order bit 27low-order digit 26Low-power Schottky TTL (LS-

TTL) 669LOW-state DC noise margin 142LOW-state fanout 109, 142

TTL 161LOW-state unit load, TTL 160Low-Voltage CMOS (LVC) 174,

670LSB See least significant bitLSI See large-scale integrationLS-TTL See Low-power Schottky

TTLlunch 3LVC See Low-Voltage CMOS

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Index 937

MM (mega-) 72macros 312magnetic bubbles 855magnitude comparator 419Mailhot, Paul xximain machine 602majority function 454Manchester code 72Mano, M. Morris 298, 645mantissa 848marginal notes xviiimarginal pun xviiimarginal triggering condition 534margins, engineering design 96Marquand, A. 298Mars 76mask 841mask charge 842mask-programmable ROM 841mask ROM 841master/slave J-K flip-flop 546master/slave S-R flip-flop 545master latch 540Matick, Richard 74maximum delay 331, 333maximum-length sequence 730maximum-length sequence

generator 730maxterm 207, 220, 230maxterm i 208maxterm list 209, 220Mazzola, Mario xxiiMcClure, James xxiiMcCluskey, Edward J. iv, xxii ,

236, 298, 299, 300, 644, 645, 784, 921

McFadden, Robert xxiiiMCM (multichip module) 18McMullen, C. 300Mead, Carver 183, 645, 785Mealy machine 551, 555, 556,

557, 566, 568, 582, 605Mealy-type output 551, 558, 752,

796, 798

mean time between failures (MTBF) 768, 769, 771, 772, 773, 911, 912

mechanical constraints 901mechanical encoding disk 353medium-scale integration (MSI)

14, 23, 362functions 14, 17, 312, 467–477

mega- (M) 72memory 7, 14, 414

first-in, first-out (FIFO) 891Mercury Capri 585metal-oxide semiconductor field-

effect transistor (MOSFET) 85–88

metastability 536, 537, 538, 540, 541, 546, 609, 644, 757, 762, 764–773, 891

metastability resolution time 766metastable 533, 764metatheorem 203Michels, Diana 12Michelson, A. M. 74, 784microprocessor 14, 326, 376, 389,

414, 531, 768, 772, 831, 843, 844, 845, 909

Microprocessor Report 12microsecond (µsec) 6mil 18Millman, J. 183, 456minimal-cost equations 572, 575,

578, 579minimal cut set 609minimal product 230minimal product-of-sums

expression 231minimal-risk equations 572, 575,

578minimal sum 225, 226, 227, 228,

229, 230minimal sum-of-products

expression 231minimization programs 236–244minimize 220minimum delay 331, 333, 336minimum distance 59

minimum pulse width 536minterm 207, 220, 221, 223minterm i 208minterm list 208, 220, 236minterm number 208, 221, 236minuend 32µ-law PCM 848mnemonic documented state (MDS)

diagram 645model, hardware 5modem 733module statement, ABEL 249modulo-m counter 693modulus 693Moebius counter 727Moore’s Law xv, 19Moore machine 551, 556, 557,

560, 565, 587, 605Moore-type output 551, 556, 558,

632, 752, 798Moore-type outputs 797MOSFET (metal-oxide

semiconductor field-effect transistor) 85–88

MOS ROM 840MOS transistor 85

floating-gate 348most significant bit (MSB) 27, 34,

37most significant digit 26Mott, T. H., Jr., 299m-out-of-n code 56movies 5MPEG-2 4m-product function 234Mr. Rogers 534MSB See most significant bitMSI See medium-scale

integrationm-subcube 58MTBF See mean time between

failuresmultichip module (MCM) 18multiple-cycle synchronizer 771multiple-emitter transistor 156, 164

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938 Index

multiple error 58multiple-output function 236multiple-output minimization 233–

235multiple-output prime implicant

234multiple-valued logic 300multiplex 718multiplexed address inputs 868multiplexer 19, 398–409, 473

ABEL program 21Boolean equation 20CMOS 19enable input 402, 405gate-level design 20MSI building block 20PLD realization 21switch model 19truth table 20VHDL program 21

multiplication dot (⋅) 196multiplier, shift-and-add 753multipliers 446–453multiplying out 199, 211, 213,

216, 217, 432multivalued logic 244Muroga, Saburo 183Murphy’s law 334mutual exclusion 561, 587mux 398

Nnail 904named state 587, 620NAND gate 83, 201, 219, 316, 537

CMOS 90NAND-NAND circuit 214, 218,

219, 220, 248, 346nanosecond (ns) 6nasty realities 757natural, VHDL 274n-bit binary code 351n-bit binary counter 694NBUT gate 654n-channel MOS (NMOS) transistor

87

n-cube 57, 58negate 317negative BCD numbers 49negative-edge-triggered D flip-flop

541negative logic 80negative-logic convention 195, 204negative numbers 34–39neg keyword, ABEL 252nerds 195, 301nested expansion formula 30nested WHEN statement, ABEL 254nesting, IF-THEN-ELSE, ABEL

630net 898net list 267, 283, 898next-state function 553next-state logic 550next statement, VHDL 293next-state-variables, ABEL 634nibble 29nibble mode 871nibble-mode DRAM 871NMOS (n-channel MOS) 87node, state-diagram 556noise 97, 124, 125, 163

switching 143noise immunity, ECL 177noise margin 8, 154, 170

DC 96, 101TTL 160, 161

noncode word 58noncritical race 611noninverting gate 219, 355nonrecurring engineering (NRE)

cost 16, 17, 23Non-Return-to-Zero (NRZ) 69Non-Return-to-Zero Invert-on-1s

(NRZI) 71nonvolatile memory 833, 842, 854NOR gate 83, 202, 219, 316, 537

CMOS 90normal term 207NOR-NOR circuit 219, 220, 248not, VHDL 269notation 138NOT gate 7, 82

NOT operation 196NOT prefix 250npn transistor 150NRE See nonrecurring

engineering costNRZ See Non-Return-to-ZeroNRZI See Non-Return-to-Zero

Invert-on-1sn-to-2n decoder 352n-type material 145null statement, VHDL 278

Oobservability 904, 907octal 387octal number system 27–29octal-to-binary conversion 28odd-parity circuit 413odd-parity code 60off-set 209, 260Ohm’s law 97one-hot state assignment 572

almost 572ones’ complement 38, 77ones’-complement addition 44ones’-complement arithmetic 44ones’-complement subtraction 44one-time programmable (OTP)

ROM 843one-to-one mapping 351on-set 208, 254, 260, 628ooze 128open-collector output 127, 165,

328open-drain bus 131open-drain output 127, 129, 130,

328operator overloading, VHDL 277,

287operator precedence

ABEL 251VHDL 287

optional sections xvii, 38OR-AND circuit 203, 212, 219,

220, 248OR-AND-INVERT (OAI) gate,

CMOS 95, 185

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Index 939

OR gate 7, 82, 197, 204, 219CMOS 93

OR operation 197OR plane, PLA 346Osborne, Thomas E. 645other declarations, ABEL 250others, VHDL 275, 288, 292, 396OTP-ROM (one-time

programmable ROM) 843out, VHDL 269, 270output

5-V-tolerant 174open-collector 127, 328open-drain 127, 129, 130

output asymmetry, TTL 161output-coded state assignment 551,

598, 798, 802, 812output-disable input 164output-disable time 847, 858output-enable (OE) input 164, 845output-enable gate 342output-enable time 847, 858output equation 555, 560, 562, 607output function, state-machine 553output-hold time 847, 858output-list, ABEL 257, 262output loading 100, 101, 109, 110output logic, state-machine 550output logic macrocell 687output polarity, GAL 344output-polarity control 344, 486outputs, fighting 127, 132outputs, PLA 337output-select multiplexer 633output stage, TTL 157output table 560, 562output timing skew 741overall fanout 110

TTL 161overbar notation 196, 356, 357overdrive 904overflow 43

rules 41two’s-complement 41, 42

overloaded output, TTL 161, 162overshoot 173

Ppackage, VHDL 280package, VHDL 281package body, VHDL 281packed-BCD representation 49pad ring 171page-mode read cycle 870page-mode write cycle 871PAL10H8 687PAL10L8 687PAL12H6 687PAL12L6 687PAL14H4 687PAL14L4 687PAL16H2 687PAL16L2 687PAL16L8 340, 342–343, 344,

362, 364, 405, 486, 674, 681, 682, 692

PAL16R4 682PAL16R6 682PAL16R8 681, 682PAL16Rx 692PAL20L8 343, 344, 483, 682, 692PAL20R4 682PAL20R6 685PAL20R8 685PAL20Rx 692PALCE16V8 344, 690, 692PALCE20V8 344, 692PALCE22V10 692parallel comparator 421parallel data 69parallel-in, parallel-out shift register

712parallel-in, serial-out shift register

712parallel-to-serial conversion 712parasitic SCR 112parenthesization

switching algebra 198parenthesized logic expression 211parity bit 59parity-check matrix 61Parker, Kenneth P. 921partial product 46

partitioner 799parts list 898parts qualification 897party line 385, 386, 387passive pull-up 127patents 74path, signal 119path sensitization 300PCB See printed-circuit boardPCB designer 901PCB layout 895, 897, 898PCB-level design 22PCB routing 758PCB traces 18p-channel MOS (PMOS) transistor

87PDP-11 minicomputer 837Pellerin, David 265pepperoni 12perfect induction 198, 206perfume 100PERL 10, 11permanent failure 58Peterson, W. W. 73phase splitter 156, 164physical model 900picosecond (ps) 6pin declarations, ABEL 250pin definitions, ABEL 363pin diagram 13pin list 898pin locking 881pin number 328, 897pinout 13, 353pipelined outputs 552Pixar 5pizza 12PL 122PLA See programmable logic

arrayplace and route 267PLD See programmable logic

devicePLD-based design 312, 593, 600,

799PMOS (p-channel MOS) 87

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940 Index

pneumatic logic 183pn junction 145, 150pnp transistor 150politics 3port, VHDL 270port, VHDL 269, 270port declaration 270port map, VHDL 282, 283positional number system 26positive ECL (PECL) 182positive-edge-triggered D flip-flop

540–545positive logic 80, 356positive-logic convention 195, 204,

205, 317pos keyword 252postponed-output indicator 545,

660postulate 195power 102power consumption

CMOS 96, 113TTL 122

power dissipationdynamic 121, 139quiescent 121static 121

power-dissipation capacitance 121, 139

power-down input 846power supply 112power-supply rails 101, 107power-supply voltage 100, 101,

171, 331, 333, 608, 611, 770precedence

ABEL operator 251switching algebra 197, 203VHDL operator 287

precharge 866predefined types, VHDL 271preset 535, 541preset input 660, 905primary inputs and outputs,

iterative-circuit 421primary output, iterative-circuit

747prime (′) 196

prime implicant 226essential 228, 235, 242multiple-output 234redundant 243secondary essential 229, 243

prime-implicant table 242prime-implicant theorem 226, 298prime notation 196prime-number detector 215, 221,

225, 232primitive flow table 618, 618principle of duality 203principle of superposition 915printed-circuit board (PCB) 18,

330, 758, 904printed-circuit-board layout 199printed-wiring board (PWB) 18priority 377priority encoder 377, 471private branch exchange (PBX) 4problem solving 2procedure, VHDL 279process, VHDL 289process, VHDL 289process statement, VHDL 289product code 66product component 446, 448product functions 234product of sums 199product-of-sums expression 203,

207, 212, 214, 219product term 207product-term allocation 875product-term allocator 876product terms, PLA 337programmable array logic (PAL)

device 15, 340–343programmable logic array (PLA)

15, 337–340bipolar circuit 346constant outputs 339diagram 338

programmable logic device (PLD) 11, 14, 15, 16, 23, 313, 479–500, 549, 551, 563, 573, 577, 602, 681–692, 796–812

compiler 391

complex See complex PLD (CPLD)

programmer 349vs. simulation 11

programmable read-only memory (PROM) 349, 842

biploar 842programmer 349, 842

programmable switch matrix (PSM) 889

programmer vs. logic designer 313programming 318

CPLD 349EEPROM 843EPLD 348EPROM 842mask ROM 841PROM 842

programming an EPROM 842programming vs. state-machine

design 564, 661programs 325project leader 314PROM See programmable read-

only memorypropagation delay 96, 138, 332,

336, 536, 536, 539, 540, 624, 677, 690, 691, 912

propagation delay tp 119property list, istype 250Prosser, F. P. 645P-set 300pseudorandom counting sequence

733pseudorandom sequence generator

603, 604p-type material 145pull-down resistor 162, 164, 180,

906pull-up, active 127pull-up, passive 127pull-up resistor 127, 162, 163, 164,

385, 670pull-up-resistor calculation 133pulse catcher 618–624, 627pulse input 645pulse-mode circuit 645

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Index 941

pulse-triggered flip-flop 545pulse width, minimum 536punctuation 77pure function, VHDL 526Purnell, Jeff xxiipush-pull output, TTL 157

Qquantizing distortion 849quiescent power dissipation 121Quine, W. V. 236, 298, 299Quine-McCluskey algorithm 236,

236–243Q vs. QN 536, 607, 650

RRaaum, Dave xxiirace 611, 620, 750radio-frequency emissions 901radix 26radix-complement system 35radix point 26, 35radix-r-to-decimal conversion 29RAID (redundant array of

inexpensive disks) 67rails, power-supply 101, 107Rambus DRAM (RDRAM) 891random-access memory (RAM)

854–872, 891static (SRAM) 854–861

range, ABEL 258range, VHDL 273range, VHDL 273range attribute, VHDL 279RAS_L (row address strobe) 868RAS-only refresh cycle 869rate of a code 78RC time constant 116, 670RDRAM (Rambus DRAM) 891read/write memory (RAM) 676,

751read/write memory (RWM) 854read-modify-write cycle 870read-only memory (ROM) 676,

832–853

one-time programmable (OTP) 843

realization 216realize 216recommended operating conditions,

TTL 168reconfigurable hardware 349recovery time 537rectangular sets of 1s 224recursing 243redundant array of inexpensive

disks (RAID) 67redundant prime implicant 243reference designator 328, 897reflected code 52reflection coefficient, ρ 915reflections, transmission-line 125,

173, 915refresh cycle 867register 671–674, 751registered carry output 707registered output 627register-transfer language 896, 921reg keyword, ABEL 628relation, ABEL 258relational expression, ABEL 258relational operators

ABEL 258VHDL 287

relay 102relay logic 183reliability 842, 908–912reserved words, VHDL 269reset 535, 900

state-machine 565, 569reset, state-machine 570reset circuit 565resistance, forward 147resistance vs. impedance 88resistive load 102resistor

pull-down 162, 164, 180pull-up 162, 163, 164, 385, 670

calculation 133resolution function, VHDL 396result, VHDL 276

retain property, ABEL 675return, VHDL 276, 277Return-to-Zero (RZ) 71reverse-biased diode 146reverse-polarity equation 252revolution 5right, shift-register direction 716ring counter 704, 725, 736

self-correcting 726ringing 905, 918ripple 422ripple adder 422, 432ripple counter 694rise time 125, 758

ECL 180rise time (tr) 114Robbins, Tom xxiiiRogers, Fred 534rol, VHDL 502ror, VHDL 502rotating drum 855routing 902row-address register 869row latch 869Rudell, R. L. 300running disparity 72running process, VHDL 290RZ (Return-to-Zero) 71

Ssafe state 598, 632, 726sales pitch 5–6SanDisk Corporation 844Sangiovanni-Vincentelli, A. 300saturated (ON) 152saturation 175saturation region 152saturation resistance 152scan capability 543, 644

latch 644scan chain 544scan flip-flop 907scan method 907, 921scan mode 907scan-path method 907

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schematic 283hierarchical 898

schematic capture 896schematic diagram 312, 323–326schematic drawing 214schematic editor 896schematic entry 9Schmid, Hermann 73Schmitt-trigger input 124, 765Schmitt-trigger inverter 837Schottky-clamped transistor 154Schottky diode 154Schottky transistor 154Schwarzenegger, Arnold 534scope, VHDL 526SCR See silicon-controlled

rectifierscrambler 733SDRAM See synchronous DRAMsecond, s 69secondary essential prime implicant

229, 243secret sauce 881security fuse 351Seidensticker, Robert B. 456Seitz, Charles L. 785selected signal-assignment

statement, VHDL 287select statement, VHDL 367self-complementing code 50self-correcting counter 726self-correcting Johnson counter

729self-correcting ring counter 726,

900self-dual logic function 305self-timed systems 785semiconductor diode 84, 145semicustom IC 16sense amplifier 866sensitivity list, VHDL process 290sensor 51sequential circuit 7, 82, 193, 529

uninitialized 900sequential multiplier 448sequential PLD 343

sequential signal-assignment statement, VHDL 290

serial-access memory 855serial binary adder 749serial channel 718serial comparator 748serial data 69serial-in, parallel-out shift register

712serial input, shift-register 712serial output, shift-register 712serial-to-parallel conversion 712serial widget 747series termination 919Sesame Street 146set 535set, ABEL 258, 629, 634setup time 266, 540, 541, 548,

549, 677, 692, 856setup-time margin 663seven-segment decoder 372seven-segment display 372sex 902Shamrock the dog xxiiiShannon, Claude E. 195, 298Shannon expansion theorems,

generalized 304shift-and-add multiplication 45shift-and-add multiplier 753shift-and-subtract division 47shift register 712–733, 751shift-register counter 724shrapnel 347sign 848signal, VHDL 271signal-declaration, VHDL 271signal flags 325, 327signal name 318, 323, 354, 357,

898signal path 119signal vs. variable, VHDL 747sign bit 34, 37signed division 48signed-magnitude adder 35signed-magnitude representation

50

signed-magnitude subtractor 35signed-magnitude system 34signed multiplication 46–47signed vs. unsigned numbers 43sign extension 35, 37, 47, 76silicon-controlled rectifier (SCR)

112parasitic 112

simulation 11, 899inefficiency 900

simulation cycle, VHDL 296, 297simulation time, VHDL 296simulation vs. PLDs 11simulator 10, 899

VHDL 266simultaneous input changes 604,

608, 609single-ended input 178single error 58single stuck-at fault 903single stuck-at fault model 263sinking current 105

TTL 158skew 177sla, VHDL 502slash (/) 315slave latch 540SLDRAM (SyncLink DRAM) 891sll, VHDL 502small-scale integration (SSI) 13,

23, 362, 577, 666smart traffic lights 809, 827sneak path 838Social Security 644software model 900software program 317software tools 9–12, 799

for logic design 196soldering iron 9solder paste 18source, CMOS transistor 87source termination 919sourcing current 105

TTL 158space/time trade-off 718, 747, 749,

784

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spec 100, 312specifications 8, 100speed 5

CMOS 96, 113combinational-circuit 217, 219PAL 344

speed of light 912speed-power product 139

TTL 167SPICE 899, 920spikes, current 112sra, VHDL 502srl, VHDL 502S-R latch 535, 674

with enable 538S-R latch 537S-set 300SSI See small-scale integrationstable 533stable total state 607, 618standard-cell design 14, 17standard cells 312standard functions 14standard logic package, IEEE 1164

273, 276, 277, 281standard MSI functions 312standby mode 846Stark, Brian xxiistate 7, 530, 553

abnormal 600, 725, 726coded 569idle 569initial 571, 572safe 632, 726unused 600, 632

state, ABEL 630state, initial 572state/output table 553, 555, 560,

562state adjacency diagram 620state assignment 577, 581, 583state diagram 553, 556, 560, 562,

564, 584–590, 591, 660ABEL 629–637

state_diagram, ABEL 629state machine 550–584, 750, 764

cost 572, 575design 577, 591reset 569synthesis 591

state machine, decomposed 755state-machine decomposition 602state-machine description language

629, 660state-machine design 561, 563, 569state-machine design vs.

programming 564, 661state memory 550state minimization 614, 619–620state name 555, 556states, total number of 569states, unused 569, 571, 572state table 82, 555, 564, 607, 660state-table reduction 645state-value, ABEL 630state variable 530state-vector, ABEL 629static-0 hazard 245static-1 hazard 244static-column mode 871static-column-mode DRAM 871static hazard 616, 674, 703, 750static power dissipation 121static RAM (SRAM) 854–861

asynchronous 861cell 856

std_logic_1164 VHDL package 281

std_logic_arith VHDL package 281

std_logic_signed VHDL package 281

std_logic_unsigned VHDL package 281

std_logic_vector type, VHDL 276

std_logic type, VHDL 273, 396std_ulogic type, VHDL 396steady-state behavior 244Steger, Jean-Pierre xxiiStone, Harold S. iv, xvi, xxii , 298storage time 154

stray capacitance 114string

ABEL 250VHDL 275

strong typing, VHDL 272structural description, VHDL 283structural design, VHDL 283structural model 900structured logic device description

313Strunk, William, Jr. 455stupid mistakes 899, 902

See also dumb errorssubcube 58submachine 602subtractor 430

full 432subtrahend 32subtype, VHDL 273, 396subtype, VHDL 272suggestive drawings 558sum bit 434sum of products 199sum-of-products expression 203,

207, 211, 214, 216, 217, 219, 299

sum term 207Sunnyvale, California 5, 808, 825surface-mount technology (SMT)

18, 904, 906suspended VHDL process 290switch 667switching algebra 194, 195–209,

298adding out 199ambiguous expression 198associative law 198binary operator 199combining theorem 199commutative law 198consensus theorem 200cover 199covering theorem 199DeMorgan’s theorem 200distributive law 199duality 203

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944 Index

switching algebra (continued)expression 196, 197juxtaposition 197multiplying out 199parenthesization 198precedence 197, 203theorem 198

switching characteristics, TTL 168switching noise 143switch model, CMOS 89symmetric output drive 137, 336synchronization pulse 719synchronization signal 70synchronizer 2, 750, 762

failure 765, 793synchronizing sequence 640synchronous 550synchronous counter 694synchronous design

hazard 248synchronous design methodology

663synchronous DRAM (SDRAM)

871synchronous parallel counter 695synchronous serial counter 695synchronous SRAM (SSRAM) 862

late-write with flow-through outputs 862

late-write with pipelined outputs 863

turn-around penalty 864ZBT with flow-through outputs

864ZBT with pipelined outputs 865zero-bus-turnaround (ZBT) 864

synchronous systems 659, 750–756

SyncLink DRAM (SLDRAM) 891sync pulse 719syndrome 64, 415Synopsys, Inc. xx, 265synthesis 266, 297

combinational-circuit 193state-machine 591vs. design 194

synthesis tools, VHDL 264

system architect 314system reliability 921system testing 164

TT (tera-) 72τ, metastability-resolution time

constant 768, 770T1 link 72tAA 846, 858tACS 846, 858tAH 859tail lights 585tAS 859taxes 809, 827Taylor, Douglas 265T-bird tail lights 585–590, 798,

802, 822tCF 691tclk 766tCO 691tcomb 766tCSW 859tDH 859tDS 859Teenage Mutant Ninja Turtles 187telephone system 4, 718, 831, 848temperature 100, 101, 104, 331,

333, 608, 611, 770, 911temporary failure 58tera- (T) 72termination 102, 192, 918–920termination impedance 915test_vectors, ABEL 251, 262test bench 10, 266, 296, 300test enable (TE) 544, 907test fixture 904test-generation program 903testing 902testing, system 164test input, TI 544test-input generation 733test pads 904test points 904test vectors 351, 903

ABEL 251, 638

text 53text editor, VHDL 265T flip-flop 549, 694, 696

with enable 549tH 691theorem, switching algebra 198The Phone Company (TPC) 4, 72,

73, 718thermal concerns 901Thévenin equivalent 103Thévenin resistance 103Thévenin termination 192Thévenin voltage 103three-state buffer 126, 385–391three-state bus 126, 670

VHDL 396three-state driver 385three-state enable 385three-state output 126, 164, 402,

670VHDL 395

three-state output pin 391threshold 8threshold function 454threshold logic 300tick 550, 551tilde notation 196timeslot 720timing 330–332, 690–692timing analysis 336, 759

tools 337timing analyzer 10timing diagram 83, 313, 330, 558,

565, 567, 660, 662timing generator 736timing hazard 200timing margin 663timing skew 626

output 741three-state-buffer 386

timing specifications 660timing table 331, 663timing verification 266, 267, 899timing verifier 10, 899Tin Toy 5tiny-scale integration 14

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Tison, Pierre 299title statement 250TL7705 565To 768to, VHDL 273, 276tOE 847, 858tOH 847, 858total number of states 569total state 607, 608totem-pole output, TTL 157tOZ 847, 858TPC See The Phone CompanytPD 690tpHL 120tpHZ 386tpLH 120tpLZ 386tpZH 386tpZL 386tr 766trace, PCB 18Tracy, Ted xxiitrademarks 340traditional logic symbols 355traffic-light controller 53, 825

See also Sunnyvaletraffic lights 4transceiver 390, 392transfer characteristic, CMOS 99,

124transfer function 532transient behavior 244transistor 836

bipolar junction 84, 149–152MOS 85n-channel MOS (NMOS) 87p-channel MOS (PMOS) 87Schottky-clamped 154

transistor simulation 152transistor-transistor logic (TTL) 85,

85, 156–169, 176, 681CMOS interfacing 102, 105,

136gates 336load 141noise margin 160, 161

open-collector output 165output stage 157overall fanout 161PLA circuit 346power consumption 122totem-pole output 157

transition/excitation table 573transition equation 555, 559, 562,

591, 593transition expression 560, 561transition frequency 121, 139transition list 590–594, 660transition p-term 592transition-sensitive media 71transition statement 630transition s-term 594transition table 555, 560, 562, 573,

606transition time 96, 114, 125

TTL 161transmission gate 20, 123, 462,

614transmission line 912, 913–918

matching 915reflections 125, 173, 915termination 102

transparent latch 539, 854tri-state output 126TRUE 3true, VHDL 272truth_table, ABEL 257truth table 11, 20, 206–209, 221,

236, 352, 356, 573, 832ABEL 257, 260, 628notation 352

truth-table notation 356, 401tsetup 766, 766tSU 691TTL See transistor-transistor logicTTL/CMOS interfacing 102, 105,

136TTL load 141tubes 146Tuinenga, Paul W. 920Turing machine 530turn-around penalty, SSRAM 864

turning the crank 2, 194, 563, 573, 590, 617, 618, 623, 661, 693

TV 529, 530twisted-ring counter 727two’s complement 37, 77two’s-complement addition 39two’s-complement arithmetic 39–

43two’s-complement multiplication

46two’s-complement subtraction 41two-dimensional code 66two-dimensional decoding 839,

860, 867two-level AND-OR circuit 214, 218two-level NAND-NAND circuit 214,

218two-level NOR-NOR circuit 219two-level OR-AND circuit 219two-pass logic, PLD 365two-phase latch design 760two-phase latch machine 645tWP 859type, VHDL 271

unresolved 396type, VHDL 272type conversion, VHDL 510typical delay 331, 333

UU.S. patents 74µ-law PCM 848unclocked assignment operator, =

252, 254unclocked truth-table operator, ->

257unconstrained array type, VHDL

276undefined logic level 8undefined logic value, CMOS 86undefined region 114, 154underscore, VHDL 269undershoot 173, 917unidirectional error 68unidirectional shift register 714uninitialized sequential circuit 900

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universal shift register 716unreset 565unresolved type, VHDL 396unsigned binary multiplication 45unsigned division 47–48unsigned multiplication 45–46unstable total state 607unused states 569, 571, 572, 600,

632up/down counter 703use clause, VHDL 280user-defined type, VHDL 272

Vvacuum-tube logic 183vacuum tubes 146variable, VHDL 271, 289variable, VHDL 271, 290variable-assignment statement,

VHDL 290variable declaration, VHDL 271variable vs. signal, VHDL 747VCC 90VCR 529VDD 90vee ∧ 197Veitch, E. W. 298Veitch diagram 298verification 266Verilog 265Verilog HDL See Verilogvery large-scale integration (VLSI)

15, 243custom 348design 14

VHC (Very High-speed CMOS) 137, 173

VHCT (Very High-speed CMOS, TTL compatible) 137

VHDL 9, 14, 16, 264, 921/= operator 287:= operator 290<= operator 287< operator 287= operator 287, 427>= operator 287

> operator 287actual parameters 276after keyword 295architecture 268architecture definition 269, 270architecture keyword 269arguments 276array 274array index 274array keyword 274array literal 275array slice 276array types 274attribute statement 816begin keyword 269behavioral description 289behavioral design 289bit_vector type 271bit type 271boolean type 271, 272buffer keyword 270case statement 292character type 271, 272comments 269compiler 265component declaration 283component keyword 283component statement 282concatenation operator & 276,

502, 743concurrent signal-assignment

statement 286conditional 287

concurrent statement 282constant 274constant declaration 274constant keyword 272dataflow description 286dataflow design 286delta-delay 296design flow 264downto 273, 276else keyword 269, 287, 292elsif keyword 292end keyword 269, 270entity 268

entity declaration 269entity keyword 269, 270enumerated type 272, 815equality operator (=) 427event attribute 643, 678exit statement 293explicit type conversion 510false 272for loop 293formal parameters 276function 276function declaration 281function definition 276function keyword 276generate statement 283, 453generic constant 284generic declaration 284generic keyword 284generic map clause 284identifiers 269IEEE 1076, arithmetic packages

281IEEE 1164, standard logic

package 273, 276, 277, 281

if statement 291impure function 526inequality operator (/=) 427inferred latch 677in keyword 269, 270inout keyword 270integer type 271, 272is keyword 269, 270keyword 269library 280library clause 280natural subtype 274next statement 293not operator 269null statement 278operator overloading 277, 287operator precedence 287others keyword 275, 288, 292,

396out keyword 269, 270

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VHDL (continued)package 280

std_logic_1164 281std_logic_arith 281std_logic_signed 281std_logic_unsigned 281

package body keywords 281package keyword 281port 270port keyword 269, 270port map keywords 282, 283predefined types 271procedure 279process 289

running 290sensitivity list 290suspended 290

process keyword 289process statement 289pure function 526range 273range attribute 279range keyword 273relational operators 287reserved words 269resolution function 396result 276return keyword 276, 277rol 502ror 502selected signal-assignment

statement 287select statement 367sequential signal-assignment

statement 290signal-declaration 271signal keyword 271signal vs. variable 747simulation cycle 296simulation time 296simulator 266sla 502sll 502sra 502srl 502std_logic 396

std_logic_vector type 276std_logic type 273std_ulogic 396string 275strong typing 272structural description 283structural design 283subtype 273, 396subtype keyword 272synthesis tools 264text editor 265three-state bus 396three-state output 395to 273, 276true 272type 271type conversion 510type keyword 272uncontrained array type 276unresolved type 396use clause 280user-defined type 272variable 271, 289variable-assignment statement

290variable declaration 271variable keyword 271, 290variable vs. signal 747wait statement 295when keyword 269, 287, 292while loop 295work library 280, 522

VHDL-87 264, 300VHDL-93 264, 300VHSIC 264VIHmax, TTL 161VIHmin 100, 141VIHmin, TTL 158VILmax 100, 140VILmax, TTL 160VLSI See very large-scale

integrationVLSI design 14VOHmin 100VOHmin, TTL 158VOHminC 142

VOHminT 142volatile memory 854VOLmax 100VOLmax, TTL 160VOLmaxC 142VOLmaxT 142voltage, power-supply 333, 608,

611, 770Vulcan 194

Wwafer 12wait statement, VHDL 295Wakerly, Carmela F. ivWakerly, John F. xv, 73, 74Wakerly, Kate xxiiiWakerly, Ralph F. ivWaser, Shlomo 73WE_L (write enable) 870wear-out mechanism 910WE-controlled write 859wedge 196weight 26, 37, 46

of MSB 37weighted code 50Weldon, E. J. Jr. 73Weste, Neil H. E. 183when, VHDL 269, 287, 292WHEN statement, ABEL 253while loop, VHDL 295White, E. B. 455Wickes, William E. 183Widdoes, L. Curtis xxiiwidget, iterative 747widget, serial 747Widmer, Albert 74wimpy logic families 669Windows crashes xxiWinkel, D. E. 645wired AND 132wired logic 132wire lengths 267wire type 898WITH, ABEL 636Wood, Samuel F. xxii

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word line 836word processor 10working digital designers xviiiwork library, VHDL 280, 522worst-case delay 337wrapper 268write cycle 856, 870write-enable (WE) input 854write-pulse width 859writing 314www.ddpp.com xx

XXilinx, Inc. xx, xxiii , 16Xilinx University Program xxiXNOR gate 426, 698, 705XOR gate 304, 306

as comparator 420XOR operation 305XOR structure 707X-series PLD 707X-series PLDs 417

YYoung, Des xxii

ZZBT SSRAM with flow-through

outputs 864ZBT SSRAM with pipelined

outputs 865zener diode 147zero-bus-turnaround (ZBT)

SSRAM 864zero-code suppression 72Zucker, Irwin xxiii