92
DRAWING DRAWING 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 8 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT 3 B 7 ECN REV BRANCH DRAWING NUMBER REVISION SIZE D PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. DRAWING TITLE THE POSESSOR AGREES TO THE FOLLOWING: Apple Inc. SHEET R DATE D A C THE INFORMATION CONTAINED HEREIN IS THE 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. PAGE NOTICE OF PROPRIETARY PROPERTY: A C 3 4 5 6 D B 8 7 6 5 4 2 1 1 2 APPD CK DESCRIPTION OF REVISION K75F MLB_MEMSWAP 1 OF 92 0000892544 A 051-8600 A.0.0 1 OF 110 PRODUCTION RELEASED 2010-04-15 04/14/2010 K75F_MLB 48 52 SMBus Connections 04/14/2010 K75F_MLB 47 51 LPC+SPI Debug Connector 04/14/2010 K75F_MLB 46 50 SMC Support 04/14/2010 K75F_MLB 45 49 SMC 04/14/2010 K75F_MLB 44 47 Internal USB Connections 04/14/2010 K75F_MLB 43 46 EXTERNAL USB CONNECTORS 04/14/2010 K75F_MLB 42 45 SATA Connectors 04/14/2010 K75F_MLB 41 43 FIREWIRE CONNECTOR 04/14/2010 K75F_MLB 40 42 FW: 1394B MISC 04/14/2010 K75F_MLB 39 41 FireWire LLC/PHY (XIO2213B) 04/14/2010 K75F_MLB 38 39 ETHERNET CONNECTOR 04/14/2010 K75F_MLB 37 38 CAESAR II SUPPORT 04/14/2010 K75F_MLB 36 37 ETHERNET (CAESAR II) 04/14/2010 K75F_MLB 35 36 USB HUB 2 04/14/2010 K75F_MLB 34 35 USB HUB 1 04/14/2010 K75F_MLB 33 34 PCI-E Wireless Connector 04/14/2010 K75F_MLB 32 33 DDR3 SUPPORT AND BITSWAPS 04/14/2010 K75F_MLB 31 32 DDR3 SO-DIMM CONNECTOR B 04/14/2010 K75F_MLB 30 31 DDR3 SO-DIMMs 0 & 2 04/14/2010 K75F_MLB 29 30 MEMORY CAPS 04/14/2010 K75F_MLB 28 29 DDR3 VREF MARGINING 04/14/2010 K75F_MLB 27 28 CHIPSET SUPPORT 04/14/2010 K75F_MLB 26 26 CLOCK (CK505) 04/14/2010 K75F_MLB 25 25 EXTENDED DEBUG PORT(XDP) 04/14/2010 K75F_MLB 24 24 PCH DECOUPLING 04/14/2010 K75F_MLB 23 23 PCH GROUNDS 04/14/2010 K75F_MLB 22 22 PCH POWER 04/14/2010 K75F_MLB 21 21 PCH MISC 04/14/2010 K75F_MLB 20 20 PCH PCI/FLASHCACHE/USB 04/14/2010 K75F_MLB 19 19 PCH DMI/FDI/GRAPHICS 04/14/2010 K75F_MLB 18 18 PCH SATA/PCIE/CLK/LPC/SPI 04/14/2010 K75F_MLB 17 17 CPU/PCH GFX DECOUPLING 04/14/2010 K75F_MLB 16 16 CPU NON-GFX DECOUPLING 04/14/2010 K75F_MLB 15 15 STRAPS,PULL UPS,PULL DOWNS FOR PCH AND CPU 04/14/2010 K75F_MLB 14 14 CPU GROUNDS 04/14/2010 K75F_MLB 13 13 CPU POWER 04/14/2010 K75F_MLB 12 12 CPU DDR3 INTERFACES 04/14/2010 K75F_MLB 11 11 CPU CLOCK/MISC/JTAG 04/14/2010 K75F_MLB 10 10 CPU DMI/PEG/FDI/RSVD 04/14/2010 K75F_MLB 9 9 Signal Aliases 04/14/2010 K75F_MLB 8 8 UNUSED SIGNAL ALIAS 04/14/2010 K75F_MLB 7 7 Holes 04/14/2010 K75F_MLB 6 6 Power Conn / Alias 04/14/2010 K75F_MLB 5 5 PROTO 0 DEBUG LEDS 04/14/2010 K75F_MLB 2 2 System Block Diagram K22/K23 ICT/FCT 110 K75F_MLB 04/14/2010 91 PM RESETS ENABLES PGOOD CONST 109 K75F_MLB 04/14/2010 90 POWER CONSTRAINTS 107 K75F_MLB 04/14/2010 89 SMC Constraints 106 K75F_MLB 04/14/2010 88 GRAPHICS CONSTRAINTS 105 K75F_MLB 04/14/2010 87 ENET/FIREWIRE CONSTRAINTS 104 K75F_MLB 04/14/2010 86 IBEX PEAK CONSTRAINTS 103 K75F_MLB 04/14/2010 85 PCIE/DMI/FDI/SATA CONSTRAINTS 102 K75F_MLB 04/14/2010 84 Memory Constraints 101 K75F_MLB 04/14/2010 83 K60/K61 RULE DEFINITIONS 100 K75F_MLB 04/14/2010 82 Display: BiDiVi Support 95 K75F_MLB 04/14/2010 81 Display: Ext DP Connector 94 K75F_MLB 04/14/2010 80 BIDIVI DP MUX2 92 K75F_MLB 04/14/2010 79 Display: BiDiVi Mux1 91 K75F_MLB 04/14/2010 78 Display: Int DP Connector 90 K75F_MLB 04/14/2010 77 Display: Aliases 87 K75F_MLB 04/14/2010 76 MXM PCIE CAPS 86 K75F_MLB 04/14/2010 75 MXM I/O 85 K75F_MLB 04/14/2010 74 MXM PCIe, DP & Power 84 K75F_MLB 04/14/2010 73 S3+S0 FETS 80 K75F_MLB 04/14/2010 72 1.05 S5 SUPPLY 79 K75F_MLB 04/14/2010 71 1.5V / 1.8V VREGS 78 K75F_MLB 04/14/2010 70 5V_S3 / 3V3_S5 VREGS 77 K75F_MLB 04/14/2010 69 IBEX PEAK CORE 76 K75F_MLB 04/14/2010 68 CPU VTT REGULATOR 74 K75F_MLB 04/14/2010 67 VREG: CPU CORE - PHASE 4 73 K75F_MLB 04/14/2010 66 VREG: CPU CORE - PHASES 1-3 72 K75F_MLB 04/14/2010 65 VREG: PPVCORE_S0_CPU 71 K75F_MLB 04/14/2010 64 POWER SEQUENCING PGOOD 70 K75F_MLB 04/14/2010 63 POWER SEQUENCING ENABLES 69 K75F_MLB 04/14/2010 62 AUDIO: Mikey 68 K75F_MLB 04/14/2010 61 AUDIO: Detects/Grounding 67 K75F_MLB 04/14/2010 60 Audio: MLB to I/O Conn. 66 K75F_MLB 04/14/2010 59 AUDIO: Woofer Amp 65 K75F_MLB 04/14/2010 58 AUDIO: Tweeter Amp 1 64 K75F_MLB 04/14/2010 57 AUDIO: FILTER/BUFFER 63 K75F_MLB 04/14/2010 56 AUDIO: CODEC/REGULATOR 62 K75F_MLB 04/14/2010 55 SPI ROM 61 K75F_MLB 04/14/2010 54 CPU FAN 57 K75F_MLB 04/14/2010 53 HD AND OD FAN 56 K75F_MLB 04/14/2010 52 Thermal Sensors 55 K75F_MLB 04/14/2010 51 GRAPHICS / DIMM POWER SENSE 54 K75F_MLB 04/14/2010 50 LAST_MODIFIED=Thu Apr 15 11:21:16 2010 TITLE=K22 ABBREV=DRAWING LAST_MODIFIED=Thu Apr 15 11:21:16 2010 Page (.csa) Date Sync Contents CPU POWER SENSE 53 K75F_MLB 04/14/2010 49 04/14/2010 K75F_MLB 4 4 BOM Configuration 04/14/2010 K75F_MLB 3 3 Power Block Diagram 04/14/2010 K75F_MLB 1 1 Table of Contents Contents Date (.csa) Page Sync SCH,K75F,MLB_MEMSWAP

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    DRAWING

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    3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

    81. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

    III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED

    I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT

    3

    B

    7ECNREV

    BRANCH

    DRAWING NUMBER

    REVISION

    SIZED

    PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

    DRAWING TITLE

    THE POSESSOR AGREES TO THE FOLLOWING:

    Apple Inc.

    SHEET

    R

    DATE

    D

    A

    C

    THE INFORMATION CONTAINED HEREIN IS THE

    2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

    PAGE

    NOTICE OF PROPRIETARY PROPERTY:

    A

    C

    3456

    D

    B

    8 7 6 5 4 2 1

    12APPDCK

    DESCRIPTION OF REVISION

    K75F MLB_MEMSWAP

    1 OF 92

    0000892544A

    051-8600A.0.0

    1 OF 110

    PRODUCTION RELEASED 2010-04-15

    04/14/2010K75F_MLB48 52 SMBus Connections

    04/14/2010K75F_MLB47 51 LPC+SPI Debug Connector

    04/14/2010K75F_MLB46 50 SMC Support

    04/14/2010K75F_MLB45 49 SMC

    04/14/2010K75F_MLB44 47 Internal USB Connections

    04/14/2010K75F_MLB43 46 EXTERNAL USB CONNECTORS

    04/14/2010K75F_MLB42 45 SATA Connectors

    04/14/2010K75F_MLB41 43 FIREWIRE CONNECTOR

    04/14/2010K75F_MLB40 42 FW: 1394B MISC

    04/14/2010K75F_MLB39 41 FireWire LLC/PHY (XIO2213B)

    04/14/2010K75F_MLB38 39 ETHERNET CONNECTOR

    04/14/2010K75F_MLB37 38 CAESAR II SUPPORT

    04/14/2010K75F_MLB36 37 ETHERNET (CAESAR II)

    04/14/2010K75F_MLB35 36 USB HUB 2

    04/14/2010K75F_MLB34 35 USB HUB 1

    04/14/2010K75F_MLB33 34 PCI-E Wireless Connector

    04/14/2010K75F_MLB32 33 DDR3 SUPPORT AND BITSWAPS

    04/14/2010K75F_MLB31 32 DDR3 SO-DIMM CONNECTOR B

    04/14/2010K75F_MLB30 31 DDR3 SO-DIMMs 0 & 2

    04/14/2010K75F_MLB29 30 MEMORY CAPS

    04/14/2010K75F_MLB28 29 DDR3 VREF MARGINING

    04/14/2010K75F_MLB27 28 CHIPSET SUPPORT

    04/14/2010K75F_MLB26 26 CLOCK (CK505)

    04/14/2010K75F_MLB25 25 EXTENDED DEBUG PORT(XDP)

    04/14/2010K75F_MLB24 24 PCH DECOUPLING

    04/14/2010K75F_MLB23 23 PCH GROUNDS

    04/14/2010K75F_MLB22 22 PCH POWER

    04/14/2010K75F_MLB21 21 PCH MISC

    04/14/2010K75F_MLB20 20 PCH PCI/FLASHCACHE/USB

    04/14/2010K75F_MLB19 19 PCH DMI/FDI/GRAPHICS

    04/14/2010K75F_MLB18 18 PCH SATA/PCIE/CLK/LPC/SPI

    04/14/2010K75F_MLB17 17 CPU/PCH GFX DECOUPLING

    04/14/2010K75F_MLB16 16 CPU NON-GFX DECOUPLING

    04/14/2010K75F_MLB15 15 STRAPS,PULL UPS,PULL DOWNS FOR PCH AND CPU

    04/14/2010K75F_MLB14 14 CPU GROUNDS

    04/14/2010K75F_MLB13 13 CPU POWER

    04/14/2010K75F_MLB12 12 CPU DDR3 INTERFACES

    04/14/2010K75F_MLB11 11 CPU CLOCK/MISC/JTAG

    04/14/2010K75F_MLB10 10 CPU DMI/PEG/FDI/RSVD

    04/14/2010K75F_MLB9 9 Signal Aliases

    04/14/2010K75F_MLB8 8 UNUSED SIGNAL ALIAS

    04/14/2010K75F_MLB7 7 Holes

    04/14/2010K75F_MLB6 6 Power Conn / Alias

    04/14/2010K75F_MLB5 5 PROTO 0 DEBUG LEDS

    04/14/2010K75F_MLB2 2 System Block Diagram

    K22/K23 ICT/FCT110

    K75F_MLB04/14/201091

    PM RESETS ENABLES PGOOD CONST109

    K75F_MLB04/14/201090

    POWER CONSTRAINTS107

    K75F_MLB04/14/201089

    SMC Constraints106

    K75F_MLB04/14/201088

    GRAPHICS CONSTRAINTS105

    K75F_MLB04/14/201087

    ENET/FIREWIRE CONSTRAINTS104

    K75F_MLB04/14/201086

    IBEX PEAK CONSTRAINTS103

    K75F_MLB04/14/201085

    PCIE/DMI/FDI/SATA CONSTRAINTS102

    K75F_MLB04/14/201084

    Memory Constraints101

    K75F_MLB04/14/201083

    K60/K61 RULE DEFINITIONS100

    K75F_MLB04/14/201082

    Display: BiDiVi Support95

    K75F_MLB04/14/201081

    Display: Ext DP Connector94

    K75F_MLB04/14/201080

    BIDIVI DP MUX292

    K75F_MLB04/14/201079

    Display: BiDiVi Mux191

    K75F_MLB04/14/201078

    Display: Int DP Connector90

    K75F_MLB04/14/201077

    Display: Aliases87

    K75F_MLB04/14/201076

    MXM PCIE CAPS86

    K75F_MLB04/14/201075

    MXM I/O85

    K75F_MLB04/14/201074

    MXM PCIe, DP & Power84

    K75F_MLB04/14/201073

    S3+S0 FETS80

    K75F_MLB04/14/201072

    1.05 S5 SUPPLY79

    K75F_MLB04/14/201071

    1.5V / 1.8V VREGS78

    K75F_MLB04/14/201070

    5V_S3 / 3V3_S5 VREGS77

    K75F_MLB04/14/201069

    IBEX PEAK CORE76

    K75F_MLB04/14/201068

    CPU VTT REGULATOR74

    K75F_MLB04/14/201067

    VREG: CPU CORE - PHASE 473

    K75F_MLB04/14/201066

    VREG: CPU CORE - PHASES 1-372

    K75F_MLB04/14/201065

    VREG: PPVCORE_S0_CPU71

    K75F_MLB04/14/201064

    POWER SEQUENCING PGOOD70

    K75F_MLB04/14/201063

    POWER SEQUENCING ENABLES69

    K75F_MLB04/14/201062

    AUDIO: Mikey68

    K75F_MLB04/14/201061

    AUDIO: Detects/Grounding67

    K75F_MLB04/14/201060

    Audio: MLB to I/O Conn.66

    K75F_MLB04/14/201059

    AUDIO: Woofer Amp65

    K75F_MLB04/14/201058

    AUDIO: Tweeter Amp 164

    K75F_MLB04/14/201057

    AUDIO: FILTER/BUFFER63

    K75F_MLB04/14/201056

    AUDIO: CODEC/REGULATOR62

    K75F_MLB04/14/201055

    SPI ROM61

    K75F_MLB04/14/201054

    CPU FAN57

    K75F_MLB04/14/201053

    HD AND OD FAN56

    K75F_MLB04/14/201052

    Thermal Sensors55

    K75F_MLB04/14/201051

    GRAPHICS / DIMM POWER SENSE54

    K75F_MLB04/14/201050

    LAST_MODIFIED=Thu Apr 15 11:21:16 2010

    TITLE=K22ABBREV=DRAWINGLAST_MODIFIED=Thu Apr 15 11:21:16 2010

    Page(.csa) Date

    SyncContentsCPU POWER SENSE

    53K75F_MLB

    04/14/201049

    04/14/2010K75F_MLB4 4 BOM Configuration

    04/14/2010K75F_MLB3 3 Power Block Diagram

    04/14/2010K75F_MLB1 1 Table of Contents

    ContentsDate(.csa)

    Page Sync

    SCH,K75F,MLB_MEMSWAP

  • II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

    I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE

    36

    BRANCH

    REVISION

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    IV ALL RIGHTS RESERVEDSHEET

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    D

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    PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

    Apple Inc.

    PAGE

    NOTICE OF PROPRIETARY PROPERTY:

    A

    B

    C

    345678

    D

    B

    8 7 5 4 2 1

    U6806

    J4700

    MIKEY

    (UP TO 14 DEVICES)

    USX2061USX2061

    SKIN TEMP LCD TEMP

    DDR3 1333 CHB

    DDR3 1333 CHA

    FDI LINK

    DISPLAY PORT CONN

    SATA-A1

    MIDBUS PROBE

    X4 DMI

    SO-DIMMS

    SO-DIMMS

    XDP CONNPG 25

    J2500

    Port80,serialPG 51

    PG 56,57

    XDP

    E-NETCONNECTOR

    J3900

    (PORT B)

    (PORT D)

    X1 PCIE GEN1 LANE 2.5GBITPSE-NETMAGNETICS

    PG 39

    T3900

    INTEL

    PG 18

    X1 PCIE GEN1 LANE 2.5GBITPS

    HW

    U93XX

    LPC

    INTERFACE

    PG 18

    PG 19

    DMI INTERFACE XDP CONN

    PG 18

    HDMI/DVI/DP

    PG 19

    PG 19

    PG 18

    PG 18

    PG 18

    PG 2

    0

    PG 18

    PG 19

    PG 19

    PG 20

    U1800

    PG 25U2510

    PG 38 PG 39

    05

    67

    8910

    11

    (SUPPORTED UPTO 4 REQ/GNT)

    FDI INTERFACE

    J8400X4 DP

    X4 DP

    U2600

    INTEL CPU

    SPIBoot ROM

    CPU DIE-PECI HARD DRIVEOPTICAL DRIVE

    PG 13

    U6100

    PG 32

    PG 31

    J3200, J3200

    J3100, J3100

    PG 93

    SUPPORT

    BIDIVIPG 53

    POWER SENSE

    PG 55

    TEMP, CURRENT SENSE

    TEMP SENSORSMXM - GPU DIE

    CPU HEATSINK

    AMBIENT INTAKE

    TO BIDIVI HW

    FAN CONN AND CONTROL

    PCI

    X16 PCI-E GEN2

    13

    2 SO-DIMMS

    PG 10

    POWER SUPPLY

    Fan

    J4300

    SPI

    B,0 BSB

    SMCADC

    PG 34

    GPIOs

    PG 43

    AirPortMini PCI-E

    PG 49

    U4900

    HDA

    6 SATA 2.O PORTS

    HDMI/DVI/DP

    DIGITAL VIDEO OUTPUT

    RGB OUT

    ConnFireWire

    J3400

    DIGITAL VIDEO OUTPUT

    (PORT C)

    PG 41

    U4100

    HDMI/DVI/DP

    SMB

    GB E-NET

    U1000

    2 SO-DIMMS

    J5100

    PrtSer

    PG 61

    J5600, J5601, J5700

    CLK

    LPC+SPI CONN

    Misc

    GPU HEATSINK

    PG 84 J9002

    J9400

    PG 90X4 DP

    CONTROL LOGIC FROM SMC

    INTERNAL DISP

    X4 BIDIRECTIONAL DP LINK

    PG 94

    DIGITAL VIDEO OUTPUT

    (PORT A)

    ANALOG VIDEO OUTPUT

    SATA IBEX PEAK

    SATA-A2SATA-A0

    SYNTH

    SATA 2.0 3GHZ.

    PG 26CK505

    HDPG 45

    SATA CONNJ4510

    J4520

    PG 45ODD

    SATA CONN

    PG 45

    SATA CONNJ4530

    SSD

    PCI-E GEN2UP TO 8 LANES3

    X1 PCIE GEN1 LANE 2.5GBITPS

    U6201Audio

    AudioConns

    Codec

    U6400, U6500SPEAKER AMPS

    HEADPHONES INTERNAL/EXTERNAL

    MICROPHONES LINE INPUT

    J6600,J6601,J6602,J6603

    MXM CONNECTOR

    LGA1156 - CLARKDALE/LYNNFIELD

    USB 96MHZ/PCIE 100MHZ/SATA 100MHZ/BCLK 133MHZ.

    SATA 2.0 3GHZ.

    SATA 2.0 3GHZ.

    CONTROLLER

    U3800

    BCM5764MAND PHY

    XIO2211TI 1394B

    DIMMs

    12

    34

    PWR

    USB 2.0

    CTRL

    12

    PG 46

    J4630

    PORT0 EXT PORT2

    EXT J4610

    PG 46

    43

    IR

    USB HUB 1

    PG 35

    J4780

    PG 47

    CAMERA

    PG 47

    21

    J4620

    PG 46

    PORT1 PG 46

    EXT J4620

    432

    PG 36

    J4750

    SD CARD

    USB HUB 2

    PG 47

    BLUETOOTH

    PG 47

    J4720

    1

    EXT PORT3

    SYNC_DATE=04/14/2010

    System Block DiagramSYNC_MASTER=K75F_MLB

    2 OF 110

    A.0.0051-8600

    2 OF 92

  • G S

    D

    IN

    D1

    D3D4

    S3S2

    GATE

    S1 D2

    II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

    I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE

    36

    BRANCH

    REVISION

    DRAWING NUMBER SIZED

    R

    IV ALL RIGHTS RESERVEDSHEET

    PAGE TITLE

    C

    A

    D

    2 1

    PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

    Apple Inc.

    PAGE

    NOTICE OF PROPRIETARY PROPERTY:

    A

    B

    C

    345678

    D

    B

    8 7 5 4 2 1

    PP3V3_S5_AVREF_SMCPAGE 50

    PP12V_S5:

    12V_S5

    SMCPP3V42_G3H_REG

    CAMERAPP5V_S3_REG

    WM

    IBEX PEAK

    PP12V_S5

    PM_SMC_G2_EN

    PPVCORE_CPUPAGE 71-72

    IBEX PEAK

    MXM

    PP12V_S0_HDD

    AC/DC POWER SUPPLY

    FET (6.9A)

    PAGE 421.0V @ 0.08A

    MAIN MEMORY

    PM_SLP_S3

    PAGE 79 REGSMC VREF

    CARD READER

    PP1V8_S0_REGMXMOPTICAL

    LCD PANELIBEX PEAKAUDIO

    P3V3S3_EN

    PAGE 79

    VCCME, PCH

    P5VS0_EN

    3.3V @ 2.8APAGE 80

    PP3V3_S5_REG3.3V @ 6.2A

    AUDIO

    PP1V95_S3

    PAGE 761.1V @ 30APPVTT_S0

    .65-1.5V @ 90A

    PP1V05_S5IBEX PEAK

    PAGE 76

    FANS

    PP1V05_S01.05V @ 3A

    FET (10.3A)

    ETHERNET

    FET (2.8A)

    PPDDR_S3_REG

    P3V3S0_EN

    BIDIVI FIREWIRE

    BOOT ROM

    MXMPP3V3_S0

    HDD

    1.05V @ 0.4A

    AP

    PP12V_G3H

    PP5V_S0

    PP12V_S0:

    PP12V_S0

    PM_SLP_S3_OD

    HARD DRIVELCD PANEL

    AUDIOPP12V_G3H:

    PAGE 80

    CONTROL

    CPU UNCORE

    SMBUS

    1.5V @ 4.9APAGE 78

    SW (1A)

    CPU MEM

    BT

    PP1V5_S0

    PP12V_S312V @ 0.2APAGE 80

    WM

    P12VS0_EN

    ENET

    PAGE 381.2V @ 0.2APP1V2_S3

    13A (S3 & S0)

    PAGE 74

    PAGE 75

    PAGE 750.75V @ 0.6APP0V75_S0

    MEM_VTT

    FIREWIREAUDIO

    PP3V3_S3

    PAGE 80

    FW

    PAGE 78

    CPU PLL

    IRUSB

    REG

    PAGE 76

    CPU_CORE

    PPLED_PWR

    DCM/FCM

    TEMP SENSOR

    12V S5 FET ( 7A )

    2

    1 C80400.47UF80516V10%X7R

    2

    1R80425%1/16WMF-LF402

    100K

    2

    1R8045

    402MF-LF

    10K1/16W5%

    2

    1R80405%1/16W10KMF-LF402

    21

    R8041

    MF-LF1/16W402

    5%

    10K

    2

    1

    3

    Q80412N7002SOT23-HF1

    45

    321

    4

    8765

    Q8040CRITICALFDS4465_G

    SOI-HF

    Power Block DiagramSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

    P12V

    _S5_

    EN_R

    P12V

    _S5_

    EN_D

    SMC_PM_G2_EN

    P12V

    _S5_

    EN_G

    MAKE_BASE=TRUEVOLTAGE=12VMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmNET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MM

    PP12V_S5_FET=PP12V_G3H_S5_FET

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    8 7 5 4 2 1

    PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

    TABLE_ALT_HEAD

    TABLE_5_ITEM

    TABLE_5_ITEM

    TABLE_5_ITEM

    TABLE_BOMGROUP_ITEM

    TABLE_BOMGROUP_ITEM

    TABLE_BOMGROUP_ITEM

    TABLE_5_ITEM

    TABLE_5_ITEM

    TABLE_5_ITEM

    TABLE_BOMGROUP_ITEM

    CRITICAL BOM OPTIONTABLE_5_HEAD

    PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)

    TABLE_5_ITEM

    TABLE_BOMGROUP_ITEM

    TABLE_BOMGROUP_ITEM

    BOM OPTIONSBOM NAMEBOM NUMBERTABLE_BOMGROUP_HEAD

    CRITICAL BOM OPTIONTABLE_5_HEAD

    PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM

    PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

    TABLE_ALT_HEAD

    TABLE_ALT_ITEM

    TABLE_5_ITEM

    TABLE_BOMGROUP_ITEM

    TABLE_BOMGROUP_ITEM

    TABLE_BOMGROUP_ITEM

    BOM OPTIONSBOM GROUPTABLE_BOMGROUP_HEAD

    TABLE_5_ITEM

    TABLE_5_ITEM

    TABLE_5_ITEM

    CRITICAL BOM OPTIONTABLE_5_HEAD

    PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)

    TABLE_5_ITEM

    TABLE_5_ITEM

    TABLE_5_ITEM

    TABLE_ALT_ITEM

    TABLE_ALT_ITEM

    BOM OPTIONSBOM NAMEBOM NUMBERTABLE_BOMGROUP_HEAD

    CRITICAL BOM OPTIONTABLE_5_HEAD

    PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM

    TABLE_5_ITEM

    TABLE_5_ITEM

    TABLE_5_ITEM

    CRITICAL BOM OPTIONTABLE_5_HEAD

    PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)

    ALTERNATES

    GROUND

    POWER

    SIGNAL

    POWER

    GROUND

    SIGNAL

    SIGNAL

    SIGNAL

    BOARD STACK-UP

    32TOP

    4567

    BOTTOM

    RAW: 335S0663

    BOM Variants

    (338S0489 - BLNK)

    CPU SOCKET & ILM SUB-BOMS

    BOM GROUPS

    ALTERNATE SOCKET VENDORS MUST USE MATCHING ILM

    CPUS

    COMMON

    K75F PARTS

    PCBF,K75F,MLB_MEMSWAP820-2901 K75FMLB11

    K75F1 CRITICALU4900341T0273 IC,SMC,K75F

    1 CPU CRITICAL 3P60GHZ_CKD_CPU337S3910 CKD,SLBTM,PRQ,3.60,73W,1333,K0,4M,LGA

    CRITICALCPU 3P20GHZ_CKD_CPU337S3911 1 CKD,SLBUD,PRQ,3.20,73W,1333,K0,4M,LGA

    518S0685 J9002518S0811

    128S0298 128S0293 C7460,C7461,C7462,C7463

    SCH,K75F,MLB_MEMSWAP051-8600 K75FSCH11

    337S3810 1 CPU CRITICAL 2P66GHZ_LFD_CPULFD,SLBLC,PRQ,2.66,95W,1333,B1,8M,LGA

    LFD,SLBJG,PRQ,2.93,95W,1333,B1,8M,LGA337S3861 CRITICALCPU1 2P93GHZ_LFD_CPU

    CRITICAL337S3828 1 U1800IC,IBEX PEAK B3 PRQ,DESKTOP,FCBGA,P425

    1 CRITICALU6100341T0230 IC,EFI BOOTROM,K74/K75

    359S0157 1 CRITICAL BUF_CLKIC,SLG2AP108,CLK GEN,CK505,QFN3 U2600

    COMMON,ALTERNATE,XDP,BETTER,MXM,XDP_CPU_BPM,INT_VREF,PCH_VRM,BUF_CLK,PRODUCTIONBASIC

    DEV_GROUP XDP_CONN,LPCPLUS,MOJOMUX,CPU_TDIODE

    639-1106 PCBA,MLB,K75F,2.93GHZ,LFD K75F,2P93GHZ_LFD_CPU,BASIC,CPUPOC_IMAX_100_120

    X14MLB LABEL,48.0X4.8825-7122 CRITICAL1

    607-6877 607-6876 SKT_ILM FOXCONN ALTERNATIVE

    CRITICAL1 MOLEX CPU SOCKET AND ILM SKT_ILM607-6876

    MOLEX_SOCKETSUB ASSY,CPU SOCKET,K75F,MOLEX607-6876

    FOXCONN_SOCKETSUB ASSY,CPU SOCKET,K75F,FOXCONN607-6877

    1 CRITICAL MOLEX_SOCKET604-0942 ASSY,PURCHASED,ILM,MOLEX,K75 ILM

    PCBA,MLB,DEV,K75F085-1609 DEVELOPMENT,DEV_GROUP

    1511S0063 SOCKET,LGA1156,CPU-LF U1000 CRITICAL MOLEX_SOCKET

    ILM CRITICAL1 ASSY,PURCHASED,ILM,FOXCONN,K75 FOXCONN_SOCKET604-0988

    CRITICALU1000SOCKET,LGA1156,CPU-LF1 FOXCONN_SOCKET511S0069

    PCBA,MLB,K75F,3.20GHZ,CKD639-1103 K75F,3P20GHZ_CKD_CPU,BASIC,CPUPOC_IMAX_100_120

    PCBA,MLB,K75F,3.60GHZ,CKD639-1105 K75F,3P60GHZ_CKD_CPU,BASIC,CPUPOC_IMAX_100_120

    639-1104 PCBA,MLB,K75F,2.66GHZ,LFD K75F,2P66GHZ_LFD_CPU,BASIC,CPUPOC_IMAX_100_120338S0765 1 U4100 CRITICALIC,XIO2211ZAY,1394B_PCIE,PHY/LINK

    U37011 CRITICAL341T0269 ENET 1MBIT FLASH,CII,K74/K75F

    U3700 CRITICAL1 IC,BCM5764M,68PIN QFN343S0485

    BOM ConfigurationSYNC_MASTER=MASTER SYNC_DATE=N/A

    4 OF 110

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    SIN

    G

    D

    SIN

    G

    D

    S

    II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

    I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE

    36

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    DRAWING NUMBER SIZED

    R

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    Apple Inc.

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    8 7 5 4 2 1

    SILKSCREEN:4

    SILKSCREEN:2

    SILKSCREEN:2

    SILKSCREEN:4

    SILKSCREEN:4

    Battery Off (G3Hot)

    Run (S0/M0)

    Sleep (S3/M1)

    Soft-Off (S5/M1)

    Sleep (S3/M-Off)

    Soft-Off (S5/M-Off)

    State

    On

    N/A

    On

    Off

    Off

    N/A

    Manageability

    1

    0

    1

    11

    SMC_PM_G2_ENABLE

    0

    1

    1

    00

    1

    PM_S4_STATE_L

    0

    0

    100

    0

    PM_SLP_S3_L PM_SLP_S4_L

    0011

    11

    01

    00

    PM_SLP_M_L

    11

    SILKSCREEN:2

    1

    CAN DELETE THESE FOR PROTO1 AND BEYOND

    19 32 33 37 46 62 63 91

    K

    A

    LED550SILK_PART=VCORE_PGOODDEVELOPMENT

    GREEN-3.6MCD2.0X1.25MM-SM

    2

    1R520DEVELOPMENT

    MF-LF1/10W3.3K5%

    603

    4

    5

    3

    Q540DEVELOPMENT

    SOT-3632N7002DW-X-G

    26 63 64 91

    K

    A

    LED520SILK_PART=SLP_MDEVELOPMENT

    GREEN-3.6MCD2.0X1.25MM-SM

    4

    5

    3

    Q520

    DEVELOPMENT

    SOT-3632N7002DW-X-G

    K

    A

    LED500GREEN-3.6MCD2.0X1.25MM-SM

    DEVELOPMENT

    SILK_PART=SLP_S4

    19 62 91

    K

    A

    LED530 SILK_PART=DDR_PGOODDEVELOPMENT

    2.0X1.25MM-SMGREEN-3.6MCD

    2

    1R540

    603

    5%3.3KMF-LF

    DEVELOPMENT

    1/10W

    1

    2

    6

    Q520DEVELOPMENT

    SOT-3632N7002DW-X-G

    62 70 91

    K

    A

    LED540SILK_PART=PCHCORE_PGOODDEVELOPMENT

    GREEN-3.6MCD2.0X1.25MM-SM

    1

    2

    6

    Q540DEVELOPMENT

    2N7002DW-X-GSOT-36362 63 68 91

    2

    1R500

    603

    5%3.3K1/10WMF-LF

    DEVELOPMENT

    2

    1R531

    603

    5%1/10WMF-LF

    NOSTUFF

    3.3K

    2

    1R530

    MF-LF5%

    603

    DEVELOPMENT

    1/10W3.3K

    2

    1R550DEVELOPMENT

    MF-LF1/10W3.3K5%

    603

    4

    5

    3

    Q500SOT-3632N7002DW-X-G

    DEVELOPMENT

    2

    1R510DEVELOPMENT

    603

    5%3.3K1/10WMF-LF

    K

    A

    LED510SILK_PART=SLP_S3DEVELOPMENT

    GREEN-3.6MCD2.0X1.25MM-SM

    19 91

    1

    2

    6

    Q500DEVELOPMENT

    2N7002DW-X-GSOT-363

    SYNC_DATE=04/14/2010

    PROTO 0 DEBUG LEDSSYNC_MASTER=K75F_MLB

    =PP3V3_S5_PWRCTL

    PM_LED_DDRREG

    =PP3V3_S0_PWRCTL

    PM_LED_S4

    PM_LED1_DDRREG

    PM_SLP_M_L

    PM_SLP_S3_L

    PM_SLP_S4_3_L

    PM_PGOOD_PVCORE_CPU

    PCHCORE_REG_PGOOD

    PM_PGOOD_DDRREG_S3

    PM_LED1_SM

    PM_LED_SM

    PM_LED1_S3

    PM_LED_S3

    PM_LED1_S4

    PM_LED1_PVCORE

    PM_LED_PVCORE

    PM_LED1_PCHCORE

    PM_LED_PCHCORE

    =PP3V3_S5_PWRCTL

    =PP3V3_S5_PWRCTL

    =PP3V3_S5_PWRCTL

    =PP3V3_S0_PWRCTL

    5 OF 110

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    5 6 62 63

    5 6 62 63 72 5 6 62 63

    5 6 62 63

    5 6 62 63

    5 6 62 63 72

  • IN G S

    D

    G

    D

    S

    G

    D

    SIN

    IN

    II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

    I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE

    36

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    REVISION

    DRAWING NUMBER SIZED

    R

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    Apple Inc.

    PAGE

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    8 7 5 4 2 1

    ALWAYS ON WHEN UNIT HAS AC POWER AND IN S5"S5" RAILS"S0" RAILSONLY ON IN RUNPLACE AT J600.

    EMC: C600,C626,C627,C628,C629,C630,C631

    SILKSCREEN:1

    518-0352

    SILKSCREEN:3

    SILKSCREEN:2

    SILKSCREEN:4

    ON IN RUN AND SLEEP

    GND RAILS

    G3H: ALIASES

    "S3" RAILS

    THIS NET IS NOT CONNECTED TO ANY VOLTAGE RAIL. INSTEAD ON PAGE 24 IT IS CONNECTED TO GND THROUGH A RESISTOR

    ALWAYS ON WHEN UNIT HAS AC POWER AND IN G3HOT PER SMC

    "G3H" RAILS

    2

    1 C62710%0.001UF

    40250VX7R

    45 46

    2

    1 C62416V10UF10%

    1210X5R-CERM2

    1 C62650VX7R10%

    402

    0.001UF

    2

    1

    3

    Q6102N7002SOT23-HF1 2

    1 C600X7R

    0.001UF10%50V402

    2

    1 C623X5R20%

    80510V10UF

    2

    1 C630

    40250V10%X7R

    0.001UF2

    1 C631

    402X7R

    0.001UF50V10%

    98

    765432

    1413121110

    1

    J600M-RT-TH

    76833-0100CRITICAL

    4

    5

    3

    Q6022N7002DW-X-GSOT-363

    1

    2

    6

    Q602SOT-3632N7002DW-X-G

    K

    A

    LED601GREEN-3.6MCD2.0X1.25MM-SM

    2

    1R601

    402MF-LF5%1K1/16W

    2

    1R600

    402MF-LF5%1K1/16W

    DEVELOPMENT

    K

    A

    LED6052.0X1.25MM-SMGREEN-3.6MCD

    DEVELOPMENT

    2

    1R603

    402

    1K1/16WMF-LF5%

    K

    A

    LED603GREEN-3.6MCD2.0X1.25MM-SM

    2

    1R604

    402MF-LF1/16W5%1K

    MXM

    K

    A

    LED6042.0X1.25MM-SMGREEN-3.6MCD

    MXM

    21

    2

    1R602

    402

    1KMF-LF5%1/16W

    K

    A

    LED602GREEN-3.6MCD2.0X1.25MM-SM

    25 32 63 91

    SYNC_DATE=04/14/2010

    Power Conn / AliasSYNC_MASTER=K75F_MLB

    MAX_NECK_LENGTH=4.1 MMMAKE_BASE=TRUE

    GND

    VOLTAGE=0VNET_SPACING_TYPE=GND

    MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

    VOLTAGE=5V

    NET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MMMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.5 mmMAKE_BASE=TRUE

    PP5V_S0

    NET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MM

    VOLTAGE=3.3VMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.4MMMAKE_BASE=TRUE

    PP3V3_S0

    =PP3V3_S0_SMBUS_SMC_BSA

    PP5V_S0_FET

    =PP5V_S0_SATA

    =PP5V_S0_VRD

    =PP5V_S0_P1V8_VREG

    =PP3V3_S0_PCH_PM

    =PP5V_S0_ISENSE

    PP12V_S0

    =PP3V3_S0_ENET

    =PP3V3_S0_RSTBUF

    MIN_NECK_WIDTH=0.2 mm

    MAKE_BASE=TRUEMIN_LINE_WIDTH=0.5 mm

    MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=POWER

    VOLTAGE=3.3V

    PP3V3_S3

    =PP5V_S0_MXM

    VIDEO_ON_L

    MAX_NECK_LENGTH=3 MM

    VOLTAGE=3.3VMIN_NECK_WIDTH=0.2MMNET_SPACING_TYPE=POWER

    MAKE_BASE=TRUEMIN_LINE_WIDTH=0.6MM

    PP3V3_S5

    =PP12V_S5_FW

    =PP3V3_S3_ENET=PP3V3_S3_USB_HUB

    =PP3V3_S3_BRCRYPT

    =PP12V_S5_PWRCTL

    PP12V_S3_FET

    =PP12V_G3H_S5_FET

    MIN_NECK_WIDTH=0.2 mmNET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MM

    VOLTAGE=1.05VMIN_LINE_WIDTH=0.6 mmMAKE_BASE=TRUE

    PP1V05_S0

    =PP1V05_S0_PCH_VCC_CORE

    =PP1V05_S0_CK505

    PPVTT_S0_DDR_LDO

    MAKE_BASE=TRUEMIN_LINE_WIDTH=0.4MM

    MAX_NECK_LENGTH=3 MM

    VOLTAGE=1.5VMIN_NECK_WIDTH=0.2MMNET_SPACING_TYPE=POWER

    PP1V5_S0

    =PP3V3_S3_USB_RESET

    =PP1V5_S3_MEM_B

    =PP3V3_S3_PWRCTL

    PP5V_S3_REG=PP5V_S3_USB=PP5V_S3_S0FET

    =PP12V_S3_WM

    =PP3V3_S0_SMBUS_SMC_B_S0=PP3V3_S0_SMBUS_SMC_MGMT

    =PP3V3_S3_SMBUS=PP3V3_S3_WM

    =PP3V3_S3_SDCARD

    =PP3V3_G3H_SMC=PP3V3_S5_RTC_D

    =PP1V5_S3_MEMRESET=PPDDR_S3_S0FET

    =PP12V_S0_PCH_CORE_VREG

    =PP12V_S0_PWRCTL

    =PP1V5_S0_CK505 =PP12V_S0_CPU_VTT_VREG

    =PPV_S0_MXM_PWR

    =PP3V3_S0_SMC_LS

    =PP3V3_S0_TSENS

    =PP3V3_S0_ODD=PP3V3_S0_SATALED

    =PP3V3_S0_PWRCTL=PP3V3_S0_SMC

    =PP3V3_S0_MXM

    =PP3V3_S0_DPCONN

    =PP3V3_S0_SMBUS_SMC_0_S0

    =PP3V3_S0_AUDIO

    MAX_NECK_LENGTH=3 MM

    MAKE_BASE=TRUEMIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.2MMNET_SPACING_TYPE=POWER

    VOLTAGE=1.5V

    PP1V8_S0

    GPU_PRESENT_R

    =PP5V_S3_BRAY

    MIN_LINE_WIDTH=0.6MMVOLTAGE=5VMIN_NECK_WIDTH=0.2MMMAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=POWER

    MAKE_BASE=TRUEPP5V_S3

    =PP5V_S3_DDR_VREG

    PP1V5_S0_FET=PP1V5_S0_AUD_DIG=PP1V5_FWRS0_FWXIO

    MAX_NECK_LENGTH=3 MM

    MIN_LINE_WIDTH=0.4MMNET_SPACING_TYPE=POWERMIN_NECK_WIDTH=0.2MMVOLTAGE=1.8VMAKE_BASE=TRUE

    PP1V8_S0_CPU

    =PP3V3R1V8_S0_PCH_VCCPNAND

    PP3V3_S3

    GPU_PRESENT_DRAIN

    =PP5V_S3_IR

    =PP5V_S3_MEMRESET=PP5V_S3_PWRCTL=PP5V_S3_VREFMRGN

    =PP12V_S0_AUDIO_SPKRAMP=PP12V_S0_VRD

    MAX_NECK_LENGTH=3 MMMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmNET_SPACING_TYPE=POWER

    VOLTAGE=12VMAKE_BASE=TRUE

    PP12V_S5

    =PP12V_S0_FAN

    =PP3V3_S0_PCH_VCC3_3_PCI=PP3V3_S0_CK505

    =PP3V3_S0_VIDEO=PP3V3_FW_FWPHY

    NET_SPACING_TYPE=POWER

    MAKE_BASE=TRUE

    MIN_NECK_WIDTH=0.3MMVOLTAGE=0V

    MAX_NECK_LENGTH=3 MM

    MIN_LINE_WIDTH=0.6MM

    PPVAXG_S0_CPU

    PP1V8_S0_REG

    =PP1V8_S0_CPU_PLL

    =PP3V3_S5_CPURESET

    =PP3V3_S5_PCHPP3V3_S5_REG

    =PP3V3_S5_PCH_GPIO

    =PP1V05_S0_PCH_VCCIO_SATA

    MIN_LINE_WIDTH=0.5 mmVOLTAGE=1.05V

    NET_SPACING_TYPE=POWER

    MAKE_BASE=TRUE

    MAX_NECK_LENGTH=3 MMMIN_NECK_WIDTH=0.2 mm

    PP1V05_S5

    =PP0V75_S0_MEM_VTT_S0FET

    =PP1V05_S0_PCH

    PP1V05_S0_REG

    MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=POWERMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.4 mmVOLTAGE=12VMAKE_BASE=TRUE

    PP12V_G3H

    MIN_NECK_WIDTH=0.2 mm

    MAKE_BASE=TRUEVOLTAGE=12VMIN_LINE_WIDTH=0.6 mmNET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MM

    PP12V_S3

    MAKE_BASE=TRUEVOLTAGE=12V

    NET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MMMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

    PP12V_S0

    PP0V75_S0MAKE_BASE=TRUE

    MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmVOLTAGE=0.75V

    NET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MM

    =PP3V3_S0_PCH_VCC3_3_CORE

    =PP3V3_FWRS0_FWXIO=PP3V3_S0_DP

    =PP3V3R1V5_S0_PCH_VCCSUSHDA

    MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=POWERMIN_LINE_WIDTH=0.6MMMAKE_BASE=TRUEVOLTAGE=1.1VMIN_NECK_WIDTH=0.3MM

    PPVCORE_S0_CPU

    =PP3V3_S0_PCH_STRAPS

    =PP3V3_S0_VRD

    PPVTT_S0_CPUMAKE_BASE=TRUEVOLTAGE=1.1VMIN_NECK_WIDTH=0.2 mmMAX_NECK_LENGTH=3 MM

    MIN_LINE_WIDTH=0.6 mmNET_SPACING_TYPE=POWER

    PP1V5_CPU_MEMVOLTAGE=1.5V

    NET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MM

    MIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.2MM

    MAKE_BASE=TRUE

    PPVCORE_S0_CPU_REG=PPVCORE_S0_CPU

    =PP0V75_S0_MEM_VTT_BPPVTT_S0_DDR

    MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=POWERMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmVOLTAGE=0.75VMAKE_BASE=TRUE

    MIN_LINE_WIDTH=0.6MMMAKE_BASE=TRUE

    NET_SPACING_TYPE=POWERMIN_NECK_WIDTH=0.2MMMAX_NECK_LENGTH=3 MM

    VOLTAGE=3.42V

    PP3V42_G3H PP3V42_G3H_REG

    =PP0V75_S0_MEM_VTT_A =PP1V05_S5_SM_FET

    =PPVTT_S0_CPU

    PPVTT_S0_CPU_REG

    =PPVTT_S0_XDP=PPVTT_S0_PCH_VCC_DMI

    =PP1V05_S0_PCH_VCCIO_DMI=PP1V05_S0_PCH_VCCADPLL

    =PP12V_S0_LCD

    =PP5V_S5_PCH

    PP3V3_S0

    PP3V3_S0

    LCD_SHOULD_ON_R

    ITS_PLUGGED_IN

    PP3V3_S3

    ITS_ALIVE

    =PP3V3_SM_PWRCTL

    PP3V3_S5_REG

    CORE_VOLTAGES_ON_R

    =PP3V3_SM_PCH_VCC_MEPP3V3_SM_FET

    PP1V05_SM_FET

    =PP1V05_SM_ME

    NET_SPACING_TYPE=POWER

    VOLTAGE=3.3VMIN_LINE_WIDTH=0.5 mmMAKE_BASE=TRUE

    MAX_NECK_LENGTH=3 MMMIN_NECK_WIDTH=0.2 mm

    PP3V3_S0M

    =SMB_ACDC_SDA

    =PP1V5_CPU_MEM

    MAX_NECK_LENGTH=3 MMMIN_NECK_WIDTH=0.2 mm

    MAKE_BASE=TRUE

    NET_SPACING_TYPE=POWER

    VOLTAGE=1.1VMIN_LINE_WIDTH=0.6 mm

    PPVTT_S0

    LCD_PWM LCD_BKL_ON =PP1V05_S0_SM_FET

    =PP1V05_S0_PCH_VCCIO_PCIE

    PP1V05_S5_REG

    =PPVTT_S0_PCH_VCCP_CPU

    =PP1V05_SM_PCH_VCC_MEMAKE_BASE=TRUE

    MIN_NECK_WIDTH=0.2 mmMAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=POWERMIN_LINE_WIDTH=0.6 mmVOLTAGE=1.05V

    PP1V05_SM

    =PP1V8R1V5_S0_PCH_VCCVRM

    =PP3V3_S0_PCH=PP3V3_S0_FAN=PP3V3_S0_PCH_VCCADAC

    =PPSPD_S0_MEM_B

    PPVTT_S0_DDR_FET

    MXM_GOOD

    ALL_SYS_PWRGD_R

    CORE_VOLTAGES_ON

    =SMB_ACDC_SCL

    PM_ACDC_PS_ON

    =PP3V3_S0_PCH_GPIO

    =PP3V3_S0_PCH_VCC3_3_SATA

    PP3V3_S0_FET

    =PP12V_S5_S3_FET=PP12V_S5_P5VS3_VREG=PP12V_S5_P3V3S5_VREG=PP12V_S5_DDR_VREGPP12V_S5_FET

    PP5V_S5_LDO

    MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=POWER

    VOLTAGE=5VMAKE_BASE=TRUEMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 mm

    PP5V_S5

    =PPSPD_S0_MEM_A

    =PP3V3_S0_SMBUS

    =PP3V3_S0_ME

    =PP5V_S0_CPU_VTT_VREG

    =PP5V_S0_PCH_CORE_VREG=PP5V_S0_LPCPLUS

    =PP5V_S0_PCH

    =PP5V_S0_AUDIO

    =PPVAXG_S0_CPU

    =PP3V3_S0_XDP

    =PP1V05_SM_PCH_VCC_LAN

    =PP3V3_S5_MEMRESET

    PP1V05_SM_PCH_LANVOLTAGE=1.05VMAKE_BASE=TRUE

    =PP1V05_S0_PCH_VCCIO_USB

    =PP3V3_S5_XDP

    =PP3V3_S5_PCH_STRAPS

    =PP3V3_S5_LPCPLUS

    =PP1V5_S3_MEM_A

    PP1V5_S3_REG

    =PP3V3_S3_MINI=PP3V3_S3_SMBUS_SMC_A_S3

    MAKE_BASE=TRUEVOLTAGE=1.5VMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmNET_SPACING_TYPE=POWERMAX_NECK_LENGTH=3 MM

    PP1V5_S3

    =PP3V3_S3_MEMRESET

    =PP5V_S3_CAMERA

    =PP3V42_G3H_AVREF=PP3V3_G3H_SMCUSBMUX

    =PP3V3_G3H_LPCPLUS

    =PP3V3_S3_PCH_STRAPS=PP3V3_S3_BT=PP3V3_S3_VREFMRGNPP3V3_S3_FET

    =PP3V3_S5_PCH_VCCSUS3_3_USB=PP3V3_S5_ROM

    =PP3V3_S5_SM_FET=PP3V3_S5_P1V05S5_VREG=PP3V3_S5_S0FET=PP3V3_S5_S3FET=PP3V3_S5_PWRCTL

    PM_SLPS3_BUF2_L

    PP12V_G3H=PP5V_S0_SATA

    6 OF 110

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    89 92

    6 89

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    77

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    41

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    63 73 74

    80

    48

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    89

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    89

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    55

    39

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    22 24

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    44

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    62

    28

    60

    64

    89

    52 53

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    26

    77

    39 40 41

    49 70

    13 16 63

    11

    18 19 24

    6 69

    20

    18 22 24

    89

    32

    24

    68

    6 71 89

    89

    6 63 89

    89

    22 24

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    77 78 79 81

    22 24

    89

    15

    64

    49 89

    49 89

    64 65 66

    13 16

    31

    89

    89 71

    30 72

    11 13 16 46 64

    49 67

    25

    22 24

    22 24

    17

    77

    24

    6 89

    6 89

    6 89 92

    63 72

    6 69

    22 24

    72

    72

    63

    89

    48

    13 16 29

    89

    77 77 72

    18 19 22 24

    71

    22 24

    22 24

    89

    24

    18 21 24 68

    52 53

    17

    31

    32 48

    20

    22 24

    72

    72

    69

    69

    70

    3

    69 89

    30 46

    48

    72

    67

    68

    47

    24

    55 61

    13 17

    25

    22 24

    32

    89

    22 24

    25

    15

    47

    28 29 30

    49 50 70

    33

    48

    89

    32

    44

    46

    43

    47

    15

    44

    28

    72

    22 24

    47 54

    72

    71

    72

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    5 62 63

    6 71 89

    6 42

  • II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

    I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE

    36

    BRANCH

    REVISION

    DRAWING NUMBER SIZED

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    PAGE TITLE

    C

    A

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    Apple Inc.

    PAGE

    NOTICE OF PROPRIETARY PROPERTY:

    A

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    345678

    D

    B

    8 7 5 4 2 1

    EMC Springs (870-1125) Removed 2009-10-05

    PCH HEATSINK

    Rear CoverStandoffs (860-1255)

    CPU Heatsink4mm Plated Holes (998-0850)

    EMC Spring (870-1577); Near DIMMs EMC POGO Pins (870-1698); Near DIMMs

    Nuts (835-0269)

    Backer Plate

    For EMC

    DIMM CONNECTOR NUTSNuts (805-9582)

    1

    ZH07004P75R4OMIT

    1

    ZH0701OMIT4P75R4

    1

    ZH07024P75R4OMIT

    1

    ZH0703OMIT4P75R4

    1 SC0702EMI-SPRINGCLIP-SM-K2

    CRITICAL

    1

    SDF0713STDOFF-6.8OD15.0H-1.56-TH

    CRITICAL

    1

    NUT0700NUT-6.5OD1.4H-1.56-3.8-TH

    CRITICAL

    1

    NUT0701NUT-6.5OD1.4H-1.56-3.8-TH

    CRITICAL

    1

    NUT0702CRITICAL

    NUT-6.5OD1.4H-1.56-3.8-TH1

    NUT0703NUT-6.5OD1.4H-1.56-3.8-TH

    CRITICAL

    1

    NUT0753CRITICAL

    NUT-4.25OD1.4H-1.40-3.25-TH1

    NUT0752CRITICAL

    NUT-4.25OD1.4H-1.40-3.25-TH1

    NUT0751CRITICAL

    NUT-4.25OD1.4H-1.40-3.25-TH1

    NUT0750CRITICAL

    NUT-4.25OD1.4H-1.40-3.25-TH

    1

    SC0705SM

    CRITICALNOSTUFF

    2.0DIA-TALL-EMI-MLB-M97-M98

    1

    SC07062.0DIA-TALL-EMI-MLB-M97-M98

    SM

    CRITICALNOSTUFF

    1

    SDF0714STDOFF-6.8OD15.0H-1.56-TH

    CRITICAL

    1

    SDF0715CRITICAL

    STDOFF-6.8OD15.0H-1.56-TH1

    SDF0717CRITICAL

    STDOFF-6.8OD15.0H-1.56-TH 1

    SDF0718CRITICAL

    STDOFF-6.8OD15.0H-1.56-TH

    1

    SDF0719STDOFF-6.8OD15.0H-1.56-TH

    CRITICAL

    SYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

    Holes

    7 OF 110

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  • II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

    I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE

    36

    BRANCH

    REVISION

    DRAWING NUMBER SIZED

    R

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    PAGE TITLE

    C

    A

    D

    2 1

    PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

    Apple Inc.

    PAGE

    NOTICE OF PROPRIETARY PROPERTY:

    A

    B

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    345678

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    B

    8 7 5 4 2 1

    NC ON UNUSED DISPLAY ALIASES

    UNUSED CPU SIGNALS

    NC ON UNUSED PCI ALIASES

    NC ON UNUSED MEM ALIASES

    NC ON UNUSED MISC ALIASES

    NC ON UNUSED NAND ALIASES

    NC ON UNUSED SATA ALIASES

    SYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

    UNUSED SIGNAL ALIAS

    TP_DP_IG_B_AUX_PTP_DP_IG_B_AUX_N

    TP_DP_IG_B_DDC_CLK

    NC_DP_IG_C_MLNNO_TEST=TRUEMAKE_BASE=TRUE

    NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_C_MLP

    MAKE_BASE=TRUE NO_TEST=TRUENC_DP_IG_C_AUXN

    TP_SATA_F_R2D_CP

    TP_SATA_F_R2D_CN

    TP_SATA_F_D2RP

    TP_MEM_B_DQS_N

    TP_JTAG_XDP_TRST_L NC_JTAG_XDP_TRST_LMAKE_BASE=TRUE NO_TEST=TRUE

    NO_TEST=TRUENC_PCH_PWM0MAKE_BASE=TRUE

    TP_PCH_PWM0

    TP_PCH_SST

    TP_PCH_PWM1 NC_PCH_PWM1MAKE_BASE=TRUE NO_TEST=TRUE

    MAKE_BASE=TRUENC_NV_WR_RE_L

    NO_TEST=TRUE

    MAKE_BASE=TRUENC_NV_RB_L

    NO_TEST=TRUETP_NV_RB_L

    NO_TEST=TRUEMAKE_BASE=TRUENC_DMI_CLK100M_LAN

    TP_PCIE_CLK100M_XDPP

    NC_CPU_FC_AG40MAKE_BASE=TRUE NO_TEST=TRUE

    MAKE_BASE=TRUE NO_TEST=TRUENC_PCIE_CLK100M_XDPP

    TP_NV_WR_RE_L

    NC_LPC_DREQ1_LMAKE_BASE=TRUE NO_TEST=TRUE

    TP_PCIE_CLK100M_XDPN

    TP_MEM_B_DQ_CB

    MAKE_BASE=TRUE NO_TEST=TRUENC_NV_WE_CK_L

    TP_MEM_A_DQS_N

    TP_LPC_DREQ1_L

    TP_MEM_A_DQ_CB

    TP_NV_DQ

    MAKE_BASE=TRUE NO_TEST=TRUENC_MEM_B_CS_L

    NC_MEM_A_DQS_PNO_TEST=TRUEMAKE_BASE=TRUE

    NO_TEST=TRUEMAKE_BASE=TRUENC_MEM_B_DQ_CB

    TP_MEM_B_DQS_P

    TP_PCH_PWM2

    NO_TEST=TRUEMAKE_BASE=TRUENC_MEM_A_DQ_CB

    NC_MEM_B_DQS_PMAKE_BASE=TRUE NO_TEST=TRUE

    TP_MEM_B_CS_L

    NC_MEM_B_DQS_NMAKE_BASE=TRUE NO_TEST=TRUE

    MAKE_BASE=TRUENC_MEM_A_DQS_N

    NO_TEST=TRUE

    TP_MEM_A_CS_L

    NO_TEST=TRUEMAKE_BASE=TRUENC_NV_CE_LTP_NV_CE_L

    TP_NV_DQS

    TP_NV_WE_CK_L

    NC_PCH_PWM3NO_TEST=TRUEMAKE_BASE=TRUE

    TP_PCH_PWM3

    TP_MEM_A_DQS_P

    MAKE_BASE=TRUENC_MEM_A_CS_L

    NO_TEST=TRUE

    TP_LPC_DREQ0_LMAKE_BASE=TRUE NO_TEST=TRUENC_LPC_DREQ0_L

    MAKE_BASE=TRUE NO_TEST=TRUENC_DMI_CLK100M_LAP

    TP_DMI_CLK100M_LAN

    NO_TEST=TRUEMAKE_BASE=TRUENC_PCH_SST

    NC_PCH_PWM2NO_TEST=TRUEMAKE_BASE=TRUE

    TP_PCI_RESET_L

    TP_PCI_PAR

    TP_DMI_CLK100M_LAPNO_TEST=TRUEMAKE_BASE=TRUE

    NC_PCIE_CLK100M_XDPN

    NC_NV_DQMAKE_BASE=TRUE NO_TEST=TRUE

    MAKE_BASE=TRUE NO_TEST=TRUENC_NV_DQS

    MAKE_BASE=TRUENC_PCI_C_BE_L

    NO_TEST=TRUE

    NC_PCI_ADNO_TEST=TRUEMAKE_BASE=TRUE

    TP_PCI_AD

    TP_CPU_FC_AE38TP_CPU_RSVDTP_CPU_RSVD

    TP_CPU_FC_AG40

    NC_PCI_RESET_LNO_TEST=TRUEMAKE_BASE=TRUE

    MAKE_BASE=TRUENC_PCI_PAR

    NO_TEST=TRUE

    TP_PCI_C_BE_L

    MAKE_BASE=TRUE NO_TEST=TRUENC_PCI_T28_R2D_C_N

    MAKE_BASE=TRUE NO_TEST=TRUENC_PCI_T28_R2D_C_P

    NC_PCI_T28_D2R_PNO_TEST=TRUEMAKE_BASE=TRUE

    TP_PCI_T28_R2D_C_P

    NO_TEST=TRUEMAKE_BASE=TRUENC_PCI_T28_D2R_NNO_TEST=TRUEMAKE_BASE=TRUE

    NC_CPU_RSVD

    MAKE_BASE=TRUE NO_TEST=TRUENC_CPU_FC_AE38

    NO_TEST=TRUENC_CPU_RSVDMAKE_BASE=TRUE NC_SATA_D_D2RN

    MAKE_BASE=TRUE NO_TEST=TRUETP_SATA_D_D2RN

    NC_SATA_D_D2RPNO_TEST=TRUEMAKE_BASE=TRUE

    TP_SATA_D_D2RP

    NC_SATA_D_R2D_CNMAKE_BASE=TRUE NO_TEST=TRUE

    TP_SATA_D_R2D_CN

    NC_SATA_D_R2D_CPNO_TEST=TRUEMAKE_BASE=TRUE

    TP_SATA_D_R2D_CP

    NO_TEST=TRUEMAKE_BASE=TRUENC_SATA_E_D2RNTP_SATA_E_D2RN

    NC_SATA_E_R2D_CNNO_TEST=TRUEMAKE_BASE=TRUE

    TP_SATA_E_R2D_CNNO_TEST=TRUEMAKE_BASE=TRUE

    NC_SATA_E_D2RPTP_SATA_E_D2RP

    MAKE_BASE=TRUE NO_TEST=TRUENC_SATA_E_R2D_CPTP_SATA_E_R2D_CP

    NC_SATA_F_D2RNMAKE_BASE=TRUE NO_TEST=TRUE

    TP_SATA_F_D2RN

    MAKE_BASE=TRUE NO_TEST=TRUENC_SATA_F_D2RP

    NO_TEST=TRUEMAKE_BASE=TRUENC_SATA_F_R2D_CN

    MAKE_BASE=TRUENC_SATA_F_R2D_CP

    NO_TEST=TRUE

    NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_DDC_CLKTP_CRT_IG_DDC_CLK

    NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_DDC_DATA

    NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_REDTP_CRT_IG_RED

    MAKE_BASE=TRUE NO_TEST=TRUENC_CRT_IG_GREENTP_CRT_IG_GREEN

    TP_CRT_IG_BLUE

    MAKE_BASE=TRUE NO_TEST=TRUENC_CRT_IG_HSYNCTP_CRT_IG_HSYNC

    NC_CRT_IG_VSYNCMAKE_BASE=TRUE NO_TEST=TRUE

    TP_CRT_IG_VSYNC

    NC_DP_IG_D_MLNMAKE_BASE=TRUE NO_TEST=TRUE

    NO_TEST=TRUENC_DP_IG_D_AUXNMAKE_BASE=TRUE

    MAKE_BASE=TRUENC_DP_IG_D_MLP

    NO_TEST=TRUE

    NC_DP_IG_D_AUXPNO_TEST=TRUEMAKE_BASE=TRUE

    NC_DP_IG_D_CTRL_CLKMAKE_BASE=TRUE NO_TEST=TRUE

    MAKE_BASE=TRUE NO_TEST=TRUENC_DP_IG_D_HPD

    NC_DP_IG_D_CTRL_DATAMAKE_BASE=TRUE NO_TEST=TRUE

    TP_DP_IG_D_MLN

    TP_DP_IG_D_AUXNTP_DP_IG_D_MLP

    TP_DP_IG_D_AUXP

    TP_DP_IG_D_CTRL_CLKTP_DP_IG_D_HPD

    TP_DP_IG_D_CTRL_DATA

    NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_BLUE

    TP_DP_IG_C_MLNTP_DP_IG_C_MLPTP_DP_IG_C_AUX_N

    MAKE_BASE=TRUE NO_TEST=TRUENC_DP_IG_C_AUXPTP_DP_IG_C_AUX_P

    NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_C_HPDTP_DP_IG_C_HPD

    NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_C_CTRL_CLKTP_DP_IG_C_CTRL_CLK

    NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_C_CTRL_DATATP_DP_IG_C_CTRL_DATA

    NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_B_MLN

    NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_B_MLPTP_DP_IG_B_MLP

    MAKE_BASE=TRUE NO_TEST=TRUENC_DP_IG_B_AUXN

    NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_B_HPDTP_DP_IG_B_HPDMAKE_BASE=TRUE NO_TEST=TRUENC_DP_IG_B_AUXP

    NO_TEST=TRUEMAKE_BASE=TRUENC_DP_IG_B_CTRL_CLKNC_DP_IG_B_CTRL_DATAMAKE_BASE=TRUE NO_TEST=TRUE

    TP_DP_IG_B_DDC_DATA

    MAKE_BASE=TRUE NO_TEST=TRUENC_GFX_VIDTP_GFX_VID

    MAKE_BASE=TRUE NO_TEST=TRUENC_GFX_VSENSE_N

    NO_TEST=TRUEMAKE_BASE=TRUENC_GFX_VSENSE_PTP_GFX_VSENSE_P

    TP_GFX_VSENSE_N

    TP_CRT_IG_DDC_DATA

    TP_PCI_T28_D2R_N

    TP_DP_IG_B_MLN

    TP_PCI_T28_D2R_P

    TP_PCI_T28_R2D_C_N

    NO_TEST=TRUENC_HDA_SDIN1MAKE_BASE=TRUE

    TP_HDA_SDIN1

    MAKE_BASE=TRUENC_HDA_SDIN3

    NO_TEST=TRUETP_HDA_SDIN3

    MAKE_BASE=TRUENC_HDA_SDIN2

    NO_TEST=TRUETP_HDA_SDIN2

    NC_PCIE_CLK100M_PE5PNO_TEST=TRUEMAKE_BASE=TRUE

    TP_PCIE_CLK100M_PE5P

    NO_TEST=TRUEMAKE_BASE=TRUENC_PCIE_CLK100M_PE5NTP_PCIE_CLK100M_PE5N

    NC_NV_RCOMPMAKE_BASE=TRUE NO_TEST=TRUE

    TP_NV_RCOMP

    MAKE_BASE=TRUE NO_TEST=TRUENC_PCIE_CLK100M_EXCARD_PPCIE_CLK100M_EXCARD_P

    NC_PCIE_CLK100M_EXCARD_NNO_TEST=TRUEMAKE_BASE=TRUE

    PCIE_CLK100M_EXCARD_N

    TP_USB_1P

    TP_USB_6P

    TP_USB_6N

    TP_USB_7P

    TP_USB_7N

    NO_TEST=TRUEMAKE_BASE=TRUENC_USB_1P

    NO_TEST=TRUEMAKE_BASE=TRUENC_USB_1N

    MAKE_BASE=TRUE NO_TEST=TRUENC_USB_6P

    NC_USB_6NNO_TEST=TRUEMAKE_BASE=TRUE

    TP_USB_1N

    MAKE_BASE=TRUENC_USB_7P

    NO_TEST=TRUE

    MAKE_BASE=TRUE NO_TEST=TRUENC_USB_7N

    TP_USB_9P

    TP_USB_5N

    TP_USB_3P

    TP_USB_3N

    MAKE_BASE=TRUE NO_TEST=TRUENC_USB_5P

    NO_TEST=TRUEMAKE_BASE=TRUENC_USB_9P

    NO_TEST=TRUEMAKE_BASE=TRUENC_USB_9N

    NO_TEST=TRUENC_USB_5NMAKE_BASE=TRUE

    MAKE_BASE=TRUE NO_TEST=TRUENC_USB_3N

    NO_TEST=TRUEMAKE_BASE=TRUENC_USB_11N

    NO_TEST=TRUEMAKE_BASE=TRUENC_USB_10P

    NO_TEST=TRUEMAKE_BASE=TRUENC_USB_11P

    TP_USB_10N

    TP_USB_11N

    TP_USB_11P

    TP_USB_10PNO_TEST=TRUEMAKE_BASE=TRUE

    NC_USB_10N

    TP_USB_9N

    TP_USB_5P

    MAKE_BASE=TRUENC_USB_3P

    NO_TEST=TRUE

    MAKE_BASE=TRUE NO_TEST=TRUENC_PCIE_EXCARD_D2R_PPCIE_EXCARD_D2R_P

    NC_PCIE_EXCARD_D2R_NNO_TEST=TRUEMAKE_BASE=TRUE

    PCIE_EXCARD_D2R_N

    NC_PCIE_EXCARD_R2D_C_PNO_TEST=TRUEMAKE_BASE=TRUE

    PCIE_EXCARD_R2D_C_P

    NC_PCIE_EXCARD_R2D_C_NMAKE_BASE=TRUE NO_TEST=TRUE

    PCIE_EXCARD_R2D_C_N

    NC_SDVO_TVCLKINPNO_TEST=TRUEMAKE_BASE=TRUE

    TP_SDVO_TVCLKINP

    NC_SDVO_TVCLKINNNO_TEST=TRUEMAKE_BASE=TRUE

    TP_SDVO_TVCLKINN

    NC_SDVO_STALLPNO_TEST=TRUEMAKE_BASE=TRUE

    TP_SDVO_STALLP

    NC_SDVO_STALLNNO_TEST=TRUEMAKE_BASE=TRUE

    TP_SDVO_STALLN

    NC_SDVO_INTPNO_TEST=TRUEMAKE_BASE=TRUE

    TP_SDVO_INTP

    NC_SDVO_INTNNO_TEST=TRUEMAKE_BASE=TRUE

    TP_SDVO_INTN

    TP_USB_12PTP_USB_12N

    NO_TEST=TRUEMAKE_BASE=TRUENC_USB_12P

    NO_TEST=TRUEMAKE_BASE=TRUENC_USB_12N

    MAKE_BASE=TRUE NO_TEST=TRUENC_USB_13N

    MAKE_BASE=TRUE NO_TEST=TRUENC_USB_13P

    TP_USB_13NTP_USB_13P

    8 OF 110

    A.0.0051-8600

    8 OF 92

    19

    19

    19

    18

    18

    18

    12 83

    25

    21

    21

    21

    20

    21

    20

    21

    12

    12 83

    18

    12

    20

    12 83

    21

    12

    12

    20

    20

    20

    21

    12 83

    18

    21

    20

    20

    21

    20

    13

    10

    10

    13

    20

    18

    18

    18

    18

    18

    18

    18

    18

    18

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    19

    13

    13

    13

    19

    19

    18

    18

    18

    18

    18

    20

    18

    18

    20

    20

    20

    20

    20

    20

    20

    20

    20

    20

    20

    20

    20

    20

    20

    20

    18

    18

    18

    18

    19

    19

    19

    19

    19

    19

    20

    20

    20

    20

  • OUT

    OUTIN

    IN

    IN

    IN

    OUT

    OUT

    IN

    IN

    IN OUT

    OUTIN

    OUT

    OUT

    II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

    I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE

    36

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    REVISION

    DRAWING NUMBER SIZED

    R

    IV ALL RIGHTS RESERVEDSHEET

    PAGE TITLE

    C

    A

    D

    2 1

    PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

    Apple Inc.

    PAGE

    NOTICE OF PROPRIETARY PROPERTY:

    A

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    B

    8 7 5 4 2 1

    PEG Slot SupportTHIS SIGNAL NAME IS CONNECTED TO MXM

    75 84

    75 84 10

    10

    75 84

    75 84

    10

    10

    18

    18

    19 85 91 21

    R929

    PLACEMENT_NOTE=PLACE CLOSE TO U18001/16W5%

    MF-LF

    22

    402

    45 85 91

    73 18

    73

    73

    SYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

    Signal Aliases

    PEG_RESET_LMAKE_BASE=TRUE

    MXM_RESET_L

    CLK_100M_MXM_PCLK_100M_MXM_N

    PEG_R2D_C_NMAKE_BASE=TRUE

    MAKE_BASE=TRUEPEG_R2D_C_PMAKE_BASE=TRUEGPU_CLK100M_PCIE_N

    MAKE_BASE=TRUEGPU_CLK100M_PCIE_P

    =PEG_R2D_C_P

    PEG_CLKREQ_LMAKE_BASE=TRUEMXM_CLKREQ_L

    =PEG_D2R_N

    =PEG_R2D_C_NPEG_D2R_PMAKE_BASE=TRUE

    PEG_CLK100M_PPEG_CLK100M_N

    PEG_D2R_NMAKE_BASE=TRUE

    =PEG_D2R_P

    PM_CLK32K_SUSCLKPM_CLK32K_SUSCLK_R

    9 OF 110

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    9 OF 92

    27 91 73

    84

    84

  • ININININ

    INININ

    IN

    OUT

    OUT

    OUT

    OUT

    OUT

    OUT

    OUT

    OUT

    ININ

    IN

    ININ

    IN

    INININININININININININININININ

    IN

    ININININ

    ININININININ

    INININININ

    OUT

    OUTOUTOUTOUT

    OUTOUTOUTOUTOUTOUT

    OUTOUTOUT

    OUT

    OUTOUTOUTOUTOUT

    OUTOUTOUTOUT

    OUT

    OUTOUTOUTOUTOUTOUT

    OUT

    IN

    ININININININININININININININININ

    IN

    PEG_TX_2*

    PEG_TX_15PEG_TX_14

    PEG_TX_10

    PEG_TX_1PEG_TX_2PEG_TX_3PEG_TX_4PEG_TX_5PEG_TX_6PEG_TX_7PEG_TX_8PEG_TX_9

    PEG_TX_11

    PEG_TX_13PEG_TX_12

    PEG_TX_0

    PEG_RCOMPOPEG_ICOMPOPEG_ICOMPI

    PEG_RBIAS

    PEG_RX_11PEG_RX_12PEG_RX_13PEG_RX_14PEG_RX_15

    PEG_RX_14*PEG_RX_15*

    PEG_RX_13*PEG_RX_12*

    PEG_RX_10*PEG_RX_11*

    PEG_RX_9*PEG_RX_8*PEG_RX_7*PEG_RX_6*PEG_RX_5*PEG_RX_4*PEG_RX_3*PEG_RX_2*PEG_RX_1*PEG_RX_0*

    PEG_TX_0*PEG_TX_1*

    PEG_TX_3*PEG_TX_4*

    PEG_TX_7*PEG_TX_8*PEG_TX_9*

    PEG_TX_10*PEG_TX_11*PEG_TX_12*PEG_TX_13*

    PEG_TX_15*

    PEG_TX_6*

    PEG_TX_14*

    DMI_RX_1*DMI_RX_2*DMI_RX_3*

    DMI_RX_1DMI_RX_0

    DMI_RX_2DMI_RX_3

    DMI_TX_2DMI_TX_1DMI_TX_0

    DMI_TX_1*DMI_TX_0*

    FDI_TX_2*FDI_TX_3*FDI_TX_4*

    FDI_TX_6*FDI_TX_5*

    FDI_TX_7*

    FDI_TX_0FDI_TX_1FDI_TX_2

    FDI_TX_4

    FDI_TX_6FDI_TX_5

    FDI_FSYNC_0

    FDI_TX_7

    FDI_INT

    FDI_FSYNC_1

    FDI_LSYNC_0FDI_LSYNC_1

    PEG_TX_5*

    DMI_TX_3*DMI_TX_2*

    FDI_TX_1*FDI_TX_0*

    DMI_TX_3

    PEG_RX_0PEG_RX_1PEG_RX_2PEG_RX_3PEG_RX_4PEG_RX_5PEG_RX_6PEG_RX_7PEG_RX_8PEG_RX_9PEG_RX_10

    FDI_TX_3

    DMI_RX_0*

    FLEXIBLE DISPLAY INTERFACE

    PCI EXPRESS -- GRAPHICS

    DMI

    (1 OF 10)

    RSVD_AM28RSVD_AM27

    RSVD_AK18

    RSVD_AM21

    RSVD_AH40RSVD_AE2

    RSVD_AJ39RSVD_AK12RSVD_AK13

    RSVD_AK15RSVD_AK16

    RSVD_AK25

    RSVD_AK28RSVD_AK27RSVD_AK26

    RSVD_AK14

    RSVD_AD2

    RSVD_AM26

    RSVD_TP_AN11

    RSVD_AL17

    RSVD_AM13

    RSVD_A12

    CFG_1

    RSVD_AL26

    RSVD_NCTF_AY37RSVD_NCTF_AY3

    RSVD_NCTF_AW38

    RSVD_NCTF_B3RSVD_NCTF_C2RSVD_NCTF_D1

    RSVD_AM30RSVD_AM29

    RSVD_AM25

    RSVD_AM20

    RSVD_AM18RSVD_AM17RSVD_AM16RSVD_AM15RSVD_AM14

    RSVD_L12RSVD_M12

    RSVD_AL15

    RSVD_AL14

    CFG_0

    CFG_5CFG_4CFG_3CFG_2

    RSVD_AL29RSVD_AL27

    RSVD_AL18

    CFG_10

    CFG_8CFG_9

    CFG_7CFG_6

    CFG_15

    CFG_12CFG_13CFG_14

    CFG_11

    CFG_17CFG_16

    RSVD_NCTF_A4RSVD_NCTF_AU40RSVD_NCTF_AV1

    RSVD_NCTF_AV39RSVD_NCTF_AW2

    RSVD_AM19

    RSVD_AK29RSVD_AL12

    (5 OF 10)

    RESE

    RVED

    OUT

    OUT

    GND

    CBP

    CBN

    GND

    GND

    CFP

    CFN

    GND

    CHP

    CHN

    CCP

    CCNCDP

    CEN

    GND

    CGN

    CGP

    GND

    CAP

    CAN

    GND

    CDN

    CEP

    GND

    IN

    IN

    IN

    IN

    II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

    I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE

    36

    BRANCH

    REVISION

    DRAWING NUMBER SIZED

    R

    IV ALL RIGHTS RESERVEDSHEET

    PAGE TITLE

    C

    A

    D

    2 1

    PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

    Apple Inc.

    PAGE

    NOTICE OF PROPRIETARY PROPERTY:

    A

    B

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    345678

    D

    B

    8 7 5 4 2 1

    INTEL SUGGESTS TO KEEP THESE TPS

    CFG3 :PCIE LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED

    FOR LYNNFIELD PROCESSOR

    CFG4 :NOT USED ON DESKTOP

    PLACE R1010 AND R1012 CLOSE TO CPU BALLS

    FOR CLARKDALE PROCESSORCFG [1:0] :PCIE CONFIGURATION SELECT 11 = 1 X16 PCI EXPRESS 10 = 2 X8 PCI EXPRESS

    DMI MID-BUS PROBE

    CLK

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    10 19 84

    15

    15

    15

    15

    15

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    9

    2

    1R10127501/16W

    402MF-LF

    1%

    2

    1R1010

    402MF-LF

    49.91%1/16W

    25 84

    25 84

    25 84

    25 84

    25 84

    25 84

    25 84

    25 84

    25 84

    25 84

    25 84

    25 84

    25 84

    25 84

    15 25 84

    25 84

    25 84

    25 84

    J8

    H8

    K4

    K3

    J5

    J6

    G7

    F7

    H3

    H4

    G5

    G6

    F4

    F3

    F5

    E5

    R6

    R5

    N8

    M8

    N5

    N6

    L7

    K7

    M3

    M4

    L5

    L6

    E6

    E7

    D7

    C7

    G2

    G3

    F1

    E1

    E2

    D2

    D3

    C3

    C4

    B4

    B5

    A5

    C6

    B6

    A6

    A7

    T4

    T3

    P4

    P3

    L3

    L2

    K1

    J1

    J2

    J3

    H1

    G1

    C8

    B8

    D9

    C9

    B10A11

    C10D11

    Y5

    Y6

    Y3

    Y4

    R7

    R8

    W4

    W5

    W7

    W8

    U7

    U8

    V3

    V4

    U5

    U6

    AD3AD4

    AC2

    AC3AC4

    R3

    R2

    P1

    N1

    N2

    N3

    M1

    L1

    W2

    W3

    V1

    U1

    U2

    U3

    T1

    R1

    U1000LGA1156-SKT

    OMIT

    LYNNFIELD

    AN11

    D1C2B3AY37AY3AW38AW2AV39AV1AU40A4

    M12L12AM30AM29AM28AM27AM26AM25AM21AM20AM19AM18AM17AM16AM15AM14AM13AL29AL27AL26AL18AL17AL15

    AL14AL12AK29AK28AK27AK26AK25AK18AK16AK15AK14AK13AK12AJ39AH40AE2AD2A12

    H12G12F9E9H9H10F10E10

    L11H7K12K9L8J12K8K10

    G8E8

    U1000LYNNFIELD

    OMIT

    LGA1156-SKT

    10 19 84

    10 19 84

    0

    0

    1

    2

    3

    1

    2

    3

    28 27

    26 25

    23

    17

    11

    5

    20

    14

    8

    2

    2224

    1921

    1618

    1315

    1012

    79

    46

    13

    J1050LAI-TMS817

    ST-SM

    NOSTUFF

    0

    10 19 84

    10 19 84

    0

    1

    2

    1

    2

    3

    3

    32

    1

    J1010M-ST-SM

    NOSTUFF

    FTR-103-02-S-S

    18 84

    18 84

    CPU DMI/PEG/FDI/RSVD

    DMI_N2S_NDMI_N2S_P

    DMI_S2N_PDMI_S2N_N

    =PEG_D2R_N

    =PEG_D2R_N

    =PEG_D2R_P

    =PEG_D2R_P

    DMI_MIDBUS_CLK100M_P

    DMI_MIDBUS_CLK100M_N

    CPU_CFG

    CPU_CFG

    CPU_CFGCPU_CFG

    CPU_CFG

    CPU_CFG

    CPU_CFG

    CPU_CFG

    CPU_CFG

    CPU_CFG

    CPU_CFG

    CPU_CFG

    TP_CPU_RSVD

    SNS_CPU_THERMD_N

    TP_CPU_RSVD

    TP_CPU_RSVD

    =PEG_R2D_C_P

    =PEG_D2R_P

    CPU_CFG

    CPU_PEG_COMP

    =PEG_D2R_N

    CPU_PEG_RBIAS

    =PEG_D2R_P

    =PEG_R2D_C_N

    =PEG_R2D_C_P

    =PEG_D2R_P

    =PEG_D2R_N

    =PEG_D2R_N

    =PEG_D2R_N=PEG_D2R_N=PEG_D2R_N=PEG_D2R_N=PEG_D2R_N

    =PEG_R2D_C_N

    DMI_N2S_NDMI_N2S_NDMI_N2S_N

    DMI_N2S_P

    TP_CPU_FDI_TX_NTP_CPU_FDI_TX_NTP_CPU_FDI_TX_N

    =PEG_D2R_N

    TP_CPU_RSVD

    TP_CPU_RSVDTP_CPU_RSVD

    SNS_CPU_THERMD_P

    DMI_S2N_N

    CPU_FDI_LSYNC

    TP_CPU_RSVD

    TP_CPU_RSVD

    TP_CPU_RSVD_NCTFTP_CPU_RSVD_NCTF

    TP_CPU_RSVD_NCTF

    TP_CPU_RSVDTP_CPU_RSVD

    DMI_S2N_NDMI_S2N_N

    TP_CPU_RSVD

    TP_CPU_RSVD

    TP_CPU_RSVDTP_CPU_RSVD

    TP_CPU_RSVD

    TP_CPU_RSVD

    TP_CPU_RSVD

    TP_CPU_RSVDTP_CPU_RSVDTP_CPU_RSVD

    TP_CPU_RSVD

    TP_CPU_RSVD

    TP_CPU_RSVD_TP

    TP_CPU_RSVD

    TP_CPU_RSVD_NCTFTP_CPU_RSVD_NCTF

    TP_CPU_RSVD_NCTFTP_CPU_RSVD_NCTF

    TP_CPU_RSVD

    TP_CPU_RSVD

    TP_CPU_RSVD

    TP_CPU_RSVD

    TP_CPU_RSVD

    CPU_CFG

    TP_CPU_RSVD

    CPU_CFG

    CPU_CFG

    TP_CPU_RSVD_NCTF

    TP_CPU_RSVD_NCTF

    TP_CPU_RSVD

    TP_CPU_RSVDTP_CPU_RSVD

    =PEG_R2D_C_N

    =PEG_R2D_C_P=PEG_R2D_C_P

    =PEG_R2D_C_P

    =PEG_R2D_C_P

    =PEG_R2D_C_P=PEG_R2D_C_P=PEG_R2D_C_P=PEG_R2D_C_P=PEG_R2D_C_P=PEG_R2D_C_P

    =PEG_R2D_C_P

    =PEG_R2D_C_P=PEG_R2D_C_P

    =PEG_R2D_C_P

    =PEG_D2R_P

    =PEG_D2R_P

    =PEG_D2R_N

    =PEG_D2R_N

    =PEG_R2D_C_N

    =PEG_R2D_C_N

    =PEG_R2D_C_N

    =PEG_R2D_C_N

    =PEG_R2D_C_N=PEG_R2D_C_N=PEG_R2D_C_N

    =PEG_R2D_C_N

    =PEG_R2D_C_N

    DMI_S2N_N

    TP_CPU_FDI_TX_NTP_CPU_FDI_TX_N

    TP_CPU_FDI_TX_P

    =PEG_D2R_P

    =PEG_D2R_P=PEG_D2R_P

    =PEG_R2D_C_N

    =PEG_D2R_N

    TP_CPU_RSVD

    TP_CPU_RSVDTP_CPU_RSVDTP_CPU_RSVDTP_CPU_RSVD

    TP_CPU_RSVD_NCTFTP_CPU_RSVD_NCTF

    TP_CPU_RSVD

    CPU_CFG

    =PEG_R2D_C_N

    TP_CPU_RSVD

    =PEG_D2R_N

    =PEG_D2R_P

    =PEG_D2R_P

    CPU_FDI_LSYNC

    CPU_FDI_INT

    =PEG_D2R_P

    =PEG_D2R_P

    =PEG_D2R_P

    =PEG_D2R_P

    TP_CPU_FDI_TX_N

    TP_CPU_FDI_TX_PTP_CPU_FDI_TX_P

    TP_CPU_FDI_TX_PTP_CPU_FDI_TX_P

    CPU_FDI_FSYNCCPU_FDI_FSYNC

    TP_CPU_FDI_TX_P

    TP_CPU_FDI_TX_N

    DMI_N2S_PDMI_N2S_P

    TP_CPU_FDI_TX_N

    DMI_N2S_P

    DMI_S2N_P

    =PEG_D2R_N

    TP_CPU_FDI_TX_P

    DMI_N2S_N

    DMI_S2N_P

    DMI_S2N_PDMI_S2N_P

    =PEG_R2D_C_N

    =PEG_R2D_C_N

    TP_CPU_FDI_TX_P

    CPU_CFG

    10 OF 110

    A.0.0051-8600

    10 OF 92

    8

    51 88

    8

    8

    84

    84 8

    8

    8

    51 88

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8 8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

    8

  • OUT

    IN

    IN

    OUT

    OUT

    BI

    BI

    OUT

    INOUT

    ININ

    INOUT

    OUT

    OUT

    IN

    OUTOUTOUTOUTOUTOUTOUT

    IN

    IN

    RSTIN*

    TAPPWRGOOD

    VTTPWRGOOD

    SM_DRAMPWROK

    VCCPWRGOOD_0

    VCCPWRGOOD_1

    PM_SYNC

    RESET_OBS*

    THERMTRIP*

    TDO

    COMP3

    BPM_7*

    BPM_4*

    BPM_6*BPM_5*

    BPM_2*BPM_3*

    BPM_0*BPM_1*

    DBR*

    TDO_MTDI_M

    TDI

    TRST*TMS

    PREQ*

    TCK

    PM_EXT_TS_1*PM_EXT_TS_0*

    PRDY*

    SM_RCOMP_0SM_RCOMP_1SM_RCOMP_2

    SM_DRAMRST*

    PEG_CLK*PEG_CLK

    BCLK_ITP*BCLK_ITP

    BCLK_1*BCLK_1

    BCLK_0*BCLK_0

    SKTOCC*

    COMP0

    PROCHOT*

    PECI

    COMP2

    CATERR*

    COMP1

    DDR3

    MISC

    JTAG

    & M

    BP

    (2 OF 10)

    CLOC

    KS

    THERMALMISC

    PWR MANAGEMENT

    IN

    ININ

    OUT

    IN

    OUT

    IN

    IN

    ININ

    IN

    II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

    I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE

    36

    BRANCH

    REVISION

    DRAWING NUMBER SIZED

    R

    IV ALL RIGHTS RESERVEDSHEET

    PAGE TITLE

    C

    A

    D

    2 1

    PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

    Apple Inc.

    PAGE

    NOTICE OF PROPRIETARY PROPERTY:

    A

    B

    C

    345678

    D

    B

    8 7 5 4 2 1

    (GND)

    DIVIDER IS BASED ON 2009 WW04 MOW

    COMES FROM VTT VR

    32 91

    19 91

    62 63 67 91

    25 91

    25 91

    21

    46

    21 46 91

    2

    1R1101515%

    MF-LF1/16W

    4022

    1R1100

    402MF-LF

    515%1/16W

    2

    1R11121%

    49.91/16WMF-LF402

    PLACE R1112 CLOSE TO AF2

    2

    1R1113

    402

    49.91/16W1%

    MF-LF

    PLACE R1113 CLOSE TO AF36

    2

    1R1110

    PLACE R1110 CLOSE TO C11

    MF-LF

    1%

    402

    1/16W

    20

    2

    1R1111

    MF-LF

    1%

    PLACE R1111 CLOSE TO B11

    402

    1/16W

    20

    25

    25

    25

    25

    25

    25

    25 84

    25 27 91

    25

    25 84

    25 84

    25 84

    25 84

    25 84

    25 84

    25 84

    2

    1R1162

    402

    1/16WMF-LF

    1001%

    PLACE R1162 CLOSE TO AG1

    2

    1R1160130

    402

    1/16WMF-LF

    1%

    PLACE R1160 CLOSE TO AE1

    2

    1R1161

    1/16WMF-LF402

    1%24.9

    PLACE R1161 CLOSE TO AD1

    21 84

    2

    1R1170

    402

    1/16W5%51

    MF-LF

    21 25 91

    2

    1R11201.1K

    1%

    MF-LF1/16W

    402

    2

    1R1121NOSTUFF

    1/16W

    402

    1%

    MF-LF

    3.01K

    2

    1R11035%1/16W

    402MF-LF

    1K

    AG37

    AH36

    AH35

    AM39AN40

    AF35

    AF38

    AM38

    AF37

    AM37

    AN37

    AK34

    AE1AD1AG1

    AV8

    AH37

    AK38

    AF34

    AL39

    AH34

    AK37AJ38

    AH39

    AB4AB5

    AA4AA3

    AG35

    AL40

    C11B11AF2

    AF36

    AG39

    AK31AK30AL30AM31AK32AK33AL32AL33

    AK40AK39

    Y8AA8

    AA6AA7U1000

    OMIT

    LGA1156-SKTLYNNFIELD

    21 84

    18 84

    18 84

    25 84

    18 84

    25 84

    18 84

    19 91

    2

    1C1100NOSTUFF

    X7R-CERM

    0.1UF10%16V

    402

    2

    1R1104

    402

    51

    MF-LF

    5%1/16W

    46 91

    46 91

    1

    6

    2 Q1177SOT-363-LFMMDT3904-X-G

    4

    3

    5 Q1177SOT-363-LFMMDT3904-X-G

    2

    1R11271%

    MF-LF1/16W

    402

    150

    2

    1R1126

    MF-LF1/16W

    1%10K

    402

    2 1R1125

    402

    1%MF-LF1/16W

    10K27 91 CPU CLOCK/MISC/JTAGCPU_RESET_L CPU_RESET_L_R

    PLT_RESET_LS3V3

    PM_SYNC

    FSB_CPURSTOUT_L

    CPU_PECI

    CPU_COMP1

    CPU_CATERR_L

    CPU_COMP2

    CPU_PROCHOT_L

    CPU_COMP0

    CPU_SKTOCC_L

    FSB_CLK133M_CPU_PFSB_CLK133M_CPU_N

    GFX_CLK120M_DPLLSS_PGFX_CLK120M_DPLLSS_N

    FSB_CLK133M_ITP_PFSB_CLK133M_ITP_N

    PCIE_CLK100M_CPU_PPCIE_CLK100M_CPU_N

    CPU_MEM_RESET_L

    XDP_PRDY_L

    PM_EXT_TS_LPM_EXT_TS_L

    XDP_TCK

    XDP_PREQ_L

    XDP_TMS

    XDP_TDI

    XDP_DBRESET_L

    XDP_BPM_LXDP_BPM_L

    XDP_BPM_LXDP_BPM_L

    XDP_BPM_LXDP_BPM_L

    XDP_BPM_L

    XDP_BPM_L

    CPU_COMP3

    XDP_TDO

    PM_THRMTRIP_L

    XDP_TRST_L

    CPU_SM_RCOMP1CPU_SM_RCOMP2

    CPU_SM_RCOMP0

    PLT_RESET_LS1V1_L

    PLT_RESET_LS1V1_L

    =PPVTT_S0_CPU

    =PP3V3_S5_CPURESET =PPVTT_S0_CPU

    CPU_TDO_M_TDI_M

    CPUVTT_REG_PGOOD

    CPU_PWRGD

    PM_MEM_PWRGD

    XDP_CPUPWRGD

    =PPVTT_S0_CPU

    11 OF 110

    A.0.0051-8600

    11 OF 92

    84

    84

    84

    62

    84

    83

    83

    83

    11 91

    11 91

    6 11 13 16 46 64

    6 6 11 13 16 46 64

    6 11 13 16 46 64

  • BIBIBIBIBIBIBIBIBIBIBIBIBIBI

    BIBI

    BIBIBIBIBIBI

    BIBI

    BIBIBIBIBIBI

    BIBI

    BIBIBIBIBIBI

    BIBI

    BIBIBIBIBIBI

    BIBI

    BIBIBIBIBIBI

    BIBI

    BIBIBIBIBIBI

    BIBI

    OUT

    OUT

    OUT

    OUT

    OUT

    OUT

    BI

    BI

    BI

    BI

    BIBI

    BIBI

    BIBI

    BIBI

    BIBI

    BIBI

    OUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUT

    OUTOUTOUTOUTOUTOUTOUTOUT

    OUTOUT

    OUT

    OUTOUT

    OUT

    OUTOUT

    OUTOUT

    BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

    OUTOUTOUT

    OUT

    OUTOUT

    OUTOUT

    OUT

    OUTOUT

    OUT

    OUTOUT

    OUTOUT

    OUTOUTOUTOUTOUTOUTOUTOUT

    BIBIBIBIBI

    BIBI

    BI

    BI

    BIBI

    BI

    BIBI

    BIBI

    OUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUT

    SA_ECC_CB_7SA_ECC_CB_6SA_ECC_CB_5

    SA_ECC_CB_3SA_ECC_CB_4

    SA_ECC_CB_2SA_ECC_CB_1SA_ECC_CB_0

    SA_MA_15SA_MA_14SA_MA_13SA_MA_12SA_MA_11

    SA_MA_9SA_MA_10

    SA_MA_7SA_MA_6

    SA_MA_8

    SA_MA_4SA_MA_5

    SA_MA_1SA_MA_2SA_MA_3

    SA_MA_0

    SA_DQS_8

    SA_DQS_6SA_DQS_7

    SA_DQS_5SA_DQS_4SA_DQS_3SA_DQS_2SA_DQS_1SA_DQS_0

    SA_DQS_8*SA_DQS_7*

    SA_DQS_5*SA_DQS_6*

    SA_DQS_4*SA_DQS_3*SA_DQS_2*SA_DQS_1*SA_DQS_0*

    SA_CS_3*SA_CS_2*SA_CS_1*SA_CS_0*

    SA_CS_4*

    SA_CS_7*SA_CS_6*SA_CS_5*

    SA_CK_2*

    SA_CK_1*

    SA_CK_0*

    SA_DIMM_VREFDQ

    SA_WE*SA_RAS*SA_CAS*

    SA_DQ_6SA_DQ_5

    SA_DQ_13

    SA_DQ_18SA_DQ_17

    SA_CKE_0

    SA_DQ_7

    SA_DQ_62SA_DQ_61

    SA_DQ_63

    SA_BS_1SA_BS_2

    SA_BS_0

    SA_DQ_52

    SA_DQ_54SA_DQ_53

    SA_DQ_56SA_DQ_57

    SA_DQ_55

    SA_DQ_58SA_DQ_59SA_DQ_60

    SA_DQ_51

    SA_DQ_42SA_DQ_41

    SA_DQ_43

    SA_DQ_46SA_DQ_47

    SA_DQ_49SA_DQ_48

    SA_DQ_50

    SA_DQ_45SA_DQ_44

    SA_DQ_40

    SA_DQ_34

    SA_DQ_36

    SA_DQ_38SA_DQ_39

    SA_DQ_33

    SA_DQ_35

    SA_DQ_37

    SA_DQ_20SA_DQ_21

    SA_DQ_23SA_DQ_22

    SA_DQ_24SA_DQ_25SA_DQ_26SA_DQ_27SA_DQ_28

    SA_DQ_11SA_DQ_12

    SA_DQ_16SA_DQ_15

    SA_DQ_19

    SA_DQ_10

    SA_DQ_14

    SA_DQ_9SA_DQ_8

    SA_DQ_0SA_DQ_1

    SA_DQ_4

    SA_DQ_2SA_DQ_3

    SA_CK_0

    SA_DQ_29SA_DQ_30SA_DQ_31SA_DQ_32

    SA_CK_1

    SA_CKE_1

    SA_CK_2

    SA_CKE_2

    SA_CK_3

    SA_CKE_3

    SA_ODT_0

    SA_ODT_2SA_ODT_1

    SA_ODT_3

    SA_DM_0

    SA_DM_2SA_DM_1

    SA_DM_3SA_DM_4SA_DM_5SA_DM_6SA_DM_7

    SA_CK_3*

    (3 OF 10)

    DDR SYSTEM MEMORY A

    SB_DQS_2*

    SB_DQS_0*SB_DQS_1*

    SB_DQS_5*SB_DQS_6*SB_DQS_7*SB_DQS_8*

    SB_DQS_3*SB_DQS_4*

    SB_CS_0*

    SB_CS_2*SB_CS_3*

    SB_CS_1*

    SB_CS_7*SB_CS_6*SB_CS_5*SB_CS_4*

    SB_CK_2*

    SB_DQ_16

    SB_DQ_1SB_DQ_0

    SB_DQ_8SB_DQ_9

    SB_DQ_52SB_DQ_51

    SB_DQ_38SB_DQ_39

    SB_DQ_63SB_DQ_62SB_DQ_61

    SB_BS_2

    SB_BS_0SB_BS_1

    SB_DQ_60SB_DQ_59SB_DQ_58SB_DQ_57SB_DQ_56SB_DQ_55SB_DQ_54SB_DQ_53

    SB_DQ_49

    SB_DQ_47SB_DQ_48

    SB_DQ_46

    SB_DQ_44SB_DQ_45

    SB_DQ_42SB_DQ_41

    SB_DQ_43

    SB_DQ_50

    SB_DQ_40

    SB_DQ_33

    SB_DQ_37

    SB_DQ_35SB_DQ_34

    SB_DQ_36

    SB_DQ_32SB_DQ_31

    SB_DQ_27SB_DQ_26SB_DQ_25SB_DQ_24SB_DQ_23SB_DQ_22SB_DQ_21SB_DQ_20SB_DQ_19SB_DQ_18SB_DQ_17

    SB_DQ_15SB_DQ_14SB_DQ_13SB_DQ_12SB_DQ_11

    SB_DQ_7SB_DQ_6SB_DQ_5SB_DQ_4

    SB_DQ_2SB_DQ_3

    SB_DIMM_VREFDQ SB_MA_15

    SB_MA_10

    SB_MA_12SB_MA_11

    SB_MA_13SB_MA_14

    SB_MA_8SB_MA_9

    SB_MA_7SB_MA_6SB_MA_5SB_MA_4

    SB_MA_2SB_MA_1SB_MA_0

    SB_MA_3

    SB_DQS_8

    SB_DQS_6SB_DQS_5SB_DQS_4SB_DQS_3

    SB_DQS_1SB_DQS_2

    SB_DQS_0

    SB_ECC_CB_0SB_ECC_CB_1SB_ECC_CB_2SB_ECC_CB_3

    SB_ECC_CB_5SB_ECC_CB_4

    SB_ECC_CB_6SB_ECC_CB_7

    SB_DM_7SB_DM_6SB_DM_5SB_DM_4

    SB_DM_2

    SB_DM_0

    SB_ODT_3SB_ODT_2SB_ODT_1SB_ODT_0

    SB_CKE_3

    SB_CK_3

    SB_CKE_2

    SB_CKE_1

    SB_CK_2

    SB_CK_1

    SB_CKE_0

    SB_CK_0

    SB_DQS_7

    SB_DM_3

    SB_DM_1

    SB_DQ_10

    SB_DQ_28SB_DQ_29SB_DQ_30

    SB_WE*

    SB_CK_3*

    SB_CK_1*

    SB_CAS*

    SB_CK_0*

    SB_RAS*

    (4 OF 10)

    DDR

    SYST

    EM M

    EMOR

    Y B

    OUT

    OUTOUT

    OUTOUT

    OUTOUT

    OUT

    OUTOUT

    OUT

    OUTOUT

    OUT

    OUTOUT

    OUT

    OUTOUT

    OUTOUT

    OUTOUT OUT

    II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

    I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE

    36

    BRANCH

    REVISION

    DRAWING NUMBER SIZED

    R

    IV ALL RIGHTS RESERVEDSHEET

    PAGE TITLE

    C

    A

    D

    2 1

    PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

    Apple Inc.

    PAGE

    NOTICE OF PROPRIETARY PROPERTY:

    A

    B

    C

    345678

    D

    B

    8 7 5 4 2 1

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    31 83

    31 83

    31 83 AT22AT20

    AY24AW23AV24AV23

    AW12AU14AW13AV14AY13AW14AU15AV15

    AR10AT11AU24AW11AU13AT19

    AY15AW18

    AM11AK11AL9AK9AP11AR11AN10AP10

    AM10

    AL10

    AR38

    AR39

    AV35

    AW36

    AW32

    AV32

    AT29

    AR28

    AW6

    AY6

    AU3

    AU4

    AP3

    AP2

    AJ3

    AK3

    AN2AN3AK2

    AP40AP39AU39AU38

    AK1

    AN39AN38AT40AT39AW37AV36AW34AY34AU37AV37

    AH2

    AY35AW35AW33AU33AW30AV30AU34AV33AU31AU30

    AG2

    AN30AR29AR27AN26AP30AP28AT28AN27AW7AV7

    AL1

    AV5AU5AY8AU8AY5AW5AV4AV2AT1AT3

    AL2

    AW4AW3AU2AT4AR4AP1AM2AM3AR2AR3

    AJ4AH1

    AT38AU35AW31AN29AV6AU1AN1AJ2

    AF3

    AK23AL23AM22AK22AU23AU21AW24

    AV21

    AY10

    AV10

    AW10

    AU10

    AN19AP19

    AP21AN21

    AN18AP18

    AR21AR22

    AU22

    AU12AU19AV20

    U1000

    OMIT

    LGA1156-SKTLYNNFIELD

    AU26AW26

    AU28AV27AU29AU27

    AY16AT17AU16AW17AV17AY18AU17AV18

    AV11AY12AW28AW15AW16AY25

    AU18AU20

    AP13AN14AN12AM12AP14AN15AT13AR12

    AR13

    AR14

    AM36

    AL37

    AR37

    AR36

    AR32

    AP32

    AR24

    AT25

    AP8

    AR8

    AM6

    AN6

    AJ5

    AH6

    AE5

    AF4

    AH7AG5AE6

    AL36AJ35AM34AN35

    AF5

    AJ37AJ36AM35AL35AP37AN34AT35AP34AP36AN33

    AC6

    AT36AR35AT33AR34AR31AT31AM32AR33AP31AT32

    AC7

    AT26AP25AP22AT23AR26AR25AP23AN23AT9AL8

    AJ8

    AR6AN8AM8AR9AR7AT6AP5AN7AM4AL5

    AH8

    AR5AP6AN5AL6AK7AJ7AG4AG6AL4AK6

    AD6AD7

    AK35AM33AN32AN24AT7AM7AH4AE4

    AG3

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    AV9

    AU9

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    AW8

    AR18AR19

    AN16AN17

    AR15AT15

    AR16AR17

    AW27

    AV12AW25AU25

    U1000

    OMIT

    LGA1156-SKTLYNNFIELD

    28 83

    30 83

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    28 83 30 83 31 83

    CPU DDR3 INTERFACESSYNC_MASTER=K75F_MLB SYNC_DATE=04/14/2010

    MEM_A_CLK_PMEM_A_CLK_N

    MEM_A_CKE

    MEM_A_CLK_N

    MEM_A_CKE

    MEM_A_CLK_PMEM_A_CLK_N

    TP_MEM_A_CS_LTP_MEM_A_CS_LTP_MEM_A_CS_L

    MEM_A_ODTMEM_A_ODT

    MEM_A_DMMEM_A_DMMEM_A_DMMEM_A_DMMEM_A_DMMEM_A_DM

    MEM_A_DMMEM_A_DM

    MEM_A_ODTMEM_A_ODT

    MEM_A_CKE

    MEM_A_CLK_P

    MEM_A_CKE

    MEM_A_CLK_P

    MEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQ

    MEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQ

    MEM_A_DQ

    MEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQ

    MEM_A_DQ

    MEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQ

    MEM_A_DQ

    MEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQ

    MEM_A_DQMEM_A_DQMEM_A_DQ

    MEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQ

    MEM_A_BA

    MEM_A_BAMEM_A_BA

    MEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_DQ

    MEM_A_DQMEM_A_DQ

    MEM_A_CAS_LMEM_A_RAS_LMEM_A_WE_L

    CPU_DIMM_VREF_A

    MEM_A_CLK_N

    TP_MEM_A_CS_L

    MEM_A_CS_LMEM_A_CS_L

    MEM_A_DQS_NMEM_A_DQS_NMEM_A_DQS_NMEM_A_DQS_NMEM_A_DQS_N

    MEM_A_DQS_NMEM_A_DQS_N

    MEM_A_DQS_NTP_MEM_A_DQS_N

    MEM_A_DQS_PMEM_A_DQS_PMEM_A_DQS_PMEM_A_DQS_PMEM_A_DQS_PMEM_A_DQS_P

    MEM_A_DQS_PMEM_A_DQS_P

    TP_MEM_A_DQS_P

    MEM_A_A

    MEM_A_AMEM_A_AMEM_A_A

    MEM_A_AMEM_A_A

    MEM_A_A

    MEM_A_AMEM_A_A

    MEM_A_AMEM_A_A

    MEM_A_AMEM_A_AMEM_A_AMEM_A_AMEM_A_A

    TP_MEM_A_DQ_CBTP_MEM_A_DQ_CBTP_MEM_A_DQ_CB

    TP_MEM_A_DQ_CBTP_MEM_A_DQ_CB

    TP_MEM_A_DQ_CBTP_MEM_A_DQ_CBTP_MEM_A_DQ_CB

    MEM_B_RAS_L

    MEM_B_CLK_N

    MEM_B_CAS_L

    MEM_B_CLK_N

    MEM_B_CLK_N

    MEM_B_WE_L

    MEM_B_DQMEM_B_DQMEM_B_DQ

    MEM_B_DQ

    MEM_B_DM

    MEM_B_DM

    MEM_B_DQS_P

    MEM_B_CLK_P

    MEM_B_CKE

    MEM_B_CLK_P

    MEM_B_CLK_P

    MEM_B_CKE

    MEM_B_CKE

    MEM_B_CLK_P

    MEM_B_CKE

    MEM_B_ODTMEM_B_ODTMEM_B_ODTMEM_B_ODT

    MEM_B_DM

    MEM_B_DM

    MEM_B_DMMEM_B_DMMEM_B_DMMEM_B_DM

    TP_MEM_B_DQ_CBTP_MEM_B_DQ_CB

    TP_MEM_B_DQ_CBTP_MEM_B_DQ_CB

    TP_MEM_B_DQ_CBTP_MEM_B_DQ_CBTP_MEM_B_DQ_CBTP_MEM_B_DQ_CB

    MEM_B_DQS_P

    MEM_B_DQS_PMEM_B_DQS_P

    MEM_B_DQS_PMEM_B_DQS_PMEM_B_DQS_PMEM_B_DQS_P

    TP_MEM_B_DQS_P

    MEM_B_A

    MEM_B_AMEM_B_AMEM_B_A

    MEM_B_AMEM_B_AMEM_B_AMEM_B_A

    MEM_B_AMEM_B_A

    MEM_B_AMEM_B_A

    MEM_B_AMEM_B_A

    MEM_B_A

    MEM_B_ACPU_DIMM_VREF_B

    MEM_B_DQMEM_B_DQ

    MEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQ

    MEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQ

    MEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQ

    MEM_B_DQMEM_B_DQ

    MEM_B_DQ

    MEM_B_DQMEM_B_DQ

    MEM_B_DQ

    MEM_B_DQ

    MEM_B_DQ

    MEM_B_DQ

    MEM_B_DQ

    MEM_B_DQMEM_B_DQ

    MEM_B_DQMEM_B_DQ

    MEM_B_DQ

    MEM_B_DQMEM_B_DQ

    MEM_B_DQ

    MEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQ

    MEM_B_BAMEM_B_BA

    MEM_B_BA

    MEM_B_DQMEM_B_DQMEM_B_DQ

    MEM_B_DQMEM_B_DQ

    MEM_B_DQMEM_B_DQ

    MEM_B_DQMEM_B_DQ

    MEM_B_DQMEM_B_DQ

    MEM_B_DQ

    MEM_B_CLK_N

    TP_MEM_B_CS_LTP_MEM_B_CS_LTP_MEM_B_CS_LTP_MEM_B_CS_L

    MEM_B_CS_L

    MEM_B_CS_LMEM_B_CS_L

    MEM_B_CS_L

    MEM_B_DQS_NMEM_B_DQS_N

    TP_MEM_B_DQS_NMEM_B_DQS_NMEM_B_DQS_NMEM_B_DQS_N

    MEM_B_DQS_NMEM_B_DQS_N

    MEM_B_DQS_N

    MEM_A_DQ

    MEM_A_CS_LMEM_A_CS_L

    12 OF 110

    A.0.0051-8600

    12 OF 92

    8

    8

    8

    8

    8 83

    8 83

    8

    8

    8

    8

    8

    8

    8

    8 8

    8

    8

    8

    8

    8

    8

    8

    8 83

    8

    8

    8

    8

    8 83

  • OUTOUTOUTOUTOUTOUTOUT

    OUT

    OUTOUT

    IN

    OUTOUT

    PSI*

    VID_1/MSID_1VID_2/MSID_2VID_3/CSC_0

    VID_5/CSC_2VID_6

    ISENSE

    VID_7

    VID_4/CSC_1

    VID_0/MSID_0

    VCC_74VCC_73

    VCC_75VCC_76VCC_77

    VCC_39VCC_38VCC_37VCC_36

    VTT_33

    VTT_10

    VTT_4

    VTT_42

    VTT_44

    VTT_46

    VTT_49

    VTT_51

    VTT_53

    VTT_56VTT_57

    VTT_59

    VTT_61

    VTT_63

    VTT_65

    VTT_68

    VTT_70

    VTT_75

    VTT_77

    VTT_SELECT

    VTT_12VTT_13VTT_14

    VTT_16

    VCC_13VCC_12VCC_11

    VTT_5

    VCC_3VCC_2

    VCC_SENSEVSS_SENSE

    VTT_3

    VTT_8

    VTT_6

    VTT_73VTT_74

    VTT_76

    VTT_66

    VTT_72

    VCC_80

    VCC_72

    VCC_89

    VCC_56

    VSS_SENSE_VTTVTT_SENSE

    VCC_88VCC_87VCC_86VCC_85VCC_84

    VCC_4

    VCC_1

    VCC_9VCC_8VCC_7

    VCC_5

    VCC_10

    VCC_14

    VCC_18VCC_19

    VCC_17VCC_16VCC_15

    VCC_21VCC_22VCC_23VCC_24

    VCC_20

    VCC_25VCC_26VCC_27VCC_28VCC_29VCC_30

    VCC_34VCC_33VCC_32VCC_31

    VCC_40

    VCC_45VCC_44VCC_43VCC_42VCC_41

    VCC_50VCC_49VCC_48VCC_47VCC_46

    VCC_55

    VCC_53VCC_52VCC_51

    VCC_60VCC_59VCC_58VCC_57

    VCC_64VCC_65

    VCC_62VCC_63

    VCC_61

    VCC_70VCC_69VCC_68VCC_67VCC_66

    VCC_71

    VCC_81VCC_82VCC_83

    VCC_90VCC_91VCC_92VCC_93VCC_94VCC_95VCC_96

    VCC_99

    VCC_97VCC_98

    VTT_2

    VTT_0VTT_1

    VTT_9

    VTT_11

    VTT_15

    VTT_17VTT_18

    VTT_23VTT_22

    VTT_24

    VTT_21

    VTT_25VTT_26

    VTT_29

    VTT_27

    VTT_34VTT_35

    VTT_50

    VTT_47VTT_48

    VTT_52

    VTT_54

    VTT_60

    VTT_58

    VTT_62

    VTT_64

    VTT_67

    VTT_69

    VTT_71

    VTT_43

    VTT_41

    VTT_39VTT_38VTT_37VTT_36

    VCC_0

    VCC_54VTT_55

    VTT_45

    VTT_40

    VTT_32VTT_31VTT_30

    VTT_28

    VTT_20VTT_19

    VCC_6VTT_7

    VCC_35

    VCC_78VCC_79

    POWE

    R

    1.1V

    RAI

    L PO

    WER

    SENSE LINES

    CPU CORE SUPPLY

    (6 OF 10)

    CPU

    VIDS

    OUT

    VAXG_14VAXG_15VAXG_16VAXG_17

    VAXG_0

    VAXG_2

    VAXG_36

    VAXG_34

    VAXG_SENSEVSSAXG_SENSE

    GFX_VID_0GFX_VID_1GFX_VID_2GFX_VID_3GFX_VID_4GFX_VID_5GFX_VID_6

    GFX_VR_ENGFX_DPRSLPVR

    GFX_IMON

    VDDQ_2VDDQ_1VDDQ_0

    VDDQ_4VDDQ_3

    VDDQ_5VDDQ_6VDDQ_7VDDQ_8VDDQ_9

    VDDQ_10VDDQ_11VDDQ_12VDDQ_13

    VDDQ_15VDDQ_14

    VDDQ_17VDDQ_18

    VCCPLL_0VCCPLL_1

    VAXG_9VAXG_8

    VAXG_3VAXG_4

    VAXG_7VAXG_6VAXG_5

    VAXG_18VAXG_19

    VAXG_23VAXG_24

    VAXG_22VAXG_21VAXG_20

    VAXG_25

    VAXG_28VAXG_29

    VAXG_26VAXG_27

    VAXG_33

    VAXG_35

    VAXG_37VAXG_38VAXG_39VAXG_40VAXG_41VAXG_42VAXG_43VAXG_44VAXG_45VAXG_46VAXG_47VAXG_48

    VAXG_13VAXG_12VAXG_11VAXG_10

    VAXG_32VAXG_31VAXG_30

    VAXG_1

    VCCPLL_2

    VDDQ_16

    GRAP

    HICS

    VID

    S1.

    8VDD

    R3-1

    .5V

    RAIL

    S

    SENS

    ELI

    NES

    ( 7 OF 10 )

    POWE

    R

    GRAP

    HICS

    VCC_NCTF_0VCC_NCTF_1

    CGC_TP_NCTF

    FC_AE38

    FC_AG40

    VCC_100

    VCC_104VCC_103VCC_102VCC_101

    VCC_105VCC_106VCC_107VCC_108VCC_109VCC_110VCC_111VCC_112

    VCC_114

    VCC_119VCC_118VCC_117

    VCC_115VCC_116

    VCC_124VCC_123VCC_122VCC_121VCC_120

    VCC_125VCC_126

    VCC_130

    VCC_134VCC_133VCC_132VCC_131

    VCC_135

    VCC_138VCC_139

    VCC_137VCC_136

    VCC_140

    VCC_145VCC_144VCC_143VCC_142VCC_141

    VCC_146

    VCC_150VCC_149VCC_148VCC_147

    VCC_155VCC_154VCC_153VCC_152VCC_151

    VCC_160VCC_159VCC_158VCC_157VCC_156

    VCC_165VCC_164VCC_163VCC_162VCC_161

    VCC_168VCC_169VCC_170

    VCC_167VCC_166

    VCC_171VCC_172VCC_173VCC_174VCC_175VCC_176VCC_177VCC_178VCC_179VCC_180VCC_181

    VCC_113

    VCC_129VCC_128VCC_127

    (10 OF 10)

    VCC

    NCTF

    II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

    I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE

    36

    BRANCH

    REVISION

    DRAWING NUMBER SIZED

    R

    IV ALL RIGHTS RESERVEDSHEET

    PAGE TITLE

    C

    A

    D

    2 1

    PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

    Apple Inc.

    PAGE

    NOTICE OF PROPRIETARY PROPERTY:

    A

    B

    C

    345678

    D

    B

    8 7 5 4 2 1

    (Controlled by VTT_SELECT pin)

    THIS SUPPLY IS NEEDED ONLY FOR SYSTEM WITH DALE IG

    CONNECTED TO THE IMON OUT FROM CPU REG

    16 64 89

    16 64 89

    16 64 89

    16 64 89

    16 64 89

    16 64 89

    16 64 89

    16 64 89

    49 67 89

    67 89

    64 88

    64 89

    49 64 89

    AE35

    AF39

    AC35AC34

    Y38Y37Y36Y35Y34Y33W6W1

    AC33

    V8V7V6V40V39V38V37V36V35V34

    AB7

    V33V2T8T7T6T2P8P7P6N7

    AA38

    M9M11M10L10AL21AL20AK21AK20AK19AJ32

    AA37

    AJ31AJ29AJ27AJ25AJ23AJ21AJ19AJ17AG33AF33

    AA36

    AE8AE40AE39AE34AE33AD40AD39AD38AD37AD36

    AA35

    AD35AD34AD33AC8AC5AC40AC39AC38AC37AC36

    AA34AA33

    AE36

    T34

    U33U34U35U36U37U38U39U40

    T35

    J19J18H40H38H37H35H34H32H31H29

    B26

    H28H26H25H23H22H20H19G39G38G36

    B25

    G35G33G32G30G29G27G26G24G23G21

    B23

    G20F40F39F37F36F34F33F31F30F28

    A36

    F27F25F24F22F21E40E38E37E35E34

    A35

    E32E31E29E28E26E25E23E22D39D38

    A33

    D36D35D33D32D30D29D27D26D24D23

    A27

    C39C37C36C34C33C31C30C28C27C25

    A26

    C24C23B38B37B35B34B32B31B29B28

    A24A23

    AG38

    T40

    U1000

    OMIT

    LYNNFIELDLGA1156-SKT

    16 64 89

    B13

    AV19AV16AV13AU11AT21AT18AT10AJ15

    AY26AY23AY17AY14AY11AW9AV28AV25AV22

    AJ13AJ11

    AG8AF8AF7

    A13

    C15C14B18B17B15

    M16M15M14L16L15L14K16K15K14

    B14

    J16J15J14H17H15H14G18G17G15G14

    A18

    F19F18F17F15F14E20E18E17E15E14

    A17

    D21D20D18D17D15D14C21C20C18C17

    A15A14

    F12

    J11G11C12E11E12B12G10

    F6J10

    U1000

    OMIT

    LGA1156-SKTLYNNFIELD

    C40A38

    R40R39R38R37R36R35R34R33P40P39P38P37P36P35P34P33N39N38N36N35N33M40M39M37M36M34M33M30M28M27M25M24M22M21M19M17L40L38L37L35L34L32L31L29L28L26L25L23L22L20L19L17K39K38K36K35K33K32K30K29K27K26K24K23K21K20K18K17J40J39J37J36J34J33J31J30J28J27J25J24J22J21

    AG40

    AE38

    B39

    U1000

    OMIT

    LYNNFIELDLGA1156-SKT

    CPU POWERSYNC_DATE=04/14/2010SYNC_MASTER=K75F_MLB

    CPU_VIDCPU_VIDCPU_VID

    CPU_VIDCPU_VID

    TP_CPU_VTTSELECT

    =PPVTT_S0_CPU

    =PPVCORE_S0_CPU

    TP_GFX_VR_EN

    =PPVAXG_S0_CPU

    CPU_VTTSENSE_P

    VR_CPU_IOUT

    =PPVCORE_S0_CPU

    TP_GFX_VID

    TP_GFX_VSENSE_PTP_GFX_VSENSE_N

    TP_GFX_VIDTP_GFX_VIDTP_GFX_VIDTP_GFX_VIDTP_GFX_VIDTP_GFX_VID

    TP_GFX_DPRSLPVR

    =PP1V5_CPU_MEM

    =PP1V8_S0_CPU_PLL

    CPU_PSI_L

    CPU_VID

    CPU_VID

    CPU_VID

    CPU_VCC_PKG_SENSE_PCPU_VCC_PKG_SENSE_N

    CPU_VTTSENSE_N

    =PPVCORE_S0_CPU

    TP_CPU_CGC_NCTF

    TP_CPU_FC_AE38

    TP_CPU_FC_AG40

    13 OF 110

    A.0.0051-8600

    13 OF 92

    6 11 16 46 64

    6 13 16

    6 17

    6 13 16

    8

    8

    8

    8

    8

    8

    8

    8

    8

    6 16 29

    6 16 63

    6 13 16

    8

    8

  • VSS_27VSS_26

    VSS_84VSS_83VSS_82

    VSS_80VSS_81

    VSS_89VSS_88VSS_87

    VSS_85VSS_86

    VSS_94VSS_93VSS_92

    VSS_90VSS_91

    VSS_99VSS_98

    VSS_95VSS_96VSS_97

    VSS_104VSS_103VSS_102

    VSS_100VSS_101

    VSS_105

    VSS_109VSS_108VSS_107VSS_106

    VSS_110VSS_111

    VSS_114

    VSS_112VSS_113

    VSS_115

    VSS_119VSS_118VSS_117VSS_116

    VSS_120

    VSS_125VSS_124

    VSS_122VSS_121

    VSS_123

    VSS_130VSS_129VSS_128VSS_127VSS_126

    VSS_134VSS_133VSS_132

    VSS_135

    VSS_131

    VSS_140VSS_139VSS_138VSS_137VSS_136

    VSS_145VSS_144VSS_143

    VSS_141VSS_142

    VSS_150VSS_149VSS_148

    VSS_146VSS_147

    VSS_151VSS_152VSS_153VSS_154VSS_155VSS_156

    VSS_159

    VSS_157VSS_158

    VSS_1VSS_0

    VSS_2VSS_3VSS_4VSS_5VSS_6VSS_7VSS_8VSS_9

    VSS_11VSS_12VSS_13VSS_14

    VSS_10

    VSS_18

    VSS_15

    VSS_17VSS_16

    VSS_19

    VSS_23VSS_22VSS_21VSS_20

    VSS_24VSS_25

    VSS_29VSS_30VSS_31VSS_32VSS_33VSS_34VSS_35VSS_36VSS_37VSS_38VSS_39VSS_40VSS_41VSS_42VSS_43

    VSS_45VSS_44

    VSS_48VSS_49VSS_50

    VSS_47VSS_46

    VSS_51VSS_52VSS_53VSS_54VSS_55

    VSS_57VSS_56

    VSS_58VSS_59VSS_60

    VSS_65VSS_64VSS_63VSS_62

    VSS_70VSS_69VSS_68VSS_67VSS_66

    VSS_71VSS_72VSS_73VSS_74VSS_75VSS_76

    VSS_78VSS_77

    VSS_79

    VSS_28

    VSS_61

    ( 8 OF 10 )

    VSS

    VSS_277VSS_276VSS_275

    VSS_188

    VSS_164VSS_165

    VSS_176VSS_175VSS_174

    VSS_224VSS_223

    VSS_221VSS_220VSS_219

    VSS_218VSS_217VSS_216VSS_215VSS_214VSS_213VSS_212VSS_211VSS_210VSS_209VSS_