A Refined Model for Performance Analysis of Buffered Banyan Networks with and without Priority Control

King-Sun Chan Kwan L. Yeung Sammy C.H. Chan Department of Electronic Engineering

City University of Hong Kong Tat Chee Avenue, Hong Kong

Email: { kschan, kyeung, schan} @ee.cityu.edu.hk

Abstract: The optimistic analytical results for performance analysis of buffered banyan networks are mainly due to certain independence assumptions used for simplifying analysis. To capture more effects of cell correlation, a refined analytical model for both single-buffered and multiple buffered banyan networks is proposed in this paper. When cell output contention occurs at a 2 x 2 switch element, two contention resolution schemes are studied. One is based on randomly choosing the winning cell and another is to give priority to the cell which has been delayed in the current buffer for at least one stage cycle. We show that using the priority scheme the cell delay deviation is reduced but the influence on throughput performance is insignificant. Comparisons with some proposed analytical models in the literature reveal that our model is more accurate and powerjid in predicting the pe$ormance of buffered banyan networks.

I. Introduction Performance analysis of buffered banyan networks has

attracted a lot of research interests. Jenq [ 11 first proposed a two- state Markovian model for analyzing single-buffered banyan networks with 2 x 2 switch elements (SEs). His result was later extended to allow multiple buffers and arbitrary SE sizes in [2-41. In [3], a three-state model for describing the buffer occupancy was introduced and single-buffered banyan networks were analyzed. Performance of banyan networks employing shared buffering or parallel bypass input buffering was studied in [5 ] . The performances of single-buffered banyan networks under non- uniform input traffic conditions were also reported [6,7].

g buffers Switch Element Inputs I outputs

Stage 1 Stage 2 Stage 3

Fig. 1 An 8 x 8 buffered banyan network.

Switching a cell through a buffered banyan network consists of many stage cycles. Each stage cycle has two phases. In phase one a backpressure mechanism is used for informing each SE if it is allowed to forward its HOL cells to the next stage in the current stage cycle. In phase two, the actual cell transmission occurs. Phase one creates extra control overheads but it guarantees no packet to be lost due to internal blocking as well as internal buffer overflow. For each stage cycle, a cell can move

forward by at most one stage. Therefore for a m-stage banyan network, the minimum cell delay is m stage cycles.

Three important performance measures for buffered banyan networks are the switch throughput, cell transfer delay and cell delay deviation. It can be found that all analytical results reported in the literature are optimistic in the sense that they overestimate the throughput and underestimate the delay. The well-known reason is that some independence assumptions used for simplifying the analysis are not accurate enough. The three-state Markovian model 131 used for single-buffered banyan networks is a good attempt to capture more effects of correlation among cells. Some improvements in throughput and delay performance have been demonstrated. But so far no study on cell delay deviation has been reported.

In this paper, a refined three-state Markovian model is proposed for both single-buffered and multiple buffered banyan networks. When cell output contention occurs at a 2 x 2 switch element, two contention resolution schemes are studied. One is based on randomly choosing the winning cell and another is to give priority to the cell which has been delayed in the current buffer for at least one stage cycle. The throughput, cell transfer delay and cell delay deviation for single-buffered banyan networks with and without using priority scheme are studied. Then the model is generalized to the multiple buffered banyan networks where analytical expressions for throughput and delay are derived. We show that using the priority scheme the cell delay deviation is reduced but the influence on throughput performance is insignificant. The results obtained from our analytical model are compared with the simulations and good agreement is observed. Comparisons with some proposed analytical models in the literature reveal that our model is more accurate and powerful in predicting the performance of buffered banyan networks. In the next two sections, performance of single-buffered and multiple buffered banyans are studied separately. In each section, the refined three-state Markovian model will be introduced first. Then follow by the detailed derivations and performance evaluations. In Section IV, conclusion is presented.

11. Single Buffered Banyan Networks We assume an uniform traffic model is used and cell output

contention at each 2 x 2 SE is resolved by randomly choosing a winning cell. (Note that this assumption is relaxed when priority resolution scheme is considered.) Under these assumptions, it is a good approximation to pose that the packet distribution is identical and statistically independent for each switching stage. Each switching stage can therefore be characterized by a single SE. A three-state Markovian model shown in Fig. 2 is used to describe the buffer occupancy at a stage k SE, where

0 state “e” denotes the buffer is empty.

0-7803-4198-8/97/$10.00 0 1997 IEEE 1745

0 state “n” denotes the buffer contains a new cell, i.e. a cell which arrived in the previous stage cycle. state “b” denotes the buffer contains a blocked cell, i.e. a cell which has been delayed for at least one stage cycle.

A

e

1-r k(t) a qelABk qnlABk qblAbk

e e 0 0 0 n 1/2 1/2 ‘/2

Fig. 2 State transition diagram of a buffer at stage k

Let sg{e,n,b}. In the diagram, p;(t) is the probability that a buffer of an SE at stage k is in state “s” at the beginning of the tth stage cycle; q:(t) is the probability that at least one cell is ready to come to the buffer of an SE at stage k during the tth stage cycle given the buffer at stage k is in state “s” at the beginning of the tth stage cycle; r,k(t) is the probability that a cell in a buffer of an SE at stage k is able to move forward to next stage during the tth stage cycle given the buffer at stage k is in state “s” at the beginning of the tth stage cycle. Further let S be the normalized throughput, d be the normalized average cell delay, and o.be the normalized cell delay deviation.

A. Derivations of q:(t), q,”(t) and q;(t)

. . . . , , . . . . . . . . . , . . . ., , . . . . . . . . . .

/ Stagek Stage k- 1

buffer Q1 Fig. 3 A model for deriving the state transition probabilities

To derive q,k(t), q,k(t) and q;(t) for a stage k SE at the tth stage cycle, we first obtain their conditional probabilities on the states of the two input buffers at a corresponding SE in stage k-1 (shown in Fig. 3). The states of the two input buffers, denote by A and B, can either be “e”, “n” or “8’. Let qelA/ be the probability that at least one cell will destine for buffer Q1 during the tth stage cycle, given that at the beginning of the tth stage cycle Q1 is in state “e” and the two buffers in stage k-1 have states A and B respectively. qnlAB and q d A B k are similarly defined.

k

k qelm , qnlmk and q d M k for various combinations of A and B are summarized in Table 1. From Table 1, we have: q,k(t) = p,k-’(t)p:-’(t)+ p:-’(t)p,k-‘(t)+3P:-l(t)P:-’(t)l4

Table 1. Conditional probabilities of qi( t ) , qnk(f) and q b k ( f )

B. Derivationof r,k(t) Refer to Fig. 3 , consider r,k(t), the probability that a cell in

state “n” (or a new cell) at buffer Q1 of stage k is able to move forward to the next stage at the beginning of the tth stage cycle. Three cases based on the states of buffer 4 2 are considered: (i) If Q2 is in state “e”, there is no output contention at stage k.

The cell can enter the destined buffer only if the destined buffer has space for accommodating at least one cell. The probability is p,k+’(t) + pF’(t)r?’(t) + p,k”(t)r,k”(t).

(ii) If 4 2 is also in state “n”, output contention occurs and the cell in Q1 will win the contention with probability 3/4. The probability that the destined buffer at stage k+l can accept a cell is given by the same expression as in case (i).

(iii) If 4 2 is in state “b”, the cell in Q1 and the cell in 4 2 will destine for different output ports with 112 probability. Given that the two cells destine for different output ports, no contention will occur and the destined buffer at stage k+l can accept a cell with the same probability as in case (i). Given that the two cells destine for the same output port, the cell in Q1 will win the contention with 112 probability (using the random contention resolution scheme). In this case, the destined buffer at stage k+l can be either in states “n” or “b”. Therefore the probability that the destined buffer can accept a cell becomes

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The expression for r,k(t) can then be derived by conditioning on the three cases above:

f o r k = 1 , 2 ,..., m-l.Whenk=m,wehave

rn"(t) = p,"(t) + 3p,"(t) 1 4 + 3p,"(t) 14.

C. Derivationof r;(t) Consider rt(t), the probability that a cell in state "b" (or a

blocked cell) at buffer Q1 of stage k is able to move forward to the next stage at the beginning of the tth stage cycle. Again, we need to condition on the states of buffer 42. (i) If 42 is in state "e", the cell in Q1 will win the output

contention with probability 1. (ii) If 4 2 is in state "n", the cell in Q1 will win the output

contention with probability 314. For this and case (i) above, the destined buffer at stage k+l may be in states "n" or "b" at the beginning of the tth stage cycle. Therefore the probability that the destined buffer can accommodate a cell during the tth stage cycle is

p;+I(t)r;+l(t) + p;+l(t)r;+I(t)

P;+l ( t ) + P;+l ( t ) (iii) If 4 2 is in state "b", there are two possible sub-cases: (a) the

two blocked cells destine for different outputs and the both their destined buffers at stage k+l cannot accept any cell during the (t-1)th stage cycle; (b) the two blocked cells destine for the same output and the destined buffer at stage k+l cannot accept any cell. Let hk"(t-l) be the probability that a buffer at stage k+l cannot accept any cell during the (t- 1)th stage cycle. We have

The probability that both buffers in stage k+l cannot accept any cell is thus hktl(t-l)hkt'(t-l). Therefore for case (iii), the cell in Q1 will be chosen for forwarding with probability

h'+'(t - 1) = p r ( t - 1)(1- ry(t- 1)) + py(t - 1)(1- r,""(t - 1))

hk+l (t - l)hk+' (t - 1) + hktl (t - 1) / 2 1 +2hk+l (t - 1)

The destined buffer at stage k+l must be in state "b". Therefore the probability that the destined buffer in stage k+ 1 can accept a cell is rF'(t) .

By the law of total probability,

1 + 2h''l (t - 1) 2 + 2hk" ( t - 1) + P," (tk;+I ( t )

for k = 1, 2, . . . , m- 1. Because it is impossible that the two buffers in stage m are both in state "b" when k = m, we have

~

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D. Derivations of throughput, delay and delay deviation The throughput of a buffered banyan network is the number of

cells that exit from an output of a SE at stage m with t approaches infinity, or

Let d k be the average delay of a cell at stage k and p / be the probability that a cell has been delayed by i stage cycles at stage k. We have

s = limt+. (P," (t)r," ( t> + Pb" (or: ( t>)

k i-2 k p,! = (1 - rnk)(l - rb ) r,

1 - r

k k PI = r n

CO k and thus dk =

given by

= 1 + + . Then the normalized delay d is

1 " 1 " d=-zd ,=-z( l+-- - ; - - ) .

m k=l k=l 5

i=l rb

1-r, k

Let P(z) be the moment generating function of the delay,

where P ( z ) = cziP,! . Let cr be the normalized delay deviation.

Then the delay variance 0: at stage k is

ea

i=l

and the normalized delay deviation is

E. Prioritized contention resolution scheme In the prioritized contention resolution scheme, the blocked

cell has higher priority over new cell. The earlier analysis can still be applied except that the expressions for r,k(t) and r:(t) are modified to include the effect of prioritization.

fork = 1,2, ..., m-1.

When k = m, r,"(t) = p,"(t) + 3pnm(t) 1 4 + pbm(t) 1 2

I,"(?) = 1.

F. Numerical results Figs. 4 to 6 show the maximum throughput, normalized delay

and delay deviation versus the switch size m, where m = log M. In Fig. 4, the analytical results for banyan with and without using the prioritized contention resolution scheme are overlapped. This indicates that the priority scheme has almost no effect on the network throughput, and this is confirmed by our simulation results. Comparing with the analytical results reported in [3] without using priority, a small but consistent improvement in accuracy is observed.

Figs. 5 and 6 are the normalized delay and delay deviation versus network size with input traffic p =1.0. From Fig. 5 , we

observe that for switches with m I 6, the normalized delay increases with m. For switches with m > 6, the normalized delay decreases with m. This is because for a banyan network with a given size m > 6, the probability that a cell lost a contention and forced to wait in a buffer at stage i increases with stage number i , for i S 6. If i > 6, this probability starts to drop as the input traffic to the subsequent stages’ of SEs decreases with i. We can also see that the normalized delay is reduced when priority is given to the blocked cells. The simulation results for the normalized delay have exactly the same trend as the analytical results. For the case with priority to the blocked cells, the analytical results match the simulation results very well. In Fig. 6, the delay deviation is studied. We found that as the switch size increases, the difference between the analytical and simulation results gradually increases.

0.65

- - 0 - -analysis, with priority lr 0.6 3 P c 2 0.55 E 6 0.5

E 0.45

5 0.4

0.35

5 5

2 3 4 5 6 7 Switch Size m=iogM

Fig. 4 Maximum throughput vs network size

1.62 1.6

p 1.58 5 1.56

1.54 $ 1.52 T 1.5 E 1.48

1.46 1.44 1.42

.- +analysis, with priority +analysis, without priority - - - -X - simulation, with priority

- -simulation, without priority

Y - 11

2 3 4 5 6 7 Switch Size m=iogM

Fig. 5 Normalized delay vs network size; input traffic p=I.O.

Fig.

- f - analysis, without priority - - -& - -simulation, without priority 0.2 - -

0 , 2 3 4 5 6 7

Switch Size m=logM

6 Normalized delay deviation vs network size; input traffic p I . 0 .

111. Multiple Buffered Banyan Networks We extend the three-state Markovian model for the single-

buffered banyan network to the multiple buffered banyan in this section. Let the HOL cell at the input buffer of a stage k SE at the beginning of the tth stage cycle can only assume one of the three states, “e”, “n” or “b”, as in single-buffered case. Let (j, a) denote the state of the input buffer of stage k SE at the beginning of the tth stage cycle, where j is the number of cells in the buffer, and a is the state of the HOL cell. When a = “e”, j must be 0; when a is “n” or “b”, j > 0.

Fig. 7 State transition diagram of a buffer at stage k

Fig. 7 shows the state transition diagram that describes the buffer occupancy at stage k at the beginning of the tth stage cycle. Before we derive those state transition probabilities, the following summarizes their definitions.

P,,&) prob. that the input buffer at stage k is in state (j, a) at the beginning of the tth stage cycle.

q,,,k(t) prob. that at least one cell is ready to come to the buffer at stage k during the tth stage cycle given that the buffer at stage k is in state 0, a) at the beginning of the tth stage cycle. prob. that the HOL cell of the buffer at stage k can move forward to next stage during the tth stage cycle given that the HOL cell is in state “n” at the beginning of the tth stage cycle prob. that the HOL cell of the buffer at stage k can move forward to next stage during the tth stage cycle given that the HOL cell is in state “b” at the beginning of the tth stage cycle.

r,k(t)

r:(t)

A. Derivation of q,,:(t)

To derive q,,;(t), the probability that at least one cell will arrive at the buffer of a SE at stage k during the tth stage cycle given that this buffer is in state 0, a) at the beginning of the tth stage cycle, three auxiliary states are defined to describe the buffer occupancy at stage k.

state “X”: the buffer can accept a cell during (t-1)th stage cycle but no cell arrived then.

state “Y’: a cell arrived the buffer during the (t-1)th stage cycle.

0

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state "2": the buffer cannot accept a cell during the (t-1)th stage cycle.

Based on the three auxiliary states, the following new variables can be defined (here SE { X, Y, Z}):

p;(t): prob. that a buffer at stage k is in state "s" at the beginning of tth stage cycle;

pj,,;(t): prob. that a buffer at stage k is in state ''s" at the beginning of tth stage cycle given that the buffer is in state (j, 04, at the beginning of tth stage cycle.

Let A and B denote the states of the HOL cells in the two buffers at stage k-1 at the beginning of the tth stage cycle (as shown Fig. 2), we have a similar table as in single-buffered case.

From Table 2, pj,,xk(t), pj,,;(t) and pj,,/(t) can be derived by conditioning on states A and B. For example, we have

n b % p i +3p; f 4 P: +PE

p:, + 3p: f 4+ 3Pi f 4

A q?i'/ABk q d A B k 421 ABk

e e 0 0 0

e n ? 4 1/2 1/2

e b O P:, + P: 1 2 p; +pi 1 2 + p ; I 2 P:, + PZ

b

I I i I n I n 1 % I 3/4 I 3/4 I

b O impossible p i + 3 p i 14

P: + PZ

wheresc{X,Y,Z}.

Let

Then q,,;(t) is given by

1 wherek=2,3, ..., m.Fork=l ,q j ,a ( t )=p .

B. Derivations ofr l ( t ) and r t ( t ) By a similar derivation in single buffer case, we have

fork=1,2 , ,.., m-l.Whenk=m,

where bk+' (t - 1) = p z (t - 1)(1 -p (t - 1)) + p$ (t - 1)(1 --c (t - 1)). When k = m,

B

Po", (t) + +z PTn ( t ) f ( t ) = j=l

I)

C. Derivations of throughput and normalized deluy

The normalized throughput of the buffered banyan is given by

j= l j = l

Let the time that a HOL cell in state "n" has been delayed at stage k be TIk. Similarly, let the time that a HOL cell in state "b" hPG been delayed at stage k be T i . Tlk and T i are given by

1 - r,X T,k = 1+- 'bx

where Tlk 2 T,' can be easily verified.

Let dk be the number of stage cycles that a cell has been delayed in stage k. Consider a tagged cell which enters the buffer of a stage k SE during the tth stage cycle. At the beginning of the (t+l)th stage cycle, the state of that buffer cannot be (0, e ) or (1, b). If the buffer is in state U, n), then the delay of the tagged cell in stage k is jTlk; if the buffer is in state 0, b), then the delay of the tagged cell is (j-l)Tlk+T,'. Therefore the average delay of a cell at stage k is given by

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j= 1 j = 2 d, = 1 - P&. - P:b

The normalized average delay is

1 ” d = - x d k ’

k=l

D. Prioritized contention resolution scheme

If the same prioritized contention resolution scheme is applied here, only r,k(t) and r t ( t ) need to be substituted with the following expressions:

Fork = I , 2, .. ., m-1,

E. Numerical results

n 75 -.. - 0.7

2 0.65 0.6

0.55 I- E 0.5

r

0.45 3 0.4

0.35

.- Y - -& - m=6, with priority (analysis) - - 0 - - m=6, without priority (simulation) --jt-m=6, without priority (analysis)

1 . . . . 0 .3 ! I I I I ~; I I 1 1 I ; 1

1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 Buffer Size B

Fig. 8 Max. throughput of a 64x64 banyan network vs buffer size.

Figs. 8 h 9 show the maximum throughput and the normalized delay versus the buffer size using a 64 x 64 banyan network. Both analytical and simulation results are plotted. From Fig. 8, we can see that our analytical model is more accurate in predicting the maximum throughput as compared with that proposed by Yoon [2]. As the buffer size increases, the maximum throughput becomes steady. Besides, using the prioritized contention resolution scheme has little effect on the maximum throughput and this is confirmed by the simulation results. It should also be noted that the model by Yoon cannot be applied to the multiple buffered banyans with prioritized contention resolution scheme, and cannot be used to predict the delay

performance. In Fig. 9, the normalized delay obtained from our analytical model as well as the simulations are shown. When the buffer size is small, analytical results match very well with the simulation results. As the buffer size increases, the difference between analytical and simulation results increases.

- - 0 - -simulation, with pri

1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 Buffer Size B

Fig. 9 Normalized delay of a 64x64 banyan vs buffer size.

IV. Conclusions A refined analytical model for both single and multiple

buffered banyan networks was proposed. When cell output contention occurs at a 2 x 2 switch element, two contention resolution schemes have been studied: (1) random contention resolution scheme and prioritized contention resolution scheme. Analytical expressions for throughput, cell delay and delay deviation were derived. We have shown that using the prioritized contention resolution scheme can reduce the cell delay deviation as well as ell delay while not affecting the network throughput. Comparing with some analytical models reported in the literature, our model is more general, powerful and accurate in predicting the performance of the buffered banyan networks..

References

[l] Y. C. Jenq, “Performance analysis of a packet switch based on single-buffered banyan network,” IEEE J. Select. Areas Commun., vol. SAC-1, pp. 1014-1021, Dec. 1983.

[2] H. Yoon, K. Y. Lee and M. T. Liu, “Performance analysis of multibuffered packet-switching networks in multiprocessor systems,” IEEE Trans. Compt., vol. 39, no. 3, pp. 319-327, Mar. 1990.

[3] T. H. Theimer, E. P. Rathgeb and M. N. Huber, “Performance analysis of buffered banyan networks,” IEEE Trans. Commun., vol. 39, no. 2, pp. 269-277, Feb. 1991.

[4] T. Szymanski and S. Shaikh, “Markov chain analysis of packet- switched banyans with arbitrary switch sizes, queue sizes, link multiplicities and speedups,” IEEE Proc. INFOCOM ‘89, April 1989.

[5] J. S. Tumer, “Queueing analysis of buffered switching networks,” IEEE Trans. Commun., vol. 41, no. 2, pp. 412-420, Feb. 1993.

[6] L. T. Wu, “Mixing traffic in a buffered banyan network,” Proc. 9th Data Commun. Symp., Whistler Nountain, BC, Canada, Sept. 1985.

[7] H. S. Kim and A. Leon-Garcia, “Performance of buffered banyan networks under nonuniform traffic patterns,” IEEE Trans. Commun., vol. 38, no. 5, pp. 648-658, May 1990.

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