Unit Power Factor Single-phase Rectifier With Reduced Conduction Loss Using a Non-Dissipative Passive Snubber

Francisco K. A. Lima CENTEC Institute

63.920-000 - Limoeiro do Norte - CE -

kleber.lima@ibest. com. br

Cicero M. T. Cruz Fernando L. M. Antunes Processing Energy and Control Group - GPEC

Dept. of Electrical Engineering

P.O. Box 6001 - 60.455-760 - Fortaleza - CE - Brazil cicero@dee. ufc. br fantunes@dee. ufc. br

Brazil Federal University of Ceara

Abstract - This paper presents a single-phase rectifier with low conduction losses. To have a further reduction in the rectifier losses, a passive non-dissipative snubber is included in the rectifier. The snubber allows non-dissipative commutation at the switches within a large range of the input current. The snubber reduces the rate of the current grow during the switch turn on and also the rate of voltage grow during the switch turn off. The performance of the snubber circuit associated with the low conduction losses results in a rectifier with high efficiency. It is also presented the design of a three kW rectifier and simulation results are shown to access the performance of the proposed rectifier.

I. INTRODUCTION

In power factor correction one of the most common circuit used is the full bridge diode rectifier associated with a boost converter. This converter is shown in Fig. 1 .

Substantial power dissipation occurs in the switch because it is subjected simultaneously to increasing current and full output voltage, during turn on commutation. Besides, the reverse recovery mechanism in the boost diode produces high di/dt and high current peak through the switch. Since the switch is specified for high voltage it normally has high conduction resistance. Current always flows through three power semiconductors simultaneously causing appreciable conduction losses.

Converters shown in Figures 2 and 3 have low conduction losses due to the fact that only one or two semiconductors conducts at the same time during the different stages of operation of the converter. These converters present themselves for applications in high power due to their high efficiency; however, as far as the commutation is concern they show the same problem presented by the circuit of Fig. 1. In [6] it was presented the version of the three level rectifier employing passive loss less snubber.

Fig. 1. Common PFC circuit

I I I

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Fig. 2. Rectifier with reduced conduction loss

Tvo2 Fig. 3. Three level rectifier

This paper introduces a version for single-phase rectifier with reduced conduction losses with lossless passive snubber. The rectifier and the lossless passive snubber are shown in Fig. 3. This converter was presented in [7] and [8], using others techniques of commutation with active components.

Principle of operation and circuit description, design considerations, and conclusion about this converter are described in following sections.

0-7803-7474-6/02/$17.00 02002 IEEE 347

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Fig. 4. Voltage single-phase rectifier with a passive lossless snubber

11. PRINCIPLE OF OPERATION AND CIRCUIT DESCRIPTION

Fig. 5 shows the converter and its stages of operations. Stage 1 shows the accumulation of energy in the boost

inductor LB in the positive semi cycle of the input voltage. Stage 2 represents the transference of energy from the

boost inductor to the output stage composed of CO and Ro. Stages 3 and 4 represent 1 and 2 respectively during the

negative semi cycle of the input voltage.

Stage 1

Stage 2

I J SI

Stage 4

Fig. 5 . Stages of operation

The following simplifications are made to the

U) input voltage source and boost inductor are represented

6) output stage is represented by constant voltage sources

Stage I ( t r td : the input current flows through Dbz, Lsz

commutation stages analysis:

by a constant current source;

and all components are ideal.

and energy is transferred to the output stage.

i L ( t ) = I ' (1)

vc, ( t ) = 0 3 (2)

vc, ( t ) = V" 9 (3)

V, is the output voltage and I is the input current.

Stage 2 (tl-td: at t = t l Sz is turned on and the output voltage is applied to Ls2, therefore current in Db2 decreases at linear rite. The switch current increases at the same rate.

i L ( t ) = I - - . t ' V" (4) L

vco ( t ) = 0 , ( 5 )

vcs (4 = V" ' (6)

The time length for this stage corresponds to:

Stage 3 (trt$: when the current through Ls2 equal zero Dbz turns off, Da5 turns on and the Csz discharge starts from vo.

VCs ( t ) = v, .%. cos(o.t)+ 7 - 1 ' w I ws O2 I (9)

Stage 3

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acos(l-$) At, = 9

W . L

Where

Stage 7 (t6-t,): when VCa2 plus VcS2 equal Vo then Da6 turns on and Cs2 begins its discharge.

i, ( t ) = Z.[I - cos(w, .t)], (20)

Stage 4 (t&: Ls2 transfer energy to Ca2. This stage is a se,( F) over when iLs2 equals zero.

At, = U S

-V,.d2.w,2 - w 2 i, ( t ) = .cos(w, .t>+ ~ . s e n ( w , .t> 9

w: .L wf .L vca (t, ) = v,.w, 9

(13) O S

Where

(14) Stage 8 (t&: Da5 turns on when Vcs2 is equal to Vo. One part of the input current flows through D q and Da5 and another through Ls2 and Ca2.

(17) 1 WO =-

Stage 9 (t&: when iLs2 equals the input current, Da4 and DaS turn off. Ca2 is discharged at linear rate. The stage finishes the energy remain in the capacitor Ca2 is transferred to the output.

a' Stages 2,3 and 4 comprise the turn on snubbing action.

Stage 5 (t4-t5): S2 conducts the input current. In this stage

VC, ( t ) = --.t + -. occurs accumulation of energy in the boost inductor.

(28) Stage 6 (tst6): after S2 turns off the input current flows c, .y)2 .U,' - L.I . ~ f

through Cs2 and the voltage across it rises linearly. The voltage on the switch is the same as in Cs2 with limited dv/dt.

At, =-.

Z vcs ( t ) = -.t c,

Fig. 6 shows the stages of operation for one switching (1 8) period.

(19)

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(c) Stage 3 (t2-t3) I 1 I

(h) Stage 8 ( t 7 4 Fig. 6. Stages of operation for commutation analysis

(i) Stage 9 (t&)

Fig. 7 shows the main waveforms for commutation analysis.

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D.1.

111. DESIGN CONSIDERATIONS

A . Considerations for Correct Operation

stages described above, the passive elements must be projected as following:

In stage 8, the energy accumulated in Caz must to be sufficient to increase the inductor Ls2 current to the value o f the input current, before Vca2 reaches zero. If this condition is not satisfied the converter will reach the topological stage: 8(a) depicted in Fig. 8, where soft switching at turn on is lost. Hence:

For the correct operation of the converter according to the:

Stage 8 Stage 8 (a)

Fig. 7 . Waveforms for commutation analysis Fig. 8. Undesirable stage

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L L

Substituting (23) in (29), results in:

(29)

For a given value of Z, impedance defined by (31) the expression (30) will be valid for any input current below the peak value, assuring soft commutation for any value of input current.

I p k is the peak of sinusoidal input current. In stage 7, if the inductor current reaches the input

current value before the voltage VCs2 reaches the output voltage, the converter may evolve to stage 8(a) as shown in Fig. 8, and therefore the zero current turn on is lost.

From (20), it is established that the inductor current reaches input current at the angle ws.t = nJ2. Hence, to satisfy the restriction for stage 7 described above, the voltage across capacitor Cs2 must be lower then output voltage V, at the angle os.t = 7d2 . Then, from (21):

(33)

Defining the parameter x as the ration between capacitors Cs and C,, then:

(34)

In order to ensure soft commutation for a given minimum input current, the parameter x is obtained from (35).

"=E, (35) 'min

The resonant elements are calculated by the (36) and (37).

C*=-, 1 (36)

L = L , Z (37)

zs .U,

U,

B. Time Interval for Snubber Circuit Operation In PFC the input current and duty cycle are variable

during a main cycle, then the time interval available to stages of operation of snubber circuit is limited as function of the input current and duty cycle.

Afon = -.[-+ 1 I .cos(-x) + - . a t a n ( c ] ] 1 , U , I,, Jx+l x

Where T,, is the switching period.

According to (38) the time interval At,. is proportional to the input current. Hence its maximum value corresponds to the peak input current:

Alan =-.[l+- 1 .cos(-x) 1 U s m x

(39)

aCOS(-x) 1 + - . a tan( E)] [ " m & 3 (40)

The time interval for stages 6, 7, 8 e 9 must be smaller than the smallest diode Db2 (&I) conduction time:

When duty cycle is in its maximum, the input current is in its minimum and the time interval Attoff is:

The capacitor Cs and inductor L are determined from (36) and (37), using the largest value of the frequency os, obtained from expression (40) and (43).

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IV. SIMULATED RESULTS The passive components used have the following values:

Figures 9 to 12 shows the simulated results for output power Po = 3000 W, output voltage Vo = 400 V, input voltage Vi = 220 V, switching frequency fs = 50 kHz.

Lsl (Ls2) = 1.6 pH; csl (cs2) = 8.2 nF ; Ca, (Ca2) = 220 nF LB = 400 pH.

Figures 13 and 14 shows switch commutation for the minimum input current with guarantees soft commutation.

T - - - - - - - - - -

U ’

,~ . . . . . . . . . . . . . . . . .~

U ? . . . . . . . . . ~ ~ ~. . . . . . . .

mo2lM. 1002- f O O b * r n 1002”rn. 100*46111 10024MI.

nm

Fig. 12. Turn off commutation

Yo- m m mw. , m u m m sa,_ S I - sa,- ,.,.

Fig. 13. Turn on commutation

V. CONCLUSIONS

The results obtained with the proposed PFC circuit associate a dissipative passive snubber lead to the following conclusions:

The converter operates with unit power factor;

The commutation losses are very small; Switches operate with soft commutation.

VI. REFERENCES

[ l ] L. Duguay, N. Guerrera, M. Ammari, “Novel Boost Converter For Small Power Rectifiers”, INTELEC’97 Coference Records, pp. 132-139.

[2] R. Y . Fadone, J. M. W. Whiting, “GTO “Taction Chooper with Snubber Energy Recovery”, EPE’93 , Coference Records, p p 276-281.

I

Fig. 14. Turn off commutation

[3] C. J. Tseng, C. L. Chen, “Passive Lossless Snubers for DCDC Converters”, APEC’98 Coference Records, p p I049- I054.

[4] A. Pietkiewicz, D. Tollik, “Snubber Circuit and Mosfet Paralleling Considerations fo High Power Boost-Based Power-Factor Correction”, INTELEC’95 Coference Records, pp. 41-45.

[5] J. Kolar, F. C. Zach, “A New Three-phase Three-Switch Three-Level Unity Power Factor PWM Rectifier”, PCIM’94, June Proceedings.

[6] C. M. T. Cruz, I. Barbi, “A Passive Lossless Snubber for the High Power Unidirectional Three-phase Three- Level Rectifier”, IEEE Industrial Electronics Sociev, Vol. 2, Nov. 1999, pp. 909-914.

[7] A. F. Souza, I. Barbi, “A New ZVS- PWM Unity Power Factor with Reduced Conduction Losses”, IEEE Transactions on Power Electronics, Vol.10, no. 6, Nov.

[8] A. F. Souza, I. Barbi, “A New ZCS Quasi-Resonant Unity Power Factor with Reduced Conduction Losses”, PESC Records, 1995, pp. 1172-1 176.

1995, pp. 746-752.

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