Higher Performance Secure Outer Space Communications At Lower Cost Utilizing Commercial Components

Shoaib Zaidi, Syeda Areej Kamal, Ayesha Anwer, Syeda Batool Fatima, Muhammad Haris Sheikh, &

Samreen Burki Department of Telecommunications Engineering NED University of Engineering and Technology

Karachi, Pakistan shoaibned@neduet.edu.pk

Abstract—In space environments, electronic devices suffer from radiation effects, producing bit flips and upsets. Even a single upset can disrupt the operation and the fidelity of data. Many of the problems encountered in space operations of electronics are overcome by radiation hardening. We present a software based approach as an alternative to the previously common reliance on hardware for radiation hardening. There are clear advantages in using easily available, “off the shelf” electronic components instead of esoteric specialized components. The work presents analysis and methods which highlight technological, logistical and financial advantages of utilizing commercial components. We present a comparative analysis and identify Graphics Processing Units as a viable and attractive route for encrypted data communications with satellites.

Keywords-component; Radiation Hardening by Software; GPU; FPGA; AES; Space security

I. INTRODUCTION Space environment is challenging for electronics.

Radiations in space such as cosmic rays and solar flares effect the operation of space electronics. Single Event Upsets (SEUs) i.e. bit flipping leads to abrupt changes in system operation and Total Ionizing Dose (TID) results in degradation of electronic components. To overcome this issue Radiation-Hardened (rad-hard) devices have been manufactured and launched in space.

Radiation hardening provides resistance against impairment and malfunctioning caused by ionizing radiations. Physically radiation hardened Field-Programmable Gate Arrays (FPGAs) were carried in space to overcome this issue. Their heavier weight, high cost and requirement of greater launch energy are challenges.

Many countries encounter export restrictions due to International Traffic in Arms Regulations (ITAR) on such controlled items. Instead of using Radiataion Hardened FPGAs, Commercial off-the-shelf (COTS) components like Graphics Processing Units (GPUs) can provide an easily available solution. Such devices are also considerable cheaper and often also have the advantage of being very

power efficient, but they have less capability for fault tolerance due to radiation.

Our approach combines COTS components with Radiation Hardening by Software (RHBS) to provide highly fault tolerant solution which not being subject to ITAR restrictions, is easily and commonly procurable. RHBS provides tolerance against failures in memory chips due to radiations in space. It requires a RHBS library that ensures prevention and detection against failures like bit flips. There is a host of COTS components which are suitable candidates. GPUs are preferred over CPUs (central processing units) as they provide fast processing for encryption operations. We have presented our test results regarding the execution time and cost of FPGA, CPU and GPU in the following section.

In order to defend information in space from unauthorized access AES (Advanced Encryption Standard) technique is proposed. The AES specifies a Federal Information Processing Standard (FIPS) approved cryptographic algorithm that can be used to protect electronic data. Our approach replaces the rad-hard FPGAs with RHBS enabled light weight GPU cards.

The proposed solution is lower in cost, uses less

operational power and not restricted.

II. ISSUES OF SPACE ENVIRONMENT Utilization of space technologies for advancing the

social, scientific and economic interests continues to gain importance. The vast majority of current space utilization is for space communications. During the last few years the number of space agencies investing in satellite technologies has increased drastically. Today, satellite technology provides a wide range of services from mobile communication to global navigation to disaster management. The Armed Forces of the world also depend on Space technologies.

Proceeding of the 2013 IEEE International Conference on Space Science and Communication (IconSpace), 1-3 July 2013, Melaka, Malaysia

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A. Radiation Effects on Electronic Devices When radiation enters a semiconductor material, an

electron−hole pair may be created if an electron in the valence band is excited across the band gap into the conduction band. The excited electron also leaves a hole in the valence band. If an electric field is there, the electrons are moved away because their mobility in silicon is greater than that of the holes. Electron−hole pairs made in the gate oxide of a metal-oxide semiconductor (MOS) device such as a transistor, as shown in Fig. 1.The reaction of MOS devices to Total Ionizing Dose (TID) of radiation is complicated because of the competing effects and interface threshold voltage shifts, which may vary time. The end result is that the circuit behavior, and therefore the outputs, may change because of the induced charge.

Figure 1. Schematic of an n-channel MOSFET illustrating the basic effect of total ionization-induced charging of the gate oxide. Normal operation (a) and post irradiation (b) show the residual trapped positive charge (holes) that produces a negative threshold voltage shift [ from 9].

Digital microcircuits can be impaired because trapped charges shifts MOS transistor threshold voltage. A threshold voltage is a key parameter of a device, directly linked to digital circuit speed and its power consumption. As a result, supply current may increase and timing margins may be degraded. In other cases, functionality may be cease because of high leakage current and failure to stop current between transistor source and drain. Changes in logic signal timing also may cause circuit failure as driving gate strength is degraded with total dose.

B. Single Event Effects (SEEs)

If the number of charges gathered at a junction exceeds a threshold voltage, then a Single Event Effect (SEE) may be initiated. An SEE can be of two types, destructive or nondestructive. Destructive effects result in catastrophic device failure. Nondestructive effects are responsible of loss of data and control. SEEs are produced through several mechanisms. The basic SEE mechanism appears when a charged particle moves through the device and loses energy because of ionizing the device material.

C. Single Event Upset (SEUs)

A single-event upset (SEU) is the change of state of a bi-

stable element, usually a flip-flop or other memory cell, produced by the energetic heavy ion or proton. The effect is non-destructive and corrected by rewriting the disturbed element. As in other cases of SEEs, a single-particle incident may introduce an amount of charge which is enough to exceed a sensitive circuit node’s particle and vary the logic state of the element. The net result changes the state which is known as a bit-flip and can appear in various different semi-conductor technologies.

Both types of memory circuits (SRAM & DRAM) also include assistant circuitry such as control logic and sense amplifiers that are also sensitive to SEEs or single-event transients (SETs). Other dense memory circuits may also have multiple bit upsets when one ion strike causes upsets in multiple bits.

D. Existing Solution

Over the years, various approaches have been used to make integrated circuits tolerant to radiation for application in military environment electronics, aerospace systems and in high-energy physics experiments. Xilinx, the well company designed the Virtex-5QV FPGA, which is also called the rad-hard FPGA incorporates rad-hard-by-design technology to harden storage elements and control logic to single event upsets.

III. EXPERIMENT

Our experiment is based on the comparison between FPGA & GPUs. As we have mentioned above that GPUs are widely available and commercial-off-the-shelf products. Our experiment also shows that GPUs have better processing performance than FPGAs. Moreover GPUs are a very common low cost product and easily incorporated in any system. On the other hand FPGAs have high costs and especially we found in our search that rad-hard FPGA are costly. With sales restricted by ITAR (International Traffic in Arms Regulation), which as it is also use for their defense purposes.

We have designed an AES algorithm of 128 bit key and simulated on two platforms FPGA and GPU. The results are shown below

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0

1

2

3

CPU GPU FPGA

Kg Weight (Kg)

Weight…

Figure 2: Experimental results performance, cost and weight comparison

After achieving this performance and cost-benefit analysis we proposed a GPU based model for securing data and make the system protected by RHBS (Radiation Hardening by Software).

IV. METHOD

Figure 3: Methodology of Project

Figure 3 shows the major block of the project. Information is secured by AES Encryption at the space satellite where RHBS enabled light weight parallel GPUs are

located. The output from the GPUs is compared at the comparator such that 2/3 result is proceeded to the next step. The output of the comparator is then sent to the error detection/correction block to ensure protection against failures like bit flips.

E. Radiation Hardened by Software (RHBS) The main objective behind this project is to explore the

effect of radiation hardening during the circuit design phase and make them resistant to radiation events like Single event upset. The whole procedure is carried out by using Radiation Hardened Software (RHS). RHS simply preprocesses the circuits and provides resistance against SEUs by applying evolutionary algorithms along with some other optimization techniques so that data redundancy and efficient consistency checks are achieved.

RHS contains the following specifications:

A library of radiation-hardened digital circuitry sub-modules

An evolutionary designed algorithm that hardens the circuit and recovers it from SEUs.

Parallel Graphical Processing Units

Figure 4: SEU simulator[8]

In order to achieve these tasks, we are using an existing processor emulator and are interfacing it to a debugger, (see figure 3). Furthermore expand it by arbitrary failure insertion and repeat the functionality. [6]

Here parallel GPUs have been used due to their fast processing capabilities. The purpose of using the parallel processing is to achieve constant throughput and efficient processing for high-performance radiation-hardened processors. [7]

V. CONCLUSION In this paper, we have presented our software based

approach to protect system operation from radiations in

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space. At this level we have targeted SEUs only. The project is at initial stage and requires estimated 18 months period. Our future work includes the consideration of other Single Events Effects (SEEs) like Single Event Latches (SELs) and to provide a redundant and robust Radiation hardening by Software model.

During this period, our main focus was on providing redundant software based radiation hardening model that’s why we didn’t focus much on data security. Other than AES technique can also b used to protect information from unauthorized access.

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