Low cost training system for learning programmable logic devices

Luis Dávila Gómez, Luis Castedo Cepeda, Cecilia García Cena, Cristóbal Tapia García Dep. of Electronics, Automatics and Industrial Computing

UPM (Polytechnics University of Madrid) Madrid, Spain

luis.davila@upm.es

Authors Name/s per Abstract— This paper presents the improvements we plan to be introduce into the lab teaching of the subject “Programmable Logic Systems” in the Degree in Electronics and Automatics Engineering at the Polytechnic University of Madrid. The work includes the replacement of existing training systems by trainers specifically designed for scheduled practices, the reuse of replaced systems to develop remote labs and the creation of virtual instruments for analyzing the performance of the designs made by students.

Keywords – CPLD, FPGA, programmable logic, remote labs.

I. INTRODUCTION In the School of Industrial Engineering of the Polytechnic

University of Madrid the academic program has the title Technical Engineering in Industrial Electronics (now in gradual extinction). The programmable logic circuits are studied in the course Microelectronics, an optional subject with 7.5 credits.

The lab concerning these circuits is performed with FPGA-based development kits, in a similar manner as performed in the majority of courses on this matter [1] [2]. The use of these development systems presents a number of advantages:

• they have an affordable cost

• the manufacturer provides basic tools for simulation, debugging, programming, etc..

But they also have some disadvantages:

• in many cases the systems are not oriented to the teaching

• the release of new devices quickly makes them obsolete

With the new Degree in Industrial Electronics and Automation, teaching programmable logic circuits will be held in the “Digital Electronic Systems” course, compulsory for all students, which has 7.5 ECTS credits. The change involves, besides the creation of new teaching materials [3], a notable increase in the number of students, so we have to expand the capacity of the laboratory. In the absence of enough development kits of current model and because these systems are no longer commercially available, the replacement of

equipment involves a complete change of systems. This has been a new starting point that lets to launch a different approach for the laboratory: a new training system for programmable logic circuits has been developed with our own specifications rather than purchasing an amount of commercial development kits.

The following sections will present the new lab setup, showing the elements that have been designed to obtaining a better use of resources by the students.

II. OBJECTIVES The main objectives to be obtained with the actions

included in this work are the following:

• Students will make the easiest part of practical work with programmable logic devices quickly, and will focus on their work rather than learning the "hardware" they will use.

• Students will perform practices with ascending complexity using equipment that also will be adapted to this rising complexity.

• Student will perform practices in a more efficient way, by providing tools to analyze the results obtained that are difficult to include in a traditional lab bench.

• The financial investment required to implement all these improvements in the laboratory will not be too high.

Ultimately, students can get a better use of practice sessions that they have now working only with commercial development systems.

III. HARDWARE DESCRIPTION In order to make the lab exercises, a new trainer was

developed, based on programmable logic. Self made equipment has a number of advantages, such as:

• The cost is far lower than commercial equipment systems. With the trainer we have developed we can equip ten lab benches with the same payment that represents a single development system for the cheapest model available.

This work has been supported by the Innovative Education Program of the Polytechnics University of Madrid.

978-1-4673-2486-1/12/$31.00 ©2012 IEEE 82

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• As a self made design it fits to the needs of the course, is easier to learn and use, contains the right elements for scheduled practices, etc.

• Do not depend on the life cycle of a commercial product. The laboratory life is not determined by the card manufacturer.

• The design of the trainer can be oriented from the beginning to facilitate the implementation of a remote laboratory.

But also has some drawbacks:

• It represents a greater effort to carry out the development, including the hardware and a specific part of software.

• The trainer is a basic design, does not allow the realization of complex projects. In this case, we need to use commercial development kits.

The trainer consists of a Xilinx CPLD, the model XC2C32A from CoolRunner II family [4].

The schematic is shown in Figure 1.

This device has 32 macrocells, with a total of 33 input / output lines. It is the smallest one of the family, but its size is enough to run all the programs from any of the practical works we make in the course and even more complex exercises.

Figure 1. Trainer schematic.

The trainer has only the essential elements needed for the operation of the CPLD: a regulated power supply providing 1.8 Volts to power the core of the device, the clock circuitry and the connectors: two connectors for the input / output lines and one for JTAG programming.

Figure 2 shows a photograph of the prototype.

In the market you can find a similar design, called C-MOD by its manufacturer, Digilent [5], but aims to develop prototypes and priced three times higher.

As designed, the trainer meets the first and fourth objectives listed in the previous section. Not having any peripheral, interaction with the trainer has to be done by expansion boards that incorporate switches, LEDs, etc.., or by simulating them using a computer with a digital DAQ board. The next section shows how we have implemented the second option.

IV. SYSTEM SOFTWARE To carry out practices with the designed trainer, you must

program the device, send signals to the inputs, read the outputs and analyze the results.

To program the device, the ISE WEBPACK software package from the manufacturer of the CPLD is used. This software package is free, and allows the synthesis and simulation of designs written with HDL language for Xilinx’s CPLDs or FPGAs. It´s possible to program the device via JTAG protocol [6]. Is the one that has been used in last years in the course “Microelectronics”, and has been demonstrated its ease of use and usefulness in the practices of this course.

Figure 2. Photograph shows the prototype for the trainer.

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The interaction with the trainer is done by sending and receiving signals from the same computer that programs the device rather than using one or several expansion boards.

Figure 3 shows the configuration needed for the lab bench to do so.

All computers already have a digital data acquisition card used in “Digital Electronics” course lab with another experimentation platform developed recently [7] [8], so it is reused without adding cost. With this card you can send signals to simulate, for example, a switch or button, and receiving outgoing signals from the trainer to be represented on the computer screen, by simulating an LED or other items. Thus, with the Labview programming environment, it has been created a virtual tests bench that allows students to connect via the computer to the trainer the following expansion elements: 8 switches, 16 LEDs, a digital seven segment display containing 4 digits and a logic analyzer.

Most of these elements are typically found in commercial development kits, except for the logic analyzer, impossible to implement in such boards.

In fact, this element is what distinguishes this logic trainer significantly from those based on commercial development kits. Thus, with commercial boards is common practice to aim at observing its output elements (LEDs, display, etc...), and the evolution of programmable device before acting on any switch or button. The inclusion of a virtual logic analyzer enables richer interaction because you can create test vectors as input of the device, you can also set up properly timed signals and there is the possibility to have full chronograms of operation of the device, allowing faster and more effective learning of the device performance.

Although it might have designed the lab bench with a commercial logic analyzer, our solution has several advantages that we wish to point out:

• It represents a significant reduction in cost. The difference between the price of a commercial logic analyzer and the proposed system is significant. If we want to set up a laboratory of 10 benches, the platform can save at least 12,000 Euros.

Figure 3. Connection between trainer I//O and computer.

• It is easier to handle, since it is not necessary to learn the menus and modes of use of a logic analyzer, which being more complete is also more complex to use. Programming is done so that the student has direct access only to a button that executes the required function in each case.

As disadvantages, the lowest versatility of our virtual instrument, and because is a programmed solution that uses a low cost acquisition card, the speed of signal acquisition cannot be compared to the one from dedicated instrument. However, these disadvantages are not a real problem for practices developed.

If we use the elements as specified above to build the system, we can achieve meet the objectives third and fourth listed in the second section of this paper.

Figure 4 is a screenshot with some of the interactive elements indicated.

The following section describes how students have to make a practice of course.

V. AN EXAMPLE OF USE Once presented the items needed to make the practices of

programmable logic devices, let us see how to develop a practical session and how the various elements would be used:

• The student receives a script prior practice, which is faced with a simple digital design to be implemented in HDL language.

• The student performs a previous work and practice begins with a preliminary design. You can do this with the Xilinx ISE WebPack package because it is free and unrestricted. You can write the program and simulate before start the practice.

Figure 4. An example of virtual expansion boards.

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• In the lab, the student creates the program for the design using ISE WebPACK, and simulates and debugs it if he hadn’t done previously.

• Program the device using the software IMPACT, included in ISE WEBPACK, through the JTAG connection between computer and trainer (we can make this with a parallel or USB port from the computer).

• Interact with the trainer using the self made software tools included; this requires a new connection between computer and trainer, through the digital I/O port of the acquisition card installed in the computer. It can be seen chronograms, output signals values and it can also be introduced input stimuli, either manually or scheduled.

• When it’s considered that the design is correct, the results can be recorded (chronograms, LEDs, etc..) and then be attached to the final report.

As shown, the sequence is similar to that produced when using commercial systems, but the result is richer by the information obtained and the simplicity with which it can do.

However, the system may be insufficient to perform more advanced practices, so that in the next section we propose a solution to this problem.

VI. ADDITIONAL ELEMENTS OF LABORATORY With the new lab setup, the old FPGA based development

systems, obsoletes but with a great power, have been replaced by less powerful CPLD kits. This would be a step back if it were not we have looked for new ways to reuse the equipment replaced.

As noted, the new trainers may be insufficient for advanced practice design, some coursework or Degree Projects [9]. For this reason, it has been decided to allocate half of the available systems to equipping a laboratory for Degree Projects and the rest for the implementation of a remote laboratory on programmable devices [10].

Focusing on the remote laboratory, it has been created a server that allows access to the laboratory through the department's learning management system (LMS), implemented in Moodle. Thus, students can perform remote jobs without saturating the laboratory, because the equipment is limited.

The way that students can use the service is detailed in the following points:

• If the student has to design a more complex practice, he makes their work outside the laboratory using the ISE package WEBPACK. He needs to simulate and debug it, and also generate the programming file.

• When all is ready, he comes in the subject site on Moodle with any web browser and clicks on the laboratory link.

• In the central frame of the web browser appears the laboratory welcome window. We have a remote laboratory with a 256-macrocell CPLD for medium complexity designs and another one with FPGA for more complex designs.

• The student will upload the file for programming the device, and a label tells him if the program process was successful or not.

• Once programmed, the device runs. The student can see the development board through a webcam, so he can view the evolution of LEDs, displays, etc. There are only one limitation: is impossible to act on buttons or switches, so that the projects must be designed with this in mind.

When the experiment ends, the student leaves the remote lab. The information about the student's login information, downloaded files, etc. is available to the teacher in the server. By using the Moodle platform, authentication processes, reporting, conditional access and other management tasks are assigned to Moodle and remote laboratory is simplified. In Figures 5 and 6 are showing two screens from one of the remote laboratories. This lab includes a development board with a 256 macrocells CPLD.

This proposal meets the second goal at minimal cost.

VII. CONCLUSIONS In these days, with a crisis that produces falls in economic

provisions needed to implement the new degree programs, renew or extend the laboratories becomes a difficult task where solutions must be made with little expense. For this reason we have raised a number of actions to:

• equip the laboratory with new equipment to implement more productive practices without this means a high payout

• reuse existing items to obtain a better and more complete laboratory, providing the most appropriate equipment depending on the complexity of the practice.

Figure 5. Remote Labs welcome window.

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Figure 6. Progam and test window.

Tests have given several ideas of how to guide future work with the material available:

• The trainer designed may be used in the lab of the corresponding subject of the new Degree, which will begin next year.

• The remote laboratory will be used in this course to give support to the existing students of Technical Engineering course, in process of extinction.

• Now it is impossible to interact with the remote laboratory more than the observation of the webcam image. This can be overcome if the commercial development kit is replaced by the trainer designed, or if you connect the development system based on FPGA to an acquisition card and Labview programs are adapted for remote use.

• It is possible, considering the low cost of the board, encourage students to have their own trainer to work at home, as is already done in other courses [11].

ACKNOWLEDGMENTS This work have been developed inside the framework of the

Project ”Objetos educativos interactivos aplicados a la docencia de la Ingeniería Industrial” (“Interactive learning objects applied to the teaching of Industrial Engineering”),

supported by the Innovative Education Program of the Academic Vicedirectorate of the UPM. Our thanks to all the people involved in this Project.

The authors would like to thank the students who have helped to develop prototypes and virtual instruments, especially Iván Gónzalez Huerga and Daniel Gabaldón Romero.

Also we would like to acknowledge the help of the UPM for the publication and attendance to the conference.

REFERENCES

[1] M. A. Domínguez, C. Quintáns and J. Marcos, “Enseñanza práctica de los microcontroladores y las FPGAS en los nuevos planes de estudios” in TAEE 2008. Zaragoza, Spain, July 2008.

[2] J. Viejo, E. Ostua, M. J. Bellido, J. Juan, D. Guerrero and A. Muñoz, “La primera experiencia en el diseño de sistemas digitales sobre FPGAs” in TAEE 2008. Zaragoza, Spain, July 2008.

[3] J. Cerdá, M.A. Martinez, M.A. Larrea, R. Gadea, and R.J. Colom, “An Active Methodology for Teaching Electronic Systems Design”, IEEE Transactions on Education, vol. 49, pp. 355-359, Aug. 2006.

[4] Coolrunner II CPLD family from Xilinx. Available at: http://www.xilinx.com/products/silicon-devices/cpld/coolrunner-ii/.

[5] Digilent products. Available at: http://www.digilentinc.com/Products/CatalogLandPage.cfm.

[6] ISE WebPACK Software. Available at: http://www.xilinx.com/products/design-tools/ise-design-suite/ise-webpack.htm.

[7] L. Dávila, C. Santos, L. Castedo, S. López and R. González, “Plataforma interactiva para la realización de practicas de electrónica digital” in 17th Congreso Universitario de Innovación Educativa en las Enseñanzas Técnicas. Valencia, Spain, Sep. 2009.

[8] L. Dávila, C. García, S. López, P. Sansegundo and D. Rodríguez-Losada, “SITED: Un laboratorio interactivo y protable de electrónica digital”. In TAEE 2010. Madrid, Spain, Apr. 2010.

[9] J.D. Muñoz, S. Alexandres and C. Rodríguez-Morcillo, “Microprocesador RISC sintetizable en FPGA para fines docentes” in TAEE 2008. Zaragoza, Spain, July 2008.

[10] J. García, “Laboratorio Weblab aplicado a la lógica programable: Weblab PLD” in TAEE 2004.Valencia, Spain, July 2004.

[11] J. P. Oliver and F. Haim, “Lab at home: hardware kits for a digital design Lab”. IEEE Transactions on Education, vol. 52, pp. 46-51, Feb. 2009.

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