2012 4th International Conference on Intelligent and Advanced Systems (ICIAS2012)

High Level Fault Modeling and Fault Propagation in Analog Circuits using NLARX Automated Model Generation Technique

Muhammad Umer Farooq, Likun Xia†, Fawnizu Azmadi Hussin†, Aamir Saeed Malik‡ Centre for Intelligent Signal and Imaging Research (CISIR), Electrical and Electronic Engineering Department

Universiti Teknologi PETRONAS, Bandar Seri Iskandar, Tronoh, Perak, Malaysia † Member IEEE, ‡ Senior Member IEEE

mohammod_omer_farooq@yahoo.com,{likun_xia,fawnizu,aamir_saeed}@petronas.com.my Abstract –It is known that fault modeling and fault propagation in analog circuits are extremely important and more challenging than in digital circuits. Several automated model generation (AMG) techniques are developed to model the nonlinear behavior of faulty analog circuits. However, most of the modeling techniques are performed under the MATLAB environment which is impractical and the models cannot be utilized in electronic circuits. To perform high level fault modeling (HLFM) and fault propagation (FP) on system level, the models need to be translated into hardware description language (HDL) models such as VHDL-AMS or Verilog-AMS models. In this paper, several faults are modeled for transistor level analog circuits using nonlinear autoregressive exogenous (NLARX) AMG technique in MATLAB. The resulting MATLAB models are translated into VHDL-AMS behavioral models. HLFM and FP are successfully implemented for benchmark analog circuits: inverting amplifier and biquadratic low-pass filter circuits. Keywords: HLFM, TLFM, Fault Modeling, Fault Propagation, VHDL-AMS, Automated Model Generation.

I. INTRODUCTION Rapid reduction in feature size enables electronics designers

to encapsulate large number of transistors into a single chip, which drastically complicates the fabrication process. As a result, faults are introduced at transistor level circuits and it becomes an issue of immense importance to perform fault modeling and simulation for verification and testing of integrated circuits (ICs) prior to fabrication. As for digital circuits, mature test and verification methodologies are already available; unfortunately it is still a long way for analogue or mixed-signal circuits and systems and thus fault simulation is mainly dependent on transistor level simulation (TLS). However, long simulation time of TLS circuits limits the use for fast testing and verification of modern complex mixed-signal circuits. Therefore, alternative approaches are suggested. One of such approaches is to employ efficient automated model generation (AMG) techniques that are able to exact input-output characteristics of the original circuit in the form of differential algebraic equations (DAE). The advantage of using AMGs is that they offer better flexibility and simplicity to model weak and strong nonlinear effects of faulty circuits than simple nonlinear components, for instance, diodes, transistors etc., used at circuit level.

Unfortunately, most AMG techniques available in the literature like [1–4] are only implemented in MATLAB which may be impractical. One cannot incorporate these models

directly in higher level circuits to perform system level simulations. Very few cases like Xia et al. [5] actually implemented the AMG in electrical domain (VHDL-AMS) to perform HLFM. However, they were unable to achieve speedup in simulation at a higher level of implementation due to the computational overhead of model.

Another very important phenomenon in analog circuits is fault propagation. Fault propagation is widely carried out for digital circuits, but not yet exhaustively tested for analog circuits [6], [7]. Difficulty stems from the fact that when the faulty behavior propagates from faulty block to non-faulty block of circuit, it may force the non-faulty block into highly nonlinear regions of operation. The fault free model for the non-faulty block operates under normal conditions, start facing nonlinear effects at its input and output. As a result, the model becomes inadequate to propagate faulty behavior to other part of the circuit. In such conditions, the parameters of fault free (ff) model need to be changed so that it can accurately propagate the faulty behavior.

In this paper, two challenges discussed above are targeted. We employ nonlinear autoregressive exogenous (NLARX) AMG technique [8] to perform HLFM and FP and investigate whether NLARX based models are able to achieve speed up at higher level of implementation. To perform HLFM and FP, MATLAB models are successfully translated into VHDL-AMS models using an automatic model conversion technique.

II. NLARX BASED FAULT MODELING IN MATLAB NLARX model structure depicted in figure 1 primarily

consists of two blocks: a regressor block and a nonlinearity estimator block.

Figure 1. NLARX model structure [8].

The regressor block is composed of current and previous input output values. The outputs from the regressor block are mapped to the model output using a linear and a nonlinear

978-1-4577-1967-7/12/$26.00 ©2011 IEEE

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2012 4th International Conference on Intelligent and Advanced Systems (ICIAS2012)

function implemented in nonlinearity estimator block. Sigmoid network is used as nonlinear function in this paper. The mathematical representation of NLARX model using sigmoid network as nonlinear function is given in (1) [9].

�)()(()()( 111 cbQrxfaPLrxxF −−+−=

dcbQrxfa nnn +−−+ )()((

(1) where x is regressor vector, r is regressor mean, P is linear subspace projection matrix, Q is nonlinear subspace projection matrices, L is linear coefficients vector, b is the dilation matrix, c is the translation vector, a is the nonlinear coefficients vector, d is the offset and f(.) is sigmoid net function shown in (2) [8].

11)(+

= −e zzf (2)

To perform HLFM, a CMOS operational amplifier (opamp) shown in figure 2 is utilized. The input stage is realized as a CMOS differential amplifier using p- channel MOSFETs. The differential amplifier is biased with the current mirror M13&M14. Three NMOS diodes (M4, M5 and M6) are used to keep the gate to source voltage of the current mirror small (VGS = -1.175V). The output stage (M7 and M10) is a simple CMOS push-pull inverter [5].

M4

M5

M6

M13 M14

M11 M12

M8 M9

CC

M10

M7

Vdd

Vss

In- In+Out

2

1

4

4

12

12

11

5

8

3 0

6

9

IEE

Iref

Figure 2. Schematic of the two-stage CMOS opamp [5]

As there are 11 transistors in the opamp, there can be a total of 33 short faults in the full circuit, with each transistor having three faults. However, only one fault is analyzed at a time.

To generate training data for NLARX model, faulty opamp is used in an open-loop configuration and TLFS is run in SystemVision [5]. Data capturing processes is implemented through a special virtual bus interface between Simulink and SystemVision that communicate data through sockets. Input signal used to generate the training data for AMG is a 50Hz, ±2.5V waveform with 500mV PRBS superimposed on it for the inverting input. PRBS has time interval of 10us. Non-inverting input of opamp is grounded. Data is captured with sampling time Ts of 10us.

MATLAB system identification (SI) toolbox is then employed to generate NLARX model. Two fault models are generated, respectively: M9_gss 1 and M10_gds 2 . Initially ARX model structure is iteratively used to obtain good estimate for the number of regressor terms for both faults. For M9_gss fault, 7 previous output values, 2 previous input values with 20 sigmoid net layers are used. Similarly for M10_gds fault, 5 previous output values, 2 previous and a current input values with 15 sigmoid net layers are used. The output of these models is compared with original TLS open loop opamp SPICE model output using the equation (3), i.e., the fit equation.

)ˆ

ˆ1(*100

yy

yfit

y est

−

−−= (3)

where, yest is NLARX model output and y is SPICE TL opamp output. NLARX MATLAB model output for M9_gss fault is shown in figure 3.

Figure 3. NLARX model output for open loop opamp

It can be seen that model is only 63.56% fit with original data. It indicates that NLARX is unable to model saturation nonlinear portion as very less information is available in that portion, NLARX has to make its own guesses to estimate the output. As a result noisy behaviour is seen in this portion. The validation data used to validate this model is generated using a 1V, 49 Hz sine waveform input to same faulty open loop opamp. Validation data is 49.9% fit with NLARX model output. Similarly model fit for M10_gds fault is 70% for estimation data and 49% for validation data.

A MATLAB routine extracts NLARX model parameters, shown in (1), from MATLAB idnlarx model structure and loads into MATLAB workspace. CPU time consumed by NLARX to generate models for these faults is summarised in table I in section IV.

III. AUTOMATIC MODEL CONVERSION OF

MATLAB MODELS TO VHDL-AMS MODELS

To perform HLFM, NLARX MATLAB fault models need to be converted into VHDL-AMS models. The model structure used to implement behaviour of two stage opamp is shown in figure 4 [5].

1 Short between gate and source at transistor 9 2 Short between gate and drain at transistor 10

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2012 4th International Conference on Intelligent and Advanced Systems (ICIAS2012)

Opamp behavioural model comprises two linear resistors ri and ro that represent the input impedance and output impedance, respectively; Voffin and Voffout model input and output offsets respectively. Models from NLARX AMG act as the voltage controlled voltage source (VCVS), i.e., Vo = f (Vin).

- ro

ri

+

gnd

Vin AMG (Vo=f(Vin))

out

Voffin

Voffout

Vn

Vp

Figure 4. Structure of the behavioral opamp model [5]

Unlike [10], [11] where MATLAB/Simulink models are automatically converted into VHDL for digital circuits and systems, we develop a MATLAB routine that automatically converts MATLAB/Simulink models into VHDL-AMS models meant for analogue and mixed-signal circuits. The routine is called Automatic Model Converter (AMC). It automatically load model parameters from MATLAB workspace and generate VHDL-AMS HLFM based on the model structure shown in figure 4.

It is of immense importance to mention here that NLARX model structure is a discrete time model and performing HLFM using discrete time models is a challenging task as analogue is continuous time by nature and approximating analogue systems using digital models may cause discontinuities at the model output [12]. Therefore, we avoid the use of ‘zoh attribute in VHDL-AMS that holds the sampled values between two sampling intervals [13].

To generate HLFM based on NLARX model structure, we need to implement regressor block, linear block and nonlinear block in VHDL-AMS. As mentioned in section II that regressor block is composed of past and current samples of input and output waveforms. To model delayed input and output in VHDL-AMS ‘delayed attribute is used [13]. Similarly, to implement linear block, simultaneous assignments are used which run concurrently. Finally, to implement nonlinear sigmoid net function, we have a constraint that the output of second sigmoid net layer cannot be calculated until output of first sigmoid net layer is available and same is true for the calculation of all 20 sigmoid net layers. This means that it is not possible to use concurrent simultaneous assignments for implementation of sigmoid net nonlinear function. Hence, it is decide to use procedural assignments that are concurrent with respect to rest of VHDL-AMS code, but are sequential within the procedural block [13]. Finally, model output is a combination of linear simultaneous assignments and nonlinear procedural assignments. It should also be noticed here that to achieve better accuracy at HLFM output, parameters like Voffin, Voffout and ro are adjusted manually.

V. EXPERIMENTAL RESULTS

To perform HLFM and FP based on NLARX VHDL-AMS behavioral models, TLFS are run for two faults: M9_gss and M10_gds. We use two benchmark circuits to perform HLFM and FP. These two circuits are: a simple inverting amplifier circuit and a biquadratic low-pass filter circuit. Inverting amplifier is configured for a gain of 2. Biquadratic low-pass filter (lpf) circuit is shown in figure 5. The input signal to inverting amplifier circuit is 1V, 80Hz sine waveform.

op1 op2 op3in

out

R5

R1

R2 C2

R3 R4

R6

C1 100k

100k 100k 100k

100k0.01u

0.01u

70.7k

1 2 3 4 5

�Figure 5. The biquadratic low-pass filter [5]

To perform HLFM for inverting amplifier circuit, transient

simulations in SystemVision are run independently for each fault and results are compared with SPICE TLFM outputs. HLFM output (vout_hlfm) and TLFS output (vout_tlfm) for M9_gss fault are shown in figure 6. It is seen that HLFM output matches well with TLFM output. HLFM output for M10_gds fault is shown in figure 7 with corresponding TLFM output.

To perform HLFM for biquadratic low pass filter, two types of simulation are run for each fault. One is purely based on TL circuit and another by replacing one of faulty opamp with NLARX HLFM.

Figure 6: HLFM inverting amplifier output for M9_gss fault

The input signal is a sine waveform with amplitude of 2V at 20 Hz. For M9_gss fault, TL faulty op3 is replaced with NLARX HLFM and remaining two ops are TL ff models. A transient analysis is run for 200ms using SystemVision. The HLFM output for M9_gss fault is shown in figure 8.

It can be seen that model the output is not good for flat strong nonlinear regions, which means NLARX HLFM is also unable to model strong nonlinear effects.

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2012 4th International Conference on Intelligent and Advanced Systems (ICIAS2012)

Figure 7: HLFM inverting amplifier output for

M10_gds fault

Figure 8. HLFM output for M9_gss fault for lpf circuit

Though, the accuracy of HLFM can be improved by

increasing the model order, i.e., by increasing the number of sigmoid net layers. However, it may cause the model to be more computational intensive and reduce the HLFM speed. For fault M10_gds, TL op1 is replaced with HLFM with other two TL ff models. The HLFM output for M10_gds fault is shown in figure 9.

Figure 9. HLFM output for M10_gds fault for lpf circuit

Similar to M9_gss fault, the model output for M10_gds fault can be improved at the expense of high model order and reduced HLFS speed.

To test the fault propagation mechanism using a low pass filter circuit, we use M10_gds SPICE TLFM for op1, replace ff TL op2 with our HLFM and keep the op3 SPICE TL ff model. The idea is to test either HLFM is able to transfer faulty behavior generated by op1 and propagate it to op3. Low pass filter output with above configuration is shown in figure 10.

It can be seen that HLFM output matches well with pure TLS SPICE circuit output and hence our HLFM is able to implement fault propagation mechanism.

Figure 10. Fault propagation output for M10_gds

The simulation speeds of NLARX MATLAB fault model, VHDL-AMS HLFM and TLFM are measured for both faults. Results can be found in table I. It indicates that NLARX based MATLAB and HLFM are unable to achieve simulation speed up as compared to TLFS.

Computational overhead can be reduced by utilizing model order reduction (MOR) techniques to decrease the model order. Further, discrete time model structures are inefficient to achieve speedup while performing HLFM [14].

VI. CONCLUSION AND THE FUTURE WORK

In this paper HLFM and FP are investigated on the basis of faulty models generated using NLARX AMG technique. It is shown that the models from MATLAB can be converted into VHDL-AMS behavioural model and perform with good accuracy. The experimental results of benchmark inverting amplifier and biquadratic low pass filter circuits show that the VHDL-AMS behavioural model is able to perform HLFM and FP. However, in some cases more accuracy at higher level of implementation can be achieved at the expense of high model order and low simulation speed. It is also seen that HLFM is unable to achieve speed up in HLFS as compared to TLFS due to the large number of sigmoid net layers utilized. This can be improved by making use of MOR techniques.

In the future work, an AMG algorithm will be developed that will generate single models of low order based on continuous time model structure to achieve speed up. In addition, HLFM and FP will be performed based on our own AMG models.

TABLE 1. COMPARISON OF SIMULATION SPEEDS Testing Circuit

Faulty model

Fault

MATLAB

fault model (s)

HLFM

(s)

TLFM

(s)

Speed up (HLFM

vs TLFM)

(%) Inverting amplifier

M9_gss 101.3 3.8 0.20 -94.7 M10_gds 59.77 0.548 0.062 -88.6

Low pass filter

M9_gss 101.3 0.960 0.094 -90.2 M10_gds 59.77 0.260 0.062 -76.2

ACKNOWLEDGMENT This work was supported by the Fundamental Research

Grant Scheme (Ref: FRGS 2/2010/TK/UTP/03/8, Ministry of

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2012 4th International Conference on Intelligent and Advanced Systems (ICIAS2012)

High Education (MOHE), Malaysia.

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