Phase Change Memory

DarwMicron Technolo

{dw Abstract

Phase Change Memory (PCM) has rmomentum in the semiconductor industralternative to flash memory due to the fact and NAND) and DRAM memory technologto encounter scaling difficulties as chip lithoand various unique properties PCM offers[cell has been shown to scale down below 10nunique properties of Chalcogenide glass reversibly “switched” between crystalline and amorphous (high resistance) states withheat[3]. This unique temperature propertyimpose a paradigm shift from off-board pre-in-system programming (ISP) in the manuAny code needed to be stored in the Pprogrammed after the surface mount techprocess. There are several methods already industry that will facilitate this paradigm shprogramming. This paper attempts to cdescribe these methods.

Keywords Phase Change Memory, On-Board ProgrammProgramming, In-System Programming

1. Introduction Phase Change Memory is a new cla

technology that is entering the memory higPCM has the potential to surpass today’s many features – PCM has the desirable attmemory technologies: bit-alterability, nonread speed, fast write/erase speed, scalabiliitself quite well for memory subsystem conso Table 1: PCM combines the best attribute

Legend: Good Ok No

y and Paradigm Shift to In-System Pro

win Wong, Clifford Smith, Poorna Kale ogy, Inc. 2235 Iron Point Road, Folsom CA 956wong, cdsmith, pkale}@micron.com

recently gained ry as a viable that flash (NOR

gies are expected ography shrinks, 1,2]. The PCM nm as it uses the

which can be (low resistance) h application of

y, however, will -programming to ufacturing flow.

PCM has to be hnology (SMT) employed in the

hift to in-system consolidate and

ming, In-Circuit

ass of memory ghway. In time, technologies on tributes of other n-volatility, fast ity, and it lends olidation [5,6].

es of memories

ot good

PCM offers much higher perwhere writing quickly is impormemory element can be switchedbecause the bit-alterable capabilityblock erase. Below is a comoverwriting 128KB of data to a daand PCM device. Significant systebe achieved with the Phase Changeimproves performance by elimina(free/dirty transfers), reduces blockand speeds up space allocation man Table 2: High program perform

Operation Time (ms) P5PC

Erase 128KByte Block(s) 400mProgram 128KByte Data 143Total Time to Erase/Program 543

Direct Over-Write 246190nm PCM [5] 265nm NOR [6] * PCM can mimic erase operation fcompatibility. ** Greater than 7 times improvemePCM’s bit-alterability is leveraged

The high endurance of PCM

cycles is also of particular interest NAND's shortcomings. Enterpriselogging can benefit from the high ePCM is used in place of volatieliminate the expensive backup recovery. 2. Paradigm shift to in-system

Due to the high temperatures content of the memory cells in Pand, thus, the requirement to shift tis necessary. In-system programfollowing advantages to the manufa

• Eliminate standalone flash• Eliminate pre-programmin• Enable Just-in-Time in-lin• Reduce damage & multi-h

Because of the bit-alterabilit

programming steps can be greatlyblank check and erase can be elim

gramming

630

formance in applications rtant, both because the

d more quickly, and also y eliminates the needs for

mparison of writing and ata block between a NOR em time improvement can e Memory. Bit alterability ating clean up operations k/page reserve overheard, nagement.

ance with PCM Q1

CM N25Q2 NOR

Factor faster

ms* 1400ms 3.5 3ms 410ms 2.9

3ms 1810ms 3.3

6ms N/A 7.4**

for software drop-in

ent can be achieved when in this comparison.

in the order of million for application to address

e systems for transaction endurance of PCM, and if le memories it can also battery for power loss

m programming in the SMT process the

PCM would be disturbed to in-system programming mming also provides the acturing flow: h programming machines ng inventories ne programming of code handling of devices

ty feature of PCM the y simplified. The need for minated. Below is a table

978-1-4244-7808-8/10/$26.00 ©2010 IEEE 371 2nd Asia Symposium on Quality Electronic Design

Wong, Phase Change Memory and Paradigm Shift ... 372

showing the differences in the programming steps between Flash memory and bit-alterable PCM memory. Table 3: PCM bit-alterability simplifies programming

Programming steps

Flash PCM

Blank Check

Read FF

Verify if memory is erased and, if not, perform erase

No need to pre-read or erase – device is bit-

alterable Erase Most time consuming step

Program Factory program Factory program*

Verify Image Verify Image Verify *Factory program imply writing only 0’s. The reset pulses (writing 0’s) are typically faster on PCM than NOR technology.

3. In-System Programming (ISP) Methods Below are some descriptions of the various industry-

wide methods that can be employed for in-system programming of PCM.

3.1 Programming from external peripherals

Many off-the-shelf processors have embedded boot ROM. It is common for these systems to be able to boot from different peripherals including but not limited to: Serial (UART3), SD Card (MMC1 and MCC2), USB, and Ethernet. Original Design Manufacturer (ODM) could leverage this ability to boot from the peripherals first and then use the processor and system bus to program the PCM.

Figure 1 ISP via external peripheral booting

Typically, when the system is first powered up, the ROM redirects the CPU for the boot code. The order of the boot location, usually, starts with the peripherals and then the on-board memory. In this example, the USB contains the boot code with routine to perform in-system programming to PCM. Once the boot code is transferred from USB to PCM, the system can now be booted from the on-board PCM memory.

In a very similar fashion, Application Specification Integrated Circuit (ASIC) chip system often has the ability to boot from the external peripheral such as SD-Card. In fact, the in-system programming via booting from SD-card to program the onboard memory is a common manufacturing flow for these systems.

The adoption of PCM memory as the onboard memory in these systems is direct drop-in compatible and requires no further modification of the system and the manufacturing flow. 3.2 Programming using In-circuit tester

In-circuit testing (ICT) is a common manufacturing procedure for shorts, opens, resistance, capacitance, and other analog measurements to check for components placement assembly on PCB. The testing is usually performed with a bed of nails type test fixture with automated test equipment as shown in Figure 2. The fixture allows direct signal contact to the back of the PCB so that test vectors can be driven to the components. Below is a picture showing ICT tester’s pin electronics with twisted wire to the bed of nails fixture. The PCB is press down against the test fixture via vacuum or mechanical hold down. The bed of nails makes contact to the device under test.

Figure 2 In-circuit testing with bed of nails fixture

In-circuit testing has also been leveraged to perform in-

system programming of memory components. Many ICT vendors have incorporated flash programming capability and modules into their testers to enhance in-system programming on the testers [8]. Integration of testing and programming into single phase streamlines the manufacturing flow.

Below is a comparison of manufacturing flow with pre-programming versus in-circuit programming. Table 4 Pre-programming vs. In-Circuit programming Pre-programming flow In-circuit programming

flow 1. Pre-program memory

before surface mount

N/A

2. Surface mount Chip

1. Surface mount Chip

3. Perform in-circuit testing

2. Perform in-circuit testing and in-circuit programming

4. Functional test

3. Functional test

As shown in the table above, in-circuit programming

flow saves an entire step in standalone pre-programming

Wong, Phase Change Memory and Paradigm Shift ... 373

equipment setup, inventory logistic, handling, and the operation cost of pre-programming. Depending on the code size, the combined ICT testing and programming time could be less than the manufacturing beat rate at the ICT station; and could result in overall reduction in manufacturing cost.

Figure 3 Example of PC industry using In-Circuit programming

An example of industry that has already incorporated in-system programming via ICT tester is the PC manufacturers. A primary reason for using ICT to program the memory devices are for security and proprietary reasons to keep the source code in the manufacturing floor. Other industries like automotive, defense, medical, and server manufacturers also utilized in-circuit tester programming methodology.

Another type of the In-circuit testing is the flying probe system. Flying probe testers require no test fixtures as each probe lands on a test point on the printed circuit board. Some flying probe testers offer both flying probes and flying bed of nails fixture. The flying probes can perform the ICT testing and boundary scans. The bed of nails can be used to program the memory device. If the memory to be programmed is low pin count or serial flash it is possible to use flying probes to perform programming.

Figure 4 Flying probes and bed of nails system

3.3 JTAG and Boundary Scan Programming JTAG is a common debug interface for many embedded

processors and often have direct access to the on-board non-volatile memory. In addition to silicon/test debug these JTAG interface can be leveraged to perform in-circuit programming of Phase Change memory.

Figure 5 In-system programming using JTAG

Traditional programming using JTAG cells alone can be slow because the pins which connect to the address bus, data bus and control lines of the device to be programmed are identified and then serial data is shifted through the JTAG chain to access these pins.

Many modern electronic include PLDs in their designs. If a PLD has full access to the NVM and can also be programmed to take control of the JTAG chain, the PLD can be used to program the PCM.

Figure 6 JTAG and PLD based programming

The technique used is similar to programming the PLD

itself. The PLD is programmed to take control of the JTAG chain. A simple protocol is then operated over the JTAG chain which means the programming data can be transferred with virtually no overhead at all[9]. 3.4. Programming port/Pin header

Dedicated programming port is a common method for programming memory code in a development system. The programmer is connected to the host PC via USB, GPIO, serial, et cetera and the programmer then translates the data into memory protocol for programming the PCM.

Figure 7 Dedicated programming port

For low volume, high mix, and if board space allows for a programming header, this method could be a viable option for manufacturing flow. The software and hardware are 100% reusable, and this method is a low cost solution for some manufacturers.

Wong, Phase Change Memory and Paradigm Shift ... 374

4. Enhancements to in-system programming The In-system programming time impact to

manufacturing beat rate is a critical concern to ODM’s manufacturing flow. The PCM memory vendors can help to offer solutions that would speed up the in-system-programming. Below are two enhancements that are supported by some PCM vendors: 4.1 Dual or Quad Buffer Programming

Data loading time can be reduced with dual and/or quad buffer programming feature. Typically, the data loading into the program/page buffer and memory array writes of transferring the data from program/page buffer into the memory array are serial operations. With Dual or Quad buffer techniques, the data loading and data transfer steps can be performed in parallel. That is, this technique allows for data load into an available buffer while data from one of the buffers is being transferred into the PCM array. 4.2 Image verification by checksum and hash techniques

It is common in the manufacturing flow to read back the image after programming step to ensure the integrity of the programming. The read back time can be time consuming and is directly dependent on the tester speed to generate the addressing and the data comparison. Using checksum and non-secure hash functions the image can be quickly verified and the long external read verify step can be eliminated. A cyclic redundancy check (CRC) or polynomial code checksum algorithm is one such method that can be employed. In this way the user would invoke the CRC command and then poll for the status bit to verify that the user supplied and the device generated CRC code matched. The internal read to generate the CRC code is much faster than the external read verify method.

5. Conclusions Phase Change Memory is an up and coming memory

technology of the future and it combines the best attributes of numerous memory technologies. Because of the high temperature of SMT process, in-system programming manufacturing flow must be employed for PCM technology. Proven and existing methods for in-system programming methods have been described in this paper and can be employed for Phase Change memory. For manufacturers who are already performing in-system programming the use of PCM is transparent and, in fact, the faster programming and bit-alterability of PCM will improve the system performance. Many applications such as automotive, STB, WIMAX, PC, digital hybrid still camera, optical disk drives, and servers have already employed in-system programming methodology. Manufacturers who are currently performing off-board programming will require a paradigm shift and can employ one of the methods described. There are also advantages to in-system programming that manufacturers should take into considerations. This paper has provided a high level introduction to Phase Change Memory, the need of in-system programming for PCM, various methods

available for manufacturers to perform in-system programming, and programming speed enhancements.

6. References [1] Scaling in Floating-Gate Non-Volatile Memory

Technology and Its Implication on Reliability. Tao, Guoqiao IEEE senior member. NXP Semiconductor. IEEE Proceeding of 16th IPFA -2009, China. http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5232716

[2] The Basics of Phase Change Memory Technology, http://www.numonyx.com/Documents/WhitePapers/PCM_Basics_WP.pdf

[3] Can We Reach Tbit/sq.in. Storage Densities With Phase-Change Media? C D Wright, M M Aziz, M Armand, S Senkader and W Yu Department of Engineering, University of Exeter, UK http://www.epcos.org/library/papers/pdf_2004/14paper_wright.pdf

[4] Scalable High Performance Main Memory System Using Phase-Change Memory Technology Moinuddin K. Qureshi Vijayalakshmi Srinivasan Jude A. Rivers, IBM Research T. J. Watson Research Center, Yorktown Heights NY 10598 http://users.ece.utexas.edu/~qk/papers/pcm.pdf

[5] Benjamin Lee et al. Architecting Phase Change Memory as a Scalable DRAM alternative ISCA’09. http://research.microsoft.com/apps/pubs/default.aspx?id=79150

[6] 90nm P5Q PCM datasheet specification: http://www.numonyx.com/Documents/Datasheets/210052_P5Q_DS.pdf

[7] 65nm N25Q NOR datasheet specification: http://www.numonyx.com/Documents/Datasheets/N25Q_128_3_Volt.pdf

[8] Utility card enables higher performance & lower cost Flash Programming Solution on Agilent ICT – White Paper http://cp.literature.agilent.com/litweb/pdf/5990-5053EN.pdf

[9] High Speed Programming of Non-Volatile Memories using the XJTAG development system – white paper. http://www.xjtag.com/jtag-tools/high-speed-flash-programming.php