2009 IEEE MTT-S International Microwave Workshop Series onSignal Integrity and High-Speed Interconnects (IMWS2009-R9)

An Improved EM-Based Design Procedure for Single-Layer SubstrateIntegrated Waveguide Interconnects with Microstrip Transitions

Jose Ernesto Rayas-Sanchez

Department of Electronics, Systems and Informatics, ITESO (Instituto Tecnologico yde Estudios Superiores de Occidente),

http://iteso.mx/-erayas

Abstract - A practical, computationally efficienttechnique to EM-based design of single-layer SIWinterconnects with microstrip transitions is presented in thiswork. The design technique efficiently exploits a simplifiedEM model of the SIW interconnect (surrogate model). Theinitial design of the SIW structure is obtained by usingavailable empirical equations. A low-resolution EM modelwith solid walls (grooves) is proposed as an efficient SIWsurrogate model for direct EM optimization using a fewfrequency points. The complete EM optimization of thesurrogate model consumes much less time (<20%) than justone simulation of the original EM model (with vias) using ahigh-resolution grid. The proposed practical technique isillustrated by designing a 10-50 GHz SIW interconnect withmicrostrip transitions on a standard FR4-based substrate.

Index Terms - Substrate integrated waveguides, S1W,EM-based optimization, high-speed interconnects,microstrip-to-SIW transitions.

I. INTRODUCTION

Conventional rectangular waveguides (RWG) areexcellent transmission media to reduce electromagneticsusceptibility and crosstalk due to their enclosed structure.However, conventional waveguides are bulky and difficultto fabricate in typical multilayer printed circuit boards(PCB). Moreover, the physical dimensions of planarinterconnects and conventional RWG are quite different inthe microwave range [1], imposing the need of complextransition structures that might require high-precisionmanufacturing processes and physical tuning [2], makingthem unsuitable for low-cost massive-production PCBstructures.

Substrate integrated waveguide (SIW) structures arepromising candidates for a new generation of low-costPCB interconnects for ultra high-speed digital applications[3], given their simplicity, their adequacy for planar andmultilayer structures, and their low radiation losses andlow sensitivity to electromagnetic interference (EMI) [4].Encouraging results have been reported in the scientific

This work was supported by CONACYT (Consejo Nacionalde Ciencia y Tecnologia, Mexican Government) under GrantCB-2007-01-83981, and by Intel Guadalajara Design Center.

Tlaquepaque, Jalisco, 45090 Mexicoe-mail: erayas@iteso.mx

community for SIW as high-speed interconnects. In manyof these cases, either simulation results are reportedconsidering ideal waveguide ports, or measurement resultsare obtained using coaxial transitions [5]. Significantadvances have been reported to design SIW-microstriptransitions using single-layer [3,6] and multi-layerstructures [7,8,9]. Designing SIW-microstrip transitionswith low reflections in the passband (e.g., IS11l < -20dB)remains a very important challenge, due to the extremelyhigh computational cost of the corresponding EM models,and the lack of reliable broad-band equivalent circuitmodels. Deficient transitions can excite higher-ordermodes along the SIW [4,10], which deteriorates the signalintegrity of transmitted digital data and reduce theeffective channel bandwidth.

In this manuscript it is proposed a practical procedure toEM-based design optimization of single-layer SIWinterconnects, including the transitions to microstrip linesin the same layer. An initial structure is generated byapplying empirical formulas and design criteria availablein the literature for SIW. A high-resolution full-waveelectromagnetic simulation of the initial design is realized.Next, a suitable SIW surrogate model for direct EMoptimization is developed, consisting in a very low-resolution EM model with grooves as lateral metallicwalls. This allows the use of an extremely large cell-sizein the longitudinal direction, making the surrogate modelvery fast to evaluate. Additionally, the surrogate model isoptimized using a few frequency points at eachoptimization iteration, using a frequency domain EM fieldsolver. The complete EM optimization of the surrogatemodel consumes much less time (<20%) than just onesimulation of the original EM model (with vias) using ahigh-resolution grid. The optimal solution found isapplied to the original high-resolution EM model, findingan excellent performance improvement for the SIW interms of both transmission and reflections. We illustrateour procedure by designing a SIW interconnect with a lowcutoff frequency (lOGHz) and a broad effectivebandwidth (40 GHz) on a standard FR4-based substratefor high-speed digital applications, obtaining better results

978-1-4244-2743-7/09/$25.00 ©2009 IEEE 27 Guadalajara, Mexico, Feb. 19-20, 2009

2009 IEEE MTT-S International Microwave Workshop Series onSignal Integrity and High-Speed Interconnects (IMWS2009-R9)

Fig. 1 Single-layer substrate integrated waveguideinterconnect (SIW) with microstrip transitions.

than those reported in [6], in a more efficient manner.

II. ESSENTIAL EMPIRICAL FORMULAS FOR THE SIW

The structure of a single-layer substrate integratedwaveguide interconnect (SIW) with microstrip transitionsis illustrated in Fig. 1. The waveguided length is Lslw. Adetailed view of the structure is shown in Fig. 2. The SIWhas an external width WSlW. Each via has a diameter d andis separated from its neighboring via by a center-to-centerspacing s. The SIW is embedded in a dielectric layer withheight H, relative dielectric constant 8r, and loss tangenttan y. Metals have thickness t and conductivity o-.The SIW emulates a dielectric-filled rectangular

waveguide whose lateral metallic walls are formedthrough rows of vias sufficiently close to each other [11].An initial approximation for the internal width W (WslW =

W + 2d, see Fig. 2) can be obtained from the desired lowcutoff frequency,

W C (1)2fcIo _r

where f 0 is the cutoff frequency of the TE1o mode, and cis the speed of light in free space.

Since TM modes impose longitudinal surface currentson the lateral walls of the RWG, and considering that onlyvertical surface currents can flow in the SIW through the

*-E, ,d ..M. a Yg_a...

'DI Wta Ltap...............

Fig. 2 3D view of the high-resolution EM model of the SIWas implemented in Sonnet. Hair and Ygap are selected to avoidbox resonances up to 50GHz. Sonnet's box top cover is definedas free-space.

-10 - --

-20

-40~~~~~~~~~~~~~~~~~~~_ F =t-30-

-50 - X Is2i1-60

0 10 20 30 40 50frequency (GUI)

Fig. 3 EM responses of the initial design of the SIWinterconnect using a high resolution grid.

lateral vias, hence only TEBo modes can be preserved inthe SIW [11]. The effective bandwidth of the SIW willthen be established by the first higher-order modepropagating along the SIW, which in turns establishes theupper bounds for s and d (to avoid EM field leakagethrough the lateral walls of the SIW in the dominant modebandwidth). Two empirical criteria, obtained from EMsimulation results [12], are s < 2d and d < Ag5/, where Agis the guided wavelength. This allows us to establish anupper limit for the via diameter [6],

d< 2W (2)5jm2 -1

III. STARTING POINT FOR THE SIW

The SIW interconnect to be designed is implemented ona standard substrate for high speed digital applications, N-4000-13 ', with c, = 3.6 and tan y= 0.008 at 10GHz. Thesubstrate height is H= 16 mil. Vias and metal traces(including the microstrip transitions and ground plane) areimplemented in copper with a conductivity oc, = 5.8 x 107S/m and thickness t = 0.65 mil (half-ounce copper). Therequired cutoff frequency for the dominant mode is flo1OGHz.Using (1) we obtain the initial value for W= 311.25 mil.

Assuming that higher order modes propagates up to50GHz (TE50 mode), using (2) the via diameter should bed < 25.41mil. We take Wp = 37.8 mil, which was obtainedby direct EM minimization of IS111 of a simple microstripline. We use LP 1.5W, Ltap =3W, and LsIw= 4W. As astarting point for the tapered microstrip line width, we useWtap = W (intended to provide the field matching).

1 Nelco Advanced Circuitry Materials Park ElectrochemicalCorp., Nelco N-4000-13 High-Speed Multifunctional EpoxyLaminate & Prepreg Technical Data Sheet,http://www.parkelectro.com/, 2007.

978-1-4244-2743-7/09/$25.00 ©2009 IEEE 28 Guadalajara, Mexico, Feb. 19-20, 2009

2009 IEEE MTT-S International Microwave Workshop Series onSignal Integrity and High-Speed Interconnects (IMWS2009-R9)

0.7

0.6

0.5

0.4

0.3

0.2

H4IFig. 4 3D view of the low-resolution EM model of the SIWas implemented in Sonnet. In this case the SIW uses grooves aslateral metallic walls.

The above initial design is implemented in the full-wave3D-planar EM simulator Sonnet 2. A distance Ygap = 1.5Wis kept between the SIW walls and Sonnet's box lateralwalls. An air layer whose height is Hair= 4H, existsbetween the SIW and the top cover of Sonnet's box,which in this case is defined as free-space. By using thisconfiguration, unwanted EM interaction and potentialresonances with Sonnet's box are avoided up to thehighest simulated frequency. A very high resolution gridis used. The rows of vias are implemented using d =

18.9mil and s = 2d. The corresponding EM responses arein Fig. 3. It is seen that the initial design has a significantdeviation from the intended f 10, it shows transmissiondeterioration due to higher-order modes, and significantreflections in the passband. One linear frequency sweepwith 200 frequency points using a computer with dualprocessors at 2.16GHz, and 2.5GB RAM, consumes 7hours 19 minutes.

IV. SURROGATE MODEL FOR DIRECT EM OPTIMIZATION

Given the very long time required by each EMsimulation of the previous SIW, a surrogate model withgrooves as lateral metallic walls is proposed for direct EMoptimization, as shown in Fig. 4. This allows to use a verylow resolution in the longitudinal direction (C, = Wp,where CQ is the cell-size in the longitudinal direction).

First the deviation infclo is corrected by optimizing JS211with respect to W to satisfy in a minimax sense the designspecifications indicated in Fig. 5. The optimal solutionfound is W = 349.65 mil, and its corresponding responseis also in Fig. 5 (as well as the response at the initialdesign). The evolution of the optimization variable isshown in Fig. 6. The 9 surrogate model frequency sweepsconsume only 3.83 minutes using the same computer(only 7 frequency points are evaluated, from 6 GHz to 12

2 Sonnet v11.53, Sonnet Software Inc., North Syracuse, NY,2007.

0.1

n

. ;at W(O) .................at W

------------

------------

-

6 7 8 9 10 1 1 12frequency (GHz)

Fig. 5 EM surrogate model responses of the SIWinterconnect around the cutoff frequency, before and afteroptimizing W (using Wtap= W (0))

380

360

340 - (X)

30C0 ____

0 2 4 6 8 10model evaluations, j

Fig. 6 Evolution of the internal width W while optimizingthe EM surrogate model (using Wtap =W-()).

GHz).Next, the surrogate model is optimized to extend the

dominant mode bandwidth and to improve theinput/output field matching. We do this by minimizingwith respect to Wtap the Manhattan norm of IS111 in thefrequency range indicated in Fig. 7, where we also showthe initial and final surrogate model responses. Notice thatby minimizing the reflections we indirectly improve thetransmission (no need to optimize JS211 explicitly). Theoptimal solution is Wtap* = 236.25mil, found after 10surrogate model frequency sweeps (only 23 frequencypoints are evaluated, from 13 GHz to 35 GHz), whichconsumes only 80.39 minutes with the same computer.The evolution of the optimization variable is in Fig. 8(using Wtap()= W ).

Finally we evaluate at W= W* and Wtap = Wtap theoriginal EM model with vias and very high-resolutiongrid, with the rest of the parameters as in the initial design(excepting for the external width, since WSlW = W + 2d).The corresponding EM model response with very highresolution is in Fig. 9. It is seen a very significantimprovement in the SIW performance as compared withthe initial design (compare Figs. 3 and 9).

978-1-4244-2743-7/09/$25.00 ©2009 IEEE 29 Guadalajara, Mexico, Feb. 19-20, 2009

2009 IEEE MTT-S International Microwave Workshop Series onSignal Integrity and High-Speed Interconnects (IMWS2009-R9)

very significant improvement in the performance of theSIW interconnect is efficiently obtained following thisprocedure.

ACKNOWLEDGMENT

The author thanks Dr. J. C. Rautio, President of SonnetSoftware, Inc., for making em. available.

REFERENCES

20 25frequency (GHz)

Fig. 7 EM surrogate model responses

interconnect in the passband, before and after o

500

450r

400r

*g 350

300r

250

2000 2 4 6

model evaluations, jFig. 8 Evolution of optimization variable Xvand Wtap(°) = W*) while optimizing the EM surr(

V. CONCLUSIONS

A practical and computationally efficieEM-based design optimization of sirinterconnects, including the transitions toin the same layer, was described in this p,

design is developed from available empiAn efficient SIW surrogate model, with gi

walls, is used for direct EM optimizaticextremely low-resolution in the longitudii

-10 - :

-2

:-30 E--4

-40 X X t -_

Is211~

-600 10 20 30

frequency (GHz)Fig. 9 EM responses of the final desiginterconnect using a high resolution grid.

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