Upload
f
View
216
Download
3
Embed Size (px)
Citation preview
821
P.G. Maranesi, IEEE Fellow, M. Riva, IEEE Member, F. Belloni Università degli Studi di Milano
via Celoria 16, 20133, Milan, Italy tel: (+39) 02 50317457, fax: (+39) 02 50317458
e-mail: [email protected], [email protected], [email protected]
Abstract — An analog adaptive controller of power converters based upon a switched capacitor programmable filter is described. The transfer function of the external feedback network is continuously updated by the readouts of the input variables. A rough discretization of the inputs is obtained by a small number of fast comparators that digitally program the filter by means of a look-up table. The analog output drives the error amplifier of the switching converter controller whether it is PWM or phase-shifted or resonant. The present paper refers to a DC/DC converter even though the application can be addressed to any kind of power converter. The possibility of including the circuit into IC controller drivers is open. The non-linear overall characteristics of the power cells often show large differences in the dynamic behaviour depending on the operating point when the variations of the inputs are very large. The possibility of different conduction modes makes the use of a single time-invariant feedback network extremely downgrading the frequency performances. This paper describes a possible circuit topology implementing the switched capacitor adaptive feedback as a second order external network whose transfer function, in the Z domain, can assume as many different forms as required. The potential of this solution is illustrated with a simple example concerning a PWM flyback converter spanning over the discontinuous and the continuous conduction modes. The difficult work of defining the feedback transfer functions set can be carried out by an automatic analysis and CAD tool. The control of large signal transients is also made possible.
I. INTRODUCTION Time invariant networks are generally used for the
external feedback of switched power processors. The non-linear overall behaviour of the switching cells and specifically the possibility that more than one conduction mode are involved, imply dynamic differences depending on the working point. Feedback must guarantee the stability over the whole operating range. This often causes the closed loop dynamic performances to be far from optimal. An adaptive feedback can avoid this drawback. A common analog feedback network is difficult to be made dependent on the input sources because, generally, it implies switching of feedback capacitors with unacceptable transients. For this reason, the most part of research activities on adaptive control is oriented to digital solutions [1-7]. Circuit complexity, processing delay, power dissipation, and cost have restrained until now the insertion of digital control into commercial power conditioning ICs.
* Patent Pending
An analog solution in the discrete time providing an adaptive set of transfer functions in the Z-transform domain is described hereafter. It avoids the problem of initializing switched capacitors and can be integrated more easily than digital controllers.
II. P DESCRIPTION OF THE ADAPTIVE FEEDBACK FILTER The dynamic characteristics of the switching power
cells can be suitably described in the discrete time and in the Z-transform domain when the small signal approximation is adopted [8, 9]. Although not commonly implemented, the feedback network can be profitably synthesized by means of a switched capacitor recursive filter [10]. In this case, the Nyquist frequency of the filter is naturally synchronized to the switching frequency of the power cell.
The block scheme of an nth order recursive filter and a possible implementation of a 2nd order network are reported in figures 1a and 1b.
DELAYT
DELAYT
DELAYT
+ +δ0
δ1
δ2
δn
γ0
γ1
γ2
γn
IN OUT
a)
Q
Q
vref vref
vrefvrefVout
R0a
R0b
vref vref
Q
Q
R1a R1b
R2a R2b
Ve
Rfoc
c
c
c
c
c
c
Rfoc
b) Figure 1: a) schematic representation of an nth order discrete time recursive filter and, b) 2nd order switched capacitor recursive filter
Adaptive Control of Power Converters by SwitchedCapacitors Filters*
978-1-4244-1668-4/08/$25.00 ©2008 IEEE
822
The transfer function of the circuit in b) is
ca
cac
fo
cb
cb
cbc
acfo
ca
cfo
ca
cfo
cb
cfo
cb
cfo
cb
cfo
ca
cfo
YzYRz
YzYzYYR
RR
zRR
z
RR
zRR
zRR
RR
zH
21
221
20
0
21
2
21
2
0
0
)(++
++=
++
++
= (1)
with cij
cij RY 1=
By varying the resistors cijR or their corresponding
admittances cijY , the DC gain, the zeros and the poles of
( )zH can be modified at will. With the aim of proposing an adaptive filter, and just
for giving an example of realization, each resistor of the circuit can be replaced by a programmable operational transconductance amplifier (OTA), easily integrable on a chip. An example of digital programmable OTA is shown in figure 2 [11]. Many other solutions are proposed in the literature, f.i. [12-15].
The values of the input variables, f.i. input voltage and output current in the case of DC/DC voltage converters, can drive the OTAs.
The pairing of input variable readouts with the programmable filter commands can be done by a look-up table. The discretization of the inputs can be simply obtained by a few fast comparators.
Large differences of dynamic behaviours may depend on the status of the input variables, mainly when a variation of the inductor current conduction mode appears. Other programmable switched capacitor filter schemes are reported in the literature, f.i. [16-22], with emphasis on various aspects of the integration.
VDD
VSS
B0
VPOL
B1B2
B3
VR
VZ
Figure 2: digitally programmable OTA
Figure 3 shows the block scheme of an adaptive
controller based upon programmable switched capacitor filter.
LookupTable
Vin
Iout
Vout
MOSFET
n1
n2
k DigitallyProgrammableSwitched Capacitors Filter
Analog Voltageto Pulse Width,
Converter
or Phase Shift,or Frequency
FlashComparators
n1 Levels
FlashComparators
n2 Levels
to
Drivers
Figure 3: switched capacitors adaptive controller for DC/DC converter
The operating ranges of the input variables inV and
outI are subdivided respectively in 1n and 2n discretization levels by means of fast comparators. Each of the resulting 21 nnn ⋅= subsets can be associated to a specific transfer function of the external feedback that optimizes the dynamics within the selected operating area. In most cases 126 ≤≤ n provides a significant improvement due to adaptive control. The look-up table drives the digital programmable filter according to the running readouts of the inputs. The input variable readings can be updated period after period or on the base of averages in a few periods depending on specific characteristics of load and input voltage sources. The commutation of the filter only involves the switching of the programmable OTAs and has no impact on the capacitor voltages in the delay chain. Hence, no initialization or settling time effect of the analog memories occurs. The OTAs switching commands can be adjusted to avoid spikes at the input of the error amplifier. In correspondence to large signal transients, dedicated up/down fast recovery paths can be activated bypassing all of the capacitor voltages in the delay chain.
The hard and tedious work of defining a transfer function set covering all the subsets within the operating range has to be delegated to an automatic analysis and computer aided control design software. The suggested tool is FREDOMSIM, which adopts a state space discrete time model, as described in the literature with many proofs of accuracy in the case of fixed frequency PWM converters [9, 23, 24]. The adaptive control technique described here is applicable also to variable frequency converters.
III. P A SIMPLE EXPLANATORY APPLICATION The power cell of a 60W flyback converter switching at
68=sf kHz is show in figure 4.
Vin
M
CL
n
D
Ds
s
zs
magD
C IC CL
n=8/63
o1 o2f
f load
C =1nFsL =530uHmag
C =1000uFo1
C =1000uFo2
C =100uFf
L =2.2uHf
DCV =136V-184Vin
I =0A - 5Aload
V =12Vout
M: STP9Nk70ZFPD: STPS2H100
Figure 4: schematic of the flyback converter ST Microelectronics EVALSTSR30-60W
The working area involves the DCM and the CCM
operating modes and it was divided in 6 subsets ( 21 =n , 32 =n ). The frequency response forecasts were obtained by FREDOMSIM in correspondence to 6 operating points each of them belonging to one subset. Two predictions of control-to-output voltage frequency responses, )2( fjGco π , are shown in figure 5 together with relevant measurements of gain and phase. In 5a, the inductor current is continuous; in 5b, it is discontinuous. The dynamic differences in the two cases are quite strong.
823
101 102 103 104 105-20
0
20
40
60M
agni
tude
[dB
]Control to Output Voltage
101 102 103 104 105-300
-200
-100
0
Frequency [Hz]
Pha
se [d
eg]
Experimental DataFREDOMSIM Forecast
a)
101 102 103 104 105-20
0
20
40
60
Mag
nitu
de [d
B]
Control to Output Voltage
101 102 103 104 105-300
-200
-100
0
Frequency [Hz]
Pha
se [d
eg]
Experimental DataFREDOMSIM Forecast
b) Figure 5: control-to-output dependencies: a) at VVin 136= ,
AIload 5= (CCM) and, b) at VVin 184= , AIload 5.0= (DCM)
The control-to-output transfer function in the Z-domain
( cTsez ⋅= , sfT sc μ706.14/1 == ) at VVin 136= ,
AIload 5= is:
0.4959) 0.7469z-0.9872)(z-0.8414)(z-(z0.2899)0.8965)(z-15)(z-0.23152(z-)( 2 +
+=zGa
co (2)
and at VVin 184= , AIload 5.0= is:
0.05743)0.7659)(z-0.9918)(z-(z0.9596)-1.6337z(z)(
+=zGb
co (3)
The following optimizing transfer functions of the
external feedback networks have been chosen respectively:
0.719)-0.9984)(z-(z0.3755)-0.9875)(z-0.023401(z)( =zH a
ext (4)
0.9984)-0.9603)(z-(z0.9917)-0.77)(z-0.10047(z)( =zH b
ext (5)
In both cases, the compensation networks allow
reaching a DC gain close to 100 and insert a dominant pole at a lower frequency than that of the power cell that is cancelled by a new zero. Another zero is placed close to the second pole of the power cell and finally a high frequency pole is added. The results on the phase margin can be appreciated in the loop gain and phase forecasts shown in figure 6 for the two operating points considered in this example.
100 101 102 103 104-50
0
50
Mag
nitu
de [d
B]
Loop Gain
100 101 102 103 104-300
-200
-100
0
Frequency [Hz]
Pha
se [d
eg]
a)
100 101 102 103 104-50
0
50
Mag
nitu
de [d
B]
Loop Gain
100 101 102 103 104-300
-200
-100
0
Frequency [Hz]
Pha
se [d
eg]
b) Figure 6: loop gain dependencies: a) at VVin 136= ,
AIload 5= (CCM) and, b) at VVin 184= , AIload 5.0= (DCM)
The use of a single time-invariant network up to
guaranteeing stability over the whole operating area would lower the bandwidth very much.
IV. CONCLUSIONS An analog approach to adaptive feedback for IC
controller drivers devoted to switching power converters has been based on programmable switched capacitor networks. This solution is alternative to digital adaptive control, more simple and free from processing delay. The possibility of synthesizing the feedback network in the discrete time and in the Z-transform domain copes well with exact modelling of the power cells and takes profit from the availability of automatic dynamic analysis and CAD tools. Such facilities make the design easier, even though a set of models of the power cell and of corresponding transfer functions of the feedback network have to be identified. The capacity of promptly facing the large signal transients is an additional merit. The control procedure is based upon a set of small signal linear models in the discrete time, a step forward as compared with only one averaged model in the continuous time considered for usual dynamic optimization. Complete guarantee of overall stability is approached but not reached as it implies non-linear analysis and Lyapunov criteria. The work is supported by an application example, dynamic simulations and some experimental results. For explanatory simplicity, the order of the circuit in the given example has been limited to the second. It can be easily increased according to the dynamics of the considered switching cell and taking into account possible requirements due to filters and loads. The implementation of a circuit suited to monolithic integration is in progress.
824
REFERENCES [1] A. Fratta, G. Griffero, S. Nieddu, "Comparative analysis among
DSP and FPGA-based control capabilities in PWM power converters", 30th Annual Conference of IEEE, Industrial Electronics Society, 2004. IECON 2004, Volume 1, 2-6 Nov. 2004 Page(s):257 - 262 Vol. 1
[2] L. Yan-Fei, P.C. Sen, "Digital control of switching power converters", Proceedings of 2005 IEEE Conference on Control Applications, 2005. CCA 2005, 28-31 Aug. 2005 Page(s):635 – 640
[3] D.S. Padimiti, M. Ferdowsi, "Review of digital control techniques for automotive DC-DC converters", Vehicle Power and Propulsion, 2005 IEEE Conference, 7-9 Sept. 2005 Page(s):5 pp.
[4] D. Maksimovic, R. Zane, "Small-Signal Discrete-Time Modeling of Digitally Controlled PWM Converters", IEEE Transactions on Power Electronics, Volume 22, Issue 6, Nov. 2007 Page(s):2552 – 2556
[5] H. Peng, A. Prodic, E. Alarcon, D. Maksimovic, "Modeling of Quantization Effects in Digitally Controlled DC–DC Converters", IEEE Transactions on Power Electronics, Volume 22, Issue 1, Jan. 2007 Page(s):208 – 215
[6] A. Peterchev, S. Sanders, "Quantization resolution and limit cycling in digitally controlled PWM converters", IEEE Transactions on Power Electronics, Volume 18, Issue 1, Part 2, Jan. 2003 Page(s):301 – 308
[7] B. Patella, A. Prodic, A. Zirger, D. Maksimovic, "High-frequency digital PWM controller IC for DC-DC converters", IEEE Transactions on Power Electronics, Volume 18, Issue 1, Part 2, Jan. 2003 Page(s):438 – 446
[8] D. Maksimovic, "Computer-aided small-signal analysis based on impulse response of DC/DC switching power converters", IEEE Transactions on Power Electronics, Volume 15, Issue 6, Nov 2000 Page(s):1183 - 1191
[9] Maranesi, “Small-signal circuit modelling in the frequency-domain by computer-aided time-domain simulation”, IEEE Transaction on Power Electronics, vol. 7, no 1, pp. 83–88
[10] P.G. Maranesi, L. Pinola, V. Varoli, "Switched filter for the compensation of power processors", IEEE Transactions on Power Electronics, Volume 5, Issue 3, July 1990 Page(s):253 – 259
[11] Roberto Lojacono, Mario Salemo, Fausto Sargeni, "A Novel Architecture of Digitally Programmable Continuous-Time OTA-C Filters", Proceedings of the 37th Midwest Symposium on Circuits and Systems, 1994, Volume 2, 3-5 Aug. 1994 Page(s):1103 - 1106 vol.2
[12] F. Saregni, "Digitally programmable transconductance amplifier for CNN applications", Electronics Letters, Volume 30, Issue 11, 26 May 1994 Page(s):870 – 872
[13] H. Elwan, G. Weinan, R. Sadkowski, M. Ismail, "A CMOS digitally programmable class AB OTA circuit", Conference on Microelectronics, 1999. ICM '99. The Eleventh International
[14] D. Yunbin, S. Chakrabartty, G. Cauwenberghs, "Three-decade programmable fully differential linear OTA", Proceedings of the 2004 International Symposium on Circuits and Systems, 2004. ISCAS '04, Volume 1, 23-26 May 2004 Page(s):I - 697-700 Vol.1
[15] E.J.van der Zwan, E.A.M Klumperink, E Seevinck, "A CMOS OTA for HF filters with programmable transfer function", IEEE Journal of Solid-State Circuits, Volume 26, Issue 11, Nov. 1991 Page(s):1720 - 1723P.
[16] Joarez B. Monteiro, Antonio Petraglia, Carlos A. Leme, "A Digitally Programmable IIR Switched Capacitor Filter for CMOS Technology", The 2001 IEEE International Symposium on Circuits and Systems, 2001, ISCAS 2001, Volume 1, 6-9 May 2001 Page(s):69 - 72 vol. 1
[17] K.H. Loh, R.L. Geiger, "A CMOS transconductance-C integrator structure with wide-band programmability and phase lead/lag compensations", IEEE International Sympoisum on Circuits and Systems, 1991, 11-14 June 1991 Page(s):2248 - 2251 vol.4
[18] K.Y. Wong, K.H. Abed, S.B. Nerurkar, "VLSI implementations of switched-capacitor filter", Proceedings. IEEE, SoutheastCon, 2005, 8-10 April 2005 Page(s):29 – 33
[19] J. Crols, M. Steyaert, "Switched-opamp: an approach to realize full CMOS switched-capacitor circuits at very low power supply voltages", IEEE Journal of Solid-State Circuits, Volume 29, Issue 8, Aug. 1994 Page(s):936 – 942
[20] A. Basu, A.S. Dhar, "Design issues in switched capacitor ladder filters", 18th International Conference on VLSI Design, 2005, 3-7 Jan. 2005 Page(s):862 – 865
[21] R. Perez-Aloe, J.F. Duque-Carrillo, E. Sanchez-Sinencio, J.M. Valverde, G. Torelli, A.H. Reyes, F. Maloberti, "Programmable time-multiplexed switched-capacitor variable equalizer for arbitrary frequency response realizations", IEEE Journal of Solid-State Circuits, Volume 32, Issue 2, Feb. 1997 Page(s):274 – 278
[22] J.B. Monteiro, A. Petraglia, "A 0.8/spl mu/m CMOS programmable IIR SC filter", Proceedings of the 2004 International Symposium on Circuits and Systems, 2004. ISCAS '04, Volume 1, 23-26 May 2004 Page(s):I - 869-72 Vol.1
[23] F. Belloni, P. Maranesi, M. Riva, "Computer Aided Control Optimisation of Power Converters", EPE (European Power Electronics and Drives) Journal, Volume 16, Issue 4, Oct. – Dec. 2006
[24] P.G. Maranesi, M. Riva,"Automatic modeling of PWM DC-DC converters", IEEE Power Electronics Letters, Volume 1, Issue 4, Dec. 2003 Page(s):97 - 100