392

CE

GEDRIVE

CSENSE

a)

DIGBT

C

E

G

EDRIVE

CSENSE

b) Figure 1. CAD reconstruction of a bare IGBT module, a);

corresponding electrical scheme, b): C, G and E indicate the collector, gate and emitter terminals, respectively.

Full Electro-Thermal Model of a 6.5kV Field-Stop IGBT Module

Alberto Castellazzi*, Emmanuel Batista**, Mauro Ciappa*, Jean-Marc Dienot**, Michel Mermet-Guyennet**

and W. Fichtner*

* Swiss Federal Institute of Technology (ETH)/Integrated Systems Laboratory, Zurich, Switzerland ** ALSTOM-Transportation/Power Electronics Associated Research laboratory (PEARL), Séméac, France

Abstract - As the integration level of power electronicsequipment increases, the coupling between multi-domain physical effects becomes more and more relevant for design optimization. At the same time, virtual analysis capability acquires a critical importance and is conditioned by the achievement of an adequate compromise between accuracy and computational effort. This paper proposes the compact model development of a 6.5kV field-stop IGBT module, for use in a circuit simulation environment. The model considers the realistic connection of IGBT and anti-parallel freewheeling diode pairs: the description of semiconductor physics is coupled with self-heating effects, both at device and module level; electro-magnetic phenomena associated with the package and layout are also taken into account. The modeling approach follows a mixed physical and behavioral description, resulting in an ideal compromise for realistic analysis of multi-chip structures. Finally, selected examples, derived from a railway traction application scenario, demonstrate the validity of the proposed solution, both for simulation of short transients and periodic operation, qualifying the model as a support tool of general validity, from system design development to reliability investigations.

Index Terms – Insulated gate bipolar Transistors, Modeling, Multichip modules, Simulation.

I. INTRODUCTION

IGBT modules are used in the development of power systems, whose optimized design requires the analysis of a broad spectrum of operational conditions, ranging from full-system investigations over many periods of operation, down to the detailed analysis of a single switching transition. An IGBT module consists of many parallel devices (IGBTs and anti-parallel diodes, acting as freewheeling elements for inductive loads), which inevitably show mismatches in their electro-thermal properties. This can affect system performance and so, it is very important to take them into account. Thorough experimental characterization is impractical and effects inside the modules are not accessible; simulation can be a very useful support tool, provided, however, that it offers an adequate balance between accuracy and computational effort.

In this paper, we first develop a comprehensive electro-thermal compact model of an IGBT module, rated at 6.5kV-600A. Then, with relevance to a railway traction application scenario, we demonstrate the capabilities of the considered approach with a variety of simulation examples.

I. MODELING

The module, Fig. 1 a), is made up of six direct copper bonding (DCB) substrates, connected pair-wise by metal bars, which also represent the collector and emitter connections to the outer world, according to the electrical scheme of Fig. 1 b). Each substrate allocates four transistors and two diodes, interconnected by bond-wires and printed tracks. They are assembled onto a common base-plate, which provides a thermal and mechanical interface towards a cooling device, while preserving electrical insulation. The assembly is embedded in a silicone gel and enclosed in a plastic case from which only the device terminals emerge. These are connected together in the application by means of a bus-bar, custom designed

978-1-4244-1668-4/08/$25.00 ©2008 IEEE

393

Figure 2. IGBT and diode cross-sectional depiction, with indication of main model components.

+-

COX

VDEPL

D

GFigure 3. Circuital solution for the modeling of voltage

dependent capacitance.

by the user. So, a substrate-pair, including the metal-bar connections, can be used as the basis for the envisaged modeling purposes.

A. Semiconductors Fig. 2 proposes a schematic cross-sectional view of the

devices, with an indication of the intrinsic components which are taken into account in developing the model. The IGBT features planar-gate field-stop technology [1], while the diode is of the emitter-controlled type [2] and also features a backside buffer layer. In building the model, the mixed physical and behavioral approach of [3] is followed, modified and extended to account for the influence of the field-stop layer and for the transient thermal behavior of the chips. Here, for the sake of brevity, only the IGBT model development is discussed. The diode model can be inferred for analogy.

The MOS section, inC in Fig. 2, is described by a behavioral model. Model parameters are the channel length, channel perimeter, gate oxide thickness, channel doping, saturation velocity and surface mobility. The temperature dependence of the carriers mobility is set differently for the bulk and channel regions [4]. To emulate the threshold-voltage shift with temperature, a relevant parameter in the analysis of parallel connected IGBTs, a controlled voltage source is connected in series to the gate terminal; it implements the relation

(300) ( )th th thV V V T (1)

with the threshold-voltage described as

2 2 2oxth Si A

ox

tV q N (2)

where tox is the thickness of the gate-oxide, ox and Si the dielectric constants of the oxide and silicon, respectively, q the elementary charge and NA the doping of the channel region [5]. The temperature dependence is contained within the expression of the Fermi-potential

ln( )

A

i

NkTq n T

(3)

The various capacitance components are added externally of the behavioral model for a more accurate description. In particular, the voltage dependency of the drain-gate capacitance, which strongly affects the switching behavior of the transistors (Miller effect), is described as:

1 DEPLDG OX

DG

dVC C

dV (4)

where COX indicates the gate-oxide component, VDG the applied drain-gate voltage and VDEPL, the voltage across the depletion region. Its value is determined as a function of the charge in the depletion region for positive values of VDG; it is set to zero for VDG<0 [3, 6]. The corresponding equivalent circuit schematic is reported in Fig. 3 [7].

The doping profile in the base NB(x), assumes an exponential profile for the buffer layer:

0( ) expB SUB BUFF

w xN x N N

L (5)

with LF describing the decay of the buffer layer doping profile into the base. It holds

SUB

BUF

BUFF

NN

wL

ln (6)

while is a fitting parameter. The total charge density in the depletion region is calculated from (4) and also takes in count the hole-current contribution. The BJT section includes the collector current, ipC in Fig. 2, described as in [3]. On the p+ emitter side, in view of the reduced carrier lifetime in the base of punch-through-like transistors, this current is modeled with an ambipolar recombination component, iB, including a contribution due to the

394

a)

b)

c)

Figure 5. Simulated substrate current density distribution, a) diode on-state (IGBTs “OFF”), b) IGBTs on-state (diode

“OFF”). In c), equivalent compact model schematic.

E

C

Figure 4. Circuit schematic for the overall IGBT compact model .

diffusion of holes in the buffer layer and to the diffusion of electrons in the p+ emitter, ipBUF and inE, respectively. For these components low-level injection conditions are assumed.

The resulting overall equivalent circuit schematic of the IGBT is presented in Fig. 4.

B. Package

The extraction of package-related parasitic elements is based on the numerical electromagnetic analysis of an accurate 3D CAD model [8]. The electro-magnetic properties of the various materials constituting the module (i.e. copper layers, aluminum base-plate, ceramic substrates, silicone gel, silicon dies and bond-wires) are introduced and the structure properly meshed. Voltage and current terminals (sources and sinks) are implemented and all conduction paths identified. The solver extracts equivalent lumped elements by exciting each conductor with a unitary step function, while all others sources and sinks are grounded. Using a combination of the finite element method and the method of moments [9], magnetic and electrical fields are computed solving a quasi-static approximation of the Maxwell equations for voltage-driven problems [10]. To extract the resistance matrix, the current density is computed, for each source terminal, as

J (7)

where indicates the conductivity. The inductance matrix is computed using the relationship

V

L A JdV (8)

where A is the magnetic vector potential ( B rotA ). The capacitance matrix is extracted from the charge distribution, which is defined as

N

jjj zyxP

1

),,( (9)

with Pj and j indicating, respectively, a unitary charge pulse and an unknown charge coefficient for the j-thelement, the spatial charge density and N the total number of elements in the mesh. The dielectric properties of the silicone gel are also considered. Fig. 5 a) and b) display the simulated current density (DC) within the structure; the silicon chips are transparent, the color scale relates to the copper tracks. The model also accounts for inductive and capacitive coupling between tracks, towards ground and includes the description of high-frequency effects (e.g. skin effect) for both R and L components. The resulting equivalent compact model is schematically shown in Fig. 5 c).

395

a)

b)

c)

Figure 6. Schematic representation of the thermal evolution of the device as a response to an input power dissipation PD(t), a);

physical approach to extract the equivalent ZTh,JA(t), b); equivalent compact model of ZTh,JA(t), c).

Figure 7. Data-sheet (top) and simulated (bottom) IGBT output characteristics at two different temperature values

C. Thermal Issues We distinguish between short timescales and longer

ones: for the components under analysis, the limit can be indicatively set at 500 μs. In the first case, only the thermal response of the silicon chips is of interest. Its description relies on the assumption of temperature independent properties of the components. The chip junction temperature is interpreted as the response of a linear system to the power dissipation PD(t), as schematically represented in Fig. 6 a). In this approximation, the junction-to-ambient thermal impedance of the chips, ZTh,JA(t), corresponds to the unit step-function response, yielding

,

0

( )( ) ( )

tTh JA

J A DdZ t

T t T P ddt

(10)

where TA is ambient temperature. The ZTh,JA(t) of the silicon dies is extracted according to the physical approach schematically described in Fig. 6 b): the chip is subdivided into a proper number of layers, each of them associated with a thermal resistance RTh,i and a thermal capacity CTh,i [11]. One main advantage of this approach,

indicated in Fig. 6 c), resides in the fact that there exists an exact correspondence between each node of the resulting thermal RC-network and a physical location inside the semiconductor components; thus, different temperature dependencies can be introduced for the equations describing different portions of the devices (e.g., the channel and the backside emitter regions of the IGBT). That is very important for the correct description of fast transient events, such as short-circuit, for instance, where consistent heat-generation takes place, mainly confined, however, to the surface region of the device; in view of the short timescales involved, some microseconds, the temperature increase at the bottom of the device is negligible.

For longer timescales, a valuable example of compact thermal model extraction for a complete assembly is discussed in [13]: it relies on finite element simulation and includes the thermal coupling between all chips.

II. MODEL VALIDATION

IGBT and diode model fitting and validation was carried out with relevance to data-sheet information, which reports “typical” data. A comparison of data-sheet and simulated output-characteristics is provided in Fig. 7 for the IGBT. Two temperature values are considered, 25°C and 125°C. In view of the simplified nature of the model, which is intrinsically required by its intended application, that is, the simulation of multi-chip assemblies, the level of agreement is deemed satisfactory.

III. SIMULATION RESULTS

The following examples are derived from railway applications. The load, typically a 3-phase ac-motor, is of inductive nature and requires a sinusoidal input current of

396

a)

b)

c)

d)

Figure 9. Simulation results: PWM drive signal and corresponding load current for one period of operation, a);

collector current, IC, collector-emitter voltage, VCE, and gate-emitter voltage, VGE, during a turn-off transition, b); turn-on

current waveforms for two IGBTs in a substrate pair, c); current and junction-temperature waveforms for the same IGBTs during a

short-circuit event, d).

a)

-12

-8

-4

0

4

8

12

0 1 2 3 4 5 6 7 8 9 10time [ms]

PWM

Sig

nals

[V]

b)

Figure 8. Circuit schematic of an inverter leg, a); basic waveforms for the production of the required PWM driving

signal, b).

variable amplitude and frequency. Inverters are used to create the necessary waveform from a dc input voltage. The simplified circuit of Fig. 8 a) is used to reproduce the behavior of one inverter phase. The high-side switch corresponds to two substrates (8 IGBTs and 4 diodes, see Fig. 1); the low-side switch is a single device, properly scaled. The pulse-width-modulation (PWM) command sequence is obtained with a basic sinus-triangle modulation: the intersection points between the two waveforms in Fig. 8 b) determine a transition in the driving signal, from low to high or vice versa.

Fig. 9 a) reports the PWM drive signal and the resulting inductor current for one period of operation of the inverter leg. Fig. 9 b) displays turn-off switching waveforms: collector current, collector-emitter voltage and gate-emitter voltage. Typical effects such as the voltage overshoot, the short current tail of field-stop devices and the appearance of the Miller-plateau can be recognized. Coupling with self-heating effects is required for a realistic rendering of such effects, too. Fig. 9 c) proposes a detail of the current distribution between two IGBTs of the substrate pair at turn-on: the differences are due solely to the mismatch of the drive and power path length. This unbalance becomes significant in some operational modes,

397

such as short-circuit. In this case, the transistors dissipate a large amount of power and the junction temperature rapidly increases up to critical values. Simulation results for short circuit current and temperature are shown in Fig. 9 d): the effect in terms of thermal stress (i.e. reliability) due to parasitic effect related unbalances are manifest.

IV. CONCLUSIONS

This paper has proposed the comprehensive electro-thermal compact model development of a multi-chip 6.5kV IGBT module. It includes all main electro-thermal and electro-magnetic effects associated with the switching operation of IGBT modules in power conversion systems. At the same time it offers a good compromise between accuracy and computational effort. Selected examples have demonstrated its versatility and usefulness as a support tool in various lines of investigation, ranging from reliability analysis to overall system design.

REFERENCES

[1] T. Laska, M. Munzer, F. Pfirsch, C. Schaeffer, and T. Schmidt, “The field stop IGBT (FS IGBT) – A new power device concept with a great improvement potential”, Proc. IEEE International Symposium on Power Semiconductor Devices and ICs, Toulouse, France, May 22–25, 2000 (ISPSD 00).

[2] A. Porst, F. Auerbach, H. Brunner, G. Deboy, F. Hille, “Improvement of the diode characteristics using Emitter-Controlled Principles (EmCon Diode)”, Proc. IEEE International Symposium on Power Semiconductor Devices and ICs, Weimar, Germany, May 26-29, 1997 (ISPSD 97).

[3] R. Kraus, P. Türkes, J. Sigg, “Physics-Based Models of Power Semiconductor Devices for the Circuit Simulator SPICE”, Proc.

PESC 98, IEEE Power Electronics Specialists Conference, Fukuoka, Japan, 1998.

[4] V. Benda, J. Gowar, D. A. Grant, Power Semiconductor Devices – Theory and Applications, John Wiley & Sons, Chichester, England, 1999.

[5] S. M. Sze, Physics of Semiconductor Devices, J. Wiley & Sons, New York, 1981.Baliga

[6] B. J. Baliga, Power Semiconductor Devices, PWS Publishing Company, Boston, MA, 1996.

[7] A. Castellazzi, Y. C. Gerstenmaier, R. Kraus, G. Wachutka, “Reliability Analysis and Modeling of PowerMOSFETs in the 42V-PowerNet,” IEEE Transactions on Power Electronics, Vol. 21, No. 3, May 2006.

[8] E. Batista, A. Castellazzi, J. Dienot, M. Ciappa, W. Fichtner, Accurate Mixed Electrical and Electromagnetic Model of a 6,5kV IGBT Module, in Proc. of the 7th International Conference on Power Electronics (ICPE 2007), Daegu, South Korea, October 2007.

[9] Q3D Extractor, Ansoft Corporation, Technical Notes. [10] P. Böhm, G. Wachutka, “Numerical Analysis Tool for Transient

Skin Effect Problems”, Proc. PESC 04, IEEE Power Electronics Specialists Conference, Aachen, Germany, 2004.

[11] A. Hefner, D. Blackburn, “Thermal Component Model for Electrothermal Network Simulation”, IEEE Transactions on Components, Packaging and Manufacturing Technology, Part A, Vol. 17, No. 3, 1994.

[12] M. Ciappa, W. Fichtner, T. Kojima, Y. Yamada, Y. Nishibe, “Extraction of accurate thermal compact models for fast electrothermal simulation of IGBT modules in Hybrid Electric Vehicles”, Microelectronics Reliability 45 (2005), 1694 – 1700.J. Clerk Maxwell, A Treatise on Electricity and Magnetism, 3rd ed., vol. 2. Oxford: Clarendon, 1892, pp.68–73.