Efficient Algorithms For Testing The Two-Level Carry Skip Adder

Daniela Elena PopescuUniversity of Oradea

Str.Armatei Romane nr.5, Oradea, 410087,email:depopescu@uoradea.ro

Abstract- The paper is the result of the author's activitiesconcerning the testing and the design for testability forComputer arithmetic systems. By applying the C-testabilityconcept, we present a method of identifying a minimal completeset of test vectors for detecting all single stuck-at faults for themulti-level Carry Skip Adder (CSkA), together with our results.

I. INTRODUCTION

Pseudoexhaustive testing techniques based on partitioning areperfectly suited for circuits structured as iterative logic arrays(ILAs), composed from identical cells interconnected in aregular pattern [3] [4].The partitioning problem is naturally solved by using everycell as a segment that is exhaustively tested. We consider one-dimensional and unilateral ILAs, that is, ILAs where theconnections between cells go in only one direction. First weassume that cells are combinational. A ripple-carry adder is atypical example of such an ILA.

Some ILAs have the useful property that can bepseudoexhaustively tested with a number of tests that does notdepend on the number of cells in the ILA. These ILAs aresaid to be C-testable [2]. The state diagram of a sequentialcircuit modeling a C-testable ILA is either a stronglyconnected graph, or it is composed of disjoint stronglyconnected graphs [2].By applying the C-testability concept, we present a method ofidentifying a minimal complete set of test vectors fordetecting all single stuck-at faults for the multi-level CarrySkip Adder (CSkA), together with our results.

Corneliu PopescuUniversity of Oradea

Str.Armatei Romane nr.5, Oradea, 410087,email:corneliupopescuguoradea.ro

II. THE C-TESTABILITY ANALYSIS OF THE ONELEVEL CARRY SKIP ADDER (CSkA)

The CSkA with one level of carry-skipping is obtained from aRCA (Ripple Carry Adder) by dividing the adder stages intoseveral blocks, which need not be of the same size, andequipping each block with carry skip logic that determineswhen the carry into the block can be passed directly to thenext block [1].A carry may skip a block, i, of size m if:

(Ai + Bi) (Ai+, + Bi+)-...- (Ai+m-l + Bi+m-l) =D (1)=Ti Ti - --Ti+.-l =1

(T is the CYpropagate for stage i - Ti = Ai +Bi )The carry that enters (stage i + m in) block i + 1 from blocki is either the carry, Ci l, that skips block i, or is the carry,

Ci+m l that is produced by block i. The carry skip logic forevery block therefore consists of one OR gate for each Tsignal, one AND gate to combine the T signals, and an ORgate to select either source of carry. Together, theseimplement the equation:blockCY-out = T T.+1 ITi+mi Ci,1 + Ci+m-i (2)The organization of part of a carry-skip adder is shown inFig.1. The design assumes that a carry Ci is produced byequation: Ci =AiBi+(Ai, Bi)Ci, , so an extra OR gate isneeded to produce Ti7.

Fig.1

Note that in order to obtain a good result, the CY-out signalsmust be reseted before each operation (ex. By pre-charging inCMOS).The design of this adder is obtained (Fig. 1) byinterconnecting in an ILA structure the RCA cells (which areC-testable ILA) together by an external combinational logicthat give out the block carry-out signal. The fault model usedsupposes that the faulty cell is still combinational.The considered ILA is unilateral, one dimensional andcomposed of combinational cells (the ripple-carry blockstogether with the CY-skip unit that generate the carry for thenext block) with directly observable outputs, whosesequential model has m primary inputs (Ai, Bi) and one state

1-4244-0173-9/06/$20.00 ©2006 IEEE.

input (Ci,I ). The test pattern needed for complete testing theCSkA are obtained from the pseuoexhaustive test patterns thattest the ILA composed by the RCA cells, together with thetest patterns that realize the complete testing of the circuit thatgives the block carry-out signal.Based on the above mentioned and on the C-testabilityproperty, we gave in [7] the following original theorem:

Theorem 1 By adding of a supplementary AND gate (Fig.3)to the carry out of each block - whose second entry will bethe TEST entry - (the gate marked in Fig.3) of a CSkAwhose blocks' dimension is m, we obtain a C-testableCSkA; the total number of tests that detects the single

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stuck-at faults is constant and independent the number ofblocks linked together by the block carry-out logic, havingthe expression: NTCSkA= 10 + 2 m

So, in order to complete testing the single s-a-0-(1) faults ofthe CSkA we have to apply:* all the 8 tests needed for testing rhe RCA [3][6], together

with Test= 1,* the 2 tests obtained by combining the test T4 together

with Test=0 and test T5 together with Test=0.* The 2 m tests needed for testing the output of the OR

gates that gives the transfer signalsCorolary 1.1 For a n bit adder with a CSkA structure whosedimension of block i is mi, the total number of tests thatdetects the single stuck-at faults is constant and independenton n, having the following expression:

no.of blocks

10+2 Zmi (3)i=l

III. THE C-TESTABILITY ANALYSIS OF THE MULTI -

LEVEL CARRYSKIPADDER (CSkA)

Our paper focuses on finding the minimal test set fordetecting the single stuck-at 0 or 1 faults for the multi-level

Carry Skip Adder (CSkA) [1], which uses the carry skip ideafor computing the carries between blocks.The same principles used to develop the CSkA from the RCAcan be applied to develop a two-level CSkA from the basicCSkA in order to obtain further improvements. In this casethe skip blocks are grouped into superblocks, with additionalcarry-skip logic supplied for each superblock [1].Suppose we have a block size of m and a superblock size ofM.Taking into account the carry skip logic already available foreach block, and defining:

K1 =T.T1+1---Tj+mi (4)the superblock skipping condition may now be written as:Ki Ki+lj- Ki+M- = 1 (5)

Hence, the additional carry-skip logic required at thesuperblock level is the implementation of the followingequation for each superblock i:

Super -block CY -out = CI+mM_1 + Ki+M - Ci+(M- ).m-l ++ Ki KI+j ...KI+M_j Ci1

(6)This leads to the organization of Fig.2:

Fig.2

Bi+nr~~~c bloocku

C.00 X2

Fig.3

So, the design of CSkA is obtained by interconnecting in anILA structure the RCA cells (which are C-testable ILA [5])together by an external combinational logic that give out theblock carry-out signal. The fault model used suppose that thefaulty cell is still combinational.The considered ILA is unilateral, one dimensional andcomposed of combinational cells (the ripple-carry blockstogether with the CY-skip unit that generate the carry for the

next block) with directly observable outputs, whosesequential model has m primary inputs (Ai , Bi ) and one state

input ( Ci-I )-The test pattern needed for complete testing the CSkA areobtained from the pseuoexhaustive test patterns that test theILA composed by the RCA cells, together with the testpatterns that realize the complete testing of the circuit thatgives the block carry-out signal and the superblock carry-outsignal.

Based on the above mentioned and on the C-testabilityproperty, we give the following original theorem:Theorem 2 By adding of a supplementary AND gate ((the

gate marked in Fig.4) - whose output will feed thesupplementary input of the final Super-block CY-out ORgate - drived by a supplementary Test input, to eachsuperblock of a two-level CSkA, whose blocks'dimension is m, and the number of blocks in asuperblock is M, we obtain a C-testable two-level CSkA;the total number of tests that detects the single stuck-atfaults is constant and independent on the number ofblocks and superblocks linked together by the block and

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superblock carry-out logic, having the expression: NTCSkAmn (8 + 2m +M + 3)0

Test

Fig.4.Table 1

1Cnl KM-, Cm(M-)-1 K| KM- CY-in Detected Faults

T, I 0 0 0 0 0 Superblock CY-out s-a-IT2, T3 0 0 1 I 0 Superblock CY-out s-a-1, CY-in s-a-IT4, T5 1 1 1 1 1 Superblock CY-out s-a-OT6 1 1 1 1 1 Superblock CY-out s-a-OT7 0/1 0 0 ... 0 0 One of these 2 tests - depending of the parity ofT8 1/0 0 0 ... 0 1 the productM m - will detect the fault Cmm 1 s-a-

0, and the other will detect the fault Cmm 1 s-a- ITg 1/0 0 0 ... 0 1 One of these 2 tests detects Cmm 1 s-a-0, and the...I 1 0/ 1 0 0 ... 0 1 other detects the fault Cmm 1 s-a-I

TI0+2m- 1/0 0 0 ... 0 1 One of these 2 tests detects Cmm s-a-0, and theTI0+2m 0/1 0 0 ... 0 1 other detects the fault Cmm 1 s-a-I

Proof: The ILA that corresponds to the 2-level CSkA isunilateral, one-dimensional and the cells are given by thesuperblocks. The test patterns for the complete testing of suchan adder can be obtained based on the test patterns that realizethe pseudoexhaustive testing of the ILAs that are composingthe adders' blocks (one level CSkA), together with the testsneeded for complete testing the superblocks' CY-skip unitlines. All these patterns are combined by using the C-testability concept. So, the complete test set for the 2-levelCSkA is composed by:1. the test pattern for pseudoexhaustive testing RCA adders

that build the adder blocks (8)2. the complete test set obtained by deterministic methods

that permits the detection of the single stuck-at faults ofthe blocks' CY-skip unit lines, whose number depends onthe dimension (m) ofblocks

3. the complete test set obtained by deterministic methodsthat permits the detection of the single stuck-at faults ofthe superblocks' CY-skip unit lines, whose numberdepends on the dimension () of superblocks

In Fig.4 we have marked the faults that must be detected inthe CY-skip logic of the superblock (in order to completetesting it for the s-a-0 (1) detection ). In the Table 1 we givethe synthetic analyze of the faults that are detected by the teststhat were identified for the complete testing of the CSkA [5].In order to cover the faults that are not yet detected by theabove tests, we have to add the marked AND gate from Fig.4:

For detecting the s-a-0 fault for KM-,1 Cm(M-i)-1 we needfor each superblock the test:

Tio+2m+: CY-in= l and (00 00 .. 00) (II.. I1) ... (I I.. 1i),Where in brackets are grouped the operands AiBii = 0,m -1 of a block (there are 0, 1 and M-1 blocks).The test was obtained by imposing the condition ofrepeatability for the initial states of all the superblocks - cellsof the ILA that gives the CSkA.* The s-a-I detection for the signals KO, .., KM-1 is realized

by two tests imposed by the C-testability condition of the

2-level CSkA; both ofthem have C 1=I and apply to the iblock the values: Ak =Bk= 0 (k= 0,m -) and to theother blocks ( j . i ) they apply the tests:

1. Testl: For the even superblocks apply to the blocks j # ithe values: Al = 0 and B]= 1 ( I = 0,m -1 ) and in the oddsuperblocks the same values are applied to all blocks lessthe last one, where we have to apply Al 1 and B=1=.This test tests the i-th block in the even superblocks.

2. Test2: For the odd superblocks apply to the blocks j . ithe values: Al = 0 and B] = 1 ( I = 0,m -1 ) and in the even

superblocks the same values are applied to all blocks lessthe last one, where we have to apply Al 1 and B1 =1This test tests the i-th block in the odd superblocks.

The total number of these tests is (2. M) and it doesn't matterthe state of the signal Test.* The s-a-I fault for CmM 1 is detected by applying the

test TI (for example) together with the signal Test=1* The s-a-I fault for the Test signal is detected by

applying the test T4 or the test T5 (depending on theparity of (min M) ) together with the signal Test=0

* The fault s-a-0 for the output of the AND gate - thatgenerate the signal KO...* KM-1 CmM_1 - is detected byeither of the tests T4, or T5, or T6, together with Test= 1

So, the total number of tests needed for testing the 2-levelCSkA is: (11+2.m+2.M).

We give in Fig.5. the algorithm for obtaining the set of testvectors for an n bit two-level CSkA that has the blocks'dimension m and the superblock dimension M:

Test Generation Algorithm CSkA on 2 levelsOBeginFor each i stage( i O,n 1) ofthe adder {

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Set Ai = O, Bi =0, Test =and C10=TbeApply the obtained test

For each i stage ( i = O, n- 1) ofthe adder (

Set Ai = 0, Bi = 1, Test = I and C1Apply the obtained test

Set C-1 =1 ,Apply the obtained test

Set Test O, Apply the obtained testFor each i stage( i = O, n- 1) ofthe adder (

Set Ai = 1, Bi = 0, C_1 = O and TestApply the obtained test

Set C-1 = 1, Apply the obtained test

Set Test 0, Apply the obtained testSet Test= 1For each i stage( i O,n 1) ofthe adder (

Set Ai = 1, Bi 1 and C-1 = 0Apply the obtained test

01

:11

Set i=ORepeat

Set Ai 1, Bi = 1, Ai+1 = 0, Bi+j = 1, i=i+2

until i 2 nApply the obtained test

Set Cl = 1, i=0Repeat

Set Ai =1, Bi = 0, Ai+1 = 1, Bi+1 = 1, i=i+2

until i 2 nApply the obtained test

Set C-1 = land Test = 0For each i, (i=l,m) stage ofthefirst block ofeach superblock, {

Set the values Ai = ° and Bi = 01For each i, (i=l,m) stage ofthe others j blocks ofeach superblockst

Set the values Ai 1 and Bi = IApply the obtained test]

Set Test = 1For each j (j = m ) block{

For thej stage ofeach block (set Ai = 0, B1 = 011

For each block j j = 1, m Do tFor (i = 1, m),i (j setfor the i stage ( Ai = 0, Bi 1=

For the last stage ofeven blocks (set: Am = 1, Bm = 1Apply the obtained testInverse the input values from the last stage of even blocks with those

from the odd blocksApply the obtained test]]

I*for superblocks with Mblocks (M=constant)Set C-1 = 1

For each superblockj, (j = 1,M ) do

For the blockj, For i = (1, m) (set Ai = 0, Bi = 0

For each block k, (k j) , k =(1, M) (set Ai=0 , Bi 1,

i (l,m)}For all i stage of the last block of the even superblocks (set Ai = 1,

Bi =1]Apply the obtained testInverse the input values from the last stage of even blocks with those

from the odd blocksApply the obtained test]

end

Fig.5.

In Table 2 we give some comparative figures for the numberof tests needed for complete testing the 2-level CSkA [5]:

Width (n)

Group Ml M2 M3dimension.~~~~ . I Im M I

16 2 2 65 324 65 32

4 2 129 51232 2 2 129 32

4 129 328 129 32

4 2 257 5124 257 512

8 2 2049 21764 2 2 257 32

4 257 328 257 3216 257 32

4 2 513 5124 513 5128 513 512

8 2 4097 2174 4097 217

16 2 221+1 i23Where the columns 1,2 and 3 means:Ml. Testing using path activation based on logic partitioningM2. Testing With Constant weight PatternsM3. C-testability method

4. CONCLUSIONS

The applying of the C-testability concept for determining thecomplete tests set for detection of the singular stuck-at faultsin the two-level CSkA permits to obtain a number of tests,which can be used in testing a two-level CSkA of any size.This leads to an important gain in time testing for such anadder.

REFERENCES

[1] Omondi, A. R., (1994), Computer Arithmetic Systems -Algorithms, Architecture and Implementation, PrenticeHall International, pp.39-49

[2] Friedman, A.D., (1973), Easily Testable IterativeSystems, IEEE Trans on Computers, Vol. C-22, No.12,pp.1061-1064, Dec.1973

[3] Abramovici, M., Breuer, M.A., Friedman, A.D., (1996),Digital Systems and Testable Design, Computer SciencePress, pp.97-110

[4] V. A. Zivkovic, R. J. W. T. Tangelder, H. G. Kerkhoff,Test-Pattern Generation and Fault CoverageDetermination, Embedded Cores, IEEE European TestWorkshop, Constance, Germany, May 1999, Paper 13 4

[5] Popescu D, (1998), Contributions to the computer aideddesign and to the testable synthesis of computers withhigh reliability- PhD theses

[6] D.E.Popescu, C.Popescu, A Minimal Testing Techniquefor Single Stuck-At Faults in a Pyramidal CarryLookahead Adder (PyCLA), 47th IEEE Int. MidwestSymposium on Circuits and Systems; MWSCAS-2004;Hiroshima, July 25-28, IEEE Catalog no. 04CH37540C,ISBN: 0-7803-8347-8 (CD-ROM), pp: 111-439-442, 2004

[7] Popescu, D. and Popescu, C, (2000), An Efficient Algorithm forTesting The Carry Skip adder, A&QOO, InternationalConference and Quality Control, QUALITYj Design andDevelopment, Tome I, Cluj, pp. 51-56

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Table 2