2
g4 Proceedings 1997 IEEE International SO1 Conference, Oct. 1997 Characterization of interface traps in SO1 material K. Vanheusden”, W.L. Warren”, W.M. Shedd”, R.D. Pugh”, D.M. Fleetwood*’, J.R. Schwank”, R.A.B. Devine3’ 1) US Air Force Phillips Laboratory, Space Mission Technologies Division 3550 Aberdeen Ave., Kirtland AFB, Nh4 871 17-5776 USA 2) Sandia National Laboratories, Albuquerque, P. 0. Box 5800, Nh4 87 185- 1083 USA 3) France TClCcodCNET, B. P. 98,38243 Meylan Cedex, France Understanding the physics and chemistry of interface traps is crucial for the optimization of device performance. At the Si( lOO)/Si02 interface of standard thermally oxidized Si, two point defects denoted P,, and Pb, have been characterized microscopically using electron paramagnetic resonance (EPR) [ 11. In SO1 material, the presence of interface traps at the buried oxide layer interfaces has been demonstrated from electrical data [2]. More recently, the Pb, and Pb, interface defects were identified at the buried oxide interfaces in SO1 material [3]. In this study we use heat treatment under high-vacuum (instead of an inert ambient such as Ar) as a tool to enhance the buried interface trap density in the SO1 material. The results provide new insights into the microscopic, chemical, and electrical signature of these interface traps in SOI. The SO1 material we chose for this study was Unibond@ formed by implanting hydrogen (- 6 x IO” cm”) into a wafer, below a thermally grown SiO, layer (300 nm thick), followed by bonding of this wafer to another wafer. Splitting of the first wafer occurs at the boundary defined by the implant. Finally a high .temperacure anneal at 1100 “C is used to strengthen the bonding interface. A standard 25-nm dry thermal oxide was used for comparative analysis. The advantage of using unibond SO1 is that it can be argued that its buried oxide resembles a thermal oxide better than the implanted buried oxides used in other forms of SOL However, more general results on a wide range of high-temperature-annealed Si/SiO2/Si structures will also be presented at the conference. Pieces of a wafer were annealed in vacuum (2-3 x 10“ torr) or in a flow of forming gas (N, + 5 % H2) for a given time and temperature. Current-voltage (I-V) characteristics were measured using the point-contact transistor method [4]. Two metal probe tips are placed on the top Si layer to form the source and drain point contacts (V, = 0.2 V), while the substrate and the buried oxide act as gate and gate oxide respectively (see Fig. 1). EPR measurements were performed at room temperature with an X-band (9.43 GHz) Bruker spectrometer. A high-vacuum anneal at 750 “C for 6 hours generates a significant number of PbO and P,,, interface defects (2 x lo’, cm-3, as can be seen from Fig. 2 a and b. A comparison of the effect of an identical vacuum anneal on dry thermal oxide versus the buried oxide is shown in Fig. 3. This comparison shows that the buried oxide interfaces have a higher relative density of Pb,, but that the overall P, densities are comparable. Figure 4 shows I-Vdata taken on the same samples as the ones used in Fig. 2. The distance AV between the intercepts of the curves with the voltage axes (difference between flat-band and threshold voltage) provides a rough measure of the density of interface traps at the top-Sihuried oxide interface (D,,) [4]. The additional width of the diy after the high-vacuum anneal (Fig. 4 b) is thus calculated to correspond to a D,, of the order of 1 x 10l2 cm’ . Figure 2 c shows how a subsequent anneal in forming gas at 600 “C for 30 min strongly reduces the P,, density while the density of P, defects remains unaffected. The electrical data in Fig. 4 c for the same sample show how the forming gas anneal reduces the broadening observed following the vacuum anneal: i.e., it eliminates the electrically active interface traps generated by the vacuum anneal. The generation of paramagnetic Pb, and Pb, in these structures upon annealing in high vacuum is attributed to the depassivation reaction Pb-H -+ Pb + Ho [5]. The subsequent 600 “C forming gas anneal reverses this reaction for Pb, but not for Pbp (Fig. 1 c), an effect reported earlier in thermal oxide samples [j]. The electrical data suggest a close correlation between D, and Pbl but not with Pb,,. This is an important new observation and can be interpreted in two ways. First, the Pb] center may be primarily located at the top Si interface where it is in direct electrkal contact with the top Si layer and will affect D, as derived from the pseudo I-V characteristics, while Pbo would be primarily located at the opposite substrate interface. Second, both defects may be present at both interfaces, but the Pb, center may simply not be electrically active under these experimental conditions. At present, the latter explanation seems the most reasonable, which would 0-7803-3938-X 97CH36069

[IEEE 1997 IEEE International SOI Conference Proceedings - Fish Camp, CA, USA (6-9 Oct. 1997)] 1997 IEEE International SOI Conference Proceedings - Characterization of interface traps

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Page 1: [IEEE 1997 IEEE International SOI Conference Proceedings - Fish Camp, CA, USA (6-9 Oct. 1997)] 1997 IEEE International SOI Conference Proceedings - Characterization of interface traps

g4 Proceedings 1997 IEEE International SO1 Conference, Oct. 1997

Characterization of interface traps in SO1 material

K. Vanheusden”, W.L. Warren”, W.M. Shedd”, R.D. Pugh”, D.M. Fleetwood*’, J.R. Schwank”, R.A.B. Devine3’

1 ) US Air Force Phillips Laboratory, Space Mission Technologies Division 3550 Aberdeen Ave., Kirtland AFB, Nh4 871 17-5776 USA

2) Sandia National Laboratories, Albuquerque, P. 0. Box 5800, Nh4 87 185- 1083 USA 3) France TClCcodCNET, B. P. 98,38243 Meylan Cedex, France

Understanding the physics and chemistry of interface traps is crucial for the optimization of device performance. At the Si( lOO)/Si02 interface of standard thermally oxidized Si, two point defects denoted P,, and Pb, have been characterized microscopically using electron paramagnetic resonance (EPR) [ 11. In SO1 material, the presence of interface traps at the buried oxide layer interfaces has been demonstrated from electrical data [2]. More recently, the P b , and P b , interface defects were identified at the buried oxide interfaces in SO1 material [3]. In this study we use heat treatment under high-vacuum (instead of an inert ambient such as Ar) as a tool to enhance the buried interface trap density in the SO1 material. The results provide new insights into the microscopic, chemical, and electrical signature of these interface traps in SOI.

The SO1 material we chose for this study was Unibond@ formed by implanting hydrogen (- 6 x I O ” cm”) into a wafer, below a thermally grown SiO, layer (300 nm thick), followed by bonding of this wafer to another wafer. Splitting of the first wafer occurs at the boundary defined by the implant. Finally a high

.temperacure anneal at 1100 “C is used to strengthen the bonding interface. A standard 25-nm dry thermal oxide was used for comparative analysis. The advantage of using unibond SO1 is that it can be argued that its buried oxide resembles a thermal oxide better than the implanted buried oxides used in other forms of SOL However, more general results on a wide range of high-temperature-annealed Si/SiO2/Si structures will also be presented at the conference. Pieces of a wafer were annealed in vacuum (2-3 x 10“ torr) or in a flow of forming gas (N, + 5 % H2) for a given time and temperature. Current-voltage ( I - V ) characteristics were measured using the point-contact transistor method [4]. Two metal probe tips are placed on the top Si layer to form the source and drain point contacts (V , = 0.2 V), while the substrate and the buried oxide act as gate and gate oxide respectively (see Fig. 1). EPR measurements were performed at room temperature with an X-band (9.43 GHz) Bruker spectrometer.

A high-vacuum anneal at 750 “C for 6 hours generates a significant number of PbO and P,,, interface defects ( 2 x lo’, cm-3, as can be seen from Fig. 2 a and b. A comparison of the effect of an identical vacuum anneal on dry thermal oxide versus the buried oxide is shown in Fig. 3. This comparison shows that the buried oxide interfaces have a higher relative density of P b , , but that the overall P , densities are comparable. Figure 4 shows I-Vdata taken on the same samples as the ones used in Fig. 2. The distance A V between the intercepts of the curves with the voltage axes (difference between flat-band and threshold voltage) provides a rough measure of the density of interface traps at the top-Sihuried oxide interface (D,,) [4]. The additional width of the diy after the high-vacuum anneal (Fig. 4 b) is thus calculated to correspond to a D,, of the order of 1 x 10l2 cm’ . Figure 2 c shows how a subsequent anneal in forming gas at 600 “C for 30 min strongly reduces the P,, density while the density of P , defects remains unaffected. The electrical data in Fig. 4 c for the same sample show how the forming gas anneal reduces the broadening observed following the vacuum anneal: i.e., it eliminates the electrically active interface traps generated by the vacuum anneal.

The generation of paramagnetic Pb, and Pb, in these structures upon annealing in high vacuum is attributed to the depassivation reaction Pb-H -+ Pb + Ho [5]. The subsequent 600 “C forming gas anneal reverses this reaction for P b , but not for P b p (Fig. 1 c), an effect reported earlier in thermal oxide samples [ j ] . The electrical data suggest a close correlation between D, and Pbl but not with Pb,,. This is an important new observation and can be interpreted in two ways. First, the P b ] center may be primarily located at the top Si interface where it is in direct electrkal contact with the top Si layer and will affect D, as derived from the pseudo I-V characteristics, while Pbo would be primarily located at the opposite substrate interface. Second, both defects may be present at both interfaces, but the P b , center may simply not be electrically active under these experimental conditions. At present, the latter explanation seems the most reasonable, which would

0-7803-3938-X 97CH36069

Page 2: [IEEE 1997 IEEE International SOI Conference Proceedings - Fish Camp, CA, USA (6-9 Oct. 1997)] 1997 IEEE International SOI Conference Proceedings - Characterization of interface traps

Proceedings 1997 IEEE International SO1 Conference, Oct. 1997 65

imply that there is a fundamental difference in electrical characteristics between P,,) and PA,. This conclusion could have important technological implications for both SO1 and thermal oxide materials. More data and details about this difference between P,, and P,, will be presented at the conference.

[ I ] P.M. Lenahan and P.V. Dressendorfer, J . Appl. Phys. 55,3495 (1984). [2] F. T. Brady, W.A. Krull, and S . S . Li, IEEETrans. Nucl. Sci. NS-36,2187 (1989). [3] K. Vanheusden, W. L. Warren, J. R. Schwank, D. M. Fleetwood, M. R. Shaneyfelt, P. S. Winokur, and R.

[4] S. Cristoloveanu and S . S. Li, in Electrical characterization of silicon-on-insulator materials and devices,

[ 5 ] J.H. Stathis and L. Don, Appl. Phys. Lett. 58, 1641 (1991).

A. B. Devine, Appl. Phys. Lett. 68, 21 17 (1996).

Kluwer Academic Publishers, Boston, MA, 1995.

FIG. 1. Pseudo-MOSFET configuration used to measure I-V curves.

, , I . * ,

(a) initial

U .- c (b) high-vacuum anneal

- m

HI [lo01 surface

3350 3360 3370

Magnetic Field (G)

FIG. 2. EPR signals from P, defects located at the buried oxide interfaces of unibond material for various processing steps.

I 8 -

- a C

1

3350 3360 3370 Magnetic Field (G)

FIG. 3. EPR signals from P, defects generated by a 750 "C vacuum anneal at Si/Si02 interface for dry thermal and buried SiO,.

1 o5 - (a) initial

-40 -20 0 20 40

Gate Voltage (V)

FIG. 4. Current-voltage characteristics of unibond material for various processing steps, measured using the pseudo-MOSFET setup shown in Fig. 1 I