Conductivity Modulation Improvement in 6.5kV Trench UMOS Insulated Gate Bipolar Transistors

R. Natarajan and T.P. Chow Center for Power Electronics Systems

Rensselaer Polytechnic Institute Troy, NY 12 180, U.S.A.

Tel: (518) 276-2849, Fax: (518) 276-8761, Email: natarr@rpi.edu

Abstract- A low forward-drop Insulated Gate Bipolar Transistor with trench UMOS structure and blocking capability of 6.5 kV is described. The effect of various design parameters on conductivity modulation in UMOS IGBTs and the potential for higher switching efficiency through the adjustment of the excess carrier profile during forward conduction is analyzed. Results based on numerical simulation of the forward conduction, forward blocking, FBSOA and RBSOA characteristics of 6.5 kV UMOS and DMOS IGBTs in the stripe and circular cell-geometries are presented and compared.

Index Terms - UMOS IGBT, conductivity modulation.

I. INTRODUCTION

The development of 6.5 kV Insulated Gate Bipolar Transistors (IGBTs) is of interest in traction and industrial drive applications where thyristors (GTOs and IGCTs) are currently employed as power switches. The use of IGBTs provides many advantages such as ease of driving and controlling. At present, the use of IGBTs in these high voltage applications requires a series connection of multiple 3.3 kV IGBT modules for achieving the necessary blocking capability. The development of IGBTs with 6.5 kV blocking capability is thus desirable.

Recently, 6.5 kV, 600 A IGBT modules based on field stop, DMOS IGBTs have been introduced by Infineon Technologies [l]. The minimization of conduction and switching losses in 6.5 kV planar DMOS IGBTs through the adjustment of the excess carrier concentration profile has been discussed by Wikstrom et a1 [2]. In comparison to the conventional DMOS IGBTs, trench UMOS IGBTs (and IEGTs) exhibit much higher level of conductivity modulation during forward conduction while maintaining a small cell size and high channel density [3,4]. To date, the highest blocking capability for which trench IGBTs and IEGTs have been designed is 4.5 kV [5,6]. In this paper we report a new 6.5 kV, trench UMOS IGBT that offers a forward drop of less than 3 V at 30 A/cm2. Numerical simulations have been performed to study the forward conduction, forward blocking, forward-biased safe-operating-area (FBSOA) and reverse-biased safe-operating-area (RBSOA) characteristics using MEDICP. A comparison of the relative perfonnance

We gratefully acknowledge financial support from the Office of Naval Research (#NO001401 10784) and the ERC Program of the National Science Foundation (#EEC-973 1677).

of 6.5kV trench UMOS and planar DMOS IGBTs in stripe and circular cell geometries is provided and the effect of cell geometry is analyzed.

11. DEVICE DESIGN AND SIMULATION

A . Device Technology and Structure

Fig. 1 illustrates the half-cell structures of the field stop, transparent emitter DMOS and UMOS IGBTs with the various critical dimensions used in the numerical simulations. Field stop technology, which employs a trapezoidal electric field distribution under the forward blocking condition, has been used in the design of the high-voltage IGBTs for the optimization of the drift region thickness and minimization of the forward drop. The thickness and resistivity of the drift region and the n-buffer have been optimized to support a blocking voltage of 6.5 kV. Bulk n-type silicon substrate technology with doping density of the order of 10" cm-3 has been employed in the device simulations. The doping density in the buffer region in the field-stop IGBT is of the order of 10l6 cmV3. The buffer doping density has to be high enough to terminate the propagation of the depletion region under blocking conditions but low enough not to affect the emitter injection efficiency of the P-N-P bipolar junction transistor in the on-state. The high-voltage IGBTs also employ the transparent emitter concept in order to improve the resistance against parasitic thyristor latch-up.

GATE

Fig. 1. Halfcellstructure of 6.5kV IGBT devices (a) Planar DMOS (b) Trench UMOS

0-7803-731 8-9/02/$17.0002002 IEEE 121

50

1.OEO3 . I I I

-t DMOS (Stripe)

t7000 761( If i’ 0 5500 6000 6500

+ UMOS (Circular) -CUMOS (Stripe)

1.0E46’ Fig. 2. 6.5 kV IGBT forward blocking characteristics

C. Forward Conduction Characteristics

The forward conduction characteristics of the IGBTs are illustrated in Fig. 3. It can be seen that the UMOS IGBTs exhibit an extremely low forward drop that is less than 3 V at a current density of 30 Ncm2. A high-level recombination lifetime of 30 ps has been employed in the simulations. The small cell size resulting from the vertical trench gate and the absence of the parasitic JFET structure are primarily responsible for the excellent forward conduction characteristics in the UMOS devices. The extent of conductivity modulation in the DMOS and UMOS structures can be analyzed by studying the carrier concentration profile during forward conduction. Fig. 4 shows the hole concentration profile in the different IGBT structures at a current density of 30 Alcm2. The effect of injection

enhancement in the UMOS IGBT is clearly reflected in the almost thynstor-llke carrier concentration profile in the UMOS devices which is absent in the DMOS devices. Particularly important is the much higher hole concentration near the emitter of the IGBT in the UMOS structure than in the DMOS structure. The trench gate in the UMOS structures causes the accumulation of holes in the narrow n-dnft region between the trench gate walls of the IGBT. This causes an increase in the hole carrier concentration and thus results in better conductivity modulation. In the DMOS IGBT, the hole concentration near the emitter is determined by the cell- width. Though increasing the cell width in the DMOS Structure increases the hole concentration near the emitter it is also accompanied by a loss in the bloclung capability due to reduced field shielding between adjacent cells. It can also be seen from Fig. 4 that the crcular cell geometry in the IGBT results in much higher conductivity modulation and hence lower on-state drop. This is because of the convergence of the current flow path from all directions near the emitter causing

1- DMOS (Stripe) -a- UMOS (Circular) 8 UMOS (Stripe)

0.0 1 .o 2.0 3.0 4.0 5.0 VCE 01)

Fig. 3. 6.5 kV IGBT forward conduction characteristics at V0=25 V

-A- DMOS (Circular) +e DMOS (Stripe) 8 UMOS (Circular) -8- UMOS (Stripe)

0 200 400 600

Distance from Emitter (w) Fig. 4. Hole concentration profile in 6.5 kV IGBT at J=30 Ncm2

Conductivity modulation in the UMOS IGBT is related to the level of hole injection along the n-drift region. The effect of the device design parameters on the level of conductivity modulation in the UMOS IGBT can be analyzed by concentrating on the operation of the P-N-P bipolar junction transistor in the IGBT structure. In the P-N-P, a heavily

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doped p+ emitter and a lightly doped n-buffer will increase the emitter injection efficiency and thus increase hole injection. Thls improves conductivity modulation. Also, a thicker n-buffer layer causes localized (within the buffer) reduction in the base transport factor of the P-N-P and pulls down the hole concentration. This reduces the level of conductivity modulation. Near the collector-base junction of the P-N-P, the accumulation of holes between the trench gate walls increases with increasing depth of the trench gate [8]. This increases the hole concentration and improves conductivity modulation. Thus the design of the trench and buffer structures is an important leverage in tailoring the excess carrier profile and the level of conductivity modulation in the UMOS IGBT.

The optimization of these design parameters in the circular UMOS-IGBT can yield the hole concentration profile shown in Fig. 5 during the on-state which is extremely attractive for reducing the turn-off losses in the IGBT during switching [Z]. The hole concentration profile in Fig. 5 entails the removal of majority of the excess carriers during the early phase of the turn-off process when the turn-off current is still high and the voltage is still low. In addition, the low excess carrier concentration near the collector of the IGBT aids in reducing the switching losses in the tail current region of the turn-off process. Furthermore, we have achieved this optimization while maintaining an acceptable on-state voltage drop and blocking capability as illustrated by Figs. 6 and 7.

1

"- 60- 8 3 7 40-

20 .

0 100 200 300 400 500 600

Distance from Emitter (JL) Fig. 5. Hole concentration profile in low switching loss 6.5 kV IGBT at

J=30A/cm2 I I

/

0- : : ,

f l Bo /

I I

1.0E-05

1.OE-06

Fig. 7. Forward blocking characteristics of low switching loss 6.5 kV IGBT

D. SOA Characteristics

The simulated FBSOA characteristics of the DMOS and UMOS IGBTs are illustrated in Fig. 8. The FBSOA of IGBTs is controlled by the latch-up of the parasitic P-N-P-N thyristor inherent in the IGBT structure. The transparent emitter concept aids in increasing the latching current density in the IGBT. Fig .8 indicates that the UMOS devices exhibit much higher resistance to latch-up than the DMOS devices. While the DMOS IGBTs latch-up between 1000-2000 A/cm2 and lose gate control, the UMOS IGBT retain gate control even at 3000 Alcm2. The latching current density decreases inversely with the length of the n+ emitter in the IGBT 191. The n+ emitter length in the UMOS devices is only about 1 pm as compared to the DMOS devices where it is more than 4 pm. This ensures that the latching current density is extremely high in the UMOS IGBTs. It is also seen that the circular cell geometry has a lower latching current density than the stripe geometry. This is because the high hole current near the emitter due to carrier convergence causes high voltage drop in the p-base region underneath the n+ emitter resulting in early latch-up.

3000

2500

2000

T $1500 -

1000

500

0 0 5 10 15 20

VCE 0 Fig. 8. 6.5 kV IGBT FBSOA characteristics

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The simulated RBSOA characteristics are illustrated in Fig. 9. All IGBTs exhibit similar RBSOA for voltages greater than 5000V. As we approach lower voltages from BVcEo the device to show the Kirk effect influence on the SOA earliest is the UMOS circular IGBT. This is reasonable because among all variations the UMOS circular IGBT exhibits the highest level of camer concentration during forward conduction and hence is susceptible to the Kirk effect at much higher collector voltages.

.. lOO0, 1

x DMOS (Circular) WO

800

700

6 aoo 1 500

3400

So0

200

100

0 o IOW moo woo 4000 woo woo moo woo

Vc€ M Fig. 9. 6.5 kV IGBT RBSOA characteristics

nI. SUMMARY

A 6.5 kV Insulated Gate Bipolar Transistor with a forward drop of less than 3 V has been designed using the trench UMOS structure. Numerically simulated forward conduction, forward blocking, FBSOA and RBSOA characteristics of 6.5 kV UMOS and DMOS IGBTs of various cell geometries have been presented and compared The effect of various design parameters on conductivity modulation in Uh4OS IGBTs and the potential for higher switching efficiency through the adjustment of the excess carrier profile during forward conduction has been analyzed.

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[Z] T. Wikstrom, F. Bauer, S . Linder, and W. Fichtner, “Experimental study on plasma engineering in 6500V IGBTS,” Proc. Intl. Symp. Power Scmiconductor Devices and ICs, pp. 3740,2000.

[3] H.-R. Chang, and B.J. Baliga, “500-V n-channel insulated gate bipolar transistor with a trench gate structure,” IEEE Trans. Electr. Dev., vol.

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2000, pp. 25-28.

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