IEEE10thInternationalSymposiumonEmbeddedMulticore/Many-coreSystems-on-Chip(MCSoC-16)

LyonCongressCenter,Lyon,France,September21-23,2016

Day1:Wednesday,September21st2016

Day2:Thursday,September22nd2016

Day3:Friday,September23rd2016

room

SaintClair3A room

SaintClair3Aroom

SaintClair3B room

SaintClair3A

8:00 Welcome 8:00 Welcome 8:00 Welcome

9:00 Openingcomments 8:45 Keynote:Hoi-JunYoo,KAIST(KR) 8:45 Keynote:DavidAtienza,EPFL(CH)

9:15 Keynote:BenoîtDupontdeDinechin,Kalray(FR)

9:30 S2InterconnectNetworks(NoCs)I

S3:Energyefficiency

9:30 S10:InterconnectNetworks(NoCs)III

10:00 Coffeebreak

10:45 Coffeebreak

10:45 Coffeebreak

10:30 Keynote:PascalVivet,CEA-LETI(FR)

11:00 S4:BenchmarksAuto-Tuningfor

MulticoreandGPU(ATMG)I

11:00 S11:Programming

11:15Programmingmodelsandmethods

forheterogeneousparallelembeddedsystems 11:50 Closingremarks

12:30 Lunch 12:40 Lunch 12:00 Lunch

13:00 EndofIEEE-MCSoC2016

13:30Keynote:AndreasHansson,

ARM(UK) 13:45S5:InterconnectNetworks(NoCs)II S6:DesignI 14:00 visitaroundLyon(2hours)

14:15ApproachesandFrameworksforPredictableMulti-CoreProcessing 15:00

S7:EmergingTechnologiesand

Paradigms

S8:Reconfigurableandparallelcomputing

15:55 Coffeebreak 16:15 Coffeebreak

16:30 S1:Architectures 16:30 S9:DesignIIAuto-Tuningfor

MulticoreandGPU(ATMG)II

18:10 EndofDay1

18:10 EndofDay2

20:00 GalaDineratBrasserieLeSud

keynote

specialsession

technicalsession

IEEEMCSoC-2016Day1:Wednesday,September21st2016-SaintClair3A8:00 Welcome9:00 Openingcomments9:15 Keynote EngineeringaManycoreProcessorPlatformforMission-CriticalApplications Presenter:BenoîtDupontdeDinechin,Kalray(FR)10:00 Coffeebreak10:30 Keynote From3Dtechnologyto2.5Dand3Dmany-corearchitectures Presenter:PascalVivet,CEA-LETI(FR)11:15 SpecialsessiononProgrammingmodelsandmethodsforheterogeneousparallelembeddedsystems Organizer:JeronimoCastrillon,TUDresden(DE) Chairman:JeronimoCastrillon,TUDresden(DE)11:15 SupportingStaticBindinginStreamRewritingforHeterogeneousMany-CoreArchitectures LarsMiddendorf;ChristianHaubelt11:40 WhyComparingSystem-levelMPSoCMappingApproachesisDifficult:aCaseStudy AndresGoens;RobertKhasanov;JeronimoCastrillon;SimonPolstra;AndyPimentel12:05 ExplorationofSW/HWco-designsspacebysynthesisofdataflowprograms SimoneCasaleBrunet;EndriBezati;MarcoMattavelli12:30 Lunch13:30 Keynote Mindthegap Presenter:AndreasHansson,ARM(UK)14:15 SpecialSessiononApproachesandFrameworksforPredictableMulti-CoreProcessing Organizer:JürgenTeich,Friedrich-Alexander-UniversitätErlangen-Nürnberg(DE) Chairman:DavideBertozzi,UniversityofFerrara(IT)14:15 TheForeCSynchronousDeterministicParallelProgrammingLanguageforMulticores EugeneYip;AlainGirault;ParthaRoop;MortezaBiglari-Abhari14:40 PortableMulticoreResourceManagementforApplicationswithPerformanceConstraints ConnorImes;DavidKim;MartinaMaggio;HankHoffmann15:05 Language/CompilationofParallelProgramsforPredictableMPSoCExecutionusingInvasiveComputing JürgenTeich;MichaelGlaß;SaschaRoloff;WolfgangSchroederPreikschat;GregorSnelting;Andreas

Weichslgartner;StefanWildermann

15:30 ConstructingTime-PredictableMPSoCs:AvoidConflictsinTemporalControl PeterPuschner;BekimCilku;DanielProkesch15:55 Coffeebreak16:30 Session1:Architectures Chairman:GillesSassatelli,CNRS-LIRMM(FR)16:30 AFFORDe:AutomaticAllocationandFloorplanningFORSPMDArchitecture WissemChouchene;RabieBenAtitallah;Jean-LucDekeyser16:55 AccelerationofFull-PICsimulationonaCPU-FPGAtightlycoupledenvironment RyotaroSakai17:20 ImprovementofLineCodingOverheadTargetingBothRun-LengthandDC-Balance SaratYoowattana;TomohiroYoneda17:45 Dataandcommandscommunicationprotocolforneuromorphicplatformconfiguration AlessandroSiino;FrancescoBarchi;SergioDavies;GianvitoUrgese;AndreaAcquaviva18:10 EndofIEEE-MCSoC2016Day1

IEEEMCSoC-2016Day2:Thursday,September22nd2016-SaintClair3A

8:00 Welcome8:45 Keynote Brain-InspiredIntelligentSoCsandApplications Presenter:Hoi-JunHoo,KAIST(KR)9:30 Session2:InterconnectNetworks(NoCs)I Chairman:Y.Bouchebaba,ONERA(FR)9:30 AdaptiveVCOrganizationandArbitrationforEfficientNoCDesign MasoudOveisGharan;GulN.Khan9:55 HeuristicbasedRoutingAlgorithmforNetworkonChip AsmaBenmessaoudGabis;MarcSevaux;PierreBomel;MouloudKoudil;KarimaBenatchba10:20 Ascalabilityanalysisofmanycoresandon-chipmeshnetworksontheTILE-Gxplatform YeLiu;HiroshiSasaki;ShinpeiKato;MasatoEdahiro10:45 Coffeebreak11:00 Session4:Benchmarks Chairman:JürgenTeich,Friedrich-Alexander-UniversitätErlangen-Nürnberg(DE)11:00 ARobustMethodologyforPerformanceAnalysisonHybridEmbeddedMulticoreArchitectures RomainSaussard;BoubkerBouzid;MariusVasiliu;RogerReynaud11:25 ADataLocalityandMemoryContentionAnalysisMethodinEmbeddedNUMAMulti-coreSystems LinLi;MarkusFussenegger;GordonCichon11:50 Goingbeyondmeanandmedianprogramperformances JulienWorms;SidTouati12:15 High-PrecisionPerformanceEstimationofDynamicDataflowPrograms MalgorzataMichalska;SimoneCasaleBrunet;EndriBezati;MarcoMattavelli12:40 Lunch13:45 Session5:InterconnectNetworks(NoCs)II Chairman:YvesDurand,CEA-LETI(FR)13:45 PowerManagementControllerforOnlinePowerSavinginNetwork-on-Chips StephanieFriederich;MarcoNeber;JuergenBecker14:10 Time-TriggeredandRate-ConstrainedOn-ChipCommunicationinMixed-CriticalitySystems HamidrezaAhmadian;RomanObermaisser;MohammedAbuteir14:35 ABenes̆BasedNoCSwitchingArchitectureforMixedCriticalityEmbeddedSystems SteveKerrison;DavidMay;KerstinEder15:00 Session7:EmergingTechnologiesandParadigms Chairman:IanO'Connor,LyonInstituteofNanotechnology(FR)15:00 DynamicRing-basedMulticastwithWavelengthReuseforOpticalNetworkonChips FeiyangLiu;HaiboZhang;YawenChen;ZhiyiHuang;GuHuaxi15:25 Impactofon-chippowerdistributiononTemperature-InducedFaultsinOpticalNoCs MelikaTinati;SomayyehKoohi;ShaahinHessabi15:50 PushingtheLimitsofOnlineAuto-tuning:MachineCodeOptimizationinShort-RunningKernels FernandoEndo;DamienCouroussé;Henri-PierreCharles16:15 Coffeebreak16:30 Session9:DesignII Chairman:HiroshiSaito,UniversityofAizu(JP)16:30 High-PrecisionPowerModellingoftheTegraK1big.LittleProcessorArchitecture KristofferStokke;PålHalvorsen;CarstenGriwodz;HåkonKStensland16:55 Full-SystemSimulationofbig.LITTLEMulticoreArchitectureforPerformanceandEnergyExploration AnastasiiaButko;FlorentBruguier;AbdoulayeGamatié;GillesSassatelli;DavidNovo;LionelTorres;Michel

Robert

17:20 Communication-BasedPowerModellingforHeterogeneousMultiprocessorArchitecture BaptisteRoux;MatthieuGautier;OlivierSentieys;StevenDerrien17:45 DesignSpaceExplorationProblemFormulationforDataflowProgramsonHeterogeneousArchitectures MalgorzataMichalska;NicolasZufferey;EndriBezati;MarcoMattavelli18:10 EndofIEEE-MCSoC2016Day2

IEEEMCSoC-2016Day2:Thursday,September22nd2016-RoomSaintClair3B8:00 Welcome8:45 KeynoteheldinroomSaintClair3A9:30 Session3:Energyefficiency Chairman:SteveKerrison,UniversityofBristol(UK)9:30 TheRoleofSelf-AwarenessandHierarchicalAgentsinResourceManagementforMany-CoreSystems MaximilianGötzinger;AmirM.Rahmani;MartinPongratz;PasiLiljeberg;AxelJantsch;HannuTenhunen9:55 Exploitinglargememoryusing32-bitenergy-efficientmanycorearchitectures MohamedLamineKaraoui;Pierre-YvesPéneau;QuentinMeunier;FranckWajsburt;AlainGreiner10:20 2-StepPowerSchedulingwithAdaptiveIntervalforNetworkIntrusionDetectionSystemsonMulticores TuongPhiLau;KeijiKimura10:45 Coffeebreak11:00 SpecialsessiononAuto-TuningforMulticoreandGPU(ATMG)I Organizer:SatoshiOhshima,UniversityofTokyo(JP) Chairman:ToshiyukiImamura,RIKENAdvancedInstituteforComputationalScience(JP)11:00 Fastermethodfortuningthetilesizefortilematrixdecomposition TomohiroSuzuki11:25 Auto-TuningTRSMwithanAsynchronousTaskAssignmentModelonMulticoreandMulti-GPUSystems MuriloBoratto;PedroAlonso;DomingoGimenez11:50 OnconstructingcostmodelsforonlineautomatictuningusingATMathCoreLib SeijiNagashima;TakeshiFukaya;YusakuYamamoto12:15 AutotuningofaCut-offforTaskParallelPrograms ShintaroIwasaki;KenjiroTaura12:40 Lunch13:45 Session6:DesignI Chairman:ChristianHaubelt,UniversityofRostock(DE)13:45 ATaskAllocationMethodfortheDTTRSchemebasedontheParallelismofTasks HiroshiSaito;MasashiImai;TomohiroYoneda14:10 AcceleratingMulticoreArchitectureSimulationusingApplicationProfile KeijiKimura;GakuhoTaguchi;HironoriKasahara14:35 PerformancePredictionofApplicationMappinginManycoreSystemswithArtificialNeuralNetworks AbdoulayeGamatié;RomanUrsu;ManuelSelva;GillesSassatelli15:00 Session8:Reconfigurableandparallelcomputing Chairman:KenjiKise,TokyoTech(JP)15:00 NoCbasedvirtualizedacceleratorsforcloudcomputing HiliwiLeakeKidane;El-BayBourennane;GilbertoOchoa-Ruiz15:25 cReComp:AutomatedDesignToolforROS-CompliantFPGAComponent KazushiYamashina;HitomiKimura;TakeshiOhkawa;KanemitsuOotsu;TakashiYokota15:50 Networkonchipandparallelcomputinginembeddedsystems DihiaBelkacemi;YoucefBouchebaba;MehammedDaoui16:15 Coffeebreak16:30 SpecialsessiononAuto-TuningforMulticoreandGPU(ATMG)II Organizer:SatoshiOhshima,UniversityofTokyo(JP) Chairman:SatoshiOhshima,UniversityofTokyo(JP)16:30 APerformanceModelandEfficiency-BasedAssignmentofBufferingStrategiesforAutomaticGPUStencil

CodeGeneration

YueHu;DavidKoppelman;StevenBrandt16:55 Meta-ProgrammingandMulti-StageprogrammingforGPGPUs IanMasliah;MarcBaboulin;JoelFalcou17:20 AutomaticThread-BlockSizeAdjustmentforMemory-BoundBLASKernelsonGPUs DaichiMukunoki;ToshiyukiImamura;DaisukeTakahashi17:45 ACodeSelectionMechanismUsingDeepLearning HangCui;ShoichiHirasawa;HiroyukiTakizawa;HiroakiKobayashi18:10 EndofIEEE-MCSoC2016Day2

IEEEMCSoC-2016Day3:Friday,September23rd2016-SaintClair3A

8:00 Welcome8:45 Keynote TowardsSmartWearableSystemsintheInternet-of-ThingsEra Presenter:DavidAtienza,EPFL(CH)9:30 Session10:InterconnectNetworks(NoCs)III Chairman:GulKhan,RyersonUniversity(CA)9:30 DistributedDynamicRateAdaptationonaNetworkonChipwithTrafficDistortion YvesDurand;ChristianBernard;FabienClermidy9:55 OptimizingLatenciesandCustomizingNoCofTime-PredictableHeterogeneousMulti-CoreProcessor ZoranSalcic;MuhammadNadeem;HeeJongPark;JuergenTeich10:20 IncreasingtheEfficiencyofLatency-DrivenDVFSwithaSmartNoCCongestionManagementStrategy JoséVicenteEscamillaLópez;MarioRobertoCasu;JoseFlich10:45 Coffeebreak11:00 Session11:Programming Chairman:SidTouati,UniversityNiceSophiaAntipolis(FR)11:00 NetworkContention-awareMethodtoEvaluateDataCoherencyProtocolswithinaCompilationToolchain

LoïcCudennec;SafaeDahmani;GuyGogniat;CédricMaignan;MarthaJohannaSepulvedaFlorez11:25 Dual-EngineCross-ISADBTOTechniqueutilisingMultiThreadedSupportforMulticoreProcessorSystem JooOnOoi;FawnizuAzmadiHussin;MohamedNordinZakaria11:50 Closingremarks lunch12:30 EndofIEEE-MCSoC2016

Conferenceplaces

Place Activity Address Location WebsiteLyon

conventioncenter

Allsessions,lunchesandcoffeebreaks

50QuaiCharlesdeGaulle

69463Lyoncedex06

Bybus,takelineC1(10minfromTGVPart-Dieutrainstation),C4(20minfromJeanMacémetrostation)orC5andgetoffat“Citéinternationale–Centrede

Congrès”.Walk5mintoentranceH.Theeventislocatedonthesecondfloor,St

Clairlevel.

http://www.ccc-lyon.com

BrasserieLeSud

GalaDiner 11PlaceAntoninPoncet

69002Lyon

Nearestsubwaystop:Bellecour(metrolinesAandD)

http://www.nordsudbrasseries.com/le-sud.html

VieuxLyon 2hourtourguide

VieuxLyonmetrostation,lineD

14:00:meetingpointatstreetlevel,Av.AdolpheMax,69005Lyon

http://www.tcl.fr/en

BuslineC1:http://www.tcl.fr/Me-deplacer/Toutes-les-lignes/C1BuslineC4:http://www.tcl.fr/Me-deplacer/Toutes-les-lignes/C4BuslineC5:http://www.tcl.fr/Me-deplacer/Toutes-les-lignes/C5

Conferencevenue

BusC1-C4-C5Stop«Citéinternationale–

CentredeCongrès»

Pedestrianbridge

Hentrance

EntranceHislocatedbehindthebear