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IEC61850-9-2 Process Bus

Implementation on IEDs

Author: Roberto Cimadevilla

Co-authors: Iñigo Ferrero, José Miguel Yarza

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Overview

• Conventional / Process Bus Substations

• SV time alignment

• Sampling frequency change

• Frequency tracking

• Estimation of lost SV

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Conventional Substation

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Process Bus Substation

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• Currents and Voltages can be measured by several MU

• Each SV has a Sample Counter (smpCnt) used by the IED

that receives the frames to make the alignment:

• 50 Hz: 0 – 3999

• 60 Hz: 0 - 4799

• MU are synchronized (IRIG-B, PPS, IEEE1588). Reception

on PPS signal forces the sample number 0, the rest are based

on the internal MU clock

• SV from different MU can arrive at different times. Delays

due to:

• MU processing time

• Communication network

SV Alignment

MU works with 80samples/cycle

2ms delay considered

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SV Alignment

Sampling Frequency Change

• Two option to convert a conventional IED:

• Adapt the filters to work with the new sampling frequency

• Change the sample frequency and use the same filters

• Resampling was chosen to maintain the sampling rate of the conventional IED converted into a SV based IED so:

• The same digital filters and protection algorithms can be used

• Resampling algorithm is also required for the frequency tracking

Newton third order polynomial

interpolation algorithm based on the

divided differences

MU: 80 s/c

IED: 32 s/c

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Frequency Tracking

• Sampling frequency of the MU is fixed (80 samples per 50 / 60 Hz cycle) without changing with the frequency

• Resampling is used for frequency tracking, if SV are directly used, errors during off-nominal frequencies will appear.

• Frequency is measured based on zero-crossings

• Low pass filter and phase-shift filtering is used

• α Clarke transformation is used to obtain a voltage involving the three phases

• A third order polynomial interpolation is used to obtain 32 samples spanning exactly one cycle.

Frequency tracking: algorithm that modifies the time between

samples based on the frequency measurement to make the DFT

window expand exactly one cycle

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Resampling for 51 Hz

Sinusoidal voltage waveform with a rated RMS value and 51Hz

Same results with

direct sampling and

resampling

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ABSOLUTE ERROR

RELATIVE ERROR

Resampling for 50 Hz: 1st, 2nd and 3rd order pol.

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Harmonic Influence THD=20%

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Estimation of Lost SV

• SV can be lost

• Lost SV can generate phasor errors during one cycle

• Blocking will delay the operation for too long

Estimation on SV

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Estimation of Lost SV

• SV is consider as lost:

• Delay time

• Quality invalid

• Synchronized flag FALSE

• Estimation. Replaced by:

• Zeros

• Value of last SV

• New SV after lost SV

• Estimation of lost SV based on polynomial interpolation

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Estimation of 10 Lost SV

ERROR P1=-1.613%

ERROR P2=-0.063%

ERROR P3=-0.044%

ERROR P1=-0.022%

ERROR P2=-0.0086%

ERROR P3=-0.0061%

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Harmonic Influence with 5 Lost SV THD=20%

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• A time delay of 2 ms has been considered when time alignment is performed

• Changing from the MU sampling rate to the conventional relay sampling rate allows maintaining the digital filters and protection algorithms

• The resampling is done with a Newton third order polynomial interpolation: results have shown a very good accuracy even in the presence of harmonics

• Frequency tracking is needed because of the fixed sampling rate of the MU. Resampling is used

• Estimation of lost SV is based on the polynomial interpolation: results have shown a good accuracy for up to 5 consecutive lost SV in the presence of harmonics

Conclusions

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Thank you