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identifying of objects using RF transmitter and
receiver and data retrieving using GSM
By :
Ayman Gaffer Ibrahim ECE 1 08D01A0414
Abubaker Bashir Nagar ECE2 07D01A04C8
Saleh Ahmed Mohammed ECE 2 08D01A04C0
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Identifying Objects Using RF Transmitters and Receivers, and Retrieving Data Using GSM
To provide a system for monitoring and locating objects using Radio
Frequency (RF) transmitters and receivers, and querying about the objects using
mobile phones. An object represents a real world entity. This system is based on
RF transmitters that are tagged to the objects of everyday use and have the
capability of transmitting signals and a receiver that detects the transmission of the
tagged object and stores its corresponding location in the database which is created
specifically for information maintenance of the tagged objects. Mobile phones are
used to query the location of the tagged object by sending a message to the
Subscriber Identity Module (SIM) connected to a Global System for Mobile
Communications (GSM) modem. This GSM modem fetches the location and other
relevant information from the database and encapsulates this information into a
message which is sent back to the mobile phone that has requested the information.
(Note: by keeping this IEEE abstract as reference we will design our own
model)
Existing system:
This article is a novel approach in locating and also retrieving product related
information using mobile phones. It is difficult to go and locate objects manually or
search for them in a short period of time especially when object location is
unknown. In this paper we are attempting to locate objects irrespective of its
distance from the user who is trying to track the object. Objects can be located
more easily if they are equipped with Bluetooth or Infra-Red facilities which
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nowadays are commonly found in electronic devices likes Personal Digital
Assistant (PDA), laptops. However the drawback of this is the limited range.
Proposing system:
We are extending the idea to locate objects both stationary and mobile using
RF transmitters and receivers with greater range. On a larger scale this project can
be implemented for locating landmarks in a city or items in a warehouse. The
implementation is based on two criteria. Firstly, we assume that the objects being
tagged are accompanied with a unique ID. Secondly, each receiver is given a
unique location ID that determines the current location of the object.
SYSTEM ARCHITECTURE:
The system architecture comprises of three parts that is the sensing
functionality, storing functionality and querying service.
The sensing functionality comprises of RF transmitters and receivers that are
used to sense the presence of tagged objects within the region.
The storage functionality is used to store all relevant information of the
object in the database. The operator provides a user with a database service
in which the user can store application data such as reports and other
information regarding the objects.
The querying service is used by the user for querying necessary information
associated with the object using GSM network and Short message service
(SMS).
The object tracking application is used for locating and managing objects using Use
case via mobile phones. Use cases are specified for various functions such as
detecting of objects within the sensing range, notify objects that have left the
sensing range, querying about objects, identifying new objects entering and leaving
the sensing range.
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Chapter 1
Introduction to Embedded Systems
EMBEDDED SYSTEM
An embedded system is a special-purpose computer system designed to
perform one or a few dedicated functions, sometimes with real-time computing
constraints. It is usually embedded as part of a complete device including hardware
and mechanical parts. In contrast, a general-purpose computer, such as a personal
computer, can do many different tasks depending on programming. Embedded
systems have become very important today as they control many of the common
devices we use.
Since the embedded system is dedicated to specific tasks, design engineers
can optimize it, reducing the size and cost of the product, or increasing the
reliability and performance. Some embedded systems are mass-produced,
benefiting from economies of scale.
Physically, embedded systems range from portable devices such as digital
watches and MP3 players, to large stationary installations like traffic lights, factory
controllers, or the systems controlling nuclear power plants. Complexity varies
from low, with a single microcontroller chip, to very high with multiple units,
peripherals and networks mounted inside a large chassis or enclosure.
In general, "embedded system" is not an exactly defined term, as many
systems have some element of programmability. For example, Handheld computers
share some elements with embedded systems — such as the operating systems and
microprocessors which power them — but are not truly embedded systems,
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because they allow different applications to be loaded and peripherals to be
connected.
An embedded system is some combination of computer hardware and
software, either fixed in capability or programmable, that is specifically designed
for a particular kind of application device. Industrial machines, automobiles,
medical equipment, cameras, household appliances, airplanes, vending machines,
and toys (as well as the more obvious cellular phone and PDA) are among the
myriad possible hosts of an embedded system. Embedded systems that are
programmable are provided with a programming interface, and embedded systems
programming is a specialized occupation.
Certain operating systems or language platforms are tailored for the
embedded market, such as Embedded Java and Windows XP Embedded. However,
some low-end consumer products use very inexpensive microprocessors and
limited storage, with the application and operating system both part of a single
program. The program is written permanently into the system's memory in this
case, rather than being loaded into RAM (random access memory), as programs on
a personal computer are.
APPLICATIONS OF EMBEDDED SYSTEM
We are living in the Embedded World. You are surrounded with many
embedded products and your daily life largely depends on the proper functioning of
these gadgets. Television, Radio, CD player of your living room, Washing Machine
or Microwave Oven in your kitchen, Card readers, Access Controllers, Palm
devices of your work space enable you to do many of your tasks very effectively.
Apart from all these, many controllers embedded in your car take care of car
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operations between the bumpers and most of the times you tend to ignore all these
controllers.
In recent days, you are showered with variety of information about these
embedded controllers in many places. All kinds of magazines and journals
regularly dish out details about latest technologies, new devices; fast applications
which make you believe that your basic survival is controlled by these embedded
products. Now you can agree to the fact that these embedded products have
successfully invaded into our world. You must be wondering about these embedded
controllers or systems. What is this Embedded System?
The computer you use to compose your mails, or create a document or
analyze the database is known as the standard desktop computer. These desktop
computers are manufactured to serve many purposes and applications.
You need to install the relevant software to get the required processing
facility. So, these desktop computers can do many things. In contrast, embedded
controllers carryout a specific work for which they are designed. Most of the time,
engineers design these embedded controllers with a specific goal in mind. So these
controllers cannot be used in any other place.
Theoretically, an embedded controller is a combination of a piece of
microprocessor based hardware and the suitable software to undertake a specific
task.
These days designers have many choices in
microprocessors/microcontrollers. Especially, in 8 bit and 32 bit, the available
variety really may overwhelm even an experienced designer. Selecting a right
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microprocessor may turn out as a most difficult first step and it is getting
complicated as new devices continue to pop-up very often.
In the 8 bit segment, the most popular and used architecture is Intel's 8031.
Market acceptance of this particular family has driven many semiconductor
manufacturers to develop something new based on this particular architecture. Even
after 25 years of existence, semiconductor manufacturers still come out with some
kind of device using this 8031 core.
Military and aerospace software applications
From in-orbit embedded systems to jumbo jets to vital battlefield networks,
designers of mission-critical aerospace and defense systems requiring real-time
performance, scalability, and high-availability facilities consistently turn to the
LynxOS® RTOS and the LynxOS-178 RTOS for software certification to DO-
178B.
Rich in system resources and networking services, LynxOS provides an off-the-
shelf software platform with hard real-time response backed by powerful
distributed computing (CORBA), high reliability, software certification, and long-
term support options.
The LynxOS-178 RTOS for software certification, based on the RTCA DO-
178B standard, assists developers in gaining certification for their mission- and
safety-critical systems. Real-time systems programmers get a boost with
LynuxWorks' DO-178B RTOS training courses.
LynxOS-178 is the first DO-178B and EUROCAE/ED-12B certifiable,
POSIX®-compatible RTOS solution.
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Communications applications
"Five-nines" availability, CompactPCI hot swap support, and hard real-time
response—LynxOS delivers on these key requirements and more for today's
carrier-class systems. Scalable kernel configurations, distributed computing
capabilities, integrated communications stacks, and fault-management facilities
make LynxOS the ideal choice for companies looking for a single operating system
for all embedded telecommunications applications—from complex central
controllers to simple line/trunk cards.
LynuxWorks Jumpstart for Communications package enables OEMs to rapidly
develop mission-critical communications equipment, with pre-integrated, state-of-
the-art, data networking and porting software components—including source code
for easy customization.
The Lynx Certifiable Stack (LCS) is a secure TCP/IP protocol stack designed
especially for applications where standards certification is required.
Electronics applications and consumer devices
As the number of powerful embedded processors in consumer devices continues
to rise, the BlueCat® Linux® operating system provides a highly reliable and
royalty-free option for systems designers.
And as the wireless appliance revolution rolls on, web-enabled navigation
systems, radios, personal communication devices, phones and PDAs all benefit
from the cost-effective dependability, proven stability and full product life-cycle
support opportunities associated with BlueCat embedded Linux. BlueCat has
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teamed up with industry leaders to make it easier to build Linux mobile phones
with Java integration.
For makers of low-cost consumer electronic devices who wish to integrate the
LynxOS real-time operating system into their products, we offer special MSRP-
based pricing to reduce royalty fees to a negligible portion of the device's MSRP.
Industrial automation and process control software
Designers of industrial and process control systems know from experience that
LynuxWorks operating systems provide the security and reliability that their
industrial applications require.
From ISO 9001 certification to fault-tolerance, POSIX conformance, secure
partitioning and high availability, we've got it all. Take advantage of our 20 years
of experience.
MICROCONTROLLER VERSUS MICROPROCESSOR
What is the difference between a Microprocessor and Microcontroller? By
microprocessor is meant the general purpose Microprocessors such as Intel's X86
family (8086, 80286, 80386, 80486, and the Pentium) or Motorola's 680X0 family
(68000, 68010, 68020, 68030, 68040, etc). These microprocessors contain no
RAM, no ROM, and no I/O ports on the chip itself. For this reason, they are
commonly referred to as general-purpose Microprocessors.
A system designer using a general-purpose microprocessor such as the
Pentium or the 68040 must add RAM, ROM, I/O ports, and timers externally to
make them functional. Although the addition of external RAM, ROM, and I/O
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ports makes these systems bulkier and much more expensive, they have the
advantage of versatility such that the designer can decide on the amount of RAM,
ROM and I/O ports needed to fit the task at hand. This is not the case with
Microcontrollers.
A Microcontroller has a CPU (a microprocessor) in addition to a fixed
amount of RAM, ROM, I/O ports, and a timer all on a single chip. In other words,
the processor, the RAM, ROM, I/O ports and the timer are all embedded together
on one chip; therefore, the designer cannot add any external memory, I/O ports, or
timer to it. The fixed amount of on-chip ROM, RAM, and number of I/O ports in
Microcontrollers makes them ideal for many applications in which cost and space
are critical. In many applications, for example a TV remote control, there is no
need for the computing power of a 486 or even an 8086 microprocessor. These
applications most often require some I/O operations to read signals and turn on and
off certain bits.
MICROCONTROLLERS FOR EMBEDDED SYSTEMS
In the Literature discussing microprocessors, we often see the term
Embedded System. Microprocessors and Microcontrollers are widely used in
embedded system products. An embedded system product uses a microprocessor
(or Microcontroller) to do one task only. A printer is an example of embedded
system since the processor inside it performs one task only; namely getting the data
and printing it. Contrast this with a Pentium based PC. A PC can be used for any
number of applications such as word processor, print-server, bank teller terminal,
Video game, network server, or Internet terminal. Software for a variety of
applications can be loaded and run. Of course the reason a pc can perform myriad
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tasks is that it has RAM memory and an operating system that loads the application
software into RAM memory and lets the CPU run it.
In an Embedded system, there is only one application software that is
typically burned into ROM. An x86 PC contains or is connected to various
embedded products such as keyboard, printer, modem, disk controller, sound card,
CD-ROM drives, mouse, and so on. Each one of these peripherals has a
Microcontroller inside it that performs only one task. For example, inside every
mouse there is a Microcontroller to perform the task of finding the mouse position
and sending it to the PC. Table 1-1 lists some embedded products.
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CHAPTER2LPC2148
MICROCONTROLLER
ARM architecture
ARM
Designer ARM Holdings
Bits 32/64
Introduced 1983
Version ARMv8[1]
Design RISC
Type Register-Register
Encoding Fixed
Branching Condition code
Endianness Bi (Little as default)
Extensions NEON, Thumb, Jazelle, VFP, A64
Registers
16/31[1]
ARM is a 32-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by ARM Holdings. It was named the Advanced RISC Machine and, before that, the Acorn RISC Machine. The ARM architecture is the most widely used 32-bit instruction set architecture in numbers
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produced. Originally conceived by Acorn Computers for use in its personal computers, the first ARM-based products were the Acorn Archimedes range introduced in 1987.
Features and applications
In 2005, about 98% of the more than one billion mobile phones sold each year used at least one ARM processor. As of 2009, ARM processors account for approximately 90% of all embedded 32-bit RISC processors and are used extensively in consumer electronics, including personal digital assistants (PDAs), tablets, mobile phones, digital media and music players, hand-held game consoles,calculators and computer peripherals such as hard drives and routers.
Licensees
The ARM architecture is licensable. Companies that are current or former ARM licensees include Alcatel-Lucent, Apple Inc., AppliedMicro, Atmel, Broadcom, Cirrus Logic, Digital Equipment Corporation, Ember, Energy Micro, Freescale, Intel (through DEC), LG, Marvell Technology Group, Microsemi, Microsoft, NEC, Nintendo, Nuvoton, Nvidia, Sony, NXP (formerly Philips), Oki, ON Semiconductor, Psion, Qualcomm, Renesas, Samsung, Sharp, Silicon Labs, STMicroelectronics, Symbios Logic, Texas Instruments, VLSI Technology, Yamaha, Fuzhou Rockchip, and ZiiLABS.
In addition to the abstract architecture, ARM offers several microprocessor core designs, including the ARM7, ARM9, ARM11, Cortex-A8, Cortex-A9, and Cortex-A15. Companies often license these designs from ARM to manufacture and integrate into their own system on a chip (SoC) with other components like RAM, GPUs, or radio basebands (for mobile phones).
System-on-chip packages integrating ARM's core designs include Nvidia Tegra's first three generations, ST-Ericsson's Nova and NovaThor, Silicon Labs's Precision32 MCU, Texas Instruments's OMAPproducts, Samsung's Hummingbird and Exynos products, Apple's A4, A5, and A5X chips, and Freescale's i.MX.
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Companies can also obtain an ARM architectural license for designing their own, different CPU cores using the ARM instruction set. Distinct ARM architecture implementations by licensees includeAppliedMicro's X-Gene, Qualcomm's Snapdragon and Krait, DEC's StrongARM, Marvell (formerly Intel) XScale, and Nvidia's planned Project Denver.
History
After achieving success with the BBC Micro computer, Acorn Computers Ltd considered how to move on from the relatively simple MOS Technology 6502 processor to address business markets like the one that would soon be dominated by the IBM PC, launched in 1981. The Acorn Business Computer (ABC) plan required a number of second processors to be made to work with the BBC Micro platform, but processors such as the Motorola 68000 and National Semiconductor 32016 were unsuitable, and the 6502 was not powerful enough for a graphics based user interface.[citation needed]
Acorn would need a new architecture, having tested all of the available processors and found them wanting. Acorn then seriously considered designing its own processor, and their engineers came across papers on the Berkeley RISC project. They felt it showed that if a class of graduate students could create a competitive 32-bit processor, then Acorn would have no problem. A trip to theWestern Design Center in Phoenix, where the 6502 was being updated by what was effectively a single-person company, showed Acorn engineers Steve Furber and Sophie Wilson that they did not need massive resources and state-of-the-art R&D facilities.
Wilson set about developing the instruction set, writing a simulation of the processor in BBC Basic that ran on a BBC Micro with a second 6502 processor. It convinced the Acorn engineers that they were on the right track. Before they could go any further, however, they would need more resources. It was time for Wilson to approach Acorn's CEO, Hermann Hauser, and explain what was afoot. Once the go-ahead had been given, a small team was put together to implement Wilson's model in hardware.
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A Conexant ARM processor used mainly in routers
Acorn RISC Machine: ARM2
The official Acorn RISC Machine project started in October 1983. VLSI Technology, Inc was chosen as silicon partner, since it already supplied Acorn with ROMs and some custom chips. The design was led by Wilson and Furber, and was consciously designed with a similar efficiency ethos as the 6502. It had a key design goal of achieving low-latency input/output (interrupt) handling like the 6502. The 6502's memory access architecture had allowed developers to produce fast machines without the use of costly direct memory access hardware. VLSI produced the first ARM silicon on 26 April 1985 – it worked the first time and came to be termed ARM1 by April 1985. The first "real" production systems named ARM2 were available the following year.
The ARM1 second processor for the BBC Micro
Its first practical application was as a second processor to the BBC Micro, where it was used to develop the simulation software to finish work on the support chips
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(VIDC, IOC, MEMC) and to speed up the operation of the CAD software used in developing ARM2. Wilson subsequently rewrote BBC Basic in ARM assembly language, and the in-depth knowledge obtained from designing the instruction set allowed the code to be very dense, making ARM BBC Basic an extremely good test for any ARM emulator. The original aim of a principally ARM-based computer was achieved in 1987 with the release of the Acorn Archimedes.
In 1992 Acorn once more won the Queen's Award for Technology for the ARM.
The ARM2 featured a 32-bit data bus, a 26-bit address space and twenty-seven 32-bit registers. Program code had to lie within the first 64 Mbyte of the memory, as the program counter was limited to 24 bits because the top 6 and bottom 2 bits of the 32-bit register served as status flags. The ARM2 had atransistor count of just 30,000, compared to Motorola's six-year older 68000 model with 68,000. Much of this simplicity comes from not having microcode(which represents about one-quarter to one-third of the 68000) and, like most CPUs of the day, not including any cache. This simplicity led to its low power usage, while performing better than the Intel 80286. A successor, ARM3, was produced with a 4 KB cache, which further improved performance.
Apple, DEC, Intel, Marvell: ARM6, StrongARM, XScale
In the late 1980s Apple Computer and VLSI Technology started working with Acorn on newer versions of the ARM core. The work was so important that Acorn spun off the design team in 1990 into a new company called Advanced RISC Machines Ltd. Advanced RISC Machines became ARM Ltd when its parent company, ARM Holdings plc, floated on the London Stock Exchange and NASDAQ in 1998.
The new Apple-ARM work would eventually turn into the ARM6, first released in early 1992. Apple used the ARM6-based ARM 610 as the basis for their Apple Newton PDA. In 1994, Acorn used the ARM 610 as the main central processing unit (CPU) in their Risc PC computers. DEC licensed the ARM6 architecture and produced the StrongARM. At 233 MHz this CPU drew only one watt (more recent versions draw far less). This work was later passed to Intel as a part of a lawsuit settlement, and Intel took the opportunity to supplement their aging i960 line with
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the StrongARM. Intel later developed its own high performance implementation named XScale which it has since sold to Marvell.
Licensing
The ARM core has remained largely the same size throughout these changes. ARM2 had 30,000 transistors, while the ARM6 grew only to 35,000. ARM's business has always been to sell IP cores, which licensees use to create microcontrollers and CPUs based on this core. The original design manufacturer combines the ARM core with a number of optional parts to produce a complete CPU, one that can be built on old semiconductor fabs and still deliver substantial performance at a low cost. The most successful implementation has been the ARM7TDMI with hundreds of millions sold. Atmelhas been a precursor design center in the ARM7TDMI-based embedded system.
ARM licensed about 1.6 billion cores in 2005. In 2005, about 1 billion ARM cores went into mobile phones. By January 2008, over 10 billion ARM cores had been built, and in 2008 iSuppli predicted that by 2011, 5 billion ARM cores will be shipping per year. As of January 2011, ARM states that over 15 billion ARM processors have shipped.
The ARM architectures used in smartphones, personal digital assistants and other mobile devices range from ARMv5, in obsolete/low-end devices, to the ARM M-series, in current high-end devices.XScale and ARM926 processors are ARMv5TE, and are now more numerous in high-end devices than the StrongARM, ARM9TDMI and ARM7TDMI based ARMv4 processors, but lower-end devices may use older cores with lower licensing costs. ARMv6 processors represented a step up in performance from standard ARMv5 cores, and are used in some cases, but Cortex processors (ARMv7) now provide faster and more power-efficient options than all those prior generations. Cortex-A targets applications processors, as needed by smartphones that formerly used ARM9 or ARM11. Cortex-R targets real-time applications, and Cortex-M targets microcontrollers.
In 2009, some manufacturers introduced netbooks based on ARM architecture CPUs, in direct competition with netbooks based on Intel Atom. According to
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analyst firm IHS iSuppli, by 2015, ARM ICs are estimated to be in 23% of all laptops.
In 2011, HiSilicon Technologies Co. Ltd. licensed a variety of ARM technology to be used in communications chip designs. These included 3G/4G basestations, networking infrastructure and mobile computing applications.
ARM cores
Architecture Family
ARMv1 ARM1
ARMv2 ARM2, ARM3
ARMv3 ARM6, ARM7
ARMv4 StrongARM, ARM7TDMI, ARM9TDMI
ARMv5 ARM7EJ, ARM9E, ARM10E, XScale
ARMv6 ARM11, ARM Cortex-M
ARMv7 ARM Cortex-A, ARM Cortex-M, ARM Cortex-R
ARMv8No cores available yet. Will support 64-bit data and addressing
A summary of the numerous vendors who implement ARM cores in their design is provided by ARM.
Example applications of ARM cores
ARM cores are used in a number of products, particularly various PDAs and smartphones. Some computing examples are the Acorn Archimedes, Apple iPad and ASUS Eee Pad Transformer. Some other uses are the Apple iPod portable media player, Canon PowerShot A470 digital camera, Nintendo DS handheld games console and TomTom automotive navigation system.
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Since 2005, ARM was also involved in Manchester University's computer, SpiNNaker, which used ARM cores to simulate the human brain.
Architecture
From 1995, the ARM Architecture Reference Manual has been the primary source of documentation on the ARM processor architecture and instruction set, distinguishing interfaces that all ARM processors are required to support (such as instruction semantics) from implementation details that may vary. The architecture has evolved over time, and starting with the Cortex series of cores, three "profiles" are defined:
"Application" profile: Cortex-A series
"Real-time" profile: Cortex-R series
"Microcontroller" profile: Cortex-M series.
Profiles are allowed to subset the architecture. For example, the ARMv6-M profile (used by the Cortex-M0) is a subset of the ARMv7-M profile (it supports fewer instructions).
CPU modes
The ARM architecture specifies the following CPU modes. At any moment in time, the CPU can be in only one mode, but it can switch modes due to external events (interrupts) or programmatically.
User mode
The only non-privileged mode.
System mode
The only privileged mode that is not entered by an exception. It can only be entered by executing an instruction that explicitly writes to the mode bits of the CPSR.
Supervisor (svc) mode
A privileged mode entered whenever the CPU is reset or when a SWI instruction is executed.
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Abort mode
A privileged mode that is entered whenever a prefetch abort or data abort exception occurs.
Undefined mode
A privileged mode that is entered whenever an undefined instruction exception occurs.
Interrupt mode
A privileged mode that is entered whenever the processor accepts an IRQ interrupt.
Fast Interrupt mode
A privileged mode that is entered whenever the processor accepts an FIQ interrupt.
Instruction set
To keep the design clean, simple and fast, the original ARM implementation was hardwired without microcode, like the much simpler 8-bit 6502 processor used in prior Acorn microcomputers.
The ARM architecture includes the following RISC features:
Load/store architecture.
No support for misaligned memory accesses (although now supported in ARMv6 cores, with some exceptions related to load/store multiple word instructions).
Uniform 16 × 32-bit register file.
Fixed instruction width of 32 bits to ease decoding and pipelining, at the cost of decreased code density. Later, the Thumb instruction set increased code density.
Mostly single clock-cycle execution.
To compensate for the simpler design, compared with contemporary processors like the Intel 80286 and Motorola 68020, some additional design features were used:
Conditional execution of most instructions, reducing branch overhead and compensating for the lack of a branch predictor.
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Arithmetic instructions alter condition codes only when desired.
32-bit barrel shifter which can be used without performance penalty with most arithmetic instructions and address calculations.
Powerful indexed addressing modes.
A link register for fast leaf function calls.
Simple, but fast, 2-priority-level interrupt subsystem with switched register banks.
Arithmetic instructions
The ARM supports add, subtract, and multiply instructions. The only ARM cores to include integer divide instructions are those implementing the ARMv7-M and ARMv7-R architectures, such as theCortex-M3 and M4.
Registers
Registers R0-R7 are the same across all CPU modes; they are never banked.
R13 and R14 are banked across all privileged CPU modes except system mode. That is, each mode that can be entered because of an exception has its own R13 and R14. These registers generally contain the stack pointer and the return address from function calls, respectively.
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Aliases:
R13 is also referred to as SP, the Stack Pointer.
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Registers across CPU modes
usr sys svc abt und irq fiq
R0
R1
R2
R3
R4
R5
R6
R7
R8 R8_fiq
R9 R9_fiq
R10 R10_fiq
R11 R11_fiq
R12 R12_fiq
R13 R13_svc R13_abt R13_und R13_irq R13_fiq
R14 R14_svc R14_abt R14_und R14_irq R14_fiq
R15
CPSR
SPSR_svc
SPSR_abt SPSR_und SPSR_irq SPSR_fiq
R14 is also referred to as LR, the Link Register.
R15 is also referred to as PC, the Program Counter.
Conditional execution
The conditional execution feature (called predication) is implemented with a 4-bit condition code selector (the predicate) on every instruction; one of the four-bit codes is reserved as an "escape code" to specify certain unconditional instructions, but nearly all common instructions are conditional. Most CPU architectures only have condition codes on branch instructions.
This cuts down significantly on the encoding bits available for displacements in memory access instructions, but on the other hand it avoids branch instructions when generating code for small ifstatements. The standard example of this is the subtraction-based Euclidean algorithm: ARM address mode
In the C programming language, the loop is:
while(i != j) {
if (i > j)
i -= j;
else
j -= i;
}
In ARM assembly, the loop is:
loop CMP Ri, Rj ; set condition "NE" if (i != j),
; "GT" if (i > j),
; or "LT" if (i < j)
SUBGT Ri, Ri, Rj ; if "GT" (greater than), i = i-j;
SUBLT Rj, Rj, Ri ; if "LT" (less than), j = j-i;
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BNE loop ; if "NE" (not equal), then loop
which avoids the branches around the then and else clauses. Note that if Ri and Rj are equal then neither of the SUB instructions will be executed, optimising out the need for a conditional branch to implement the while check at the top of the loop, for example had SUBLE (less than or equal) been used.
One of the ways that Thumb code provides a more dense encoding is to remove that four bit selector from non-branch instructions.
Other features
Another feature of the instruction set is the ability to fold shifts and rotates into the "data processing" (arithmetic, logical, and register-register move) instructions, so that, for example, the C statement
a += (j << 2);
could be rendered as a single-word, single-cycle instruction on the ARM.
ADD Ra, Ra, Rj, LSL #2
This results in the typical ARM program being denser than expected with fewer memory accesses; thus the pipeline is used more efficiently.
The ARM processor also has some features rarely seen in other RISC architectures, such as PC-relative addressing (indeed, on the 32-bit ARM the PC is one of its 16 registers) and pre- and post-increment addressing modes.
Another item of note is that the ARM has been around for a while, with the instruction set increasing somewhat over time. Some early ARM processors (before ARM7TDMI), for example, have no instruction to store a two-byte quantity, thus, strictly speaking, for them it's not possible to generate efficient code that would behave the way one would expect for C objects of type "int16_t".
Pipelines and other implementation issues
The ARM7 and earlier implementations have a three stage pipeline; the stages being fetch, decode, and execute. Higher performance designs, such as the ARM9, have deeper pipelines: Cortex-A8 has thirteen stages. Additional implementation
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changes for higher performance include a faster adder, and more extensive branch prediction logic. The difference between the ARM7DI and ARM7DMI cores, for example, was an improved multiplier (hence the added "M").
Coprocessors
For those familiar with the Intel x86 family of CPUs, the ARM family of processors does not support or have any instructions similar to CPUID. There are, however, mechanisms for addressing coprocessors in the ARM architecture.
The ARM architecture provides a non-intrusive way of extending the instruction set using "coprocessors" which can be addressed using MCR, MRC, MRRC, MCRR, and similar instructions. The coprocessor space is divided logically into 16 coprocessors with numbers from 0 to 15, coprocessor 15 (cp15) being reserved for some typical control functions like managing the caches and MMUoperation (on processors that have one).
In ARM-based machines, peripheral devices are usually attached to the processor by mapping their physical registers into ARM memory space or into the coprocessor space or connecting to another device (a bus) which in turn attaches to the processor. Coprocessor accesses have lower latency so some peripherals (for example an XScale interrupt controller) are designed to be accessible in both ways (through memory and through coprocessors).
In other cases, chip designers only integrate hardware using the coprocessor mechanism. For example, an image processing engine might be a small ARM7TDMI core combined with a coprocessor that has specialized operations to support a specific set of HDTV transcoding primitives.
Debugging
All modern ARM processors include hardware debugging facilities; without them, software debuggers could not perform basic operations like halting, stepping, and breakpointing of code starting from reset. These facilities are built using JTAG support, though some newer cores optionally support ARM's own two-wire "SWD" protocol. In ARM7TDMI cores, the "D" represented JTAG debug
28
support, and the "I" represented presence of an "EmbeddedICE" debug module. For ARM7 and ARM9 core generations, EmbeddedICE over JTAG was a de-facto debug standard, although it was not architecturally guaranteed.
The ARMv7 architecture defines basic debug facilities at an architectural level. These include breakpoints, watchpoints, and instruction execution in a "Debug Mode"; similar facilities were also available with EmbeddedICE. Both "halt mode" and "monitor" mode debugging are supported. The actual transport mechanism used to access the debug facilities is not architecturally specified, but implementations generally include JTAG support.
There is a separate ARM "CoreSight" debug architecture, which is not architecturally required by ARMv7 processors.
DSP enhancement instructions
To improve the ARM architecture for digital signal processing and multimedia applications, a few new instructions were added to the set. These are signified by an "E" in the name of the ARMv5TE and ARMv5TEJ architectures. E-variants also imply T,D,M and I.
The new instructions are common in digital signal processor architectures. They are variations on signed multiply–accumulate, saturated add and subtract, and count leading zeros.
Jazelle
Jazelle is a technique that allows Java Bytecode to be executed directly in the ARM architecture as a third execution state (and instruction set) alongside the existing ARM and Thumb-mode. Support for this state is signified by the "J" in the ARMv5TEJ architecture, and in ARM9EJ-S and ARM7EJ-S core names. Support for this state is required starting in ARMv6 (except for the ARMv7-M profile), although newer cores only include a trivial implementation that provides no hardware acceleration.
Thumb
29
To improve compiled code-density, processors since the ARM7TDMI have featured Thumb instruction set, which have their own state. (The "T" in "TDMI" indicates the Thumb feature.) When in this state, the processor executes the Thumb instruction set, a compact 16-bit encoding for a subset of the ARM instruction set. Most of the Thumb instructions are directly mapped to normal ARM instructions. The space-saving comes from making some of the instruction operands implicit and limiting the number of possibilities compared to the ARM instructions executed in the ARM instruction set state.
In Thumb, the 16-bit opcodes have less functionality. For example, only branches can be conditional, and many opcodes are restricted to accessing only half of all of the CPU's general purpose registers. The shorter opcodes give improved code density overall, even though some operations require extra instructions. In situations where the memory port or bus width is constrained to less than 32 bits, the shorter Thumb opcodes allow increased performance compared with 32-bit ARM code, as less program code may need to be loaded into the processor over the constrained memory bandwidth.
Embedded hardware, such as the Game Boy Advance, typically have a small amount of RAM accessible with a full 32-bit datapath; the majority is accessed via a 16 bit or narrower secondary datapath. In this situation, it usually makes sense to compile Thumb code and hand-optimise a few of the most CPU-intensive sections using full 32-bit ARM instructions, placing these wider instructions into the 32-bit bus accessible memory.
The first processor with a Thumb instruction decoder was the ARM7TDMI. All ARM9 and later families, including XScale, have included a Thumb instruction decoder.
Thumb-2
Thumb-2 technology made its debut in the ARM1156 core, announced in 2003. Thumb-2 extends the limited 16-bit instruction set of Thumb with additional 32-bit instructions to give the instruction set more breadth, thus producing a variable-
30
length instruction set. A stated aim for Thumb-2 is to achieve code density similar to Thumb with performance similar to the ARM instruction set on 32-bit memory. In ARMv7 this goal can be said to have been met.
Thumb-2 extends both the ARM and Thumb instruction set with yet more instructions, including bit-field manipulation, table branches, and conditional execution. A new "Unified Assembly Language" (UAL) supports generation of either Thumb-2 or ARM instructions from the same source code; versions of Thumb seen on ARMv7 processors are essentially as capable as ARM code (including the ability to write interrupt handlers). This requires a bit of care, and use of a new "IT" (if-then) instruction, which permits up to four successive instructions to execute based on a tested condition. When compiling into ARM code this is ignored, but when compiling into Thumb-2 it generates an actual instruction. For example:
; if (r0 == r1)
CMP r0, r1
ITE EQ ; ARM: no code ... Thumb: IT instruction
; then r0 = r2;
MOVEQ r0, r2 ; ARM: conditional; Thumb: condition via ITE 'T' (then)
; else r0 = r3;
MOVNE r0, r3 ; ARM: conditional; Thumb: condition via ITE 'E' (else)
; recall that the Thumb MOV instruction has no bits to encode "EQ" or "NE"
All ARMv7 chips support the Thumb-2 instruction set. Other chips in the Cortex and ARM11 series support both "ARM instruction set state" and "Thumb-2 instruction set state".
Thumb Execution Environment (ThumbEE)
ThumbEE, also termed Thumb-2EE, and marketed as Jazelle RCT (Runtime Compilation Target), was announced in 2005, first appearing in the Cortex-A8 processor. ThumbEE is a fourth processor mode, making small changes to the
31
Thumb-2 extended Thumb instruction set. These changes make the instruction set particularly suited to code generated at runtime (e.g. by JIT compilation) in managed Execution Environments. ThumbEE is a target for languages such as Limbo, Java, C#, Perl and Python, and allows JIT compilers to output smaller compiled code without impacting performance.
New features provided by ThumbEE include automatic null pointer checks on every load and store instruction, an instruction to perform an array bounds check, access to registers r8-r15 (where the Jazelle/DBX Java VM state is held), and special instructions that call a handler.[27] Handlers are small sections of frequently called code, commonly used to implement a feature of a high level language, such as allocating memory for a new object. These changes come from repurposing a handful of opcodes, and knowing the core is in the new ThumbEE mode.
VFP
VFP (Vector Floating Point) technology is an FPU coprocessor extension to the ARM architecture. It provides low-cost single-precision and double-precision floating-point computation fully compliant with the ANSI/IEEE Std 754-1985 Standard for Binary Floating-Point Arithmetic. VFP provides floating-point computation suitable for a wide spectrum of applications such as PDAs, smartphones, voice compression and decompression, three-dimensional graphics and digital audio, printers, set-top boxes, and automotive applications. The VFP architecture was intended to support execution of short "vector mode" instructions but these operated on each vector element sequentially and thus did not offer the performance of true single instruction, multiple data (SIMD) vector parallelism. This vector mode was therefore removed shortly after its introduction, to be replaced with the much more powerful NEON Advanced SIMD unit.
Some devices such as the ARM Cortex-A8 have a cut-down VFPLite module instead of a full VFP module, and require roughly ten times more clock cycles per float operation. Other floating-point and/or SIMD coprocessors found in ARM-based processors include FPA, FPE, iwMMXt. They provide some of the same functionality as VFP but are not opcode-compatible with it.
Advanced SIMD (NEON)
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The Advanced SIMD extension (aka NEON or "MPE" Media Processing Engine) is a combined 64- and 128-bit single instruction multiple data (SIMD) instruction set that provides standardized acceleration for media and signal processing applications. NEON is included in all Cortex-A8 devices but is optional in Cortex-A9 devices. NEON can execute MP3 audio decoding on CPUs running at 10 MHz and can run the GSM adaptive multi-rate (AMR) speech codec at no more than 13 MHz. It features a comprehensive instruction set, separate register files and independent execution hardware. NEON supports 8-, 16-, 32- and 64-bit integer and single-precision (32-bit) floating-point data and operates in SIMD operations for handling audio and video processing as well as graphics and gaming processing. In NEON, the SIMD supports up to 16 operations at the same time. The NEON hardware shares the same floating-point registers as used in VFP. Devices such as the ARM Cortex-A8 and Cortex-A9 support 128-bit vectors but will execute with just 64 bits at a time, whereas newer Cortex-A15 devices can execute 128 bits at once.
Security Extensions (TrustZone)
The Security Extensions, marketed as TrustZone Technology, is found in ARMv6KZ and later application profile architectures. It provides a low cost alternative to adding an additional dedicated security core to an SoC, by providing two virtual processors backed by hardware based access control. This enables the application core to switch between two states, referred to as worlds (to reduce confusion with other names for capability domains), in order to prevent information from leaking from the more trusted world to the less trusted world. This world switch is generally orthogonal to all other capabilities of the processor, thus each world can operate independently of the other while using the same core. Memory and peripherals are then made aware of the operating world of the core and may use this to provide access control to secrets and code on the device.
Typical applications of TrustZone Technology are to run a rich operating system in the less trusted world, and smaller security-specialized code in the more trusted world (named TrustZone Software, a TrustZone optimized version of the Trusted Foundations Software developed by Trusted Logic), allowing much tighter digital rights management for controlling the use of media on ARM-based devices, and preventing any unapproved use of the device.
33
In practice, since the specific implementation details of TrustZone are proprietary and have not been publicly disclosed for review, it is unclear what level of assurance is provided for a given threat model.
No-execute page protection
As of ARMv6, the ARM architecture supports no-execute page protection, which is referred to as XN, for eXecute Never.
ARMv8 and 64-bit
Released in late 2011, ARMv8 represents the first fundamental change to the ARM architecture. It adds a 64-bit architecture, dubbed 'AArch64', and a new 'A64' instruction set. Within the context of ARMv8, the 32-bit architecture and instruction set are referred to as 'AArch32' and 'A32', respectively. The Thumb instruction sets are referred to as 'T32' and have no 64-bit counterpart. ARMv8 allows 32-bit applications to be executed in a 64-bit OS, and for a 32-bit OS to be under the control of a 64-bit hypervisor.[1] As of March 2012, only the ARMv8-A ("application") profile has been defined, and no implementations have been announced.
To both AArch32 and AArch64, ARMv8 makes VFP and advanced SIMD (NEON) standard. It also adds cryptography instructions supporting AES and SHA-1/SHA-256.
AArch64 features:
New instruction set, A64
31 general-purpose 64-bit registers
Instructions are still 32 bits long and mostly the same as A32
Most instructions can take 32-bit or 64-bit arguments
Addresses assumed to be 64-bit
A new exception system
Fewer banked registers and modes
34
Memory translation from 48-bit virtual addresses based on the existing LPAE, which was designed to be easily extended to 64-bit
ARM licensees
ARM Ltd does not manufacture and sell CPU devices based on its own designs, but rather, licenses the processor architecture to interested parties. ARM offers a variety of licensing terms, varying in cost and deliverables. To all licensees, ARM provides an integratable hardware description of the ARM core, as well as complete software development toolset (compiler, debugger, SDK), and the right to sell manufactured silicon containing the ARM CPU.
Fabless licensees, who wish to integrate an ARM core into their own chip design, are usually only interested in acquiring a ready-to-manufacture verified IP core. For these customers, ARM delivers agate netlist description of the chosen ARM core, along with an abstracted simulation model and test programs to aid design integration and verification. More ambitious customers, including integrated device manufacturers (IDM) and foundry operators, choose to acquire the processor IP in synthesizable RTL (Verilog) form. With the synthesizable RTL, the customer has the ability to perform architectural level optimizations and extensions. This allows the designer to achieve exotic design goals not otherwise possible with an unmodified netlist (high clock speed, very low power consumption, instruction set extensions, etc.). While ARM does not grant the licensee the right to resell the ARM architecture itself, licensees may freely sell manufactured product (chip devices, evaluation boards, complete systems, etc.). Merchant foundries can be a special case; not only are they allowed to sell finished silicon containing ARM cores, they generally hold the right to re-manufacture ARM cores for other customers.
Like most IP vendors, ARM prices its IP based on perceived value. In architectural terms, lower performing ARM cores command lower license costs than higher performing cores. In implementation terms, a synthesizable core costs more than a hard macro (blackbox) core. Complicating price matters, a merchant foundry which holds an ARM license (such as Samsung and Fujitsu) can offer reduced licensing costs to its fab customers. In exchange for acquiring the ARM core through the foundry's in-house design services, the customer can reduce or eliminate payment of ARM's upfront license fee. Compared to dedicated semiconductor foundries
35
(such as TSMC and UMC) without in-house design services, Fujitsu/Samsung charge 2 to 3 times more per manufactured wafer. For low to mid volume applications, a design service foundry offers lower overall pricing (through subsidization of the license fee). For high volume mass produced parts, the long term cost reduction achievable through lower wafer pricing reduces the impact of ARM's NRE (Non-Recurring Engineering) costs, making the dedicated foundry a better choice.
36
37
CHAPTER 3BLOCK DIAGRAM & CIRCUIT DIAGRAM
OBJ- 1 RF Transmitter OBJ- 2 RF Transmitters
RF Receiver Location ID - A RF Receiver Location ID - B
Database service with querying service - used by the user for querying necessary information
ARM Processor
SYSTEM ARCHITECTURE
Location – A Location - B
38
User Mobile for Querying & Object Tracking
GSM SERVICE PROVIDER
CIRCUIT DIAGRAM
39
40
41
42
43
44
CHAPTER 4RF TRANSMITTER &
RECEIVER
RF MODULE
433 MHz RF Transmitter STT-433:
1. Overview
The STT-433 is ideal for remote control applications where low cost and longer
range is required. The transmitter operates from a 1.5-12V supply, making it ideal
for battery-powered applications. The transmitter employs a SAW-stabilized
oscillator, ensuring accurate frequency control for best range performance. Output
power and harmonic emissions are easy to control, making FCC and ETSI
compliance easy. The manufacturing-friendly SIP style package and low-cost make
the STT-433 suitable for high volume applications.
2. Features
· 433.92 MHz Frequency
· Low Cost
· 1.5-12V operation
· 11mA current consumption at 3V
· Small size
45
· 4 dBm output power at 3V
Transmitter
3. Applications
· Remote Keyless Entry (RKE)
· Remote Lighting Controls
· On-Site Paging
· Asset Tracking
· Wireless Alarm and Security Systems
· Long Range RFID
· Automated Resource Management
4. Specification
Parameter Symbol Min Typ. Max Unit
Operating Voltage Vcc 1.5 3.0 12 Volts DC
Operating Current
Data = VCC
46
Icc - 11mA @3V
59mA @5V
- mA
Operating Current
Data = GND
Icc - 100 - uA
Frequency Accuracy TOL fc -75 0 +75 Khz
Center Frequency Fc - 433 - Mhz
RF Output Power - 4 dBM@3V (2 mW)
16 dBM@5V (39 mW)
dBm / mW
Data Rate 200 1K 3K BPS
Temperature -20 +60 Deg. C
Power up delay 20 ms
5. Pin Description
Pin Name Description
ANT 50 ohm antenna output. The antenna port impedance affects output power and
harmonic emissions. An L-C low-pass filter may be needed to sufficiently filter
harmonic emissions. Antenna can be single core wire of approximately 17cm
length or PCB trace antenna. VCC Operating voltage for the transmitter. VCC
should be bypassed with a .01uF ceramic capacitor and filtered with a 4.7uF
tantalum capacitor. Noise on the power supply will degrade transmitter noise
performance. DATA Digital data input. This input is CMOS compatible and should
47
be driven with CMOS level inputs. GND Transmitter ground. Connect to ground
plane.
6. Operation
6.1. Theory
OOK(On Off Keying) modulation is a binary form of amplitude modulation. When
a logical 0 (data linelow) is being sent, the transmitter is off, fully suppressing the
carrier. In this state, the transmitter current is very low, less than 1mA. When a
logical 1 is being sent, the carrier is fully on. In this state, the module current
consumption is at its highest, about 11mA with a 3V power supply.
OOK is the modulation method of choice for remote control applications where
power consumption and cost are the primary factors. Because OOK transmitters
draw no power when they transmit a 0, they exhibit significantly better power
consumption than FSK transmitters. OOK data rate is limited by the start-up time
of the oscillator. High-Q oscillators which have very stable center frequencies take
longer to start-up than low-Q oscillators. The start-up time of the oscillator
determines the maximum data rate that the transmitter can send. Pin Name
Description ANT 50 ohm antenna output. The antenna port impedance affects
output power and harmonic emissions. An L-C low-pass filter may be needed to
sufficiently filter harmonic emissions. Antenna can be single core wire of
approximately 17cm length or PCB trace antenna. VCC Operating voltage for the
transmitter. VCC should be bypassed with a .01uF ceramic capacitor and filtered
with a 4.7uF tantalum capacitor. Noise on the power supply will degrade
transmitter noise performance. DATA Digital data input. This input is CMOS
48
compatible and should be driven with CMOS level inputs. GND Transmitter
ground. Connect to ground plane.
7.2. Data Rate
The oscillator start-up time is on the order of 40uSec, which limits the maximum
data rate to 4.8 kbit/sec.
7.3. SAW stabilized oscillator
The transmitter is basically a negative resistance LC oscillator whose center
frequency is tightly controlled by a SAW resonator. SAW (Surface Acoustic Wave)
resonators are fundamental frequency devices that resonate at frequencies much
higher than crystals.
433 MHz RF Receiver STR-433:
1. Overview
The STR-433 is ideal for short-range remote control applications where cost is a
primary concern. The receiver module requires no external RF components except
for the antenna. It generates virtually no emissions, making FCC and ETSI
approvals easy. The super-regenerative design exhibits exceptional sensitivity at a
49
very low cost. The manufacturing-friendly SIP style package and low-cost make
the STR-433 suitable for high volume applications.
2. Features
· Low Cost
· 5V operation
· 3.5mA current drain
· No External Parts are required
· Receiver Frequency: 433.92 MHZ
· Typical sensitivity: -105dBm
· IF Frequency: 1MHz
Receiver
3. Applications
· Car security system
· Sensor reporting
· Automation system
· Remote Keyless Entry (RKE)
50
· Remote Lighting Controls
· On-Site Paging
· Asset Tracking
· Wireless Alarm and Security Systems
· Long Range RFID
· Automated Resource Management
4. Specification
Parameter Symbol Min Typ. Max Unit
Parameter Symbol Min Typ. Max Unit
Operating Voltage Vcc 4.5 5.0 5.5 VDC
Operating Current Icc - 3.5 4.5 mA
Reception Bandwidth BW rx - 1.0 - MHz
Center Frequency Fc - 433.92 - MHz
Sensitivity - - -105 - dBm
Max Data Rate - 300 1k 3K Kbit/s
Turn On Time - - 25 - ms
Operating Temperature T op -10 - +60 °C
5. Pin Description
Pin Name Description
Pin Name Description
ANT Antenna input.
GND Receiver Ground. Connect to ground plane.
51
VCC(5V) VCC pins are electrically connected and provide operating voltage for
the receiver. VCC can be applied to either or both. VCC should be bypassed with
a .1μF ceramic capacitor. Noise on the power supply will degrade receiver
sensitivity. DATA Digital data output. This output is capable of driving one TTL or
CMOS load.
It is a CMOS compatible output.
6. Operation
7.1. Super-Regenerative AM Detection
The STR-433 uses a super-regenerative AM detector to demodulate the incoming
AM carrier. A superregenerative
detector is a gain stage with positive feedback greater than unity so that it
oscillates. An RC-time constant is included in the gain stage so that when the gain
stage oscillates, the gain will be lowered over time proportional to the RC time
constant until the oscillation eventually dies. When the oscillation dies, the current
draw of the gain stage decreases, charging the RC circuit, increasing the gain, and
ultimately the oscillation starts again. In this way, the oscillation of the gain stage is
turned on and off at a rate set by the RC time constant. This rate is chosen to be
super-audible but much lower than the main oscillation rate. Detection is
accomplished by measuring the emitter current of the gainstage. Any RF input
signal at the frequency of the main oscillation will aid the main oscillation in
restarting. If the amplitude of the RF input increases, the main oscillation will stay
on for a longer period of time, and the emitter current will be higher. Therefore, we
can detect the original base-band signal by simply low-pass filtering the emitter
current.The average emitter current is not very linear as a function of the RF input
52
level. It exhibits a 1/ln response because of the exponentially rising nature of
oscillator start-up. The steep slope of a logarithmnear zero results in high
sensitivity to small input signals.
7.2. Data Slicer
The data slicer converts the base-band analog signal from the super-regenerative
detector to a CMOS/TTL compatible output. Because the data slicer is AC coupled
to the audio output, there is a minimum data rate. AC coupling also limits the
minimum and maximum pulse width. Typically, data is encoded on the transmit
side using pulse-width modulation (PWM) or non-return-to-zero (NRZ).The most
common source for NRZ data is from a UART embedded in a micro-controller.
Applications that use NRZ data encoding typically involve microcontrollers. The
most common source for PWM data is from a remote control IC such as the HC-
12E from Holtek or ST14 CODEC from SunromTechnologies.
Data is sent as a constant rate square-wave. The duty cycle of that square wave will
generally be either33% (a zero) or 66% (a one). The data slicer on the STR-433 is
optimized for use with PWM encodeddata, though it will work with NRZ data if
certain encoding rules are followed.
7.3. Power Supply
The STR-433 is designed to operate from a 5V power supply. It is crucial that this
power supply be very quiet. The power supply should be bypassed using a 0.1uF
low-ESR ceramic capacitor and a 4.7uF tantalum capacitor. These capacitors
should be placed as close to the power pins as possible. The STR-433 is designed
53
for continuous duty operation. From the time power is applied, it can take up to
750mSec for the data output to become valid.
7.4. Antenna Input
It will support most antenna types, including printed antennas integrated directly
onto the PCB and
simple single core wire of about 17cm. The performance of the different antennas
varies. Any time a
trace is longer than 1/8th the wavelength of the frequency it is carrying, it should be
a 50 ohm microstrip.
Operation & testing of HT12E and HT12D.
HT12E are CMOS ICs with working voltage ranging from 2.4v to 12v.
Encoder HT12E has eight address and another four address/data lines. The data
set on these twelve lines (address and address/data lines) is serially transmitted
when the transmit enable pin TE is taken low. The data output appears serially on
the D pin. The data is transmitted four times in succession. It consists of differing
length of positive-going pulses for ‘1’ and ‘0’ , the pulse-width for ‘0’ being twice
the pulse-width for ‘1’. The frequency of these pulses may lie between 1.5 and 7
KHZ depending on the resistor value between OSC1 and OSC2 pins. The internal
oscillator frequency of decoder HT12D is 50 times the oscillator frequency of
encoder HT12e. The values of timing resistors connected between OSC1 and
OSC2 pins of HT12e and HT12D , for given supply voltages , can be found out
54
from the graphs given in the datasheet of the respective clips .The resistor values
used in the circuits here are chosen for approximately 3kHz frequency for the
encoder (HT12E) and 150 kHz for decoder HT12D at V of 5V.
The HT12D receives the data from the HT12E on its D pin serially. If the
address part of the data received matches the levels on ‘0’ through A7 pins fours
times in succession, the valid transmission (VT) pin is taken high. The data on
pins AD8 through AD11 of the HT12e appears on pins D8 through D11 of the
HT12D . Thus the device acts a receiver of 4-bit data (16 device acts a receiver of
4-bit data (16 possible codes with 8-bit addressing (256 possible channels).
For testing the circuit one needs the functional serviceability and
synchronization of the frequency of operation., Once the frequency of the pair is
aligned, on pressing of apush switch on the encoder, LED on the decoder should
glow. One can also check the transfer of data on pins. AD8 through AD11 (the
data pins of the encoder can be set as high or low using switches S2 through S5 ),
which is latched n pins D8 through D11 of the decoder once TE pin is taken low
momentarily using push switch S1. This completes the testing of encoder decoder
pair of HT12E and HT12D.
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56
CHAPTER 5GSM MODEM
GSM
.
Global System for Mobile communications (GSM: originally from
Group Special Mobile) is the most popular standard for mobile phones in the
world. Its promoter, the GSM Association, estimates that 82% of the global mobile
market uses the standard. GSM is used by over 2 billion people across more than
212 countries and territories. Its ubiquity makes international roaming very
common between mobile phone operators, enabling subscribers to use their phones
in many parts of the world. GSM differs from its predecessors in that both signaling
and speech channels are digital call quality, and so is considered a second
generation (2G) mobile phone system. This has also meant that data
communication were built into the system using the 3rd Generation Partnership
Project (3GPP).
The GSM logo is used to identify compatible handsets and equipment
57
The key advantage of GSM systems to consumers has been better voice quality and
low-cost alternatives to making calls, such as the Short message service (SMS, also
called "text messaging"). The advantage for network operators has been the ease of
deploying equipment from any vendors that implement the standard. Like other
cellular standards, GSM allows network operators to offer roaming services so that
subscribers can use their phones on GSM networks all over the world.
Newer versions of the standard were backward-compatible with the original GSM
phones. For example, Release '97 of the standard added packet data capabilities, by
means of General Packet Radio Service (GPRS). Release '99 introduced higher
speed data transmission using Enhanced Data Rates for GSM Evolution (EDGE).
History
In 1982, the European Conference of Postal and Telecommunications
Administrations (CEPT) created the Groupe Spécial Mobile (GSM) to develop a
standard for a mobile telephone system that could be used across Europe. In 1987,
a memorandum of understanding was signed by 13 countries to develop a common
cellular telephone system across Europe.[6][7]
In 1989, GSM responsibility was transferred to the European Telecommunications
Standards Institute (ETSI) and phase I of the GSM specifications were published in
1990. The first GSM network was launched in 1991 by Radiolinja in Finland with
joint technical infrastructure maintenance from Ericsson. By the end of 1993, over
a million subscribers were using GSM phone networks being operated by 70
carriers across 48 countries.[9]
Technical details
GSM is a cellular network, which means that mobile phones connect to it by
searching for cells in the immediate vicinity. GSM networks operate in four
58
different frequency ranges. Most GSM networks operate in the 900 MHz or 1800
MHz bands. Some countries in the Americas (including Canada and the United
States) use the 850 MHz and 1900 MHz bands because the 900 and 1800 MHz
frequency bands were already allocated.
The rarer 400 and 450 MHz frequency bands are assigned in some countries,
notably Scandinavia, where these frequencies were previously used for first-
generation systems.
In the 900 MHz band the uplink frequency band is 890–915 MHz, and the
downlink frequency band is 935–960 MHz. This 25 MHz bandwidth is subdivided
into 124 carrier frequency channels, each spaced 200 kHz apart. Time division
multiplexing is used to allow eight full-rate or sixteen half-rate speech channels per
radio frequency channel. There are eight radio timeslots (giving eight burst periods)
grouped into what is called a TDMA frame. Half rate channels use alternate frames
in the same timeslot. The channel data rate is 270.833 kbit/s, and the frame duration
is 4.615 ms.
The transmission power in the handset is limited to a maximum of 2 watts in
GSM850/900 and 1 watt in GSM1800/1900.
GSM has used a variety of voice codecs to squeeze 3.1 kHz audio into between 5.6
and 13 kbit/s. Originally, two codecs, named after the types of data channel they
were allocated, were used, called Half Rate (5.6 kbit/s) and Full Rate (13 kbit/s).
These used a system based upon linear predictive coding (LPC). In addition to
being efficient with bitrates, these codecs also made it easier to identify more
important parts of the audio, allowing the air interface layer to prioritize and better
protect these parts of the signal.
GSM was further enhanced in 1997 with the Enhanced Full Rate (EFR) codec, a
12.2 kbit/s codec that uses a full rate channel. Finally, with the development of
UMTS, EFR was refactored into a variable-rate codec called AMR-Narrowband,
59
which is high quality and robust against interference when used on full rate
channels, and less robust but still relatively high quality when used in good radio
conditions on half-rate channels.
There are four different cell sizes in a GSM network—macro, micro, pico and
umbrella cells. The coverage area of each cell varies according to the
implementation environment. Macro cells can be regarded as cells where the base
station antenna is installed on a mast or a building above average roof top level.
Micro cells are cells whose antenna height is under average roof top level; they are
typically used in urban areas. Picocells are small cells whose coverage diameter is a
few dozen meters; they are mainly used indoors. Umbrella cells are used to cover
shadowed regions of smaller cells and fill in gaps in coverage between those cells.
Cell horizontal radius varies depending on antenna height, antenna gain and
propagation conditions from a couple of hundred meters to several tens of
kilometers. The longest distance the GSM specification supports in practical use is
35 kilometres (22 mi). There are also several implementations of the concept of an
extended cell, where the cell radius could be double or even more, depending on
the antenna system, the type of terrain and the timing advance.
Indoor coverage is also supported by GSM and may be achieved by using an indoor
picocell base station, or an indoor repeater with distributed indoor antennas fed
through power splitters, to deliver the radio signals from an antenna outdoors to the
separate indoor distributed antenna system. These are typically deployed when a lot
of call capacity is needed indoors, for example in shopping centers or airports.
However, this is not a prerequisite, since indoor coverage is also provided by in-
building penetration of the radio signals from nearby cells.
The modulation used in GSM is Gaussian minimum-shift keying (GMSK), a kind
of continuous-phase frequency shift keying. In GMSK, the signal to be modulated
onto the carrier is first smoothed with a Gaussian low-pass filter prior to being fed
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to a frequency modulator, which greatly reduces the interference to neighboring
channels (adjacent channel interference).
Interference with audio devices
This is a form of RFI, and could be mitigated or eliminated by use of additional
shielding and/or bypass capacitors in these audio devices. However, the increased
cost of doing so is difficult for a designer to justify.
It is a common occurrence for a nearby GSM handset to induce a "dit, dit di-dit, dit
di-dit, dit di-dit" output on PA's, wireless microphones, home stereo systems,
televisions, computers, cordless phones, and personal music devices. When these
audio devices are in the near field of the GSM handset, the radio signal is strong
enough that the solid state amplifiers in the audio chain act as a detector. The
clicking noise itself represents the power bursts that carry the TDMA signal. These
signals have been known to interfere with other electronic devices, such as car
stereos and portable audio players.
Network structure
The structure of a GSM network
The network behind the GSM system seen by the customer is large and
complicated in order to provide all of the services which are required. It is divided
into a number of sections and these are each covered in separate articles.
the Base Station Subsystem (the base stations and
their controllers).
the Network and Switching Subsystem (the part of
the network most similar to a fixed network). This
is sometimes also just called the core network.
the GPRS Core Network (the optional part which
allows packet based Internet connections).
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all of the elements in the system combine to
produce many GSM services such as voice calls
and SMS.
Subscriber identity module
One of the key features of GSM is the Subscriber Identity Module (SIM),
commonly known as a SIM card. The SIM is a detachable smart card containing
the user's subscription information and phonebook. This allows the user to retain
his or her information after switching handsets. Alternatively, the user can also
change operators while retaining the handset simply by changing the SIM. Some
operators will block this by allowing the phone to use only a single SIM, or only a
SIM issued by them; this practice is known as SIM locking, and is illegal in some
countries.
In Australia, Canada, Europe and the United States many operators lock the
mobiles they sell. This is done because the price of the mobile phone is typically
subsidised with revenue from subscriptions, and operators want to try to avoid
subsidising competitor's mobiles. A subscriber can usually contact the provider to
remove the lock for a fee, utilize private services to remove the lock, or make use
of ample software and websites available on the Internet to unlock the handset
themselves. While most web sites offer the unlocking for a fee, some do it for free.
The locking applies to the handset, identified by its International Mobile
Equipment Identity (IMEI) number, not to the account (which is identified by the
SIM card). It is always possible to switch to another (non-locked) handset if such a
handset is available.
Some providers will unlock the phone for free if the customer has held an account
for a certain time period. Third party unlocking services exist that are often quicker
and lower cost than that of the operator. In most countries, removing the lock is
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legal. United States-based AT&T and T-Mobile provide free unlocking services to
their customers after 3 months of subscription.
In countries like Belgium, India, Indonesia and Pakistan, etc., all phones are sold
unlocked. However, in Belgium, it is unlawful for operators there to offer any form
of subsidy on the phone's price. This was also the case in Finland until April 1,
2006, when selling subsidized combinations of handsets and accounts became
legal, though operators have to unlock phones free of charge after a certain period
(at most 24 months).
GSM security
GSM was designed with a moderate level of security. The system was designed to
authenticate the subscriber using a pre-shared key and challenge-response.
Communications between the subscriber and the base station can be encrypted. The
development of UMTS introduces an optional USIM, that uses a longer
authentication key to give greater security, as well as mutually authenticating the
network and the user - whereas GSM only authenticated the user to the network
(and not vice versa). The security model therefore offers confidentiality and
authentication, but limited authorization capabilities, and no non-repudiation.
GSM uses several cryptographic algorithms for security. The A5/1 and A5/2 stream
ciphers are used for ensuring over-the-air voice privacy. A5/1 was developed first
and is a stronger algorithm used within Europe and the United States; A5/2 is
weaker and used in other countries. A large security advantage of GSM over earlier
systems is that the Key, the crypto variable stored on the SIM card that is the key to
any GSM ciphering algorithm, is never sent over the air interface. Serious
weaknesses have been found in both algorithms, and it is possible to break A5/2 in
real-time in a ciphertext-only attack. The system supports multiple algorithms so
operators may replace that cipher with a stronger one.
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64
CHAPTER 6POWER SUPPLY
REGULATED POWER SUPPLY
A variable regulated power supply, also called a variable bench power
supply, is one where you can continuously adjust the output voltage to your
requirements. Varying the output of the power supply is the recommended
way to test a project after having double checked parts placement against
circuit drawings and the parts placement guide.
This type of regulation is ideal for having a simple variable bench power
supply. Actually this is quite important because one of the first projects a
hobbyist should undertake is the construction of a variable regulated power
supply. While a dedicated supply is quite handy e.g. 5V or 12V, it's much
handier to have a variable supply on hand, especially for testing.
Most digital logic circuits and processors need a 5 volt power supply. To use
these parts we need to build a regulated 5 volt source. Usually you start with
an unregulated power To make a 5 volt power supply, we use a LM7805
voltage regulator IC (Integrated Circuit). The IC is shown below.
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The LM7805 is simple to use. You simply connect the positive lead of your
unregulated DC power supply (anything from 9VDC to 24VDC) to the Input
pin, connect the negative lead to the Common pin and then when you turn on
the power, you get a 5 volt supply from the Output pin.
CIRCUIT FEATURES
Brief description of operation: Gives out well regulated +5V output, output
current capability of 100 mA
Circuit protection: Built-in overheating protection shuts down output when
regulator IC gets too hot
Circuit complexity: Very simple and easy to build
Circuit performance: Very stable +5V output voltage, reliable operation
Availability of components: Easy to get, uses only very common basic
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components Design testing: Based on datasheet example circuit, I have used
this circuit succesfully as part of many electronics projects
Applications: Part of electronics devices, small laboratory power supply
Power supply voltage: Unreglated DC 8-18V power supply
Power supply current: Needed output current + 5 mA
Component costs: Few dollars for the electronics components + the input
transformer cost
BLOCK DIAGRAM:
The above block diagram will shows the regulated power supply in this
the power supply can be given from 230V AC supply which will be given to
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the 12v-0-12v step down transformer whose output voltage 12V AC. Again
this voltage can be converted into DC voltage by using the Bridge rectifier,
but this voltage is a pulsating DC voltage and this can be converting into pure
DC by connecting the capacitors, and this pure 12V DC will be given to the
7805 voltage regulators whose output voltage is an 5V DC and this can be
given to the microcontroller as a power supply.
EXAMPLE CIRCUIT DIAGRAM:
WE CAN EVEN USE A USB CONNECTOR FOR THE REQUIRED
SUPPLY INSTEAD OF THE ABOVE CIRCUIT
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Introduction
The most commonly used Character based LCDs are based on Hitachi's HD44780
controller or other which are compatible with HD44580. In this tutorial, we will
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CHAPTER 7LCD INTERFACING
discuss about character based LCDs, their interfacing with various
microcontrollers, various interfaces (8-bit/4-bit), programming, special stuff and
tricks you can do with these simple looking LCDs which can give a new look to
your application.
Pin Description
The most commonly used LCD’s found in the market today are 1 Line, 2 Line or 4
Line LCDs which have only 1 controller and support at most of 80 characters,
whereas LCDs supporting more than 80 characters make use of 2 HD44780
controllers.
Most LCDs with 1 controller has 14 Pins and LCDs with 2 controller has 16 Pins
(two pins are extra in both for back-light LED connections). Pin description is
shown in the table below.
Pin No. Name Description
Pin no. 1 VSS Power supply (GND)
Pin no. 2 VCC Power supply (+5V)
Pin no. 3 VEE Contrast adjust
Pin no. 4 RS0 = Instruction input
1 = Data input
Pin no. 5 R/W 0 = Write to LCD
module
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1 = Read from LCD
module
Pin no. 6 EN Enable signal
Pin no. 7 D0 Data bus line 0 (LSB)
Pin no. 8 D1 Data bus line 1
Pin no. 9 D2 Data bus line 2
Pin no. 10 D3 Data bus line 3
Pin no. 11 D4 Data bus line 4
Pin no. 12 D5 Data bus line 5
Pin no. 13 D6 Data bus line 6
Pin no. 14 D7 Data bus line 7 (MSB)
DDRAM - Display Data RAM
Display data RAM (DDRAM) stores display data represented in 8-bit character
codes. Its extended capacity is 80 X 8 bits, or 80 characters. The area in display
data RAM (DDRAM) that is not used for display can be used as general data RAM.
So whatever you send on the DDRAM is actually displayed on the LCD. For LCDs
like 1x16, only 16 characters are visible, so whatever you write after 16 chars is
written in DDRAM but is not visible to the user.
CGROM - Character Generator ROM
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Now you might be thinking that when you send an ASCII value to DDRAM, how
the character is displayed on LCD? So the answer is CGROM. The character
generator ROM generates 5 x 8 dot or 5 x 10 dot character patterns from 8-bit
character codes (see Figure 5 and Figure 6 for more details). It can generate 208 5 x
8 dot character patterns and 32 5 x 10 dot character patterns. User defined character
patterns are also available by mask-programmed ROM.
As you can see in both the code maps, the character code from 0x00 to 0x07 is
occupied by the CGRAM characters or the user defined characters. If user wants to
display the fourth custom character then the code to display it is 0x03 i.e. when
user sends 0x03 code to the LCD DDRAM then the fourth user created character or
pattern will be displayed on the LCD.
CGRAM - Character Generator RAM
As clear from the name, CGRAM area is used to create custom characters in LCD.
In the character generator RAM, the user can rewrite character patterns by
program. For 5 x 8 dots, eight character patterns can be written, and for 5 x 10 dots,
four character patterns can be written.
BF - Busy Flag
Busy Flag is a status indicator flag for LCD. When we send a command or data to
the LCD for processing, this flag is set (i.e. BF =1) and as soon as the instruction is
executed successfully this flag is cleared (BF = 0). This is helpful in producing and
exact amount of delay for the LCD processing.
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To read Busy Flag, the condition RS = 0 and R/W = 1 must be met and The MSB
of the LCD data bus (D7) act as busy flag. When BF = 1 means LCD is busy and
will not accept next command or data and BF = 0 means LCD is ready for the next
command or data to process.
Instruction Register (IR) and Data Register (DR)
There are two 8-bit registers in HD44780 controller Instruction and Data register.
Instruction register corresponds to the register where you send commands to LCD
e.g. LCD shift command, LCD clear, LCD address etc. and Data register is used for
storing data which is to be displayed on LCD. When send the enable signal of the
LCD is asserted, the data on the pins is latched in to the data register and data is
then moved automatically to the DDRAM and hence is displayed on the LCD.
Data Register is not only used for sending data to DDRAM but also for CGRAM,
the address where you want to send the data, is decided by the instruction you send
to LCD.
4-bit programming of LCD
In 4-bit mode the data is sent in nibbles, first we send the higher nibble and then the
lower nibble. To enable the 4-bit mode of LCD, we need to follow special sequence
of initialization that tells the LCD controller that user has selected 4-bit mode of
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operation. We call this special sequence as resetting the LCD. Following is the
reset sequence of LCD.
Wait for about 20mS
Send the first init value (0x30)
Wait for about 10mS
Send second init value (0x30)
Wait for about 1mS
Send third init value (0x30)
Wait for 1mS
Select bus width (0x30 - for 8-bit and 0x20 for 4-bit)
Wait for 1mS
The busy flag will only be valid after the above reset sequence. Usually we do not
use busy flag in 4-bit mode as we have to write code for reading two nibbles from
the LCD. Instead we simply put a certain amount of delay usually 300 to 600uS.
This delay might vary depending on the LCD you are using, as you might have a
different crystal frequency on which LCD controller is running. So it actually
depends on the LCD module you are using.
In 4-bit mode, we only need 6 pins to interface an LCD. D4-D7 are the data pins
connection and Enable and Register select are for LCD control pins. We are not
using Read/Write (RW) Pin of the LCD, as we are only writing on the LCD so we
have made it grounded permanently. If you want to use it, then you may connect it
on your controller but that will only increase another pin and does not make any big
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difference. Potentiometer RV1 is used to control the LCD contrast. The unwanted
data pins of LCD i.e. D0-D3 are connected to ground.
Sending data/command in 4-bit Mode
We will now look into the common steps to send data/command to LCD when
working in 4-bit mode. In 4-bit mode data is sent nibble by nibble, first we send
higher nibble and then lower nibble. This means in both command and data sending
function we need to separate the higher 4-bits and lower 4-bits.
The common steps are:
Mask lower 4-bits
Send to the LCD port
Send enable signal
Mask higher 4-bits
Send to LCD port
Send enable signal
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76
CHAPTER 8SERIAL
INTERFACING (MAX 232)
MAX 232
Introduction
MAX-232 is primary used for people building electronics with an RS-232
interface. Serial RS-232 communication works with voltages (-15V ... -3V for
high) and +3V ... +15V for low) which are not compatible with normal computer
logic voltages. To receive serial data from an RS-232 interface the voltage has to be
reduced, and the low and high voltage level inverted. In the other direction (sending
data from some logic over RS-232) the low logic voltage has to be "bumped up",
and a negative voltage has to be generated, too.
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Fig 5.11 Pin Diagram Of Max 232
Introduction
In telecommunications, RS-232 is a standard for serial binary data interconnection
between a DTE (Data terminal equipment) and a DCE (Data Circuit-terminating
Equipment). It is commonly used in computer serial ports.
Scope of the Standard:
The Electronic Industries Alliance (EIA) standard RS-232-C [3] as of 1969 defines:
Electrical signal characteristics such as voltage levels, signaling rate, timing and
slew-rate of signals, voltage withstand level, short-circuit behavior, maximum stray
capacitance and cable length
Interface mechanical characteristics, pluggable connectors and pin identification
Functions of each circuit in the interface connector
Standard subsets of interface circuits for selected telecom applications
The standard does not define such elements as character encoding (for example,
ASCII, Baudot or EBCDIC), or the framing of characters in the data stream (bits
per character, start/stop bits, parity). The standard does not define protocols for
error detection or algorithms for data compression.
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The standard does not define bit rates for transmission, although the standard says
it is intended for bit rates lower than 20,000 bits per second. Many modern devices
can exceed this speed (38,400 and 57,600 bit/s being common, and 115,200 and
230,400 bit/s making occasional appearances) while still using RS-232 compatible
signal levels.
Details of character format and transmission bit rate are controlled by the serial port
hardware, often a single integrated circuit called a UART that converts data from
parallel to serial form. A typical serial port includes specialized driver and receiver
integrated circuits to convert between internal logic levels and RS-232 compatible
signal levels.
Circuit Working Description
In this circuit the MAX 232 IC used as level logic converter. The MAX232 is a
dual driver/receiver that includes a capacive voltage generator to supply EIA 232
voltage levels from a single 5v supply. Each receiver converts EIA-232 to 5v
TTL/CMOS levels. Each driver converts TLL/CMOS input levels into EIA-232
levels.
79
In this circuit the microcontroller transmitter pin is connected in the MAX232
T2IN pin which converts input 5v TTL/CMOS level to RS232 level. Then T2OUT
pin is connected to reviver pin of 9 pin D type serial connector which is directly
connected to PC.
In PC the transmitting data is given to R2IN of MAX232 through transmitting pin
of 9 pin D type connector which converts the RS232 level to 5v TTL/CMOS level.
The R2OUT pin is connected to receiver pin of the microcontroller. Likewise the
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data is transmitted and received between the microcontroller and PC or other
device vice versa.
81
82
CHAPTER 9SOURCE CODE
Source Code
# include <8052.h>
# include "LcdV2.h" // On P0
# include "GsmV1.h" // On Serial Port
# include "VerV1.h" // No Port
# define NO 1
# define YES 0
# define DEVICE1 P2_0
# define RX_BUF_SIZE 30
# define SMS_DATA_LEN 5
# define SMS_INDEX 43
# define CMD1_START 0
# define CMD1_LEN 2
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# define CMD2_START 0
# define CMD2_LEN 9
# define CMD3_START 9
# define CMD3_LEN 17
# define CMD4_START 26
# define CMD4_LEN 10
# define CMD5_START 36
# define CMD5_LEN 5
# define CMD6_START 41
# define CMD6_LEN 4
# define CMD7_START 41
# define CMD7_LEN 4
# define ERROR_STR_LEN 5
# define OK_LEN 2
# define CR_LEN 3
/************************************************ Global variable
declarations */
unsigned char gucRxBuf[RX_BUF_SIZE],
gucSmsData[SMS_DATA_LEN];
unsigned char gucSmsCount = 0,
gucRxCount = 0,
gucGsmCh = 0;
unsigned int gucGsmState = 0;
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unsigned char gucAtCmds[49] =
"AT+CMGF=0AT+CNMI=2,2,0,0,0AT+IFC=O,OAT&D0ATE0ATE1";
/
***************************************************************
Prototypes */
void SerialInit(void);
void GsmInit(void);
void SendInitAtCmds(void);
void SerialPutc(unsigned char ucCh);
void SerialPut(unsigned char ucIndex,unsigned int ucLen);
unsigned char SendAtCmd(unsigned char ucCmdStart,unsigned char
ucCmdLen);
void SendSms(unsigned char *ucpStr,unsigned char Len);
void SendSms2(unsigned char *ucpStr,unsigned char Len);
void RecieveSms(unsigned char *ucSmsData, unsigned char ucLen);
/**************************************************** Function
Definitions */
void serial0() interrupt 4
{
gucGsmCh = SBUF;
switch(gucGsmState)
{
85
case 0:
if(gucGsmCh == '+')
gucGsmState = 1;
break;
case 1:
if((gucGsmCh == 'c') || (gucGsmCh == 'C'))
gucGsmState = 2;
else
gucGsmState = 0;
break;
case 2:
if((gucGsmCh == 'm') || (gucGsmCh == 'M'))
gucGsmState = 3;
else
gucGsmState = 0;
break;
case 3:
if((gucGsmCh == 't') || (gucGsmCh == 'T'))
gucGsmState = 4;
else
gucGsmState = 0;
break;
case 4:
if(gucGsmCh == ':')
gucGsmState = 5;
else
gucGsmState = 0;
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break;
case 5:
gucSmsCount++;
gucRxCount = 0;
if(gucSmsCount >= SMS_INDEX)
gucSmsData[gucSmsCount - SMS_INDEX]
= gucGsmCh;
break;
defalut:
break;
}
gucRxBuf[gucRxCount] = gucGsmCh;
gucRxCount++;
if(gucRxCount >= RX_BUF_SIZE)
gucRxCount = 0;
RI = 0;
}
void GsmInit(void)
{
unsigned char i;
gucGsmState = 0;
gucSmsCount = 0;
gucGsmCh = 0;
TI = 0;
RI = 0;
for(i = 0; i < RX_BUF_SIZE; i++)
87
gucRxBuf[i] = 0;
for(i = 0; i < SMS_DATA_LEN; i++)
gucSmsData[i] = 0;
}
void SendInitAtCmds(void)
{
while(!(SendAtCmd(CMD4_START,CMD4_LEN)));
while(!(SendAtCmd(CMD5_START,CMD5_LEN)));
while(!(SendAtCmd(CMD1_START,CMD1_LEN)));
while(!(SendAtCmd(CMD2_START,CMD2_LEN)));
while(!(SendAtCmd(CMD3_START,CMD3_LEN)));
while(!(SendAtCmd(CMD6_START,CMD6_LEN)));
}
void SerialInit(void)
{
TMOD = 0x20;
TH1 = 0xfd;
SCON = 0x50;
}
void SerialPutc(unsigned char ucCh)
{
unsigned int i = 0;
unsigned int j = 0;
88
SBUF = ucCh;
while(TI == 0);
TI = 0;
for(i = 0; i < 20000; i++);
}
void SerialPut(unsigned char ucIndex,unsigned int ucLen)
{
unsigned int i;
for(i = ucIndex; i < (ucIndex + ucLen); i++)
SerialPutc(gucAtCmds[i]);
SerialPutc(0x0d);
SerialPutc(0x0a);
}
unsigned char SendAtCmd(unsigned char ucCmdStart,unsigned char
ucCmdLen)
{
unsigned int i,j;
gucRxCount = 0;
SerialPut(ucCmdStart,ucCmdLen);
for(j = 0; j < 5; j++)
for(i = 0; i < 40000; i++);
if((gucRxBuf[ucCmdLen+3] == 'O') || (gucRxBuf[ucCmdLen+3] ==
'o'))
{
for(i = ucCmdLen+3; i < ucCmdLen+5; i++)
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LcdPutc(gucRxBuf[i]);
gucRxCount = 0;
}
else
{
#ifdef GSM_DEBUG
if((gucRxBuf[ucCmdLen+3] == 'E') || (gucRxBuf[ucCmdLen+3] ==
'e'))
{
for(i = ucCmdLen+3; i < ucCmdLen+8; i++)
LcdPutc(gucRxBuf[i]);
gucRxCount = 0;
}
}
void RecieveSms(unsigned char *ucSmsData, unsigned char ucLen)
{
unsigned int i,j;
GsmInit();
while(gucSmsCount < SMS_INDEX);
for(i = 0; i < 10; i++)
for(j = 0; j < 40000; j++);
for(i = 0; i < ucLen; i++)
*(ucSmsData + i) = gucSmsData[i];
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*(ucSmsData + i) = 0;
}
void SendSms(unsigned char *ucpStr,unsigned char ucLen)
{
# define SMS_CMD_LEN1 21
# define CTRLZ 0x1a
unsigned char ucSmsSendCmd[21] = "AT+CMGS=+918179715208";
unsigned int ucIndex = 0,
i = 0,
j = 0;
gucRxCount = 0;
for(ucIndex = 0; ucIndex < SMS_CMD_LEN1; ucIndex++)
SerialPutc(ucSmsSendCmd[ucIndex]);
for(ucIndex = 0; ucIndex < SMS_CMD_LEN1; ucIndex++)
for(i = 0; i < ucLen; i++)
SerialPutc(*(ucpStr+i));
for(i = 0; i < 2; i++)
for(j = 0; j < 40000; j++);
SerialPutc(CTRLZ);
for(i = 0; i < 10; i++)
for(j = 0; j < 40000; j++);
}
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# define LCD_DELAY 400
# define LCD_PORT P0
# define RS P0_0
# define RW P0_1
# define EN P0_2
bit gbStatus = 0;
void Delay(unsigned int j)
{
unsigned int i;
for(i = 0; i < j ; i++);
}
void LcdInitWrite(unsigned char ucCmd)
{
RS = 0;
RW = 0;
LCD_PORT = ucCmd;
EN = 1;
Delay(LCD_DELAY);
EN = 0;
}
void LcdCmd(unsigned char ucCmd)
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{
unsigned char ucTemp;
if(gbStatus)
{
gbStatus=0;
goto NEXT;
}
RS = 0;
NEXT:
RW = 0;
ucTemp = ucCmd;
ucTemp &= 0xf0;
LCD_PORT &= 0x0f;
LCD_PORT |= ucTemp;
EN = 1;
Delay(LCD_DELAY);
EN = 0;
ucTemp = (ucCmd >> 4);
ucTemp &= 0xf0;
LCD_PORT &= 0x0f;
LCD_PORT |= ucTemp;
}
void LcdData(unsigned char ucData)
{
93
gbStatus = 1;
RS = 1;
LcdCmd(ucData);
}
void LcdInit(void)
{
LcdCmd(0x28);
Delay(LCD_DELAY);
LcdCmd(0x85);
Delay(LCD_DELAY);
LcdCmd(6);
Delay(LCD_DELAY);
LcdCmd(1);
Delay(LCD_DELAY);
}
void LcdPuts(unsigned char *ucStr)
{
unsigned int i;
for(i = 0; ucStr[i] !=0 ; i++)
LcdData(ucStr[i]);
}
void LcdPutc(unsigned char ucCh)
{
LcdData(ucCh);
}
94
void LcdClear(void)
{
LcdCmd(0x01);
}
95
96
CHAPTER 10KEIL SOFTWARE
1. Click on the Keil uVision Icon on DeskTop
2. The following fig will appear
3. Click on the Project menu from the title bar
4. Then Click on New Project
97
5. Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\
98
6. Then Click on Save button above.
7. Select the component for u r project. i.e. Philips……
8. Click on the + Symbol beside of Philips
99
9. Select AT89S52 as shown below
10. Then Click on “OK”
11. The Following fig will appear
100
12. Then Click either YES or NO………mostly “NO”
13. Now your project is ready to USE
14. Now double click on the Target1, you would get another option
“Source group 1” as shown in next page.
101
15. Click on the file option from menu bar and select “new”
102
16. The next screen will be as shown in next page, and just maximize it
by double clicking on its blue boarder.
17. Now start writing program in either in “C” or “ASM”
18. For a program written in Assembly, then save it with extension “.
asm” and for “C” based program save it with extension “ .C”
103
19. Now right click on Source group 1 and click on “Add files to Group
Source”
104
20. Now you will get another window, on which by default “C” files will
appear.
105
21. Now select as per your file extension given while saving the file
22. Click only one time on option “ADD”
23. Now Press function key F7 to compile. Any error will appear if so
happen.
24. If the file contains no error, then press Control+F5 simultaneously.
25. The new window is as follows
106
26. Then Click “OK”
27. Now Click on the Peripherals from menu bar, and check your
required port as shown in fig below
28. Drag the port a side and click in the program file.
107
29. Now keep Pressing function key “F11” slowly and observe.
30. You are running your program successfully
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APPLICATIONS:
1. Applicable in industries to know the status of the machinery working properly or not
2. Applicable in hotels & restaurants, to provide better service to the customers
FUTURE SCOPE:
We can make controlling the devices through remote by using gsm modem. Data retrieving and controlling is also we can make
CONCLUSION:
We had concluded that the project is retrieving the data with the help of gsm modem. The arm controller is capable to control the rf communication and know
the status of the devices with the help of lcd display.
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CHAPTER 11BIBLIOGRAPHY
BIBLIOGRAPHY
The 8051 Micro controller and Embedded Systems
-Muhammad Ali Mazidi -Janice Gillispie Mazidi
The 8051 Micro controller Architecture, Programming & Applications
-Kenneth J.Ayala
Fundamentals Of Micro processors and Micro computer -B.Ram
Micro processor Architecture, Programming & Applications
-Ramesh S.Gaonkar
Electronic Components -D.V.Prasad
Wireless Communications - Theodore S. Rappaport
Mobile Tele Communications - William C.Y. Lee
References on the Web:
www.national.comwww.nxp.comwww.8052.com
www.microsoftsearch.comwww.geocities.com
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