IA-64 Architecture

RISC designed to cooperate with the compiler in order to achieve as much ILP as possible128 GPRs, 128 FPRs64 predicate registers of 1 bitSimilarities with VLIW Instruccions are issued in templates of up to

3 The compiler marks the limits between

groups of instructions that can be executed in parallel

Predication in IA-64

Particularly useful for branches difficult to predictIncreases ILP, but can also increase critical path lengthPredication on registers that mark the result of the conditions for conditional branchesAllows the parallel execution of several branchesIA-64 allows to predicate almost all its instructions

Example

Memory ReferencesSpeculation (I)

Speculation on data dependencesA load bypasses a store that could affect the same memory positionThe speculative/advanced load ,ld.a, stores the address accessed and the modified register in the ALAT (Advanced Load Address Table)Addresses affected by storage operations are verified in the ALAT

If the address matches an address in any entry, it is marked

Memory ReferencesSpeculation (II)

Before a non-speculative usse of the data generated by the speculative load, the ALAT is verified

Entry is not marked correct execution; clear entry Entry is marked speculation failed. The action to

take depends on the check instruction that is used.

Two kinds of check: ld.c: On failure, reload the data, now with the correct

value. It is used when the data has not been used yet chk.a: provides also the address of a routine to

execute that solved the problems generated by the failure. It re-executed the load and the additional instructions that have used the preloaded value

ExampleSource Code

Standard Load Advanced Load

Control Speculation for Loads

Speculation on control dependencesA special bit (NaT=Not a Thing) associted to the destination register marks the success of the load

In the FP registers it is a value called NaTVal.

The potential exceptions associated to these loads, ld.s, are defered till the control dependences are solved

This is not the case for the memory reference speculation

chk.s verifies the NaT bits / NatVal valuesBoth kinds of load speculation can be combined with the instruccions ld.sa and chk.a

ExampleSource Code Speculative Load