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Hybrid Optoelectric On-chip Interconnect Networks Yong-jin Kwon 1

Hybrid Optoelectric On-chip Interconnect Networks

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Hybrid Optoelectric On-chip Interconnect Networks. Yong- jin Kwon. Target Manycore System. CMesh. Mesh. Clos. Crossbar. On-chip network topology spectrum. Increasing diameter. Increasing radix. CMesh. Mesh. Clos. Crossbar. Related Works. [Vantrease’08] [Psota’07] [Kirman’06]. - PowerPoint PPT Presentation

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Page 1: Hybrid Optoelectric On-chip Interconnect Networks

Hybrid Optoelectric On-chip Interconnect Networks

Yong-jin Kwon

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Page 2: Hybrid Optoelectric On-chip Interconnect Networks

Target Manycore System

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Page 3: Hybrid Optoelectric On-chip Interconnect Networks

On-chip network topology spectrum

Increasing radix

Increasing diameter

Mesh CMesh Clos Crossbar

3

Page 4: Hybrid Optoelectric On-chip Interconnect Networks

Related Works

[Shacham’07][Petracca’08]

[Vantrease’08][Psota’07][Kirman’06]

[NOCS’09][Pan’09]

Mesh CMesh Clos Crossbar

4

Page 5: Hybrid Optoelectric On-chip Interconnect Networks

Outline

• Technology Background• Previous Studies and Motivation• Performance Analysis• Power Analysis• Conclusion

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Page 6: Hybrid Optoelectric On-chip Interconnect Networks

Photonic technology – photonic link

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Page 7: Hybrid Optoelectric On-chip Interconnect Networks

Silicon photonic link – Coupler

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Coupler loss = 1 dB

Page 8: Hybrid Optoelectric On-chip Interconnect Networks

Silicon photonic link – Ring modulator

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Modulator insertion loss = 0 – 1 dB

Energy spent in E-O conversion = 25 – 90 fJ/bt

(independent of link length)

Page 9: Hybrid Optoelectric On-chip Interconnect Networks

Silicon photonic link – Waveguide

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Waveguide loss = 0 – 5 dB/cm

Page 10: Hybrid Optoelectric On-chip Interconnect Networks

Silicon photonic link – Ring filter, photodetector

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Filter drop loss = 1.5 dB

Photodetector loss = 0.1 dB

Energy spent in O-E conversion = 25 - 60 fJ/bt

(independent of link length)

Receiver sensitivity = -20 dBm

Page 11: Hybrid Optoelectric On-chip Interconnect Networks

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Silicon photonic link – WDM Through ring loss = 1e-

4 – 1e-2 dB/ring

• Dense WDM (128 λ/wg, 10 Gbps/λ) improves bandwidth density (30x!!)

Page 12: Hybrid Optoelectric On-chip Interconnect Networks

12

Silicon photonic link – Energy cost

• E-O-E conversion cost – 50-150 fJ/bt (independent of length)

• Thermal tuning energy (increases with ring count)• External laser power (dependent on losses in

photonic devices)

Page 13: Hybrid Optoelectric On-chip Interconnect Networks

Silicon Photo

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Page 14: Hybrid Optoelectric On-chip Interconnect Networks

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Electrical technology

• Design constraints– 22 nm technology– 500 nm pitch– 5 GHz clock

• Design parameters– Wire width– Repeater size– Repeater spacing

FF FF FFRepeaters Repeaters

Repeater inserted pipelined wires

1.0 mm

2.5 mm

5.0 mm

7.5 mm

10.0 mm

Page 15: Hybrid Optoelectric On-chip Interconnect Networks

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Electrical technology

• Design constraints– 22 nm technology– 500 nm pitch– 5 GHz clock

• Design parameters– Wire width– Repeater size– Repeater spacing

FF FF FFRepeaters Repeaters

Repeater inserted pipelined wires

1.0 mm

2.5 mm

5.0 mm

7.5 mm

10.0 mm

Page 16: Hybrid Optoelectric On-chip Interconnect Networks

16

Electrical vs Optical links – Energy cost

Thermal tuning energy

Transmitter-Receiver energy

Elec: ElectricalOpt-A: Optical-AggressiveOpt-C: Optical-Conservative

Optical laser power not shown

(dependent on the physical layout)

Page 17: Hybrid Optoelectric On-chip Interconnect Networks

Outline

• Technology Background• Previous Studies and Motivation• Proposed Design• Performance and Power Analysis• Conclusion

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Page 18: Hybrid Optoelectric On-chip Interconnect Networks

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Clos Network

Page 19: Hybrid Optoelectric On-chip Interconnect Networks

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Photonic Clos for a 64-tile system

Page 20: Hybrid Optoelectric On-chip Interconnect Networks

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Power-Bandwidth tradeoff

CMeshX2Channel width = 128b

PClosChannel width = 64b

PClosChannel width = 128b

Off-chip laser power = 3.3 WComparable on-chip power for local traffic

Page 21: Hybrid Optoelectric On-chip Interconnect Networks

Problems and Motivations

• A mesh-like topology is highly optimized for local communication and hard to beat– Solution: use a underlying mesh topology

• A fully photonic network has higher power numbers on low utilization – Solution: make the photonic channels to be

turned off at low utilization

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Page 22: Hybrid Optoelectric On-chip Interconnect Networks

What Do We Need?

• An electrical network which connects all-to-all even when the laser is turned off

• A photonic network which (when turned on) provides benefits to the base electrical mesh

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Page 23: Hybrid Optoelectric On-chip Interconnect Networks

Outline

• Technology Background• Previous Studies and Motivation• Proposed Design• Performance and Power Analysis• Conclusion

23

Page 24: Hybrid Optoelectric On-chip Interconnect Networks

Concentrated Mesh with Photonic Express Channels

24

Express1 Express2

Page 25: Hybrid Optoelectric On-chip Interconnect Networks

Outline

• Technology Background• Previous Studies and Motivation• Proposed Design• Performance and Power Analysis• Conclusion

25

Page 26: Hybrid Optoelectric On-chip Interconnect Networks

Performance

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Page 27: Hybrid Optoelectric On-chip Interconnect Networks

Power - Electrical

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Page 28: Hybrid Optoelectric On-chip Interconnect Networks

Photonic vs Electric Power Comparison

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Page 29: Hybrid Optoelectric On-chip Interconnect Networks

Outline

• Technology Background• Previous Studies and Motivation• Proposed Design• Performance and Power Analysis• Conclusion

29

Page 30: Hybrid Optoelectric On-chip Interconnect Networks

Conclusion

• Maybe we do not need to shut down photonics on low utilization

• In order for photonics to be effective we need better devices– There is no power advantage in using photonics if

we can’t get to aggressive– We do win in bandwidth density but area is cheap

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Page 31: Hybrid Optoelectric On-chip Interconnect Networks

Acknowledgement

• Ajay Joshi – Help in power calculations and images

• Chris Batten– Brainstorming help

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Page 32: Hybrid Optoelectric On-chip Interconnect Networks

Thanks for your time

32


Lecture 25: Networks & Interconnect Networks on a Chip

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