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Catatan ProgressCatatan ProgressgYD1CHS’s Week End Project
Homebrew Poor Man Antenna Analyzer (HPMAA)
gYD1CHS’s Week End Project
Homebrew Poor Man Antenna Analyzer (HPMAA)Homebrew Poor Man Antenna Analyzer (HPMAA)Based on Vector Analysis Method
Homebrew Poor Man Antenna Analyzer (HPMAA)Based on Vector Analysis Method
Started from July 2010Started from July 2010
Schematic Diagram
Here is the schematic drawn by EAGLE software for building PCBHere is the schematic drawn by EAGLE software for building PCB
Genuine Schematic DiagramDiagram
PART 1PART‐1
Designed by VK5JST
Genuine Schematic DiagramDiagram
PART 2PART‐2
Designed by VK5JST
YD1CHS ‐ Homebrew A Poor Man Antenna Analyzer (HPMAA) – Ver 1.0
Note: Red line indicates additional jumpers that have to be connected
ISP – In Circuit Serial Programming
Socket #pin
MCU #pin Function
1 PB4 (MISO) = 18 MISO – ISP Prog
2 ‐ Vcc +5V
3 ‐ ‐
4 G d4 ‐ Ground
5 PC6 (Reset) = 1 Reset ‐ ISP Prog
6 ‐ Ground
7 PB5 (SCK) = 19 SCK ‐ ISP Prog
8 ‐ GND
9 PB3 (MOSI) = 17 MOSI ‐ ISP Prog
10 ‐ GND
LCD Interface
Socket #pin
MCU #pin Function
1 PD2 (INT0) 4 D4 LCD (11)1 PD2 (INT0) = 4 D4 – LCD (11)
2 PD3 (INT1) = 5 D5 – LCD (12)
3 ‐ Backlight LCD
4 PD4 (T0) = 6 D6 – LCD (13)
5 ‐ Contrast LCD
6 PD6 (AIN0) = 12 D7 – LCD (14)
7 ‐ Ground
8 PD7 (AIN1) = 13 En LCD (6)8 PD7 (AIN1) = 13 En – LCD (6)
9 Vcc +5V
10 PB0 (ICB) = 14 Vcc +5V
A Homebrew Poor Man Antenna Analyzer – Projects by YD1CHSA Homebrew Poor Man Antenna Analyzer – Projects by YD1CHS
STARTTest Bed:• AVR Atmega‐16• LCD 20x4 Welcome Message …
Note:Note:Intentionally, project was designed for AVR ATMEGA‐8 with a 16x2 LCD in order to i i i b th i d i
Intentionally, project was designed for AVR ATMEGA‐8 with a 16x2 LCD in order to i i i b th i d i
Battery voltage checking algorithm when voltage < 10minimize both size and price.
During firmware development I used an AVE
minimize both size and price.
During firmware development I used an AVE
algorithm, when voltage < 10 volt, then system will terminate next execution …
development, I used an AVE ATMEGA‐16 minimum board with 20x4 LCD as shown by right pictures
development, I used an AVE ATMEGA‐16 minimum board with 20x4 LCD as shown by right pictures
Display debugging process, both 3rd and 4th message will not be displayed on the 16x2
D L
right pictures.
Firmware was written by BASCOM AVR
right pictures.
Firmware was written by BASCOM AVR
not be displayed on the 16x2 version. They were displayed here, only for debugging purpose Shown values wereDo … LoopBASCOM AVR.BASCOM AVR. purpose. Shown values were generated by artificial inputs.
A Homebrew Poor Man Antenna Analyzer – Projects by YD1CHSA Homebrew Poor Man Antenna Analyzer – Projects by YD1CHS
HPMAA during debugging, using artificial inputs, that were generated by three dj bl d l di id
HPMAA during debugging, using artificial inputs, that were generated by three dj bl d l di idadjustabled voltage divider circuit (3 potensiometers). The ATMEGA‐16 board and 20 4 LCD h i th
adjustabled voltage divider circuit (3 potensiometers). The ATMEGA‐16 board and 20 4 LCD h i th20x4 LCD was shown in the picture.20x4 LCD was shown in the picture.
bl d d b dbl d d b dTable stored debugging data, we can see left table was debugging result, meanwhile i ht
Table stored debugging data, we can see left table was debugging result, meanwhile i htright one was mathematically simulation for several investigated inputs values Both gave an
right one was mathematically simulation for several investigated inputs values Both gave aninputs values. Both gave an almost similar results.inputs values. Both gave an almost similar results.
Week End 28‐29 Agustus 2010Converted firmware dari ATMEGA‐16 into ATMEGA‐8 and finished PCB Art Work for real design [Solved].Added a “Debug Menu” by activating PC.5 “LOW”, information displayed on theAdded a Debug Menu by activating PC.5 LOW , information displayed on the “Debug Menu” are: clock number during frequency counting, Integer values of Vin, V50 and Vout [Solved].Added a “Serial Comm To PC Menu” by activating PB.1 “LOW”, in this mode the y g ,ATMEGA‐8 send data / logged data into PC, then by a particular software these data could be shown as graphical information [Solved, but untested yet].Finishing Frequency Counter algorithm using Interupt method at the Timer1 (16 bits – as counter) [Solved].
Lesson LearntPada saat menggunakan ATMEGA‐8 di bread‐board, LCD tidak mau diinisiasi saat “Power Up”, namun dapat diinisiasi saat “Reset” – syarat ground yang dipakai reset sejalur dengan ground LCD Solusi karena clock mikrokontroler bekerja padasejalur dengan ground LCD Solusi: karena clock mikrokontroler bekerja pada band HF (8MHz), maka sambungan harus dibuat sependek mungkin, khusus untuk ground harus dibuat titik koneksi bersama. LCD baru dapat diinisiasi dan bekerja dengan sempurna ketika pin ground LCD secara langsung disambung ke Grounddengan sempurna ketika pin ground LCD secara langsung disambung ke Ground mikrokontroler. Pada frekuensi tinggi kondisi perkabelan sangat kritis [Solved].
Testing Frequency Counter, lumayan FT80‐C: 3.5MHz, FC: 3.501MHzFT80 C: 3.5MHz, FC: 3.501MHz
Rangkaian dikembangkan diatas bread board, yaitu bagian MCU dan Frequency Counter (74HC00 dan 74HC393),
b i l k FT 80Csumber sinyal menggunakan FT‐80C
Tampilan dirubah, frekuensi counter menampilkan dalam 3 digit dibelakang koma, sebelumnya hanya 2 digit saja
Kendala utama yang dihadapi dalam eksperimen yaitu menggunakan bread board, sehingga sangat rentan terpengaruh terhadap parasitik dan , gg g p g p pperilaku HF lainnya.
Eksperimen diatas ditujukan untuk melakukan debugging terhadap fi dit li di d l ATMEGA 8 t i i h dfirmware yang ditulis di dalam ATMEGA‐8, sementara sisi hardware merupakan tantangan tersendiri. Akan dilakukan segera.
ISTIRAHAT … MUDIK LEBARAN DULU …ISTIRAHAT … MUDIK LEBARAN DULU …
Disetrika
Direndam
Dijemur
PCB dibuat double layer, dengan menggunakan kertas Glossy Foto Paper yang disetrika ke PCB.
Siap dibor
Dites, namun frekuensi counter belum diaktifkancounter belum diaktifkan karena rangkaian front enddan pre‐scalernya belum selesai dibuat. Komponen yang dipakai toleransi 10%, sebab menggunakan komponen yang ada di Junk Box sajaBox saja.
FrekBandR (51//51) = 25.5 Ohm
(Toleransi 10%)R (100//100) = 50 Ohm
(Toleransi 10%) RemarkFrekBand
R (51//51) = 25.5 Ohm(Toleransi 10%)
R (100//100) = 50 Ohm(Toleransi 10%) Remark
Catatan:• Pada range frekuensi 1 74 –
Vin V50 Vout R X SWR Vin V50 Vout R X SWR1.74 486 283 158 27 0 1.46 488 214 239 56 0 1.122.59 489 280 160 28 0 1.44 493 212 242 57 0 1.143.40 486 283 160 28 0 1.44 488 213 240 56 0 1.12
1
2
(MHz)Select(Toleransi 10%) (Toleransi 10%) Remark
Vin V50 Vout R X SWR Vin V50 Vout R X SWR1.74 486 283 158 27 0 1.46 488 214 239 56 0 1.122.59 489 280 160 28 0 1.44 493 212 242 57 0 1.143.40 486 283 160 28 0 1.44 488 213 240 56 0 1.12
1
2
(MHz)Select(Toleransi 10%) (Toleransi 10%) Remark
Pada range frekuensi 1.74 7.56MHz menunjukkan hasil yang baik (blok warna hijau).
• Pada Frekuensi > 7.56MHz
5.30 482 275 161 29 0 1.42 487 209 240 57 0 1.145.05 481 280 161 28 0 1.44 485 211 239 56 0 1.127.56 484 279 165 29 0 1.42 488 212 242 57 0 1.148.17 533 288 176 0 30 >10 532 216 256 0 59 >10 Why?12.50 477 274 176 32 0 1.36 206 137 101 17 32 4.8 Level Dropped?
4
3
25.30 482 275 161 29 0 1.42 487 209 240 57 0 1.145.05 481 280 161 28 0 1.44 485 211 239 56 0 1.127.56 484 279 165 29 0 1.42 488 212 242 57 0 1.148.17 533 288 176 0 30 >10 532 216 256 0 59 >10 Why?12.50 477 274 176 32 0 1.36 206 137 101 17 32 4.8 Level Dropped?
4
3
2
belum memberikan hasil yang baik. Potensi problem: VCO, Diode Sudah Tidak Linear, dll?
25.20 478 269 177 32 0 1.36 488 206 247 59 0 1.18 Frek. Harmonik?18.75 207 284 99 0 26 >10 224 143 120 18 37 4.14 Level Dropped?21.51 472 247 203 41 0 1.18 313 214 170 12 37 6.11 Level Dropped?32.00 232 126 137 28 45 3.22 286 120 176 60 39 2.5 Level Dropped?
6
5 25.20 478 269 177 32 0 1.36 488 206 247 59 0 1.18 Frek. Harmonik?18.75 207 284 99 0 26 >10 224 143 120 18 37 4.14 Level Dropped?21.51 472 247 203 41 0 1.18 313 214 170 12 37 6.11 Level Dropped?32.00 232 126 137 28 45 3.22 286 120 176 60 39 2.5 Level Dropped?
6
5
Main Main Fine
TunningFine
Tunning HFHF
VoltageRegulator VoltageRegulator Freq Counter External Freq Counter External
TunningTunningTunningTunning HF
VCO BlockHF
VCO Block
db kdb k
BlockBlock Prescaler & Pre‐AmpPrescaler & Pre‐Amp
VCO Feedback Gain
VCO Feedback Gain
DebuggingDebugging
USARTPort
USARTPort
SwitchSwitch
LCDBacklight
LCD PortLCD Port
Vin
LCD
DiodeDiodeDC VoltageDC Voltage
VoutV50MCUBlockMCUBlock
ISP IISP I
Contrast
Diode DetectorBlock
Diode DetectorBlock
BandSelectorBand
Selector
DC VoltageAmp BlockDC VoltageAmp Block
ISP – In Circuit
Serial Prog
ISP – In Circuit
Serial Prog
ADCVoltage
Reference
ADCVoltage
Reference
AVR ATMEGA8
AVR ATMEGA8
I bought an old and cheapBand 1 sd 4 (1.6 sd 12.5 MHz)Band 1 sd 4 (1.6 sd 12.5 MHz)
I bought an old and cheap oscilloscope, named Kenwood CS‐1100A 100MHz, to evaluate signal shape especially at thesignal shape especially at the 5th and 6th band. For both bands the HPMAA were never gave correct calculation. Sogave correct calculation. So that, I though at must have been VFO problem, not firmware.
Picture above showed signal shape for the 1st to 4th band. Th h f tThe shapes were perfect sinusoidal signal. Meanwhile right picture showed signal shape for the 5th and 6th bandshape for the 5th and 6th band, they were unlinear, so that they must have a lot of harmonics. That is why the measurementsThat is why, the measurements result were always wrong at both bands. Band 5 sd 6 (12.5 sd 32 MHz)Band 5 sd 6 (12.5 sd 32 MHz)
Evaluate VFO Using Simulation Software, named Circuit MakerEvaluate VFO Using Simulation Software, named Circuit Maker
I put scope here …
Schematic was drawn as the original one, but several modifications were done, there aretransistor type from PN3563 to 2N3904 due to very hard to find here, R7 10 Ohm to a 1kOhm VR, which was set around 500 Ohm. At 10 Ohm, the VFO was fail to be generated,since gain intoduced by Q1 and Q2 was too week to start oscilation. The next page showsignal generated by VFO at the Buffer‘s Q6 output.
Evaluate VFO Using Simulation Software, named Circuit MakerEvaluate VFO Using Simulation Software, named Circuit Maker
NoteNoteLeft picture is output of the VFO with R7 = 10 Ohm (original design), it is fail to generated oscillation. L1 is 50uH, C1 is 50pF.Right picture is R7 = 500 Ohm, we can see that the VFO now g p ,oscillation can be generated successfully. The signal waveform is a perfect sinusoid.At real construction, I utilized a 1K Ohm VR (variable resistor) to replace the R7. With VR, it is easier to set an appropriate value to get a perfect VFO oscillation.
R7 = 10 OhmR7 = 10 Ohm R7 = 500 OhmR7 = 500 OhmR7 10 OhmR7 10 Ohm R7 500 OhmR7 500 Ohm
To be ContinuedTo be Continued