Hiroyasu Tajima Stanford Linear Accelerator Center VERTEX 2005 November 11, 2005 Chuzenji-lake, Japan GLAST Tracker Woodblock print by Hasui Kawase Kegon

Hiroyasu TajimaStanford Linear Accelerator Center

VERTEX 2005November 11, 2005

Chuzenji-lake, Japan

GLAST Tracker

Woodblock print by Hasui Kawase

Kegon fall Chuzenji lake

GLAST Tracker, H. Tajima, VERTEX 2005, NOV. 11, 2005

Outline

• Overview of GLAST Tracker. Requirements. Mechanical and electronics design.

• Production. Alignment. Production issues.

• Performance. Bad strips, hit efficiencies. TOT calibrations. Threshold, trigger dispersions. Transient noise issues.

• Current Status and Future Schedule.


GLAST/LAT Collaboration

Gamma-ray Large Gamma-ray Large Area Space TelescopeArea Space Telescope

Stanford University & Stanford Linear Accelerator CenterNASA Goddard Space Flight CenterNaval Research LaboratoryUniversity of California at Santa CruzSonoma State UniversityUniversity of WashingtonTexas A&M University – KingsvilleOhio State University

Commissariat a l’Energie Atomique, SaclayEcole Polytechnique, College de France,CENBG (Bordeaux)

Hiroshima UniversityInstitute of Space and Astronautical ScienceUniversity of Tokyo

Instituto Nazionale di Fisica NucleareAgenzia Spaziale ItalianaInstituto di Fisica Cosmica, CNR

Royal Institute of Technology, StockholmStockholms Universitet


GLAST/LAT Overview

• Satellite experiment to observe gamma-try from Universe. Wide energy range: 20 MeV – 300 GeV Large effective area: > 8000 cm2 (5xEGRET) Wide field of view: > 2 sr (4xEGRET)

• Scientific objectives. Dark matter.

• Neutralino annihilation. Particle acceleration.

• Cosmic ray origin

• Pair-conversion telescope. “Clear” signature. Background rejection.

e+ e–


Instrument Configuration

• Tracker: conversion, tracking. Angular resolution is dominated by scattering.

Converter thickness optimization.

• Calorimeter: energy measurement. 8.4 radiation length. Use shower development to compensate for the leak.

• Anti-coincidence detector: Efficiency > 99.97%.

Si Tracker90 m2 , 228 µm pitch~0.9 million channels

CsI Calorimeter8.4 radiation length

Anti-coincidence DetectorSegmented scintillator tiles99.97% efficiency

e+ e-


Requirements for Tracker

• Conversion Efficiency > 58%.• Aspect (H/W) ratio < 0.45 (for wide field of view).

• Active area > 19,000 cm2 (Fraction > 88%). • 6-in-a-row tracker trigger.

Efficiency > 90%. Single layer trigger rate < 50 kHz. Trigger jitter < ±300 ns for Q > 0.5 MIP.

• Threshold dispersion < 10%.

• Noise data volume: 40 noise hits per event. Average Noise occupancy < 5x10-5 .

• Hit efficiency > 98%• Dead time < 10% for 10 kHz.• Power consumption < 160 W.• Survival temperature range: -15 – 45 °C.

Careful for what you wish in NASA project.


Mechanical Design

Readout Cable

Multi-Chip Electronics Module (MCM)

2 mm gap

19 Carbon-Fiber Tray Panels

Titanium Flexure Mounts

Carbon-Fiber Sidewalls (Aluminum covered)

Silicon Strip Detectors 18 X-Y Pairs of Planes

“Thin” Tungsten Foil (3% X0) 12 Locations

“Thick” Tungsten Foil (18% X0) 4 Locations

No Tungsten Foil 2 Locations

1 X

2 Y

3 X

4 Y

18 Y

17 X

16 Y

0 Y

5 type of trays.


Tray Structure

Silicon Strip Detectors

Bias Plane

Tungsten FoilMulti-Chip ModuleTop Layer

Wire Bonds

Multi-Chip ModuleBottom Layer

Structural tray panel:C-C machined closeout frameAluminum honeycomb coreCFRP face sheets

Microbonding


Readout Electronics Architecture

24 64-channel amplifier-discriminator chips for each detector layer

2 readoutcontroller chipsfor each layer

Control signal flow

Control signal flow

Data flow to FPGAon DAQ TEM board.

Data flow to FPGAon DAQ TEM board.

Control signal flow

Data flow

Nine detector layers are read out on each side of each tower.

GTRC

GTFEGTFE

GTRC

GTRC

GTRC

GTRC

GTRC

9-998509A22

GLAST Tracker Readout Controller (GTRC)• 9 GTRC per cable.• Communication between 24 GTFE and back-end electronics.• TOT measurement from layer-OR trigger signal

Emphasis on compactness, minimum of wiring, and redundancy:• Serial, LVDS readout and control lines on flat flex-circuit cables.• Any single component (GTFE, GTRC, cable) can fail without affecting the other.


Tracker Front-end Electronics

• GTFE (GLAST Tracker Front-end Electronics) ASIC Preamplifier - shaper - discriminator One threshold DAC and one calibration DAC per chip.

64 channels per chip, 24 chips per MCM. Noise: ~1500 e for 4 SSD ladder. Gain: ~100 mV/fC. Peaking time: 1.5 µs. 0.1 mW/channel.

GTFE

GTRC


SSD

SSD reference crosses

8.95 cm

8.95 cm

8.95 cm x 8.95 cm.226 µm pitch.400 µu thick.Manufactured by HPK.10,368 wafers.0.5% rejection fraction.2.5 µm dicing accuracy.

INFN/Pisa


Ladder and Tray Assembly

• Ladder Assembly Take advantage of excellent dicing accuracy. Manual alignment. Precise SSD alignment within ladder. No CMM required.

• Tray Assembly 20 µm ladder placement accuracy.

INFN/Pisa


Tower Assembly

Alignment pin

~1m

8 type of cables due to space constraint

Stacking trays Attach cables

Side panel


Tray Alignment by Muon Track

X4

X3

X2

X1

X0

realposition

idealposition

res = x + z · cot(θ)

θ

horizontal displacement: 157m

vertical displacement: 81m

MCData after alignment

Residual

rms = 137 m

Residual

rms = 124 m

Scattering dominant

INFN/Pisa


Production Issues

• Delamination due to thermal-vacuum cycles. Kapton bias circuit.

• Extremely difficult to glue tungsten.• Polymer coating of tungsten.

Wire-bonding encapsulation.• Silicone contamination from pitch-adapter bonding process.- Eliminate use of silicone based tape.

• SSD movement due to CTE mismatch of tungsten foil. - Eliminate encapsulation for SSD wire-bonding.- Reduce thermal excursion.

• Pitch-adapter cracking. Silent modification of Ni plating process.

• Flex circuit delivery delays. Incompetent vender.

Tray Structure

SSD

MCM PWB

ASIC

Pitch-adapter flex bonded over radius

Adhesive

Kapton Bias Circuit


Flight Module Delivery

• All flight modules are delivered and integrated. Flex cable delivery has been bottle neck.

• ACD is being integrated.

Tracker Flight Module Delivery

0

4

8

12

16

20

JanuaryFebruaryMarch April May June July

AugustSeptember

October

Number of delivered modules

TotalMonthly


Hot and Dead Strips

• Hot strip definitions. Data mask.

• Mask noisiest strips to satisfy 5x10-5 average occupancy.

• 7 masked strips. Trigger mask.

• Mask noisiest strips to satisfy 50 kHz layer trigger rate. Dead strips

Mean: 0.8 / layerHot stripsMean: 0.7 / layer

1% 1%


Disconnected Strips.

• Disconnected Strips. Broken pitch adapter. Disconnected wire-bond between MCM and SSD. Disconnected wire-bond between SSDs.

Broken ladder stripsMean: 4.4 / layer

Disconnected stripsMean: 3.0 / layer

1% 1%


Hit Efficiencies

• Specification: hit efficiency > 98%. 99.0% of layers satisfy the specification. Average efficiency: 99.6%.

2%


TOT/Calibration DAC Calibration

• TOT gain is calibrated for each channel.

• Use MIP signals to calibrate “calibration” DAC.

With gain correction

Without gain correction

~30% rms

~8% rms


Trigger Jitter

• Trigger jitter important for ACD veto. Trigger time walk due to input charge is dominant source of trigger jitter.

Specification: Trigger jitter < ±0.3 µs for Q > 0.5 MIP. Proper threshold setting necessary.

• 0.3

0.4

0.5

0.6

0.7

0.8

0 256 512 768 1024 1280 1536

Strip number

Trigger timing (µs)

Inproper thresholdsProper threshold

Specification

Trigger timing for 0.5MIP


Threshold Dispersion

• Trigger threshold. Threshold at pulse peak. Dispersion: 5.9%. (within chip: 5.2%, chip-to-chip: 2.7%).

• Threshold for data capture. Strip data is captured ~2 µs after trigger request.

Larger dispersion due to variation of fall time.

Dispersion: 12.0%. (within chip: 8.3%, chip-to-chip: 7.0%).

~2 µs


Transient Noise Issue

• 6 layers out of 612 layers exhibit transient noise. Infrequent (0/day – a few/hour). Confined within one ladder. Noisy ladder different episode to episode. Many strips are affected at the same. No apparent dependence on bias voltage or vacuum.

• No major effect on operation. Trigger rate, occupancy within specification on ground.

Occupancy time profileLayer-OR time profile Strip profile


Current Status and Future Schedule

• All flight detector modules are delivered. Tracker meet all specifications.

• DAQ integration and online software test. Now – Jan 2006.

• Environmental test at NRL. Feb – June 2006.

• Beam test at CERN(?) Spare modules. Proposal in preparation. ~ June 2006.

• Space craft integration.• Launch from Kennedy SFC.

Sep 2007. Largest Silicon Detector in the Space.

Spitzer Telescope Launch on a Delta II

Heavy

(near Earth)

Documents

Hiroyasu Tajima Stanford Linear Accelerator Center VERTEX 2005 November 11, 2005 Chuzenji-lake, Japan GLAST Tracker Woodblock print by Hasui Kawase Kegon