High Speed Unipolar Switching Resistance RAM (RRAM) Technology

8/9/2019 High Speed Unipolar Switching Resistance RAM (RRAM) Technology

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High Speed Unipolar Switching Resistance RAM (RRAM) Technology

Y. Hosoi1, Y. Tamai

1, T. Ohnishi

1, K. Ishihara

1, T. Shibuya

1, Y. Inoue

1, S. Yamazaki

1, T. Nakano

1,

S. Ohnishi1, N. Awaya

1, I. H. Inoue

2, H. Shima

3, H. Akinaga

3, H. Takagi

2, H. Akoh

2, and Y. Tokura

2

1

Advanced Materials Research Laboratories, Corporate Research and Development Group, Sharp Corporation,1 Asahi, Daimon-cho, Fukuyama 721-8522, Japan

Phone: +81-84-940-1936, FAX: +81-84-940-1937, E-mail: [email protected] Correlated Electron Research Center (CERC), National Institute of Advanced Industrial Science and Technology (AIST),

Central 4, 1-1-1 Higashi, Tsukuba 305-8562, Japan3Nanotechnology Research Institute (NRI), National Institute of Advanced Industrial Science and Technology (AIST),

Central 2, 1-1-1 Umezono, Tsukuba 305-8568, Japan

Abstract

We have successfully achieved high speed (~50 ns)

unipolar operation in RRAM devices comprised of titanium

oxynitride (TiON) combined with a control resistor

connected in series. For unipolar switching, programming anderasing pulses can be the same width, typically, a few tens of

nano-seconds. This enables high speed and high density

cross-point RRAM memory arrays. In addition, we

demonstrate how switching characteristics can be controlled

by a series resistor.

Introduction

Resistance RAM (RRAMTM) has been extensively studied

because of its excellent characteristics, namely, low power,

high speed, excellent bit resolution (due to separation and

consequent large resistance ratio between a high resistance

state (HRS) and a low resistance state (LRS)), and

applicability to high density cross-point memory arrays [1-4].

However, previous reports have revealed problems with

various proposed RRAM technologies (see below).

As is well-known, two conventional types of operation

have been proposed for RRAM, viz., unipolar switching (Fig.

1 (a)) and bipolar switching (Fig. 1 (b)). Within this context,

unipolar operation involves programming/erasing using short

and long pulses having the same voltage polarity. In contrast,

bipolar operation is achieved by short pulses having opposite

polarity. Moreover, for any practical high density cross-point

RRAM array, elimination of cross-talk requires a rectifying

element to be included in each memory cell to prevent

sneak currents from passing through non-selected cells (Fig.2). This requirement clearly favors unipolar device designs.

However, for unipolar operation as described above,

switching speed performance will necessarily be dominated

by the long pulse time. For that reason, unipolar operation

achieved using short pulses of the same polarity must

represent a significant advancement toward practical

implementation of RRAM technology.

In this paper, we explain a basic concept of switching

control and propose a switching control methodology by

using simple, linear resistors in series. In addition, using this

method, we demonstrate high speed unipolar RRAM

operation using two short pulses having the same voltage

polarity (Fig. 1 (c)).

Device Fabrication

A schematic drawing of the device structure and measure-

ment setup appears in Fig. 3. First, a TiN film was deposited

on the interlayer dielectric which has a contact hole extending

to the bottom electrode below. Next, CVD-SiO2 was

deposited and planarized until the TiN was exposed (Figs. 4

(a), (b)). After oxidizing the TiN film to form TiON, the top

electrode was fabricated [5].

High Speed Switching

Figure 5 shows I-V hysteresis observed with a 200 ns

triangular voltage sweep (see Fig. 5 inset). From this result,

it is clear that high speed bipolar switching is possible.

Accordingly, Fig. 6 shows typical bipolar switching of our

device. Here, 1.8 V/50 ns pulses set a low resistance state

of about 1 k, and +2.2 V/50 ns pulses reset a high resistance

of about 100 k. Next, we observed high speed unipolar

switching by changing the external resistance connected to

the RRAM device. During programming, an external 22 k

resistor was connected in series and a +4.5 V/50 ns pulse was

applied. While erasing with a +2.5 V/50 ns pulse, the series

resistor was removed. After programming, the device

resistance was changed to a value of a few k, and after

erasing, to about 1 M. Figure 7 illustrates this result.

A Concept of Switching Controls

Conventional Switching

DC characterization (I-Vcurve switching) for a variety of

transition metal oxides has been reported [6]. Typical

features of such I-V curves imply that (1) stable switching

requires current/voltage regulation, (2) HRS-to-LRS and

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LRS-to-HRS switching are possible independent of bias

voltage polarity, and (3) both bipolar switching and unipolar

switching can occur in one RRAM device. Taking these facts

into account, we suggest a concept of switching controls.

Figure 8 shows an RRAM device connected in series to a

resistor. This series resistor (Rs) may be the parasitic

resistance of the RRAM device itself or a sum of parasiticresistance and an external resistor. Naturally, part of any

applied voltage (VRS) appears on Rs, while the remainder

(VRRAM) appears on the RRAM. Of course, voltage division

depends on exact resistance values.

Figure 9 (a) illustratesI-Vcurves of LRS and HRS and L1

is an Rs-dependent load line. In what follows, we assume

that Rs consists primarily of parasitic resistance and, further,

that it is relatively low, if not precisely specified. The

operating point corresponds to the intersection of the load

line and an RRAMI-Vcurve at arbitrary time. By definition,

A1 (VA1,IA1) and B1 (VB1,IB1) are points where programming

and erasing operations begin, respectively. During

programming, the operating point moves from A1 toward A2along the load line L1 due to the RRAM resistance decrease.

This programming operation is stable. In the case of erasing,

the operating point moves from B1 toward B2 accompanied

with an increase of VRRAM due to the associated RRAM

resistance increase. However, at a certain point, VRRAM

exceeds the programming threshold voltage VA1. As a result,

this erasing operation becomes unstable because of

competition between programming and erasing. The

alternative case (stable erasing) appears in Fig. 9 (b) where

VB2 is smaller than VA1. Here, the programming operation is

unstable, because VRRAMexceeds the erasing threshold voltage,

VB1, during the HRS-to-LRS transition.

We further speculate how conventional stable switching

can be realized. Bipolar operation utilizes both characteris-

tics shown in Figs. 9 (a) and 9 (b), one in the positive voltage

region, and the other in the negative region. Concomitantly,

unipolar switching utilizes the pulse width dependence of the

erasing threshold voltage. As shown in Fig. 9 (c), if a long

pulse is applied, then the erasing threshold voltage is lowered

(VB1 to VB1). Thus, the condition VB1>VA2>VB1 resulting in

VB2>VA1>VB2 is satisfied and stable unipolar switching can

occur. Figure 10 shows measured erasing speed as a function

of erasing voltage amplitude. It can be clearly seen that only

a difference of 0.2 V in erasing voltage results in two orders

of magnitude change in erasing speed. This is the reason thatconventional unipolar switching requires a short program-

ming pulse and a much longer erasing pulse, which is

unfavorable for high speed operation.

High Speed Unipolar Switching

In order to remove the speed limitation of conventional

unipolar RRAM operation, we suggest a new unipolar

switching method as shown in Fig. 9 (d). During program-

ming, an Rs with a higher resistance is connected. This

causes the load line to shift from A1-A2 to A1-A3. Since the

VA3 becomes lower than the erasing threshold voltage, VB1,

programming is stable. Of course, as established previously,

programming is unstable if the resistance of Rs is too low

because VA2 exceeds VB1. Conversely, during erasing, an Rswith lower resistance is connected. Accordingly, the

resistance transition occurs along the load line B1-B2 as in

the usual case. Clearly, the use of an appropriate external

series resistance makes it possible to control operating points

during programming or erasing operations allowing stable

switching.

At this point, we emphasize that this switching method

does not depend on the pulse width for either programming or

erasing operations. This means that high speed unipolar

operation can be realized using any RRAM device which can

be erased by a short pulses, for example, our fast bipolar

switching TiON/TiN device. For completeness, Table 1

summarizes performance for various switching methods.Although for simplicity we have demonstrated high speed

unipolar switching using simple, linear low and high series

resistances, it is clear that switching control with series

transistor is a smart solution in actual applications.

Furthermore, since the transistor can be situated on the

periphery of the chip, outside of any memory cell array, the

density advantage of cross-point architecture is retained

unspoiled.

Conclusion

In this paper, we have proposed a methodology to control

fundamental operation of RRAM devices. Based on this

concept, we demonstrated high speed unipolar switching

successfully. We believe that the demonstrated switching

method constitutes a breakthrough-technology enabling ultra-

high density RRAM circuits.

Acknowledgement

The authors are grateful to Drs. S. T. Hsu and M. Shimizu

for giving valuable advice. This work is partly supported by

NEDO.

References

[1] G. Dearnaley et al.,Rep. Prog. Phys. 33, pp. 1129-1191, 1970.

[2] S. Q. Liu et al.,Appl. Phys. Lett. Vol. 76, pp. 2749-2751, 2000.[3] W. W. Zhuang et al., inIEDM Tech. Dig., 2002, pp. 193-196.

[4] I. G. Baeket al., inIEDM Tech. Dig., 2004, pp. 587-590.

[5] M. Fujimoto et al.,Jpn. J. Appl. Phys. Vol. 45, No. 11, L310, 2006.

[6] H. I. Inoue et al., inProc. NVMTS, Nov. 2005, pp. 131-136.



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Diode

RRAM device

1E+02

1E+03

1E+04

1E+05

1E+06

1E+07

1E+08

0 1 2 3 4 5 6 7 8 9 10 1112 1314

Switching cycle

108

107

106

105

10

4

103

102

R

esistance[]

Bipolar switching -1.8 V/+2.2 V50 ns

-6

-4

-2

0

2

4

6

-3 -2 -1 0 1 2 3Voltage [V]

Current[mA]

1st

2nd3rd

4th

300nm

TiN (bottom electrode)

SiO2 TiN

(a)

TiN electrode

(b)

ers.

50 ns

pgm.

50 ns

read

process

read

process

voltage

0

-3-2-10123

0 100 200

Time [ns]

V

[V]

aa

2

0

-2

bottom electrode

top electrode

TiN electrode

GND

TiON

metalpad

metalpad

(a) (b)

Time Time

Pulsevoltage

Pulsevoltage

0ers.

ers.

Pulsevoltage

Resistance

ers.

~s

0

0

pgm.

0

(c)

Time0 0

Resistance

Resistance

~10 ns

pgm. pgm.

Fig. 1. Programming (pgm.) and erasing (ers.) sequences and resistance switching for (a) Conventional unipolar switching, (b) Bipolar switching,and (c) High speed unipolar switching (this work).

Fig. 2. Schematic diagram of 1D1R memory cell and cross-point

memory cell array.Fig. 3. Schematic cross-sectional view of our sample andmeasurement setup.

Fig. 4. (a) Cross sectional and (b) tilted SEM images of thesample before depositing a top electrode.

Fig. 5.I-Vhysteresis loop measured with a 200 ns triangularvoltage sweep (inset).

Fig. 6. Typical bipolar switching of our device (programming: 1.8 V/50 ns, erasing: +2.2 V/50 ns).



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1

1T1R ( > 20 F2

)

cross-point ( > 4 F2

)

Bipolar Conventional Unipolar

Program : 10-8

~10-7

Erase : 10-8

~10-7

Program : 10-8

~10-7

Erase : 10-6

~10-5

High Speed Unipolar (this work)

Program : 10-8

~10-7

Erase : 10-8

~10-7

Speed / s

1

1T1R ( > 20 F2

)

cross-point ( > 4 F2)

100

Memory cell

architecture1T1R ( > 20 F

2)

Power consumption for

erasing (normalized)

1E-08

1E-07

1E-06

1E-051E-04

1E-03

1E-02

1E-01

1E+00

0.5 1 1.5

Erasing voltage [V]

Erasing

time[s]

100

10-1

10-2

10-3

10-4

10-5

10-6

10-7

10-8

Voltage

LRS

HRS

B1

A1

Current

A2

L1(B2)

Voltage

LRS

HRS

B1

A1

Current (A2)

B2

Voltage

LRS

HRS

B1

A1

Current

A3

B2

High speed

unipolar switching

(A2) with externalresistor

(a) (b)

Voltage

LRS

HRS

B1

A1

Current

A2

B1'

B2'

(B2)

For long

pulse

For short

pulse

Conventional

unipolar switching

(c) (d)

1E+02

1E+03

1E+04

1E+05

1E+06

1E+07

1E+08

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14

Switching cycle

108

107

106

105

104

103

102

Re

sistance[]

High speed unipolar switching

+4.5 V/+2.5 V

50 ns

ers.

50ns

pgm.

50nsread

process

read

process

22k

RR

AM

RR

AM

Voltage

0

Parasitic

resistance

External

resistance

RRAM

resistance

Series

resistor

Rs

VRRAM

VRS

Fig. 7. Programming/erasing sequence and resistance switching for high speed unipolar

switching. Our RRAM can be programmed by +4.5 V/50 ns pulse application combined with

22 k external series resistor (Rs) connection and erased by +2.5 V/50 ns pulse application

without the Rs connection.Fig. 8. RRAM and a series resistor which

plays an extremely important role in resistance

switching operation.

Fig. 9. Operating point transitions for (a) stable programming, (b) stable erasing, (c)

conventional unipolar switching and (d) high speed unipolar switching. Arrow solid line andarrow dashed line represent stable transition and unstable transition, respectively.

Fig. 10. Erasing voltage dependence of erasingtime for conventional unipolar switching.

Table 1. Performance comparison of three different switching methods.

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High Speed Unipolar Switching Resistance RAM (RRAM) Technology