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HighHigh--Speed Serial IO Testing:Speed Serial IO Testing:Jitter Extraction & BitJitter Extraction & Bit--Error Error Rate EstimationRate Estimation
K.K.--T. Tim Cheng T. Tim Cheng Dept. of ECE Dept. of ECE
University of California, Santa BarbaraUniversity of California, Santa Barbara
8/6/04 2
Serial Signaling Speed TrendSerial Signaling Speed Trend
2
8/6/04 3
Bus TopologiesBus Topologies
8/6/04 4
Parallel Bus vs Serial Link
Setup HoldHoldTxTx
Setup HoldHoldRxRx
TxTx RxRxSerial LinkSerial Link
Parallel Bus
3
8/6/04 5
Serial Link OverviewSerial Link Overview
Clock is embedded in dataClock is embedded in data
⇒⇒ Clock and Data Recovery (CDR) circuit is requiredClock and Data Recovery (CDR) circuit is required
The BER The BER oror qquality of transmission depends on the receiveruality of transmission depends on the receiver’’ssability to recover the clock signal from the transmitted dataability to recover the clock signal from the transmitted data
SER. DES.
… …
CDRC
TX RXData with
Embedded ClockData Data
8/6/04 6
BitBit--ErrorError--Rate Testing of HSLRate Testing of HSL
Most serial links require 10Most serial links require 10--1212 or lower BERor lower BER
To measure such level of BER, test time would be To measure such level of BER, test time would be excessively longexcessively long
Timing jitter is the major contributor to BERTiming jitter is the major contributor to BER
Infer BER based on extracted jitter Infer BER based on extracted jitter Would reduce test time significantlyWould reduce test time significantly
4
8/6/04 7
Serial Link OperationSerial Link Operation
Total Jitter
Recovered Clock Jitter
Jitt
er (µ
seco
nds)
Number of Samples
CDR circuit has a lowCDR circuit has a low--pass filter characteristic pass filter characteristic for the input jitterfor the input jitter
If the change rate of If the change rate of jitter is gradual, the CDR jitter is gradual, the CDR circuit can trackcircuit can track
Data
Clk
ti(T) ti(2T)
to(T) to(2T)
Q
QSET
CLR
D
CDR Circuit
Data with Embeded Clock
Recovered Clock
Output
8/6/04 8
Serial Link OperationSerial Link Operation
If jitter varies If jitter varies significantly from significantly from cycle to cycle, the cycle to cycle, the CDR circuit cannot CDR circuit cannot track track
Total Jitter
Recovered Clock Jitter
Number of Samples
Jitt
er (s
econ
ds)
⇒ Extracting jitter’s spectral information is criticalfor measuring transmission quality
5
8/6/04 9
OutlineOutline
Jitter ExtractionJitter Extraction TechniquesTechniques
BitBit--Error Rate Testing & EstimationError Rate Testing & Estimation
8/6/04 10
Jitter Extraction for MultiJitter Extraction for Multi--GHz SignalGHz Signal
128 128 128 128
•LPF•Sampling Time Estimation•Period adjustment•FFT or computing derivatives
••LPFLPF••Sampling Time EstimationSampling Time Estimation••Period adjustmentPeriod adjustment••FFT or computing derivativesFFT or computing derivatives
•Sinusoidal Jitter Extraction•Random Jitter Extraction
••Sinusoidal Jitter ExtractionSinusoidal Jitter Extraction••Random Jitter ExtractionRandom Jitter Extraction
sample periods every N cycles
sample periods sample periods every every N N cyclescycles
N
The filtered periods spectrum
The filtered periods spectrum reshaped with inverse filter transfer function
The noise population used for random jitter estimation
AB
ABPP NSE_ANSE_tot=
Using singleUsing single--shot measurement unit to sample signal shot measurement unit to sample signal periods for spectral analysisperiods for spectral analysis
No reference clock required for samplingNo reference clock required for sampling
Ref: Ong, Hong, Cheng and Wang, ASP-DAC 2004 and DATE2004
6
8/6/04 11
DerivativeDerivative--based Random Jitter based Random Jitter ExtractionExtraction
The variance of a signal’s derivativeThe variance of a signal’s derivative is dominated by is dominated by the higherthe higher--frequencyfrequency components within the signalcomponents within the signal
200 400 600 800 1000 1200 1400 1600 1800 2000
2.8
3
3.2
3.4
3.6
3.8
x 10-10
Sample Numbers
Perio
ds W
idth
(sec
s)
⇒⇒TheThe random jittrandom jitterer variance variance can be estimated can be estimated from from the variance of the total jitterthe variance of the total jitter’’s derivatives derivative
200 400 600 800 1000 1200 1400 1600 1800 2000
-4
-2
0
2
4
6
8x 10-11
Sample Numbers
Perio
ds W
idth
(sec
s)Sampled Periods Sampled Periods’ Derivative
8/6/04 12
Measuring Multiple Periods Per SampleMeasuring Multiple Periods Per Sample
128 128 128 128
•L P F•S a m p lin g T im e E s tim a tio n•P e rio d a d ju s tm e n t•F F T o r co m p u tin g d e riva tive s
•• L P FL P F•• S a m p lin g T im e E s tim a tio nS a m p lin g T im e E s tim a tio n•• P e rio d a d ju s tm e n tP e rio d a d ju s tm e n t•• F F T o r co m p u tin g d e riva tive sF F T o r co m p u tin g d e riva tive s
•S in u so id a l J itte r E x tra c tio n•R a n d o m J itte r E x tra c tio n
•• S in u so id a l J itte r E x tra c tio nS in u so id a l J itte r E x tra c tio n•• R a n d o m J itte r E x tra c tio nR a n d o m J itte r E x tra c tio n
sa m p le p e rio d s e ve ry N cyc les
sa m p le p e rio ds sa m p le p e rio d s e ve ry eve ry N N cyc le scyc les
N
T he filt e re d pe r io d s spe ctr u m
T he filt e re d p e r io d s spe ctr um re s ha p ed w ith inve rse filt e r tr a n sfe r func t io n
T he no ise po p u la t io n us ed fo r r a nd o m j itte r e st im a t io n
AB
ABPP N SE_ AN S E_ to t=
7
8/6/04 13
Measuring Multiple Periods Per SampleMeasuring Multiple Periods Per Sample
128 128 128 128
•L P F•S a m p lin g T im e E s tim a tio n•P e rio d a d ju s tm e n t•F F T o r co m p u tin g d e riva tive s
•• L P FL P F•• S a m p lin g T im e E s tim a tio nS a m p lin g T im e E s tim a tio n•• P e rio d a d ju s tm e n tP e rio d a d ju s tm e n t•• F F T o r co m p u tin g d e riva tive sF F T o r co m p u tin g d e riva tive s
•S in u so id a l J itte r E x tra c tio n•R a n d o m J itte r E x tra c tio n
•• S in u so id a l J itte r E x tra c tio nS in u so id a l J itte r E x tra c tio n•• R a n d o m J itte r E x tra c tio nR a n d o m J itte r E x tra c tio n
sa m p le p e rio d s e ve ry N cyc les
sa m p le p e rio ds sa m p le p e rio d s e ve ry eve ry N N cyc le scyc les
N
T he filt e re d pe r io d s spe ctr u m
T he filt e re d p e r io d s spe ctr um re s ha p ed w ith inve rse filt e r tr a n sfe r func t io n
T he no ise po p u la t io n us ed fo r r a nd o m j itte r e st im a t io n
AB
ABPP N SE_ AN S E_ to t=
8/6/04 14
Measuring Multiple Periods Per SampleMeasuring Multiple Periods Per Sample
128 128 128 128
•L P F•S a m p lin g T im e E s tim a tio n•P e rio d a d ju s tm e n t•F F T o r co m p u tin g d e riva tive s
•• L P FL P F•• S a m p lin g T im e E s tim a tio nS a m p lin g T im e E s tim a tio n•• P e rio d a d ju s tm e n tP e rio d a d ju s tm e n t•• F F T o r co m p u tin g d e riva tive sF F T o r co m p u tin g d e riva tive s
•S in u so id a l J itte r E x tra c tio n•R a n d o m J itte r E x tra c tio n
•• S in u so id a l J itte r E x tra c tio nS in u so id a l J itte r E x tra c tio n•• R a n d o m J itte r E x tra c tio nR a n d o m J itte r E x tra c tio n
sa m p le p e rio d s e ve ry N cyc les
sa m p le p e rio ds sa m p le p e rio d s e ve ry eve ry N N cyc le scyc les
N
T he filt e re d pe r io d s spe ctr u m
T he filt e re d p e r io d s spe ctr um re s ha p ed w ith inve rse filt e r tr a n sfe r func t io n
T he no ise po p u la t io n us ed fo r r a nd o m j itte r e st im a t io n
AB
ABPP N SE_ AN S E_ to t=
Sampling the length of multipleSampling the length of multiple--periods, instead of periods, instead of singlesingle--period, to reduce performance requirement period, to reduce performance requirement of the sampling circuitryof the sampling circuitry-- Accuracy increases for periodic jitterAccuracy increases for periodic jitter-- Accuracy decreases for random jitterAccuracy decreases for random jitter
⇒⇒ Can be compensated by more samplesCan be compensated by more samplesRef: Ong, Hong, Cheng and Wang, VLSI Test Symp. 2004
8
8/6/04 15
ExperimentExperiment SetupSetupJitter Spectral Extraction
128 128 128 128
Jitter char:3 sinusoidal jitters and a random jitter
3GHz Signal
Generator
N
• Sinusoidal jitter extraction- LPF- Sample time estimation- Period estimation- FFT
• Random jitter extraction - Differentiation
Demonstrated, through simulation, accurate extraction Demonstrated, through simulation, accurate extraction of multiple sinusoids & random jitter components for a of multiple sinusoids & random jitter components for a 3GHz signal 3GHz signal
8/6/04 16
OutlineOutline
Jitter ExtractionJitter Extraction TechniquesTechniques
BitBit--Error Rate Testing & EstimationError Rate Testing & Estimation
9
8/6/04 17
BER Testing of HSLBER Testing of HSL
Most serial links require 10Most serial links require 10--1212 or lower BERor lower BER
To measure such level of BER, test time would be To measure such level of BER, test time would be excessively longexcessively long
Timing jitter is the major contributor to BERTiming jitter is the major contributor to BER
Infer BER based on extracted jitter Infer BER based on extracted jitter Would reduce test time significantlyWould reduce test time significantly
8/6/04 18
Key Parameters for BER Est.Key Parameters for BER Est.
Spectral information of jitterSpectral information of jitterFrequencies and amplitudes of Sinusoidal Jitter (SJ)Frequencies and amplitudes of Sinusoidal Jitter (SJ)Variance of Random Jitter (RJ)Variance of Random Jitter (RJ)
Jitter transfer characteristics of CDR circuitJitter transfer characteristics of CDR circuitMagnitude responseMagnitude response
-- Low pass filter characteristicLow pass filter characteristicPhase responsePhase response
-- Determining timing response in clock recoveryDetermining timing response in clock recovery
Ref: Hong, Ong, and Cheng, to appear in Int’l Test Conf. 2004
10
8/6/04 19
BER Estimation with RJBER Estimation with RJ
RJ is characterized by a zeroRJ is characterized by a zero--mean mean GaussianGaussian
BER can be estimated using Q functionBER can be estimated using Q function
)2
(22σ
TQBER =
Π=>= ∫
∞− dtexXPxQ
x
t 2/2
21][)(
Clk
T
Ideal Sampling
Point
Error Error
RJ
0.5T
0.5T
* Source: John P. et al, DesignCon 2002
Data
8/6/04 20
Impact on BER for SJ and RJImpact on BER for SJ and RJ
0050KHz50KHz
0.1T0.1T001MHz1MHz
0010MHz10MHz
00100MHz100MHz
Freq.Freq.Amp.Amp.BERBER
SJSJ
9.6e9.6e--5 5 T / 7.8T / 7.8
Var.Var.BERBER
RJRJ
SJsSJs within certain amplitudes and frequencies within certain amplitudes and frequencies do not contribute to BERdo not contribute to BER
RJ contributes BER depending on the varianceRJ contributes BER depending on the variance
11
8/6/04 21
BER BER -- Different Combinations Different Combinations of SJ and RJof SJ and RJ
SJsSJs of different frequencies (but same amplitude), of different frequencies (but same amplitude), combined with fixed RJ, resulted in different BERcombined with fixed RJ, resulted in different BER
⇒⇒ Due to the receiverDue to the receiver’’s jitter transfer characteristics jitter transfer characteristic
1.82e1.82e--4410MHz10MHz
1.15e1.15e--441MHz1MHz
9.6e9.6e--55
T / 7.8T / 7.8
50KHz50KHz
0.1 T0.1 T
SJ+RJSJ+RJVar.Var.Freq.Freq.Amp.Amp.
1.69e1.69e--44100MHz100MHz
BERBERRJRJSJSJ
8/6/04 22
Clock and Data Recovery CircuitClock and Data Recovery Circuit
CDRC commonly implemented using PLLCDRC commonly implemented using PLL--based architecturebased architecture
CDR CDR cktckt has lowhas low--pass filter characteristic for input jitterpass filter characteristic for input jitterIf change rate is gradual, CDRC can If change rate is gradual, CDRC can tracktrack⇒⇒nono bit errorbit errorIf jitter is of very high frequency, CDRC cannot track If jitter is of very high frequency, CDRC cannot track ⇒⇒ errorserrors
12
8/6/04 23
Characteristics of CDR Characteristics of CDR CktCkt
Region1 (0~70KHz)Region1 (0~70KHz)Magnitude gain is 1Magnitude gain is 1Phase curve is flatPhase curve is flat
Region2(70KHz~2MHz)Region2(70KHz~2MHz)Magnitude gain is 1Magnitude gain is 1Phase curve is nonPhase curve is non--flatflat
Region3(2MHz~40MHz) Region3(2MHz~40MHz) Magnitude gain is < 1Magnitude gain is < 1
Phase curve is nonPhase curve is non--flatflat
Region4(40MHz~ )Region4(40MHz~ )Magnitude gain is negligibleMagnitude gain is negligible
region1 region2 region3 region4
Divide it into 4 regions:Divide it into 4 regions:
8/6/04 24
BER EstimationBER Estimation
Each region uses a different equation for BER est.Each region uses a different equation for BER est.
Region 1Region 1
Magnitude gain is 1, and phase curve is flatMagnitude gain is 1, and phase curve is flat⇒⇒ SJ is perfectly tracked SJ is perfectly tracked ⇒⇒ No contribution to BERNo contribution to BER
Only RJ contributes to BEROnly RJ contributes to BER
nσ)2
(2 2n
TQBERσ
= : Variance of RJ
13
8/6/04 25
Characteristics of CDR Characteristics of CDR CktCkt
Region1 (0~70KHz)Region1 (0~70KHz)Magnitude gain is 1Magnitude gain is 1Phase curve is flatPhase curve is flat
Region2(70KHz~2MHz)Region2(70KHz~2MHz)Magnitude gain is 1Magnitude gain is 1Phase curve is nonPhase curve is non--flatflat
Region3(2MHz~40MHz) Region3(2MHz~40MHz) Magnitude gain is < 1Magnitude gain is < 1
Phase curve is nonPhase curve is non--flatflat
Region4(40MHz~ )Region4(40MHz~ )Magnitude gain is negligibleMagnitude gain is negligible
region1 region2 region3 region4
Divide it into 4 regions:Divide it into 4 regions:
8/6/04 26
BER Estimation (Region 2)BER Estimation (Region 2)
Magnitude gain is 1Magnitude gain is 1
⇒⇒SJ is tracked by the CDRCSJ is tracked by the CDRC
Phase curve has a nonPhase curve has a non--zero slopezero slope
⇒⇒ Recovered clock has certainRecovered clock has certaindelay tdelay t00
Time delay tTime delay t0 0 is calculated byis calculated by
Error Boundaries
Total Jitter
Sinusoidal Jitter
Recovered Clock Jitter
Jitte
r (se
cond
s)
Number of Samples
)}({0 ωω
jHddt ∠−=
14
8/6/04 27
Assume input SJ isAssume input SJ is , , and RJ is n(t)and RJ is n(t)
Error occurs when:Error occurs when:
, or, or
By simplification:By simplification:
Therefore effective variance isTherefore effective variance is
BER Estimation (Region 2)BER Estimation (Region 2)
)2
(22eff
TQBERσ
=
)sin(1 ta ω
2/))(sin()()sin( 011 Tttatnta +−≥+ ωω2/))(sin()()sin( 011 Tttatnta −−≤+ ωω
2/)()sin()cos(22 101 Ttntta ≥+Θ+− ωω
20
21
2 ))cos(1( neff ta σωσ +−=
Q
QSET
CLR
D
CDR Circuit
Data with Embeded Clock
Recovered Clock
Output
8/6/04 28
Characteristics of CDR Characteristics of CDR CktCkt
Region1 (0~70KHz)Region1 (0~70KHz)Magnitude gain is 1Magnitude gain is 1Phase curve is flatPhase curve is flat
Region2(70KHz~2MHz)Region2(70KHz~2MHz)Magnitude gain is 1Magnitude gain is 1Phase curve is nonPhase curve is non--flatflat
Region3(2MHz~40MHz) Region3(2MHz~40MHz) Magnitude gain is < 1Magnitude gain is < 1
Phase curve is nonPhase curve is non--flatflat
Region4(40MHz~ )Region4(40MHz~ )Magnitude gain is negligibleMagnitude gain is negligible
region1 region2 region3 region4
Divide it into 4 regions:Divide it into 4 regions:
15
8/6/04 29
BER Estimation (Region 3)BER Estimation (Region 3)
Magnitude gain is less than 1Magnitude gain is less than 1⇒⇒SJ is not perfectly SJ is not perfectly
trackedtrackedPhase curve has a nonPhase curve has a non--zerozeroslopeslope⇒⇒ Recovered clock has Recovered clock has
certain delay tcertain delay t00
Time delay is almost half of Time delay is almost half of the period of SJthe period of SJ
Error Boundaries
Total Jitter
Sinusoidal Jitter
Recovered Clock Jitter
Jitter (seconds)
Number of Samples
8/6/04 30
BER for Different Combinations BER for Different Combinations of SJ and RJof SJ and RJ
1.82e1.82e--4410MHz10MHz
1.15e1.15e--441MHz1MHz
9.6e9.6e--55
T / 7.8T / 7.8
50KHz50KHz
0.1 UI0.1 UI
SJ+RJSJ+RJVar.Var.Freq.Freq.Amp.Amp.
1.69e1.69e--44100MHz100MHz
BERBERRJRJSJSJ
16
8/6/04 31
BER Estimation (Region 3)BER Estimation (Region 3)Assume input SJ is , and RJ is n(t)Assume input SJ is , and RJ is n(t)
Recovered clock jitter Recovered clock jitter
Error occurs when Error occurs when
,, oror
By simplifyingBy simplifying
Therefore effective variance isTherefore effective variance is
))(sin( 02 tta −ω)sin(1 ta ω
2/))(sin()()sin( 021 Tttatnta +−≥+ ωω2/))(sin()()sin( 021 Tttatnta −−≤+ ωω
)( 12 aa <
2/)()sin()cos(2 20212
22
1 Ttnttaaaa ≥+Θ+−+ ωω
20
1
22
1
22
212 ))cos(21(2 neff t
aa
aaa σωσ +−+=
Q
QSET
CLR
D
CDR Circuit
Data with Embeded Clock
Recovered Clock
Output
8/6/04 32
Characteristics of CDR Characteristics of CDR CktCkt
Region1 (0~70KHz)Region1 (0~70KHz)Magnitude gain is 1Magnitude gain is 1Phase curve is flatPhase curve is flat
Region2(70KHz~2MHz)Region2(70KHz~2MHz)Magnitude gain is 1Magnitude gain is 1Phase curve is nonPhase curve is non--flatflat
Region3(2MHz~40MHz) Region3(2MHz~40MHz) Magnitude gain is < 1Magnitude gain is < 1
Phase curve is nonPhase curve is non--flatflat
Region4(40MHz~ )Region4(40MHz~ )Magnitude gain is negligibleMagnitude gain is negligible
region1 region2 region3 region4
Divide it into 4 regions:Divide it into 4 regions:
17
8/6/04 33
BER Estimation (Region 4)BER Estimation (Region 4)
Magnitude gain is negligibly Magnitude gain is negligibly smallsmall
⇒⇒SJ is not tracked at allSJ is not tracked at all⇒⇒SJ can be interpreted as RJSJ can be interpreted as RJ
Error occurs whenError occurs when
Thus effective variance is:Thus effective variance is:
Error Boundaries
Total Jitter
Sinusoidal Jitter
Recovered Clock Jitter
Jitter (seconds)
Number of Samples
2/)()sin(1 Ttnta ≥+ω
22
12
2 neffa σσ +=
8/6/04 34
Experiment ResultsExperiment Results
1.00E-07
1.00E-06
1.00E-05
1.00E-04
1.00E-03
1.00E-02
T/6.6 T/7.8 T/8.8 T/9.8
RJ Var
BER
Sim. BER Est. BER
1.00E-07
1.00E-06
1.00E-05
1.00E-04
1.00E-03
1.00E-02
T/6.6 T/7.8 T/8.8 T/9.8
RJ Var
BE
R
Sim. BER Est. BER
1.00E-07
1.00E-06
1.00E-05
1.00E-04
1.00E-03
1.00E-02
T/6.6 T/7.8 T/8.8 T/9.8
RJ Var
BER
Sim. BER Est. BER
1.00E-07
1.00E-06
1.00E-05
1.00E-04
1.00E-03
1.00E-02
T/6.6 T/7.8 T/8.8 T/9.8
RJ Var
BER
Sim. BER Est. BER
Region 3 (10MHz SJ + RJ)
Region 2 (1 MHz SJ + RJ)Region 1 (50KHz SJ + RJ)
Region 4 (100MHz SJ + RJ)
18
8/6/04 35
Experiment ResultsExperiment Results
<2% errors between simulated and estimated <2% errors between simulated and estimated BERBER’’s s ⇒⇒ Proposed technique seems promising for estimatingProposed technique seems promising for estimating
the BERthe BER
1.00E-07
1.00E-06
1.00E-05
1.00E-04
1.00E-03
1.00E-02
T/6.6 T/7.8 T/8.8 T/9.8
RJ Var
BER
Sim. BER Est. BER
⇒⇒ In this experiment, three SJ components (50KHz, 1MHz, and 10MHz) are injected with RJ
8/6/04 36
Summary and OnSummary and On--Going Work Going Work Jitter spectral analysisJitter spectral analysis
Accurate extraction of sinusoidal and random jitter componentsAccurate extraction of sinusoidal and random jitter components
Estimation of BER usingEstimation of BER usingFrequencies and amplitudes of Frequencies and amplitudes of SJsSJsVariance of RJVariance of RJCharacteristics of the CDR circuitCharacteristics of the CDR circuit
⇒⇒ Simulation results are promisingSimulation results are promising
OnOn--going workgoing workInclude nonInclude non--idealities of the CDR circuitidealities of the CDR circuitIncorporate the Data Dependent Jitter (DDJ)Incorporate the Data Dependent Jitter (DDJ)Validate by hardware measurementValidate by hardware measurement