High Speed Digital Systems LabJune 2008

Acceleration of Economic Calculation

Developers: Ayal Ozer and Eyal EfratMentor: Michael Yampolsky

Black & Scholes modelAcceleration

Overview and reminder Interface Architecture and SW Problems we’ve encountered Solutions Timetable

Acceleration of Economic Calculation Agenda

The B&S formula estimates the value of an option

Using specialized hardware could accelerate the calculation time of the B&S value by a factor of hundreds

Acceleration of Economic CalculationOverview

Acceleration of Economic Calculation The interface

Gui_1.exe

AEC SW

Financial Server

Local Server

Acceleration of Economic CalculationArchitecture

B&S inputB&S input B&S inputB&S inputB&S input

B&S input

B&S input

Regular software calculation

Input from

server

Output to GUI

B&S input

Acceleration of Economic CalculationArchitecture

B&S

B&S

B&S

Input table from B&S SW

Arbitrator

Output table to B&S software

Arbitrator

Acceleration of Economic CalculationProblems

The Logarithm function

Floating point

Acceleration of Economic CalculationPossible solutions

Taylor series

Embedded core: NIOS II

Look Up Table

Acceleration of Economic CalculationArchitecture revised/continued

B&S black-box diagram

Distribution table & Lan

LUT

InputB&S

Combinatorical

LogicOutput

Acceleration of Economic CalculationTime Table

Theoretic background

SW development

RTL part 1

Summer vacation and exams

RTL part 2

system integration

benchmarking

01/06/2008

09/09/2008

18/12/2008

28/03/2009

Start DateCompletedRemaining

Acceleration of Economic Calculation

Questions?