High Reliability, Harsh Environment Electronics ECTC 2017 HT_Electronics and reliability GE.pdfHigh Reliability Harsh Environment Electronics . Performance challenges at high temp:

Imagination at work.

Emad Andarawis, David Shaddock, Liang Yin Presenter: Nancy Stoffel

High Reliability, Harsh Environment Electronics ECTC 2017

© 2017 General Electric Company - All rights reserved

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High Reliability Harsh Environment Electronics

Performance challenges at high temp: •Parameter shifts over temperature and time •Integration potential

Reliability challenges at high temp: •Industry driven by O&G: 1-2K hours of life at 210-225C •Long Un-accelerated testing time (Years!)

Reliability and performance go down with temperature, so does our ability to assess them!


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High temp reliability and challenges

Delamination @ temp

Via Barrel cracking Corrosion due to

flame retardant

Thru-hole solder failures (HMP)

Crack

Trace Solder

Surface mount solder failures

On-chip via current density


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Reliability assessment approach and test capabilities

Screening Accelerated life testing

Model parameter extraction

Life Prediction

Failure Analysis

ReliaSoft ALTA 7 - www.ReliaSoft.com

Life vs Stress

TiW\Data 1: Beta=4.4208; B=1.1887E+4; C=2.9776E-5TiWMo\Data 1: Beta=3.8180; B=2.0983E+4; C=1.1984E-11

Stress

Life

790.000550.000 598.000 646.000 694.000 742.0001.000

1000000.000

10.000

100.000

1000.000

10000.000

100000.000

LifeCB@90% 1-Sided TB

TiWMo\Data 1ArrheniusWeibull572F=16 | S=6

Eta LineTop CB EtaBottom CB Eta

573.15Eta PointImposed Pdf

678.15Stress Level PointsEta PointImposed Pdf



TiW\Data 1ArrheniusWeibull572F=17 | S=3

Eta LineTop CB EtaBottom CB Eta

573.15Eta PointImposed Pdf


713.15Stress Level PointsEta Point

HTS to 260 ˚ C

Thermal shock chambers -70 to 350 & 370˚C HTS to 704˚C High Temp Vibration to 300˚C

Validation


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High Temperature Circuit Substrates

Laminates attractive from cost, circuit density and assembly perspective. Suitability for high temperature, high reliability applications unknow. Screen laminates with common circuit board test methods: via thermal cycling, weight loss, peel strength, and surface insulation resistance (SIR). Materials selected from those with high Tg(>250˚C), low CTEz, and modulus.

Cost Feature size

Lifetime above 200C

CTE to Semiconductor

Circuit Density

Second level assembly

Thermal conductivity

Circuit board laminates (FR-4)

Thick film/Al2O3

Thin film/AlN

LTCC

HTCC


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Isothermal Aging at 200˚C Images Polyimide 1 Polyimide 2 Polyimide 3 PTFE

0 hours

4000 hours

5000 hours

6000 hours

Polyimides have little remaining structure after 5000 hours (~5%wt loss). PTFE is still surviving >8000 hours at 200˚C.


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Secondary Creep Test Results

Seco

ndar

y Eq

uiv.

Stra

in R

ate

(1/s

)

Von Mises Stress (MPa)

6

4

Temperature

MTS Test Frame

Solder Model Characterization Controllable Parameters: • Stress level • Strain rate • Load amplitude • Temperature • Multiple strain-range modes

𝑁𝑓 =𝜃∆𝑊

∝

ε p (plastic strain)

σ (s

tres

s)

έ (Strain rate)

T (Temperature)

Elastic-Plastic Tests


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Reliability model development example: Passives Test Setup

Fixture Wired in Furnace

Physics of Failure Models

Simulated Failure Rates

HALT, Step Stress Testing

Reliability DOE

Device Loads

Load Factors

Life Model Prediction

Mean Life Validation

Design Limits

DOE Levels

What are the model coefficients?

How good is the prediction?

−

=

211

2

2

1 11expTTk

EVV

tt a

nFailure Model: Prokopowicz equation

ReliaSoft ALTA 7 - www.ReliaSoft.comProbability - Lognormal

Std=0.3589; B=3.3687E+4; C=6.9597E-16; n=3.9307

Time

Unre

liabil

ity

0.100 100000.0001.000 10.000 100.000 1000.000 10000.0001.000

5.000

10.000

50.000

99.000Probability

Selected Data_2Temperature-NonThermalLognormal573|50F=5 | S=4

Stress Level PointsStress Level Line

573|100F=10 | S=0


573|200F=10 | S=0


598|50F=9 | S=0


598|100F=6 | S=0


598|200F=10 | S=0


573|25Use Level Line

David ShaddockGeneral Electric Global Research6/14/20112:42:30 PM

Reliability versus stress factor


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Summary

• Reliability and performance degrade as temperature increases • Life prediction models don’t adequately cover operation above

conventional (~125C) temperatures • High reliability applications require test time acceleration • A number of existing device and packaging options target short

duration use.

• Reliability assessment and modeling approach was developed • Life prediction and acceleration models at extended

temperature.

Documents

High Reliability, Harsh Environment Electronics ECTC 2017 HT_Electronics and reliability GE.pdfHigh Reliability Harsh Environment Electronics . Performance challenges at high temp: