High Performance Analog Solutions for lower mass

satellite modules

Paul McCormack

AMICSA 2008September 1st

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Company Information

• National Semiconductor creates energy-efficient analog and mixed-signal semiconductors – PowerWise® products consume less power, extend

battery life, and generate less heat– SolarMagic™technology increases the overall energy

output of solar electric power generating systems• Founded in 1959 in Danbury, Connecticut, USA• Headquartered in Santa Clara, California since 1967• $1.89 billion sales for FY 2008 (June through May)• Portfolio of over 3,095 patents• 7,300+ employees worldwide

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PowerWise® Initiative

•PowerWise Devices– 300 products selected by

strict power-to-performance efficiency metrics in 25 product categories

•PowerWise Subsystems– Complementary devices

act as a unit to provide optimal mix of low power consumption and heat

•PowerWise Architectures– Collaborations with system

designers to significantly lower power consumption while boosting performance

Power

PowerWise® Architecture

Data

PowerWise® Devices

PowerWise®

Subsystem

AMP

AMP

ADC

ADC

RF

I

Q

Clock

LDO

LDO

SER/DES

Energy MgmtUnit

FPGA

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• 30+ years in the Space Market• World Class Analog Products

– High Speed Converters

– High Speed and Precision Amplifiers – Low Jitter Clocking and High Speed SerDes

• European Focus on Space– Wafer Fab in Greenock Scotland– Multiple Design Centres in Europe– Dedicated Marketing & Engineering in European

Headquarters

• Radiation Testing– TID: 60Co gamma cell in South Portland Maine and Santa Clara

California

– ELDRS: ELDRS Free products

– SEE: SEL and SEU testing

National Space Operations

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National Space Strategy – A Rich Space Analog Portfolio

Analog Building Blocks QMLV Qualified Products

• State of the art radiation tolerant process technology

• Industry leading hermetic package technology

• Quality, Delivery and Performance

World-Class Product Portfolio

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Focused Satellite Applications

Applications AOCS Timing/Interface CommunicationSpace Imaging

System FunctionMaintain or

Change Orbit

Payload & Bus Communication &

Signal Integrity

Backbone of Communications Market

Integral in National Security and Tracking

System Requirements

Lower Power, Increase Precision

Low Power, High Speed, Low Phase Noise and Jitter, Increase Precision

Higher Bandwidth, Lower Noise Power Ratio, Lower Power

Lower Power, Higher Resolution, More Integration

Technology Needed Now

GP ADC & DACs

Precision Amps, Temp Sensors

Precision Clock Conditioners & References, SerDes & Buffers, Comparators

High Speed & Giga Sample ADCs, Giga Sample DACs

Low Power Analog Front Ends

High Performance Analog for Communications

ATM_213

Network Centric

BroadcastSatellites

Two-way CommSatellites

ATM Space System

NavigationSatellites

(GPS, Galileo,GLONASS)

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Tx/Rx Solution for Communications Satellites

ProcessingModule

ClockDist

VCO PLLClock

Jitter Clean Up

To Rx Module

Rx – RF Module

Low Noise Block1st Stage - Low Noise X-tor

2nd Stage – Gain w/Low Noise

PLL

VC

O

IF Gain Stage1st Stage – Discrete Filter

2nd Stage – Gain w/Low Noise3rd Stage – Discrete Attenuator

SerLVDS

Tx – RF ModulePLL

VC

O

LVDS

DAC De-SerPARF Gain Block

1st Stage – Discrete Filter2nd Stage – Gain w/Low Noise

IF Gain Stage1st Stage – Discrete Filter

2nd Stage – Gain w/Low Noise

ClockDist

VCO PLLClock

Jitter Clean Up

To Tx Module

FPGAor

ASIC

Ser

FPGAor

ASICDe-SerADC

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ADC08D1520 QMLV Available

• Dual Channel 8-Bit 1.5 GSPS ADC, Single 8-bit 3 GSPS ADC

– Max sampling frequency 1.7GSPS– Inputs may be interleaved to obtain a

3GSPS single ADC– Full power bandwidth of 2 GHz– 7.15 ENOBs out to Nyquist– Lowest Power in the industry at 1 W per

channel at 1.5 GSPS from single 1.9V supply

– Very low cross-talk (-71 dB @ 867 MHz)– Low-noise deMUX’d LVDS outputs– Guaranteed no missing codes– In 128 pin Hermetic Ceramic Quad Flat Pack – Space Level Version

• TID of 300 krad(Si)• Single Event Latchup > 120 Mev

– Order as 5962F0721401VZC

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ADC08D1520WG-QV Block Diagram

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Bench FFT , Sample Rate = 1500Mhz Input 97.47MHz I Channel

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Bench FFT , Sample Rate = 1500Mhz Input 797.47MHz I Channel

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Bench FFT , Sample Rate = 1500Mhz Input 997.47MHz I Channel

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• Higher dynamic range enables higher orders of modulation giving satellite operators higher data rates, increased functionality & power savings

The Need for More Dynamic RangeHigher Orders of Modulation

Higher Resolution ADCs & More Dynamic Range Needed

QPSK (4-QAM) 64-QAM16-QAM

QAM – Quadrature Amplitude ModulationData

Modulator +

90° out of phase and varying amplitude

Transmitted signal has an amplitude and phase component

Am

plit

ud

e

θ = Phase

16-QAM Example

At receiver, unique amplitude and phase of

received signal determines the symbol sent, 1100 in

this 16-QAM example

……...128-QAM ….....256-QAM ….

Spacing Between Symbols Decreases

Modulation Example:

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• As modulation order increases, the spacing between symbols decreases

• Increased SNR due to increased resolution allows higher order modulation schemes to be resolved

• Higher order modulation encodes more bits per symbol increasing Bandwidth efficiency– Enables satellite operators increased functionality (data, voice, video)

• Increased bits per symbol reduces the number of transmissions required– Lower power consumption of satellite receiver– Longer battery life for terrestrial mobile handsets

QPSK (4-QAM) 64-QAM16-QAM ……...128-QAM ….....256-QAM ….

Spacing Between Symbols Decreases

The Need for More Dynamic Range Higher Orders of Modulation

Higher Resolution ADCs & More Dynamic Range Needed

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The Need for More Dynamic Range

• Increase in dynamic range

– Improves satellite reception in harsh weather conditions• Permits processing of

weak and high strength signals

• Reduces downgrading of modulation order

– Maintains data rate

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The Need for Speed & Increased Input Bandwidth

• Giga Sample ADCs increase Nyquist bandwidth (Wideband Communications)– More carriers allowing for more

user channels available for lease

– More flexibility in modulation techniques• More flexibility in CDM sub-carrier

bandwidth

• Large Input Bandwidth– Reduces the number of down

conversion stages

– Higher IF sampling– Direct RF sampling of L-Band

and some S-Band payloads

– Reduces payload power budget and weight

RF Stage

IF Stage

ADCDigital Proc

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Narrowband Receiver

RF Stage

ADCDigital Proc

IF Stage

IF Stage

BPF

(Passive)

• Sufficient ADC BW can eliminate 2nd IF Stage (RF mixer & freq synthesizer)– Reduces system cost – fewer components per RX channel

– Reduces system weight and power, benefit is multiplied over multiple channels

• High X MSPS Sample Rate allows instantaneous sampling of ½X MHz BW signal– More FDM channels & Fewer RX channel

– Overall reduction in power consumption and payload weight

• Large SNR and SFDR allows higher order modulation schemes– Increases overall system throughput

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ADC14155 – Solution for narrowband communications systems• 14-bit 155 MSPS ADC

– Input bandwidth of 1.1GHz

– 11.4 ENOBs out to Nyquist, 11.3 ENOBs at fin=200MHz

– SNR of 71 dB at Nyquist, 70 dB at fin=200MHz

– SFDR of 87 dB at Nyquist, 81 dB at fin=200MHz

– Power Consumption of 967mW at 155 MSPS

– INL of +/- 1.9 LSBs

– DNL of +/-0.5 LSBs

– Guaranteed no missing codes

– Dual 1.8V and 3.3V operation

– In 48 pin Hermetic Ceramic Quad Flat Pack

– Space Level Version

• TID of 100 krad(Si)

• Single Event Latchup > 120 MeV

– Order as 5962R0626201VXC

Sampling NowSpace Level Release Sep 08

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High Performance Analog forAttitude & Orbit Control Systems (AOCS)

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AOCS Signal Path Products

AnalogSwitches

Buffer AmpsLMP2012

ADC128S102

DAC121S101

FPGA

DATA PROCESSIN

G

DAC

ADC

Vref

SensorsGyroscopePressure

Temperature

SunStar

Temp

Driver AmpsLMP2012

• ADC - Low Power, 12-bit, 8 Input Mux, 1MSPS, with SPI output

• DAC - Low Power, 12-bit, 12μs settling time, 20MHz SPI input

• Precision Amplifier - Dual Channel, No 1/f noise, Stable over Time and Temperature, 5V RRO, Gain Bandwidth 3MHz

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ADC128S102 – Application Advantages

N analog linesfrom sensors

Pressure SensorEarth SensorSun Sensor

Inertial SensorEtc…

x ADCCS lines

LogicDecoderADC124S101

ADC Sampling Clock

Serial Data IN

Serial Data OUT

ADC Selection

Eight sensors can be monitored with one ADC

Large number of analog sensormeasurements are digitized early in the signal path.

ADC addressing through CS decoder

All ADC serialized data shares the same input bus to onboard FPGA/ASIC

ADC128S102

ADC128S102

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LMP2012

Dual Channel, High Precision, Rail-to-Rail Output Op Amp

– Very Low TCVOS – 0.015uV/°C

– Low Input offset voltage of 60 μV over time and temperature.

– No 1/f noise - input-referred voltage noise of 35 nV/ Hz

– Low supply current – 920uA– Wide gain bandwidth – 3MHz– 2.7 to 5.0V supply voltage range– High CMRR – 130 dB– High PSRR – 120 dB– Hermetic 10-pin ceramic gullwing flat

package– Space Level version

• TID of 50 krad(Si)

• ELDRS qualified to 50 krad(Si)

• Low SET Cross-Section

– Order as 5962L062061VZA

QMLV Available!

Thank you!

Questions????

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